From: "Chegondi, Harish" <harish.chegondi@intel.com>
To: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Cc: "Sarvela, Tomi P" <tomi.p.sarvela@intel.com>,
"Nikula, Jani" <jani.nikula@intel.com>
Subject: Re: [PATCH v2 1/1] drm/i915: skip the second CRC even for GEN 7 GPUs
Date: Wed, 23 Oct 2019 22:15:19 +0000 [thread overview]
Message-ID: <04bac1828ae32de4e7cc2e8ab5a5bd92f8b8545e.camel@intel.com> (raw)
In-Reply-To: <bce95a8734ab5ed10c9f26395671ca0995767d2a.1571813756.git.harish.chegondi@intel.com>
Hi,
Even though I tried to link this patch with it's first version by
specifying --in-reply-to=<message-id>, it wasn't successful. So here is
the link to the first version of the patch and the discussion.
https://patchwork.freedesktop.org/patch/305153/?series=60697&rev=1
The first version of this patch has been "Acked-by" but wasn't
"Reviewed-by" as the patch adds another workaround on top of an already
existing workaround. The patch doesn't fix the cause of invalid CRCs
being generated which still needs to be investigated and fixed. I am
rebasing and resending the patch to seek feedback on how to move
further with this patch.
Thank You
Harish
On Wed, 2019-10-23 at 00:24 -0700, Harish Chegondi wrote:
> display_pipe_crc_irq_handler() skips the first CRC for all GPUs and
> the
> second CRC for GEN8+ GPUs. The second CRC is invalid even for BYT
> which
> is a GEN7 GPU. So, skip the second CRC even for GEN7 GPUs.
>
> v2: Rebase
>
> Cc: Jani Saarinen <jani.saarinen@intel.com>
> Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>
> Cc: Petri Latvala <petri.latvala@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=103191
> ---
> drivers/gpu/drm/i915/i915_irq.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index 572a5c37cc61..312ca9d5292a 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1565,11 +1565,11 @@ static void
> display_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
> * bonkers. So let's just wait for the next vblank and read
> * out the buggy result.
> *
> - * On GEN8+ sometimes the second CRC is bonkers as well, so
> + * On GEN7+ sometimes the second CRC is bonkers as well, so
> * don't trust that one either.
> */
> if (pipe_crc->skipped <= 0 ||
> - (INTEL_GEN(dev_priv) >= 8 && pipe_crc->skipped == 1)) {
> + (INTEL_GEN(dev_priv) >= 7 && pipe_crc->skipped == 1)) {
> pipe_crc->skipped++;
> spin_unlock(&pipe_crc->lock);
> return;
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: "Chegondi, Harish" <harish.chegondi@intel.com>
To: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Cc: "Sarvela, Tomi P" <tomi.p.sarvela@intel.com>,
"Nikula, Jani" <jani.nikula@intel.com>
Subject: Re: [Intel-gfx] [PATCH v2 1/1] drm/i915: skip the second CRC even for GEN 7 GPUs
Date: Wed, 23 Oct 2019 22:15:19 +0000 [thread overview]
Message-ID: <04bac1828ae32de4e7cc2e8ab5a5bd92f8b8545e.camel@intel.com> (raw)
Message-ID: <20191023221519.YCoGJEgxQqJQ1uZ5uJIUjmyjwSiYP1b5VW7kv3o9Kmc@z> (raw)
In-Reply-To: <bce95a8734ab5ed10c9f26395671ca0995767d2a.1571813756.git.harish.chegondi@intel.com>
Hi,
Even though I tried to link this patch with it's first version by
specifying --in-reply-to=<message-id>, it wasn't successful. So here is
the link to the first version of the patch and the discussion.
https://patchwork.freedesktop.org/patch/305153/?series=60697&rev=1
The first version of this patch has been "Acked-by" but wasn't
"Reviewed-by" as the patch adds another workaround on top of an already
existing workaround. The patch doesn't fix the cause of invalid CRCs
being generated which still needs to be investigated and fixed. I am
rebasing and resending the patch to seek feedback on how to move
further with this patch.
Thank You
Harish
On Wed, 2019-10-23 at 00:24 -0700, Harish Chegondi wrote:
> display_pipe_crc_irq_handler() skips the first CRC for all GPUs and
> the
> second CRC for GEN8+ GPUs. The second CRC is invalid even for BYT
> which
> is a GEN7 GPU. So, skip the second CRC even for GEN7 GPUs.
>
> v2: Rebase
>
> Cc: Jani Saarinen <jani.saarinen@intel.com>
> Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>
> Cc: Petri Latvala <petri.latvala@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=103191
> ---
> drivers/gpu/drm/i915/i915_irq.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index 572a5c37cc61..312ca9d5292a 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1565,11 +1565,11 @@ static void
> display_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
> * bonkers. So let's just wait for the next vblank and read
> * out the buggy result.
> *
> - * On GEN8+ sometimes the second CRC is bonkers as well, so
> + * On GEN7+ sometimes the second CRC is bonkers as well, so
> * don't trust that one either.
> */
> if (pipe_crc->skipped <= 0 ||
> - (INTEL_GEN(dev_priv) >= 8 && pipe_crc->skipped == 1)) {
> + (INTEL_GEN(dev_priv) >= 7 && pipe_crc->skipped == 1)) {
> pipe_crc->skipped++;
> spin_unlock(&pipe_crc->lock);
> return;
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-10-23 22:15 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-16 5:58 [PATCH 0/1] Reg: igt@kms_pipe_crc_basic@* CRC mismatch test failures Harish Chegondi
2019-05-16 5:58 ` [PATCH 1/1] drm/i915: skip the second CRC even for GEN 7 GPUs Harish Chegondi
2019-05-16 8:30 ` Jani Nikula
2019-05-16 12:46 ` Maarten Lankhorst
2019-05-16 12:55 ` Jani Nikula
2019-05-16 13:30 ` Ville Syrjälä
2019-05-16 15:46 ` Jani Nikula
2019-05-16 21:02 ` Chegondi, Harish
2019-05-16 20:52 ` Chegondi, Harish
2019-10-23 7:24 ` [PATCH v2 0/1] Invalid CRCs causing CRC mismatch test failures Harish Chegondi
2019-10-23 7:24 ` [PATCH v2 1/1] drm/i915: skip the second CRC even for GEN 7 GPUs Harish Chegondi
2019-10-23 22:15 ` Chegondi, Harish [this message]
2019-10-23 22:15 ` [Intel-gfx] " Chegondi, Harish
2019-10-23 8:08 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/1] " Patchwork
2019-05-16 6:33 ` ✓ Fi.CI.BAT: success for Reg: igt@kms_pipe_crc_basic@* CRC mismatch test failures Patchwork
2019-05-16 7:51 ` ✓ Fi.CI.IGT: " Patchwork
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