From: David Laight <David.Laight@ACULAB.COM>
To: "'Casey Leedom'" <leedom@chelsio.com>,
"Raj, Ashok" <ashok.raj@intel.com>
Cc: Ding Tianhong <dingtianhong@huawei.com>,
Alexander Duyck <alexander.duyck@gmail.com>,
Alex Williamson <alex.williamson@redhat.com>,
Sinan Kaya <okaya@codeaurora.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"helgaas@kernel.org" <helgaas@kernel.org>,
"Michael Werner" <werner@chelsio.com>,
Ganesh GR <ganeshgr@chelsio.com>,
"asit.k.mallick@intel.com" <asit.k.mallick@intel.com>,
"patrick.j.cramer@intel.com" <patrick.j.cramer@intel.com>,
"Suravee.Suthikulpanit@amd.com" <Suravee.Suthikulpanit@amd.com>,
"Bob.Shaw@amd.com" <Bob.Shaw@amd.com>,
"l.stach@pengutronix.de" <l.stach@pengutronix.de>,
"amira@mellanox.com" <amira@mellanox.com>,
"gabriele.paoloni@huawei.com" <gabriele.paoloni@huawei.com>,
"jeffrey.t.kirsher@intel.com" <jeffrey.t.kirsher@intel.com>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will.deacon@arm.com" <will.deacon@arm.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"robin.murphy@arm.com" <robin.murphy@arm.com>,
"davem@davemloft.net" <davem@davemloft.net>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linuxarm@huawei.com" <linuxarm@huawei.com>
Subject: RE: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported
Date: Mon, 7 Aug 2017 09:04:19 +0000 [thread overview]
Message-ID: <063D6719AE5E284EB5DD2968C1650D6DD004C785@AcuExch.aculab.com> (raw)
In-Reply-To: <MWHPR12MB160086C4B4FA8F3B2EC1D5F9C8B60@MWHPR12MB1600.namprd12.prod.outlook.com>
From: Casey Leedom
> Sent: 04 August 2017 21:49
...
> Whenever our Hardware Designers implement new functionality in our hardware,
> they almost always put in A. several "knobs" which can control fundamental
> parameters of the new Hardware Feature, and B. a mechanism of completely
> disabling it if necessary. This stems from the incredibly long Design ->
> Deployment cyle for Hardware (as opposed to the edit->compile->run cycle for s!
Indeed, I'd also expect there to be an undocumented flag to turn
it on (broken) in earlier parts to allow testing.
David
WARNING: multiple messages have this Message-ID (diff)
From: David Laight <David.Laight@ACULAB.COM>
To: 'Casey Leedom' <leedom@chelsio.com>, "Raj, Ashok" <ashok.raj@intel.com>
Cc: Ding Tianhong <dingtianhong@huawei.com>,
Alexander Duyck <alexander.duyck@gmail.com>,
Alex Williamson <alex.williamson@redhat.com>,
Sinan Kaya <okaya@codeaurora.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"helgaas@kernel.org" <helgaas@kernel.org>,
"Michael Werner" <werner@chelsio.com>,
Ganesh GR <ganeshgr@chelsio.com>,
"asit.k.mallick@intel.com" <asit.k.mallick@intel.com>,
"patrick.j.cramer@intel.com" <patrick.j.cramer@intel.com>,
"Suravee.Suthikulpanit@amd.com" <Suravee.Suthikulpanit@amd.com>,
"Bob.Shaw@amd.com" <Bob.Shaw@amd.com>,
"l.stach@pengutronix.de" <l.stach@pengutronix.de>,
"amira@mellanox.com" <amira@mellanox.com>,
"gabriele.paoloni@huawei.com" <gabriele.paoloni@huawei.com>,
"jeffrey.t.kirsher@intel.com" <jeffrey.t.kirsher@intel.com>,
"catal
Subject: RE: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported
Date: Mon, 7 Aug 2017 09:04:19 +0000 [thread overview]
Message-ID: <063D6719AE5E284EB5DD2968C1650D6DD004C785@AcuExch.aculab.com> (raw)
In-Reply-To: <MWHPR12MB160086C4B4FA8F3B2EC1D5F9C8B60@MWHPR12MB1600.namprd12.prod.outlook.com>
From: Casey Leedom
> Sent: 04 August 2017 21:49
...
> Whenever our Hardware Designers implement new functionality in our hardware,
> they almost always put in A. several "knobs" which can control fundamental
> parameters of the new Hardware Feature, and B. a mechanism of completely
> disabling it if necessary. This stems from the incredibly long Design ->
> Deployment cyle for Hardware (as opposed to the edit->compile->run cycle for s!
Indeed, I'd also expect there to be an undocumented flag to turn
it on (broken) in earlier parts to allow testing.
David
WARNING: multiple messages have this Message-ID (diff)
From: David Laight <David.Laight@ACULAB.COM>
To: 'Casey Leedom' <leedom@chelsio.com>, "Raj, Ashok" <ashok.raj@intel.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
"gabriele.paoloni@huawei.com" <gabriele.paoloni@huawei.com>,
"asit.k.mallick@intel.com" <asit.k.mallick@intel.com>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will.deacon@arm.com" <will.deacon@arm.com>,
"linuxarm@huawei.com" <linuxarm@huawei.com>,
Alexander Duyck <alexander.duyck@gmail.com>,
Sinan Kaya <okaya@codeaurora.org>,
"amira@mellanox.com" <amira@mellanox.com>,
"helgaas@kernel.org" <helgaas@kernel.org>,
"jeffrey.t.kirsher@intel.com" <jeffrey.t.kirsher@intel.com>,
Ding Tianhong <dingtianhong@huawei.com>,
Ganesh GR <ganeshgr@chelsio.com>,
"Bob.Shaw@amd.com" <Bob.Shaw@amd.com>,
"patrick.j.cramer@intel.com" <patrick.j.cramer@intel.com>,
Alex Williamson <alex.williamson@redhat.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
Michael Werner <werner@chelsio.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Suravee.Suthikulpanit@amd.com" <Suravee.Suthikulpanit@amd.com>,
"robin.murphy@arm.com" <robin.murphy@arm.com>,
"davem@davemloft.net" <davem@davemloft.net>,
"l.stach@pengutronix.de" <l.stach@pengutronix.de>
Subject: RE: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported
Date: Mon, 7 Aug 2017 09:04:19 +0000 [thread overview]
Message-ID: <063D6719AE5E284EB5DD2968C1650D6DD004C785@AcuExch.aculab.com> (raw)
In-Reply-To: <MWHPR12MB160086C4B4FA8F3B2EC1D5F9C8B60@MWHPR12MB1600.namprd12.prod.outlook.com>
From: Casey Leedom
> Sent: 04 August 2017 21:49
...
> Whenever our Hardware Designers implement new functionality in our hardware,
> they almost always put in A. several "knobs" which can control fundamental
> parameters of the new Hardware Feature, and B. a mechanism of completely
> disabling it if necessary. This stems from the incredibly long Design ->
> Deployment cyle for Hardware (as opposed to the edit->compile->run cycle for s!
Indeed, I'd also expect there to be an undocumented flag to turn
it on (broken) in earlier parts to allow testing.
David
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: David.Laight@ACULAB.COM (David Laight)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported
Date: Mon, 7 Aug 2017 09:04:19 +0000 [thread overview]
Message-ID: <063D6719AE5E284EB5DD2968C1650D6DD004C785@AcuExch.aculab.com> (raw)
In-Reply-To: <MWHPR12MB160086C4B4FA8F3B2EC1D5F9C8B60@MWHPR12MB1600.namprd12.prod.outlook.com>
From: Casey Leedom
> Sent: 04 August 2017 21:49
...
> Whenever our Hardware Designers implement new functionality in our hardware,
> they almost always put in A. several "knobs" which can control fundamental
> parameters of the new Hardware Feature, and B. a mechanism of completely
> disabling it if necessary. This stems from the incredibly long Design ->
> Deployment cyle for Hardware (as opposed to the edit->compile->run cycle for s!
Indeed, I'd also expect there to be an undocumented flag to turn
it on (broken) in earlier parts to allow testing.
David
next prev parent reply other threads:[~2017-08-07 9:04 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-13 14:21 [PATCH v7 0/3] Add new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Ding Tianhong
2017-07-13 14:21 ` Ding Tianhong
2017-07-13 14:21 ` [PATCH v7 1/3] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING Ding Tianhong
2017-07-13 14:21 ` Ding Tianhong
2017-08-03 8:55 ` Raj, Ashok
2017-08-03 8:55 ` Raj, Ashok
2017-08-03 10:20 ` Ding Tianhong
2017-08-03 10:20 ` Ding Tianhong
2017-07-13 14:21 ` [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported Ding Tianhong
2017-07-13 14:21 ` Ding Tianhong
2017-07-13 14:21 ` Ding Tianhong
2017-07-13 21:09 ` Sinan Kaya
2017-07-13 21:09 ` Sinan Kaya
2017-07-14 1:26 ` Ding Tianhong
2017-07-14 1:26 ` Ding Tianhong
2017-07-14 13:54 ` Sinan Kaya
2017-07-14 13:54 ` Sinan Kaya
2017-07-22 4:19 ` Ding Tianhong
2017-07-22 4:19 ` Ding Tianhong
2017-07-24 15:05 ` Alex Williamson
2017-07-24 15:05 ` Alex Williamson
2017-07-26 18:26 ` Casey Leedom
2017-07-26 18:26 ` Casey Leedom
2017-07-26 18:26 ` Casey Leedom
2017-07-26 18:26 ` Casey Leedom
[not found] ` <CAKgT0UeAad6WArvrE71MFJywDs1wOnCF-iJRnbNLrL+knqhXeA@mail.gmail.com>
[not found] ` <CAKgT0Uf5hdXUXja_jUB6_kBg6pyX8zXuOMOGzCVNgeBFMUsWqQ@mail.gmail.com>
2017-07-26 18:44 ` Alexander Duyck
2017-07-26 19:05 ` Casey Leedom
2017-07-26 19:05 ` Casey Leedom
2017-07-26 19:05 ` Casey Leedom
2017-07-26 19:05 ` Casey Leedom
2017-07-27 1:01 ` Ding Tianhong
2017-07-27 1:01 ` Ding Tianhong
2017-07-27 1:01 ` Ding Tianhong
2017-07-27 1:01 ` Ding Tianhong
2017-07-27 17:44 ` Casey Leedom
2017-07-27 17:44 ` Casey Leedom
2017-07-27 17:44 ` Casey Leedom
2017-07-27 17:44 ` Casey Leedom
2017-07-27 18:42 ` Raj, Ashok
2017-07-27 18:42 ` Raj, Ashok
2017-07-27 18:42 ` Raj, Ashok
2017-07-27 18:42 ` Raj, Ashok
2017-07-28 2:57 ` Ding Tianhong
2017-07-28 2:57 ` Ding Tianhong
2017-07-28 2:57 ` Ding Tianhong
2017-07-28 2:57 ` Ding Tianhong
2017-07-28 2:48 ` Ding Tianhong
2017-07-28 2:48 ` Ding Tianhong
2017-07-28 2:48 ` Ding Tianhong
2017-07-28 2:48 ` Ding Tianhong
2017-07-27 1:08 ` Ding Tianhong
2017-07-27 1:08 ` Ding Tianhong
2017-07-27 1:08 ` Ding Tianhong
2017-07-27 1:08 ` Ding Tianhong
2017-07-27 17:49 ` Alexander Duyck
2017-07-27 17:49 ` Alexander Duyck
2017-07-27 17:49 ` Alexander Duyck
2017-07-27 17:49 ` Alexander Duyck
2017-07-28 3:00 ` Ding Tianhong
2017-07-28 3:00 ` Ding Tianhong
2017-07-28 3:00 ` Ding Tianhong
2017-07-28 3:00 ` Ding Tianhong
2017-08-02 17:53 ` Casey Leedom
2017-08-02 17:53 ` Casey Leedom
2017-08-02 17:53 ` Casey Leedom
2017-08-02 17:53 ` Casey Leedom
2017-08-03 8:31 ` Raj, Ashok
2017-08-03 8:31 ` Raj, Ashok
2017-08-03 8:31 ` Raj, Ashok
2017-08-03 8:31 ` Raj, Ashok
2017-08-04 20:20 ` Casey Leedom
2017-08-04 20:20 ` Casey Leedom
2017-08-04 20:20 ` Casey Leedom
2017-08-04 20:20 ` Casey Leedom
2017-08-04 20:21 ` Raj, Ashok
2017-08-04 20:21 ` Raj, Ashok
2017-08-04 20:21 ` Raj, Ashok
2017-08-04 20:21 ` Raj, Ashok
2017-08-04 20:48 ` Casey Leedom
2017-08-04 20:48 ` Casey Leedom
2017-08-04 20:48 ` Casey Leedom
2017-08-04 20:48 ` Casey Leedom
2017-08-07 9:04 ` David Laight [this message]
2017-08-07 9:04 ` David Laight
2017-08-07 9:04 ` David Laight
2017-08-07 9:04 ` David Laight
2017-08-03 9:13 ` Raj, Ashok
2017-08-03 9:13 ` Raj, Ashok
2017-08-03 10:22 ` Ding Tianhong
2017-08-03 10:22 ` Ding Tianhong
2017-07-13 14:21 ` [PATCH v7 3/3] net/cxgb4: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Ding Tianhong
2017-07-13 14:21 ` Ding Tianhong
2017-07-13 14:21 ` Ding Tianhong
2017-07-13 18:14 ` Alexander Duyck
2017-07-13 18:14 ` Alexander Duyck
2017-07-13 18:14 ` Alexander Duyck
2017-07-13 18:14 ` Alexander Duyck
2017-07-13 18:17 ` Alexander Duyck
2017-07-13 18:17 ` Alexander Duyck
2017-07-13 18:17 ` Alexander Duyck
2017-07-13 18:17 ` Alexander Duyck
2017-07-13 18:44 ` Casey Leedom
2017-07-14 10:23 ` Ding Tianhong
2017-07-14 10:23 ` Ding Tianhong
2017-07-14 10:23 ` Ding Tianhong
2017-07-14 10:23 ` Ding Tianhong
2017-07-14 17:50 ` Casey Leedom
2017-07-14 17:50 ` Casey Leedom
2017-07-14 17:50 ` Casey Leedom
2017-07-14 17:50 ` Casey Leedom
2017-07-14 0:00 ` Casey Leedom
2017-07-14 0:00 ` Casey Leedom
2017-07-14 0:00 ` Casey Leedom
2017-07-14 0:00 ` Casey Leedom
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