[U-Boot] [PATCH u-boot 0/3] Add Ethernet support for Amlogic P212 Reference board

[U-Boot] [PATCH u-boot 0/3] Add Ethernet support for Amlogic P212 Reference board

[Neil Armstrong]

This patchset aims to add support for the Internal RMII Ethernet PHY of the
Amlogic Meson GXL S905X SoC on the Amlogic P212 Reference board.

The Internal PHY needs a specific config then acts as a generic PHY.

Neil Armstrong (3):
  net: phy: Add Amlogic Meson GXL Internal PHY support
  arm: meson: Add supplementary ethernet registers definitions
  arm: amlogic: p212: Add support for Ethernet with Internal PHY

 arch/arm/include/asm/arch-meson/gxbb.h |  3 ++
 board/amlogic/p212/p212.c              | 39 ++++++++++++++++++++++-
 configs/p212_defconfig                 |  4 +++
 drivers/net/phy/Kconfig                |  3 ++
 drivers/net/phy/Makefile               |  1 +
 drivers/net/phy/meson-gxl.c            | 57 ++++++++++++++++++++++++++++++++++
 drivers/net/phy/phy.c                  |  3 ++
 include/configs/p212.h                 |  2 ++
 include/phy.h                          |  1 +
 9 files changed, 112 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/phy/meson-gxl.c

-- 
2.7.4

[PATCH u-boot 0/3] Add Ethernet support for Amlogic P212 Reference board

[Neil Armstrong]

This patchset aims to add support for the Internal RMII Ethernet PHY of the
Amlogic Meson GXL S905X SoC on the Amlogic P212 Reference board.

The Internal PHY needs a specific config then acts as a generic PHY.

Neil Armstrong (3):
  net: phy: Add Amlogic Meson GXL Internal PHY support
  arm: meson: Add supplementary ethernet registers definitions
  arm: amlogic: p212: Add support for Ethernet with Internal PHY

 arch/arm/include/asm/arch-meson/gxbb.h |  3 ++
 board/amlogic/p212/p212.c              | 39 ++++++++++++++++++++++-
 configs/p212_defconfig                 |  4 +++
 drivers/net/phy/Kconfig                |  3 ++
 drivers/net/phy/Makefile               |  1 +
 drivers/net/phy/meson-gxl.c            | 57 ++++++++++++++++++++++++++++++++++
 drivers/net/phy/phy.c                  |  3 ++
 include/configs/p212.h                 |  2 ++
 include/phy.h                          |  1 +
 9 files changed, 112 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/phy/meson-gxl.c

-- 
2.7.4

[U-Boot] [PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Neil Armstrong]

The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.

The PHY acts as a generic PHY but needs a slight configuration right
before it's configuration.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/net/phy/Kconfig     |  3 +++
 drivers/net/phy/Makefile    |  1 +
 drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/net/phy/phy.c       |  3 +++
 include/phy.h               |  1 +
 5 files changed, 65 insertions(+)
 create mode 100644 drivers/net/phy/meson-gxl.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 4d02d8b..e32f1eb 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -55,6 +55,9 @@ config PHY_LXT
 config PHY_MARVELL
 	bool "Marvell Ethernet PHYs support"
 
+config PHY_MESON_GXL
+	bool "Amlogic Meson GXL Internal PHY support"
+
 config PHY_MICREL
 	bool "Micrel Ethernet PHYs support"
 	help
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 54f32f6..1e264b2 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_PHY_LXT) += lxt.o
 obj-$(CONFIG_PHY_MARVELL) += marvell.o
 obj-$(CONFIG_PHY_MICREL_KSZ8XXX) += micrel_ksz8xxx.o
 obj-$(CONFIG_PHY_MICREL_KSZ90X1) += micrel_ksz90x1.o
+obj-$(CONFIG_PHY_MESON_GXL) += meson-gxl.o
 obj-$(CONFIG_PHY_NATSEMI) += natsemi.o
 obj-$(CONFIG_PHY_REALTEK) += realtek.o
 obj-$(CONFIG_PHY_SMSC) += smsc.o
diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c
new file mode 100644
index 0000000..ccf70c9
--- /dev/null
+++ b/drivers/net/phy/meson-gxl.c
@@ -0,0 +1,57 @@
+/*
+ * Meson GXL Internal PHY Driver
+ *
+ * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
+ * Copyright (C) 2016 BayLibre, SAS. All rights reserved.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <config.h>
+#include <common.h>
+#include <linux/bitops.h>
+#include <phy.h>
+
+static int meson_gxl_phy_config(struct phy_device *phydev)
+{
+	/* Enable Analog and DSP register Bank access by */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400);
+
+	/* Write Analog register 23 */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x8E0D);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x4417);
+
+	/* Enable fractional PLL */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x0005);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1B);
+
+	/* Program fraction FR_PLL_DIV1 */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x029A);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1D);
+
+	/* Program fraction FR_PLL_DIV1 */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0xAAAA);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1C);
+
+	return genphy_config(phydev);
+}
+
+static struct phy_driver meson_gxl_phy_driver = {
+	.name = "Meson GXL Internal PHY",
+	.uid = 0x01814400,
+	.mask = 0xfffffff0,
+	.features = PHY_BASIC_FEATURES,
+	.config = &meson_gxl_phy_config,
+	.startup = &genphy_startup,
+	.shutdown = &genphy_shutdown,
+};
+
+int phy_meson_gxl_init(void)
+{
+	phy_register(&meson_gxl_phy_driver);
+
+	return 0;
+}
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 5be51d7..fd3dd55 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -494,6 +494,9 @@ int phy_init(void)
 #ifdef CONFIG_PHY_MICREL_KSZ90X1
 	phy_micrel_ksz90x1_init();
 #endif
+#ifdef CONFIG_PHY_MESON_GXL
+	phy_meson_gxl_init();
+#endif
 #ifdef CONFIG_PHY_NATSEMI
 	phy_natsemi_init();
 #endif
diff --git a/include/phy.h b/include/phy.h
index a0b1f12..50f1e12 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -268,6 +268,7 @@ int phy_lxt_init(void);
 int phy_marvell_init(void);
 int phy_micrel_ksz8xxx_init(void);
 int phy_micrel_ksz90x1_init(void);
+int phy_meson_gxl_init(void);
 int phy_natsemi_init(void);
 int phy_realtek_init(void);
 int phy_smsc_init(void);
-- 
2.7.4

[PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Neil Armstrong]

The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.

The PHY acts as a generic PHY but needs a slight configuration right
before it's configuration.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/net/phy/Kconfig     |  3 +++
 drivers/net/phy/Makefile    |  1 +
 drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/net/phy/phy.c       |  3 +++
 include/phy.h               |  1 +
 5 files changed, 65 insertions(+)
 create mode 100644 drivers/net/phy/meson-gxl.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 4d02d8b..e32f1eb 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -55,6 +55,9 @@ config PHY_LXT
 config PHY_MARVELL
 	bool "Marvell Ethernet PHYs support"
 
+config PHY_MESON_GXL
+	bool "Amlogic Meson GXL Internal PHY support"
+
 config PHY_MICREL
 	bool "Micrel Ethernet PHYs support"
 	help
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 54f32f6..1e264b2 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_PHY_LXT) += lxt.o
 obj-$(CONFIG_PHY_MARVELL) += marvell.o
 obj-$(CONFIG_PHY_MICREL_KSZ8XXX) += micrel_ksz8xxx.o
 obj-$(CONFIG_PHY_MICREL_KSZ90X1) += micrel_ksz90x1.o
+obj-$(CONFIG_PHY_MESON_GXL) += meson-gxl.o
 obj-$(CONFIG_PHY_NATSEMI) += natsemi.o
 obj-$(CONFIG_PHY_REALTEK) += realtek.o
 obj-$(CONFIG_PHY_SMSC) += smsc.o
diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c
new file mode 100644
index 0000000..ccf70c9
--- /dev/null
+++ b/drivers/net/phy/meson-gxl.c
@@ -0,0 +1,57 @@
+/*
+ * Meson GXL Internal PHY Driver
+ *
+ * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
+ * Copyright (C) 2016 BayLibre, SAS. All rights reserved.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <config.h>
+#include <common.h>
+#include <linux/bitops.h>
+#include <phy.h>
+
+static int meson_gxl_phy_config(struct phy_device *phydev)
+{
+	/* Enable Analog and DSP register Bank access by */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400);
+
+	/* Write Analog register 23 */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x8E0D);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x4417);
+
+	/* Enable fractional PLL */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x0005);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1B);
+
+	/* Program fraction FR_PLL_DIV1 */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x029A);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1D);
+
+	/* Program fraction FR_PLL_DIV1 */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0xAAAA);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1C);
+
+	return genphy_config(phydev);
+}
+
+static struct phy_driver meson_gxl_phy_driver = {
+	.name = "Meson GXL Internal PHY",
+	.uid = 0x01814400,
+	.mask = 0xfffffff0,
+	.features = PHY_BASIC_FEATURES,
+	.config = &meson_gxl_phy_config,
+	.startup = &genphy_startup,
+	.shutdown = &genphy_shutdown,
+};
+
+int phy_meson_gxl_init(void)
+{
+	phy_register(&meson_gxl_phy_driver);
+
+	return 0;
+}
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 5be51d7..fd3dd55 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -494,6 +494,9 @@ int phy_init(void)
 #ifdef CONFIG_PHY_MICREL_KSZ90X1
 	phy_micrel_ksz90x1_init();
 #endif
+#ifdef CONFIG_PHY_MESON_GXL
+	phy_meson_gxl_init();
+#endif
 #ifdef CONFIG_PHY_NATSEMI
 	phy_natsemi_init();
 #endif
diff --git a/include/phy.h b/include/phy.h
index a0b1f12..50f1e12 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -268,6 +268,7 @@ int phy_lxt_init(void);
 int phy_marvell_init(void);
 int phy_micrel_ksz8xxx_init(void);
 int phy_micrel_ksz90x1_init(void);
+int phy_meson_gxl_init(void);
 int phy_natsemi_init(void);
 int phy_realtek_init(void);
 int phy_smsc_init(void);
-- 
2.7.4

[U-Boot] [PATCH u-boot 2/3] arm: meson: Add supplementary ethernet registers definitions

[Neil Armstrong]

On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
were added to configure the internal RMII PHY interface.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm/include/asm/arch-meson/gxbb.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h
index ce41349..74d5290 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -22,11 +22,14 @@
 
 #define GXBB_ETH_REG_0		GXBB_PERIPHS_ADDR(0x50)
 #define GXBB_ETH_REG_1		GXBB_PERIPHS_ADDR(0x51)
+#define GXBB_ETH_REG_2		GXBB_PERIPHS_ADDR(0x56)
+#define GXBB_ETH_REG_3		GXBB_PERIPHS_ADDR(0x57)
 
 #define GXBB_ETH_REG_0_PHY_INTF		BIT(0)
 #define GXBB_ETH_REG_0_TX_PHASE(x)	(((x) & 3) << 5)
 #define GXBB_ETH_REG_0_TX_RATIO(x)	(((x) & 7) << 7)
 #define GXBB_ETH_REG_0_PHY_CLK_EN	BIT(10)
+#define GXBB_ETH_REG_0_INVERT_RMII_CLK	BIT(11)
 #define GXBB_ETH_REG_0_CLK_EN		BIT(12)
 
 /* HIU registers */
-- 
2.7.4

[PATCH u-boot 2/3] arm: meson: Add supplementary ethernet registers definitions

[Neil Armstrong]

On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
were added to configure the internal RMII PHY interface.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm/include/asm/arch-meson/gxbb.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h
index ce41349..74d5290 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -22,11 +22,14 @@
 
 #define GXBB_ETH_REG_0		GXBB_PERIPHS_ADDR(0x50)
 #define GXBB_ETH_REG_1		GXBB_PERIPHS_ADDR(0x51)
+#define GXBB_ETH_REG_2		GXBB_PERIPHS_ADDR(0x56)
+#define GXBB_ETH_REG_3		GXBB_PERIPHS_ADDR(0x57)
 
 #define GXBB_ETH_REG_0_PHY_INTF		BIT(0)
 #define GXBB_ETH_REG_0_TX_PHASE(x)	(((x) & 3) << 5)
 #define GXBB_ETH_REG_0_TX_RATIO(x)	(((x) & 7) << 7)
 #define GXBB_ETH_REG_0_PHY_CLK_EN	BIT(10)
+#define GXBB_ETH_REG_0_INVERT_RMII_CLK	BIT(11)
 #define GXBB_ETH_REG_0_CLK_EN		BIT(12)
 
 /* HIU registers */
-- 
2.7.4

[U-Boot] [PATCH u-boot 3/3] arm: amlogic: p212: Add support for Ethernet with Internal PHY

[Neil Armstrong]

This patch adds support for the Internal RMII Ethernet PHY on the
Amlogic P212 Reference Board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 board/amlogic/p212/p212.c | 39 ++++++++++++++++++++++++++++++++++++++-
 configs/p212_defconfig    |  4 ++++
 include/configs/p212.h    |  2 ++
 3 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
index 1eeb7f2..ece8096 100644
--- a/board/amlogic/p212/p212.c
+++ b/board/amlogic/p212/p212.c
@@ -9,6 +9,13 @@
 #include <dm.h>
 #include <asm/io.h>
 #include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
+#include <phy.h>
+
+#define EFUSE_SN_OFFSET		20
+#define EFUSE_SN_SIZE		16
+#define EFUSE_MAC_OFFSET	52
+#define EFUSE_MAC_SIZE		6
 
 int board_init(void)
 {
@@ -17,5 +24,35 @@ int board_init(void)
 
 int misc_init_r(void)
 {
-       return 0;
+	u8 mac_addr[EFUSE_MAC_SIZE];
+	char serial[EFUSE_SN_SIZE];
+	ssize_t len;
+
+	/* Set RMII mode */
+	out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
+				 GXBB_ETH_REG_0_CLK_EN);
+
+	/* Use Internal PHY */
+	out_le32(GXBB_ETH_REG_2, 0x10110181);
+	out_le32(GXBB_ETH_REG_3, 0xe40908ff);
+
+	/* Enable power and clock gate */
+	setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+	clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+
+	if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
+		len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+					  mac_addr, EFUSE_MAC_SIZE);
+		if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+			eth_env_set_enetaddr("ethaddr", mac_addr);
+	}
+
+	if (!env_get("serial#")) {
+		len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
+			EFUSE_SN_SIZE);
+		if (len == EFUSE_SN_SIZE)
+			env_set("serial#", serial);
+	}
+
+	return 0;
 }
diff --git a/configs/p212_defconfig b/configs/p212_defconfig
index 3c57621..d4b5349 100644
--- a/configs/p212_defconfig
+++ b/configs/p212_defconfig
@@ -20,6 +20,10 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_MESON_GXL=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_MESON_GXL=y
 CONFIG_DEBUG_UART_MESON=y
diff --git a/include/configs/p212.h b/include/configs/p212.h
index 0477384..793b556 100644
--- a/include/configs/p212.h
+++ b/include/configs/p212.h
@@ -12,6 +12,8 @@
 
 #define CONFIG_MISC_INIT_R
 
+#define CONFIG_PHY_ADDR 		8
+
 /* Serial setup */
 #define CONFIG_CONS_INDEX		0
 
-- 
2.7.4

[PATCH u-boot 3/3] arm: amlogic: p212: Add support for Ethernet with Internal PHY

[Neil Armstrong]

This patch adds support for the Internal RMII Ethernet PHY on the
Amlogic P212 Reference Board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 board/amlogic/p212/p212.c | 39 ++++++++++++++++++++++++++++++++++++++-
 configs/p212_defconfig    |  4 ++++
 include/configs/p212.h    |  2 ++
 3 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
index 1eeb7f2..ece8096 100644
--- a/board/amlogic/p212/p212.c
+++ b/board/amlogic/p212/p212.c
@@ -9,6 +9,13 @@
 #include <dm.h>
 #include <asm/io.h>
 #include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
+#include <phy.h>
+
+#define EFUSE_SN_OFFSET		20
+#define EFUSE_SN_SIZE		16
+#define EFUSE_MAC_OFFSET	52
+#define EFUSE_MAC_SIZE		6
 
 int board_init(void)
 {
@@ -17,5 +24,35 @@ int board_init(void)
 
 int misc_init_r(void)
 {
-       return 0;
+	u8 mac_addr[EFUSE_MAC_SIZE];
+	char serial[EFUSE_SN_SIZE];
+	ssize_t len;
+
+	/* Set RMII mode */
+	out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
+				 GXBB_ETH_REG_0_CLK_EN);
+
+	/* Use Internal PHY */
+	out_le32(GXBB_ETH_REG_2, 0x10110181);
+	out_le32(GXBB_ETH_REG_3, 0xe40908ff);
+
+	/* Enable power and clock gate */
+	setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+	clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+
+	if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
+		len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+					  mac_addr, EFUSE_MAC_SIZE);
+		if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+			eth_env_set_enetaddr("ethaddr", mac_addr);
+	}
+
+	if (!env_get("serial#")) {
+		len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
+			EFUSE_SN_SIZE);
+		if (len == EFUSE_SN_SIZE)
+			env_set("serial#", serial);
+	}
+
+	return 0;
 }
diff --git a/configs/p212_defconfig b/configs/p212_defconfig
index 3c57621..d4b5349 100644
--- a/configs/p212_defconfig
+++ b/configs/p212_defconfig
@@ -20,6 +20,10 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_MESON_GXL=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_MESON_GXL=y
 CONFIG_DEBUG_UART_MESON=y
diff --git a/include/configs/p212.h b/include/configs/p212.h
index 0477384..793b556 100644
--- a/include/configs/p212.h
+++ b/include/configs/p212.h
@@ -12,6 +12,8 @@
 
 #define CONFIG_MISC_INIT_R
 
+#define CONFIG_PHY_ADDR 		8
+
 /* Serial setup */
 #define CONFIG_CONS_INDEX		0
 
-- 
2.7.4

[U-Boot] [PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Simon Glass]

On 18 October 2017 at 10:02, Neil Armstrong <narmstrong@baylibre.com> wrote:
> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
>
> The PHY acts as a generic PHY but needs a slight configuration right
> before it's configuration.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  drivers/net/phy/Kconfig     |  3 +++
>  drivers/net/phy/Makefile    |  1 +
>  drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
>  drivers/net/phy/phy.c       |  3 +++
>  include/phy.h               |  1 +
>  5 files changed, 65 insertions(+)
>  create mode 100644 drivers/net/phy/meson-gxl.c

We really should create a uclass for PHY drivers before adding any
more of these.

Regards,
Simon

[PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Simon Glass]

On 18 October 2017 at 10:02, Neil Armstrong <narmstrong@baylibre.com> wrote:
> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
>
> The PHY acts as a generic PHY but needs a slight configuration right
> before it's configuration.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  drivers/net/phy/Kconfig     |  3 +++
>  drivers/net/phy/Makefile    |  1 +
>  drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
>  drivers/net/phy/phy.c       |  3 +++
>  include/phy.h               |  1 +
>  5 files changed, 65 insertions(+)
>  create mode 100644 drivers/net/phy/meson-gxl.c

We really should create a uclass for PHY drivers before adding any
more of these.

Regards,
Simon

[U-Boot] [PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Neil Armstrong]

On 22/10/2017 16:36, Simon Glass wrote:
> On 18 October 2017 at 10:02, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
>>
>> The PHY acts as a generic PHY but needs a slight configuration right
>> before it's configuration.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>>  drivers/net/phy/Kconfig     |  3 +++
>>  drivers/net/phy/Makefile    |  1 +
>>  drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
>>  drivers/net/phy/phy.c       |  3 +++
>>  include/phy.h               |  1 +
>>  5 files changed, 65 insertions(+)
>>  create mode 100644 drivers/net/phy/meson-gxl.c
> 
> We really should create a uclass for PHY drivers before adding any
> more of these.
> 
> Regards,
> Simon
> 

Hi Simon,

Sure, this would indeed be necessary, but is it necessary to wait for the uclass to merge mode PHYs ?

Neil

[PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Neil Armstrong]

On 22/10/2017 16:36, Simon Glass wrote:
> On 18 October 2017 at 10:02, Neil Armstrong <narmstrong@baylibre.com> wrote:
>> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
>>
>> The PHY acts as a generic PHY but needs a slight configuration right
>> before it's configuration.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>>  drivers/net/phy/Kconfig     |  3 +++
>>  drivers/net/phy/Makefile    |  1 +
>>  drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
>>  drivers/net/phy/phy.c       |  3 +++
>>  include/phy.h               |  1 +
>>  5 files changed, 65 insertions(+)
>>  create mode 100644 drivers/net/phy/meson-gxl.c
> 
> We really should create a uclass for PHY drivers before adding any
> more of these.
> 
> Regards,
> Simon
> 

Hi Simon,

Sure, this would indeed be necessary, but is it necessary to wait for the uclass to merge mode PHYs ?

Neil

[U-Boot] [PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Tom Rini]

On Thu, Oct 26, 2017 at 03:39:17PM +0200, Neil Armstrong wrote:
> On 22/10/2017 16:36, Simon Glass wrote:
> > On 18 October 2017 at 10:02, Neil Armstrong <narmstrong@baylibre.com> wrote:
> >> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
> >>
> >> The PHY acts as a generic PHY but needs a slight configuration right
> >> before it's configuration.
> >>
> >> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> >> ---
> >>  drivers/net/phy/Kconfig     |  3 +++
> >>  drivers/net/phy/Makefile    |  1 +
> >>  drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
> >>  drivers/net/phy/phy.c       |  3 +++
> >>  include/phy.h               |  1 +
> >>  5 files changed, 65 insertions(+)
> >>  create mode 100644 drivers/net/phy/meson-gxl.c
> > 
> > We really should create a uclass for PHY drivers before adding any
> > more of these.
> > 
> > Regards,
> > Simon
> > 
> 
> Hi Simon,
> 
> Sure, this would indeed be necessary, but is it necessary to wait for
> the uclass to merge mode PHYs ?

Well, this isn't going in before the next release (along with all of the
other amlogic stuff, which looks good otherwise btw).  So, do you have
time to take a pass at a uclass?

-- 
Tom
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[PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Tom Rini]

On Thu, Oct 26, 2017 at 03:39:17PM +0200, Neil Armstrong wrote:
> On 22/10/2017 16:36, Simon Glass wrote:
> > On 18 October 2017 at 10:02, Neil Armstrong <narmstrong@baylibre.com> wrote:
> >> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
> >>
> >> The PHY acts as a generic PHY but needs a slight configuration right
> >> before it's configuration.
> >>
> >> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> >> ---
> >>  drivers/net/phy/Kconfig     |  3 +++
> >>  drivers/net/phy/Makefile    |  1 +
> >>  drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
> >>  drivers/net/phy/phy.c       |  3 +++
> >>  include/phy.h               |  1 +
> >>  5 files changed, 65 insertions(+)
> >>  create mode 100644 drivers/net/phy/meson-gxl.c
> > 
> > We really should create a uclass for PHY drivers before adding any
> > more of these.
> > 
> > Regards,
> > Simon
> > 
> 
> Hi Simon,
> 
> Sure, this would indeed be necessary, but is it necessary to wait for
> the uclass to merge mode PHYs ?

Well, this isn't going in before the next release (along with all of the
other amlogic stuff, which looks good otherwise btw).  So, do you have
time to take a pass at a uclass?

-- 
Tom
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[U-Boot] [PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Neil Armstrong]

Le 29/10/2017 13:04, Tom Rini a écrit :
> On Thu, Oct 26, 2017 at 03:39:17PM +0200, Neil Armstrong wrote:
>> On 22/10/2017 16:36, Simon Glass wrote:
>>> On 18 October 2017 at 10:02, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>>> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
>>>>
>>>> The PHY acts as a generic PHY but needs a slight configuration right
>>>> before it's configuration.
>>>>
>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>> ---
>>>>  drivers/net/phy/Kconfig     |  3 +++
>>>>  drivers/net/phy/Makefile    |  1 +
>>>>  drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
>>>>  drivers/net/phy/phy.c       |  3 +++
>>>>  include/phy.h               |  1 +
>>>>  5 files changed, 65 insertions(+)
>>>>  create mode 100644 drivers/net/phy/meson-gxl.c
>>>
>>> We really should create a uclass for PHY drivers before adding any
>>> more of these.
>>>
>>> Regards,
>>> Simon
>>>
>>
>> Hi Simon,
>>
>> Sure, this would indeed be necessary, but is it necessary to wait for
>> the uclass to merge mode PHYs ?
> 
> Well, this isn't going in before the next release (along with all of the
> other amlogic stuff, which looks good otherwise btw).  So, do you have
> time to take a pass at a uclass?
> 

Hi Tom, Simon,

I can give a try, but with my limited uclass/dm knowledge, it will only be basic and will some review.

Should the plan be to introduce DM support for net PHY subsystem, then introduce this meson GXL phy as first implementation ?

Should I remove support for non-dm PHY drivers and probing when DM is enabled ?

Neil

[PATCH u-boot 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Neil Armstrong]

Le 29/10/2017 13:04, Tom Rini a ?crit :
> On Thu, Oct 26, 2017 at 03:39:17PM +0200, Neil Armstrong wrote:
>> On 22/10/2017 16:36, Simon Glass wrote:
>>> On 18 October 2017 at 10:02, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>>> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
>>>>
>>>> The PHY acts as a generic PHY but needs a slight configuration right
>>>> before it's configuration.
>>>>
>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>> ---
>>>>  drivers/net/phy/Kconfig     |  3 +++
>>>>  drivers/net/phy/Makefile    |  1 +
>>>>  drivers/net/phy/meson-gxl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
>>>>  drivers/net/phy/phy.c       |  3 +++
>>>>  include/phy.h               |  1 +
>>>>  5 files changed, 65 insertions(+)
>>>>  create mode 100644 drivers/net/phy/meson-gxl.c
>>>
>>> We really should create a uclass for PHY drivers before adding any
>>> more of these.
>>>
>>> Regards,
>>> Simon
>>>
>>
>> Hi Simon,
>>
>> Sure, this would indeed be necessary, but is it necessary to wait for
>> the uclass to merge mode PHYs ?
> 
> Well, this isn't going in before the next release (along with all of the
> other amlogic stuff, which looks good otherwise btw).  So, do you have
> time to take a pass at a uclass?
> 

Hi Tom, Simon,

I can give a try, but with my limited uclass/dm knowledge, it will only be basic and will some review.

Should the plan be to introduce DM support for net PHY subsystem, then introduce this meson GXL phy as first implementation ?

Should I remove support for non-dm PHY drivers and probing when DM is enabled ?

Neil

[U-Boot] [U-Boot, u-boot, 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Tom Rini]

On Wed, Oct 18, 2017 at 10:02:10AM +0200, Neil Armstrong wrote:

> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
> 
> The PHY acts as a generic PHY but needs a slight configuration right
> before it's configuration.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot, u-boot, 1/3] net: phy: Add Amlogic Meson GXL Internal PHY support

[Tom Rini]

On Wed, Oct 18, 2017 at 10:02:10AM +0200, Neil Armstrong wrote:

> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
> 
> The PHY acts as a generic PHY but needs a slight configuration right
> before it's configuration.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, u-boot, 2/3] arm: meson: Add supplementary ethernet registers definitions

[Tom Rini]

On Wed, Oct 18, 2017 at 10:02:11AM +0200, Neil Armstrong wrote:

> On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
> were added to configure the internal RMII PHY interface.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot, u-boot, 2/3] arm: meson: Add supplementary ethernet registers definitions

[Tom Rini]

On Wed, Oct 18, 2017 at 10:02:11AM +0200, Neil Armstrong wrote:

> On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
> were added to configure the internal RMII PHY interface.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, u-boot, 3/3] arm: amlogic: p212: Add support for Ethernet with Internal PHY

[Tom Rini]

On Wed, Oct 18, 2017 at 10:02:12AM +0200, Neil Armstrong wrote:

> This patch adds support for the Internal RMII Ethernet PHY on the
> Amlogic P212 Reference Board.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot, u-boot, 3/3] arm: amlogic: p212: Add support for Ethernet with Internal PHY

[Tom Rini]

On Wed, Oct 18, 2017 at 10:02:12AM +0200, Neil Armstrong wrote:

> This patch adds support for the Internal RMII Ethernet PHY on the
> Amlogic P212 Reference Board.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Applied to u-boot/master, thanks!

-- 
Tom
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