[PATCH 0/8] r8a77995 D3 DU and LVDS support

[PATCH 0/8] r8a77995 D3 DU and LVDS support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Provide the PFC groups for the DU pin controls, and update the bindings for
both the DU and LVDS to cover the r8a77995.

Add dt nodes for the DU, and LVDS, and enable VGA on the Draak board.
Provide support for HDMI out through the ADV7511 component, on the LVDS channel.

Finally provide a 'proof-of-concept' patch for the ADV7612 device which shares
the same bus and demonstrates setting the I2C slave maps such that they do not
conflict with the ADV7511.

This series is dependant upon the LVDS rework from Laurent which is not yet
finalised, however the DU only patches are not blocked by this.


Kieran Bingham (8):
  pinctrl: sh-pfc: r8a77995: Add DU support
  dt-bindings: display: renesas,du: Document r8a77995 bindings
  dt-bindings: display: renesas,lvds: Add LVDS binding for D3
  arm64: dts: renesas: r8a77995: add DU support
  arm64: dts: renesas: r8a77995: Add LVDS support
  arm64: dts: renesas: r8a77995-draak: Enable DU
  arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511
  [PoC] arm64: dts: renesas: r8a77995-draak: Add ADV7612

 .../bindings/display/bridge/renesas,lvds.txt       |   1 +
 .../devicetree/bindings/display/renesas,du.txt     |   2 +
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts     | 150 +++++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77995.dtsi          |  87 ++++++++++++
 drivers/pinctrl/sh-pfc/pfc-r8a77995.c              | 101 ++++++++++++++
 5 files changed, 341 insertions(+)

-- 
2.7.4

[PATCH 0/8] r8a77995 D3 DU and LVDS support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Provide the PFC groups for the DU pin controls, and update the bindings for
both the DU and LVDS to cover the r8a77995.

Add dt nodes for the DU, and LVDS, and enable VGA on the Draak board.
Provide support for HDMI out through the ADV7511 component, on the LVDS channel.

Finally provide a 'proof-of-concept' patch for the ADV7612 device which shares
the same bus and demonstrates setting the I2C slave maps such that they do not
conflict with the ADV7511.

This series is dependant upon the LVDS rework from Laurent which is not yet
finalised, however the DU only patches are not blocked by this.


Kieran Bingham (8):
  pinctrl: sh-pfc: r8a77995: Add DU support
  dt-bindings: display: renesas,du: Document r8a77995 bindings
  dt-bindings: display: renesas,lvds: Add LVDS binding for D3
  arm64: dts: renesas: r8a77995: add DU support
  arm64: dts: renesas: r8a77995: Add LVDS support
  arm64: dts: renesas: r8a77995-draak: Enable DU
  arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511
  [PoC] arm64: dts: renesas: r8a77995-draak: Add ADV7612

 .../bindings/display/bridge/renesas,lvds.txt       |   1 +
 .../devicetree/bindings/display/renesas,du.txt     |   2 +
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts     | 150 +++++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77995.dtsi          |  87 ++++++++++++
 drivers/pinctrl/sh-pfc/pfc-r8a77995.c              | 101 ++++++++++++++
 5 files changed, 341 insertions(+)

-- 
2.7.4

[PATCH 1/8] pinctrl: sh-pfc: r8a77995: Add DU support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Provide pin control support for the DU parallel RGB output signals.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 101 ++++++++++++++++++++++++++++++++++
 1 file changed, 101 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
index a4927b78a17b..277b0d6972f7 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
@@ -1114,6 +1114,87 @@ static const unsigned int canfd1_data_mux[] = {
 	CANFD1_TX_MARK, CANFD1_RX_MARK,
 };
 
+/* - DU --------------------------------------------------------------------- */
+static const unsigned int du_rgb666_pins[] = {
+	/* R[7:2], G[7:2], B[7:2] */
+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
+};
+static const unsigned int du_rgb666_mux[] = {
+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
+	DU_DR3_MARK, DU_DR2_MARK,
+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
+	DU_DG3_MARK, DU_DG2_MARK,
+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
+	DU_DB3_MARK, DU_DB2_MARK,
+};
+static const unsigned int du_rgb888_pins[] = {
+	/* R[7:0], G[7:0], B[7:0] */
+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
+	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
+	RCAR_GP_PIN(1, 9),  RCAR_GP_PIN(1, 8),
+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
+	RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
+};
+static const unsigned int du_rgb888_mux[] = {
+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
+	DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
+	DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
+	DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
+};
+static const unsigned int du_dotclkout0_pins[] = {
+	/* CLKOUT */
+	RCAR_GP_PIN(1, 24),
+};
+static const unsigned int du_dotclkout0_mux[] = {
+	DU_DOTCLKOUT0_MARK
+};
+static const unsigned int du_sync_pins[] = {
+	/* HSYNC, VSYNC */
+	RCAR_GP_PIN(1, 25), RCAR_GP_PIN(1, 26),
+};
+static const unsigned int du_sync_mux[] = {
+	DU_HSYNC_MARK, DU_VSYNC_MARK
+};
+static const unsigned int du_disp_pins[] = {
+	/* DISP */
+	RCAR_GP_PIN(2, 1),
+};
+static const unsigned int du_disp_mux[] = {
+	DU_DISP_MARK,
+};
+static const unsigned int du_dotclkin1_pins[] = {
+	/* DOTCLKOUT0 */
+	RCAR_GP_PIN(1, 28),
+};
+static const unsigned int du_dotclkin1_mux[] = {
+	DU_DOTCLKIN1_MARK,
+};
+static const unsigned int du_disp_cde_pins[] = {
+	/* DISP/CDE */
+	RCAR_GP_PIN(1, 28),
+};
+static const unsigned int du_disp_cde_mux[] = {
+	DU_DISP_CDE_MARK,
+};
+static const unsigned int du_cde_pins[] = {
+	/* CDE */
+	RCAR_GP_PIN(1, 29),
+};
+static const unsigned int du_cde_mux[] = {
+	DU_CDE_MARK,
+};
+
 /* - I2C -------------------------------------------------------------------- */
 static const unsigned int i2c0_pins[] = {
 	/* SCL, SDA */
@@ -1568,6 +1649,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(can_clk),
 	SH_PFC_PIN_GROUP(canfd0_data),
 	SH_PFC_PIN_GROUP(canfd1_data),
+	SH_PFC_PIN_GROUP(du_rgb666),
+	SH_PFC_PIN_GROUP(du_rgb888),
+	SH_PFC_PIN_GROUP(du_dotclkout0),
+	SH_PFC_PIN_GROUP(du_sync),
+	SH_PFC_PIN_GROUP(du_disp),
+	SH_PFC_PIN_GROUP(du_dotclkin1),
+	SH_PFC_PIN_GROUP(du_disp_cde),
+	SH_PFC_PIN_GROUP(du_cde),
 	SH_PFC_PIN_GROUP(i2c0),
 	SH_PFC_PIN_GROUP(i2c1),
 	SH_PFC_PIN_GROUP(i2c2_a),
@@ -1664,6 +1753,17 @@ static const char * const canfd1_groups[] = {
 	"canfd1_data",
 };
 
+static const char * const du_groups[] = {
+	"du_rgb666",
+	"du_rgb888",
+	"du_dotclk_out_0",
+	"du_sync",
+	"du_disp",
+	"du_dotclk_in_1",
+	"du_disp_cde",
+	"du_cde",
+};
+
 static const char * const i2c0_groups[] = {
 	"i2c0",
 };
@@ -1779,6 +1879,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(can_clk),
 	SH_PFC_FUNCTION(canfd0),
 	SH_PFC_FUNCTION(canfd1),
+	SH_PFC_FUNCTION(du),
 	SH_PFC_FUNCTION(i2c0),
 	SH_PFC_FUNCTION(i2c1),
 	SH_PFC_FUNCTION(i2c2),
-- 
2.7.4

[PATCH 1/8] pinctrl: sh-pfc: r8a77995: Add DU support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Provide pin control support for the DU parallel RGB output signals.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 101 ++++++++++++++++++++++++++++++++++
 1 file changed, 101 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
index a4927b78a17b..277b0d6972f7 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
@@ -1114,6 +1114,87 @@ static const unsigned int canfd1_data_mux[] = {
 	CANFD1_TX_MARK, CANFD1_RX_MARK,
 };
 
+/* - DU --------------------------------------------------------------------- */
+static const unsigned int du_rgb666_pins[] = {
+	/* R[7:2], G[7:2], B[7:2] */
+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
+};
+static const unsigned int du_rgb666_mux[] = {
+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
+	DU_DR3_MARK, DU_DR2_MARK,
+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
+	DU_DG3_MARK, DU_DG2_MARK,
+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
+	DU_DB3_MARK, DU_DB2_MARK,
+};
+static const unsigned int du_rgb888_pins[] = {
+	/* R[7:0], G[7:0], B[7:0] */
+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
+	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
+	RCAR_GP_PIN(1, 9),  RCAR_GP_PIN(1, 8),
+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
+	RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
+};
+static const unsigned int du_rgb888_mux[] = {
+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
+	DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
+	DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
+	DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
+};
+static const unsigned int du_dotclkout0_pins[] = {
+	/* CLKOUT */
+	RCAR_GP_PIN(1, 24),
+};
+static const unsigned int du_dotclkout0_mux[] = {
+	DU_DOTCLKOUT0_MARK
+};
+static const unsigned int du_sync_pins[] = {
+	/* HSYNC, VSYNC */
+	RCAR_GP_PIN(1, 25), RCAR_GP_PIN(1, 26),
+};
+static const unsigned int du_sync_mux[] = {
+	DU_HSYNC_MARK, DU_VSYNC_MARK
+};
+static const unsigned int du_disp_pins[] = {
+	/* DISP */
+	RCAR_GP_PIN(2, 1),
+};
+static const unsigned int du_disp_mux[] = {
+	DU_DISP_MARK,
+};
+static const unsigned int du_dotclkin1_pins[] = {
+	/* DOTCLKOUT0 */
+	RCAR_GP_PIN(1, 28),
+};
+static const unsigned int du_dotclkin1_mux[] = {
+	DU_DOTCLKIN1_MARK,
+};
+static const unsigned int du_disp_cde_pins[] = {
+	/* DISP/CDE */
+	RCAR_GP_PIN(1, 28),
+};
+static const unsigned int du_disp_cde_mux[] = {
+	DU_DISP_CDE_MARK,
+};
+static const unsigned int du_cde_pins[] = {
+	/* CDE */
+	RCAR_GP_PIN(1, 29),
+};
+static const unsigned int du_cde_mux[] = {
+	DU_CDE_MARK,
+};
+
 /* - I2C -------------------------------------------------------------------- */
 static const unsigned int i2c0_pins[] = {
 	/* SCL, SDA */
@@ -1568,6 +1649,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(can_clk),
 	SH_PFC_PIN_GROUP(canfd0_data),
 	SH_PFC_PIN_GROUP(canfd1_data),
+	SH_PFC_PIN_GROUP(du_rgb666),
+	SH_PFC_PIN_GROUP(du_rgb888),
+	SH_PFC_PIN_GROUP(du_dotclkout0),
+	SH_PFC_PIN_GROUP(du_sync),
+	SH_PFC_PIN_GROUP(du_disp),
+	SH_PFC_PIN_GROUP(du_dotclkin1),
+	SH_PFC_PIN_GROUP(du_disp_cde),
+	SH_PFC_PIN_GROUP(du_cde),
 	SH_PFC_PIN_GROUP(i2c0),
 	SH_PFC_PIN_GROUP(i2c1),
 	SH_PFC_PIN_GROUP(i2c2_a),
@@ -1664,6 +1753,17 @@ static const char * const canfd1_groups[] = {
 	"canfd1_data",
 };
 
+static const char * const du_groups[] = {
+	"du_rgb666",
+	"du_rgb888",
+	"du_dotclk_out_0",
+	"du_sync",
+	"du_disp",
+	"du_dotclk_in_1",
+	"du_disp_cde",
+	"du_cde",
+};
+
 static const char * const i2c0_groups[] = {
 	"i2c0",
 };
@@ -1779,6 +1879,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(can_clk),
 	SH_PFC_FUNCTION(canfd0),
 	SH_PFC_FUNCTION(canfd1),
+	SH_PFC_FUNCTION(du),
 	SH_PFC_FUNCTION(i2c0),
 	SH_PFC_FUNCTION(i2c1),
 	SH_PFC_FUNCTION(i2c2),
-- 
2.7.4

[PATCH 1/8] pinctrl: sh-pfc: r8a77995: Add DU support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Provide pin control support for the DU parallel RGB output signals.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 101 ++++++++++++++++++++++++++++++++++
 1 file changed, 101 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
index a4927b78a17b..277b0d6972f7 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
@@ -1114,6 +1114,87 @@ static const unsigned int canfd1_data_mux[] = {
 	CANFD1_TX_MARK, CANFD1_RX_MARK,
 };
 
+/* - DU --------------------------------------------------------------------- */
+static const unsigned int du_rgb666_pins[] = {
+	/* R[7:2], G[7:2], B[7:2] */
+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
+};
+static const unsigned int du_rgb666_mux[] = {
+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
+	DU_DR3_MARK, DU_DR2_MARK,
+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
+	DU_DG3_MARK, DU_DG2_MARK,
+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
+	DU_DB3_MARK, DU_DB2_MARK,
+};
+static const unsigned int du_rgb888_pins[] = {
+	/* R[7:0], G[7:0], B[7:0] */
+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
+	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
+	RCAR_GP_PIN(1, 9),  RCAR_GP_PIN(1, 8),
+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
+	RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
+};
+static const unsigned int du_rgb888_mux[] = {
+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
+	DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
+	DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
+	DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
+};
+static const unsigned int du_dotclkout0_pins[] = {
+	/* CLKOUT */
+	RCAR_GP_PIN(1, 24),
+};
+static const unsigned int du_dotclkout0_mux[] = {
+	DU_DOTCLKOUT0_MARK
+};
+static const unsigned int du_sync_pins[] = {
+	/* HSYNC, VSYNC */
+	RCAR_GP_PIN(1, 25), RCAR_GP_PIN(1, 26),
+};
+static const unsigned int du_sync_mux[] = {
+	DU_HSYNC_MARK, DU_VSYNC_MARK
+};
+static const unsigned int du_disp_pins[] = {
+	/* DISP */
+	RCAR_GP_PIN(2, 1),
+};
+static const unsigned int du_disp_mux[] = {
+	DU_DISP_MARK,
+};
+static const unsigned int du_dotclkin1_pins[] = {
+	/* DOTCLKOUT0 */
+	RCAR_GP_PIN(1, 28),
+};
+static const unsigned int du_dotclkin1_mux[] = {
+	DU_DOTCLKIN1_MARK,
+};
+static const unsigned int du_disp_cde_pins[] = {
+	/* DISP/CDE */
+	RCAR_GP_PIN(1, 28),
+};
+static const unsigned int du_disp_cde_mux[] = {
+	DU_DISP_CDE_MARK,
+};
+static const unsigned int du_cde_pins[] = {
+	/* CDE */
+	RCAR_GP_PIN(1, 29),
+};
+static const unsigned int du_cde_mux[] = {
+	DU_CDE_MARK,
+};
+
 /* - I2C -------------------------------------------------------------------- */
 static const unsigned int i2c0_pins[] = {
 	/* SCL, SDA */
@@ -1568,6 +1649,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(can_clk),
 	SH_PFC_PIN_GROUP(canfd0_data),
 	SH_PFC_PIN_GROUP(canfd1_data),
+	SH_PFC_PIN_GROUP(du_rgb666),
+	SH_PFC_PIN_GROUP(du_rgb888),
+	SH_PFC_PIN_GROUP(du_dotclkout0),
+	SH_PFC_PIN_GROUP(du_sync),
+	SH_PFC_PIN_GROUP(du_disp),
+	SH_PFC_PIN_GROUP(du_dotclkin1),
+	SH_PFC_PIN_GROUP(du_disp_cde),
+	SH_PFC_PIN_GROUP(du_cde),
 	SH_PFC_PIN_GROUP(i2c0),
 	SH_PFC_PIN_GROUP(i2c1),
 	SH_PFC_PIN_GROUP(i2c2_a),
@@ -1664,6 +1753,17 @@ static const char * const canfd1_groups[] = {
 	"canfd1_data",
 };
 
+static const char * const du_groups[] = {
+	"du_rgb666",
+	"du_rgb888",
+	"du_dotclk_out_0",
+	"du_sync",
+	"du_disp",
+	"du_dotclk_in_1",
+	"du_disp_cde",
+	"du_cde",
+};
+
 static const char * const i2c0_groups[] = {
 	"i2c0",
 };
@@ -1779,6 +1879,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(can_clk),
 	SH_PFC_FUNCTION(canfd0),
 	SH_PFC_FUNCTION(canfd1),
+	SH_PFC_FUNCTION(du),
 	SH_PFC_FUNCTION(i2c0),
 	SH_PFC_FUNCTION(i2c1),
 	SH_PFC_FUNCTION(i2c2),
-- 
2.7.4

Re: [PATCH 1/8] pinctrl: sh-pfc: r8a77995: Add DU support

[Kieran Bingham]

This patch duplicates work performed by Ulrich.

Please consider this patch dropped, and no need for review.

(especially the obvious error in the pin-values)

Oh well - it was a fun exercise to go through :-)

--
Regards

Kieran

On 15/02/18 08:38, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Provide pin control support for the DU parallel RGB output signals.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
>  drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 101 ++++++++++++++++++++++++++++++++++
>  1 file changed, 101 insertions(+)
> 
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> index a4927b78a17b..277b0d6972f7 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> @@ -1114,6 +1114,87 @@ static const unsigned int canfd1_data_mux[] = {
>  	CANFD1_TX_MARK, CANFD1_RX_MARK,
>  };
>  
> +/* - DU --------------------------------------------------------------------- */
> +static const unsigned int du_rgb666_pins[] = {
> +	/* R[7:2], G[7:2], B[7:2] */
> +	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
> +	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
> +	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
> +	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
> +	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
> +	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
> +};
> +static const unsigned int du_rgb666_mux[] = {
> +	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
> +	DU_DR3_MARK, DU_DR2_MARK,
> +	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
> +	DU_DG3_MARK, DU_DG2_MARK,
> +	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
> +	DU_DB3_MARK, DU_DB2_MARK,
> +};
> +static const unsigned int du_rgb888_pins[] = {
> +	/* R[7:0], G[7:0], B[7:0] */
> +	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
> +	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
> +	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
> +	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
> +	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
> +	RCAR_GP_PIN(1, 9),  RCAR_GP_PIN(1, 8),
> +	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
> +	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
> +	RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
> +};
> +static const unsigned int du_rgb888_mux[] = {
> +	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
> +	DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
> +	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
> +	DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
> +	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
> +	DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
> +};
> +static const unsigned int du_dotclkout0_pins[] = {
> +	/* CLKOUT */
> +	RCAR_GP_PIN(1, 24),
> +};
> +static const unsigned int du_dotclkout0_mux[] = {
> +	DU_DOTCLKOUT0_MARK
> +};
> +static const unsigned int du_sync_pins[] = {
> +	/* HSYNC, VSYNC */
> +	RCAR_GP_PIN(1, 25), RCAR_GP_PIN(1, 26),
> +};
> +static const unsigned int du_sync_mux[] = {
> +	DU_HSYNC_MARK, DU_VSYNC_MARK
> +};
> +static const unsigned int du_disp_pins[] = {
> +	/* DISP */
> +	RCAR_GP_PIN(2, 1),
> +};
> +static const unsigned int du_disp_mux[] = {
> +	DU_DISP_MARK,
> +};
> +static const unsigned int du_dotclkin1_pins[] = {
> +	/* DOTCLKOUT0 */
> +	RCAR_GP_PIN(1, 28),
> +};
> +static const unsigned int du_dotclkin1_mux[] = {
> +	DU_DOTCLKIN1_MARK,
> +};
> +static const unsigned int du_disp_cde_pins[] = {
> +	/* DISP/CDE */
> +	RCAR_GP_PIN(1, 28),
> +};
> +static const unsigned int du_disp_cde_mux[] = {
> +	DU_DISP_CDE_MARK,
> +};
> +static const unsigned int du_cde_pins[] = {
> +	/* CDE */
> +	RCAR_GP_PIN(1, 29),
> +};
> +static const unsigned int du_cde_mux[] = {
> +	DU_CDE_MARK,
> +};
> +
>  /* - I2C -------------------------------------------------------------------- */
>  static const unsigned int i2c0_pins[] = {
>  	/* SCL, SDA */
> @@ -1568,6 +1649,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
>  	SH_PFC_PIN_GROUP(can_clk),
>  	SH_PFC_PIN_GROUP(canfd0_data),
>  	SH_PFC_PIN_GROUP(canfd1_data),
> +	SH_PFC_PIN_GROUP(du_rgb666),
> +	SH_PFC_PIN_GROUP(du_rgb888),
> +	SH_PFC_PIN_GROUP(du_dotclkout0),
> +	SH_PFC_PIN_GROUP(du_sync),
> +	SH_PFC_PIN_GROUP(du_disp),
> +	SH_PFC_PIN_GROUP(du_dotclkin1),
> +	SH_PFC_PIN_GROUP(du_disp_cde),
> +	SH_PFC_PIN_GROUP(du_cde),
>  	SH_PFC_PIN_GROUP(i2c0),
>  	SH_PFC_PIN_GROUP(i2c1),
>  	SH_PFC_PIN_GROUP(i2c2_a),
> @@ -1664,6 +1753,17 @@ static const char * const canfd1_groups[] = {
>  	"canfd1_data",
>  };
>  
> +static const char * const du_groups[] = {
> +	"du_rgb666",
> +	"du_rgb888",
> +	"du_dotclk_out_0",
> +	"du_sync",
> +	"du_disp",
> +	"du_dotclk_in_1",
> +	"du_disp_cde",
> +	"du_cde",
> +};
> +
>  static const char * const i2c0_groups[] = {
>  	"i2c0",
>  };
> @@ -1779,6 +1879,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
>  	SH_PFC_FUNCTION(can_clk),
>  	SH_PFC_FUNCTION(canfd0),
>  	SH_PFC_FUNCTION(canfd1),
> +	SH_PFC_FUNCTION(du),
>  	SH_PFC_FUNCTION(i2c0),
>  	SH_PFC_FUNCTION(i2c1),
>  	SH_PFC_FUNCTION(i2c2),
> 

[PATCH 1/8] pinctrl: sh-pfc: r8a77995: Add DU support

[Kieran Bingham]

This patch duplicates work performed by Ulrich.

Please consider this patch dropped, and no need for review.

(especially the obvious error in the pin-values)

Oh well - it was a fun exercise to go through :-)

--
Regards

Kieran

On 15/02/18 08:38, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Provide pin control support for the DU parallel RGB output signals.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
>  drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 101 ++++++++++++++++++++++++++++++++++
>  1 file changed, 101 insertions(+)
> 
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> index a4927b78a17b..277b0d6972f7 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> @@ -1114,6 +1114,87 @@ static const unsigned int canfd1_data_mux[] = {
>  	CANFD1_TX_MARK, CANFD1_RX_MARK,
>  };
>  
> +/* - DU --------------------------------------------------------------------- */
> +static const unsigned int du_rgb666_pins[] = {
> +	/* R[7:2], G[7:2], B[7:2] */
> +	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
> +	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
> +	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
> +	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
> +	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
> +	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
> +};
> +static const unsigned int du_rgb666_mux[] = {
> +	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
> +	DU_DR3_MARK, DU_DR2_MARK,
> +	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
> +	DU_DG3_MARK, DU_DG2_MARK,
> +	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
> +	DU_DB3_MARK, DU_DB2_MARK,
> +};
> +static const unsigned int du_rgb888_pins[] = {
> +	/* R[7:0], G[7:0], B[7:0] */
> +	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
> +	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
> +	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
> +	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
> +	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
> +	RCAR_GP_PIN(1, 9),  RCAR_GP_PIN(1, 8),
> +	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
> +	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
> +	RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
> +};
> +static const unsigned int du_rgb888_mux[] = {
> +	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
> +	DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
> +	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
> +	DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
> +	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
> +	DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
> +};
> +static const unsigned int du_dotclkout0_pins[] = {
> +	/* CLKOUT */
> +	RCAR_GP_PIN(1, 24),
> +};
> +static const unsigned int du_dotclkout0_mux[] = {
> +	DU_DOTCLKOUT0_MARK
> +};
> +static const unsigned int du_sync_pins[] = {
> +	/* HSYNC, VSYNC */
> +	RCAR_GP_PIN(1, 25), RCAR_GP_PIN(1, 26),
> +};
> +static const unsigned int du_sync_mux[] = {
> +	DU_HSYNC_MARK, DU_VSYNC_MARK
> +};
> +static const unsigned int du_disp_pins[] = {
> +	/* DISP */
> +	RCAR_GP_PIN(2, 1),
> +};
> +static const unsigned int du_disp_mux[] = {
> +	DU_DISP_MARK,
> +};
> +static const unsigned int du_dotclkin1_pins[] = {
> +	/* DOTCLKOUT0 */
> +	RCAR_GP_PIN(1, 28),
> +};
> +static const unsigned int du_dotclkin1_mux[] = {
> +	DU_DOTCLKIN1_MARK,
> +};
> +static const unsigned int du_disp_cde_pins[] = {
> +	/* DISP/CDE */
> +	RCAR_GP_PIN(1, 28),
> +};
> +static const unsigned int du_disp_cde_mux[] = {
> +	DU_DISP_CDE_MARK,
> +};
> +static const unsigned int du_cde_pins[] = {
> +	/* CDE */
> +	RCAR_GP_PIN(1, 29),
> +};
> +static const unsigned int du_cde_mux[] = {
> +	DU_CDE_MARK,
> +};
> +
>  /* - I2C -------------------------------------------------------------------- */
>  static const unsigned int i2c0_pins[] = {
>  	/* SCL, SDA */
> @@ -1568,6 +1649,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
>  	SH_PFC_PIN_GROUP(can_clk),
>  	SH_PFC_PIN_GROUP(canfd0_data),
>  	SH_PFC_PIN_GROUP(canfd1_data),
> +	SH_PFC_PIN_GROUP(du_rgb666),
> +	SH_PFC_PIN_GROUP(du_rgb888),
> +	SH_PFC_PIN_GROUP(du_dotclkout0),
> +	SH_PFC_PIN_GROUP(du_sync),
> +	SH_PFC_PIN_GROUP(du_disp),
> +	SH_PFC_PIN_GROUP(du_dotclkin1),
> +	SH_PFC_PIN_GROUP(du_disp_cde),
> +	SH_PFC_PIN_GROUP(du_cde),
>  	SH_PFC_PIN_GROUP(i2c0),
>  	SH_PFC_PIN_GROUP(i2c1),
>  	SH_PFC_PIN_GROUP(i2c2_a),
> @@ -1664,6 +1753,17 @@ static const char * const canfd1_groups[] = {
>  	"canfd1_data",
>  };
>  
> +static const char * const du_groups[] = {
> +	"du_rgb666",
> +	"du_rgb888",
> +	"du_dotclk_out_0",
> +	"du_sync",
> +	"du_disp",
> +	"du_dotclk_in_1",
> +	"du_disp_cde",
> +	"du_cde",
> +};
> +
>  static const char * const i2c0_groups[] = {
>  	"i2c0",
>  };
> @@ -1779,6 +1879,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
>  	SH_PFC_FUNCTION(can_clk),
>  	SH_PFC_FUNCTION(canfd0),
>  	SH_PFC_FUNCTION(canfd1),
> +	SH_PFC_FUNCTION(du),
>  	SH_PFC_FUNCTION(i2c0),
>  	SH_PFC_FUNCTION(i2c1),
>  	SH_PFC_FUNCTION(i2c2),
> 

[PATCH 2/8] dt-bindings: display: renesas,du: Document r8a77995 bindings

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Document the D3 (r8a77995) SoC in the R-Car DU bindings.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt b/Documentation/devicetree/bindings/display/renesas,du.txt
index 8f6e0e118e3e..56f67453b9aa 100644
--- a/Documentation/devicetree/bindings/display/renesas,du.txt
+++ b/Documentation/devicetree/bindings/display/renesas,du.txt
@@ -13,6 +13,7 @@ Required Properties:
     - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
     - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
     - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
+    - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
 
   - reg: A list of base address and length of each memory resource, one for
     each entry in the reg-names property.
@@ -60,6 +61,7 @@ corresponding to each DU output.
  R8A7794 (R-Car E2)   DPAD 0         DPAD 1         -              -
  R8A7795 (R-Car H3)   DPAD 0         HDMI 0         HDMI 1         LVDS 0
  R8A7796 (R-Car M3-W) DPAD 0         HDMI 0         LVDS 0         -
+ R8A77995 (R-Car D3)  DPAD 0         LVDS 0         LVDS 1         -
 
 
 Example: R8A7795 (R-Car H3) ES2.0 DU
-- 
2.7.4

[PATCH 2/8] dt-bindings: display: renesas, du: Document r8a77995 bindings

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Document the D3 (r8a77995) SoC in the R-Car DU bindings.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt b/Documentation/devicetree/bindings/display/renesas,du.txt
index 8f6e0e118e3e..56f67453b9aa 100644
--- a/Documentation/devicetree/bindings/display/renesas,du.txt
+++ b/Documentation/devicetree/bindings/display/renesas,du.txt
@@ -13,6 +13,7 @@ Required Properties:
     - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
     - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
     - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
+    - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
 
   - reg: A list of base address and length of each memory resource, one for
     each entry in the reg-names property.
@@ -60,6 +61,7 @@ corresponding to each DU output.
  R8A7794 (R-Car E2)   DPAD 0         DPAD 1         -              -
  R8A7795 (R-Car H3)   DPAD 0         HDMI 0         HDMI 1         LVDS 0
  R8A7796 (R-Car M3-W) DPAD 0         HDMI 0         LVDS 0         -
+ R8A77995 (R-Car D3)  DPAD 0         LVDS 0         LVDS 1         -
 
 
 Example: R8A7795 (R-Car H3) ES2.0 DU
-- 
2.7.4

[PATCH 2/8] dt-bindings: display: renesas,du: Document r8a77995 bindings

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Document the D3 (r8a77995) SoC in the R-Car DU bindings.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt b/Documentation/devicetree/bindings/display/renesas,du.txt
index 8f6e0e118e3e..56f67453b9aa 100644
--- a/Documentation/devicetree/bindings/display/renesas,du.txt
+++ b/Documentation/devicetree/bindings/display/renesas,du.txt
@@ -13,6 +13,7 @@ Required Properties:
     - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
     - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
     - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
+    - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
 
   - reg: A list of base address and length of each memory resource, one for
     each entry in the reg-names property.
@@ -60,6 +61,7 @@ corresponding to each DU output.
  R8A7794 (R-Car E2)   DPAD 0         DPAD 1         -              -
  R8A7795 (R-Car H3)   DPAD 0         HDMI 0         HDMI 1         LVDS 0
  R8A7796 (R-Car M3-W) DPAD 0         HDMI 0         LVDS 0         -
+ R8A77995 (R-Car D3)  DPAD 0         LVDS 0         LVDS 1         -
 
 
 Example: R8A7795 (R-Car H3) ES2.0 DU
-- 
2.7.4

Re: [PATCH 2/8] dt-bindings: display: renesas,du: Document r8a77995 bindings

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:17 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Document the D3 (r8a77995) SoC in the R-Car DU bindings.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

and applied to my tree.

> ---
>  Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt
> b/Documentation/devicetree/bindings/display/renesas,du.txt index
> 8f6e0e118e3e..56f67453b9aa 100644
> --- a/Documentation/devicetree/bindings/display/renesas,du.txt
> +++ b/Documentation/devicetree/bindings/display/renesas,du.txt
> @@ -13,6 +13,7 @@ Required Properties:
>      - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
>      - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
>      - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
> +    - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
> 
>    - reg: A list of base address and length of each memory resource, one for
> each entry in the reg-names property.
> @@ -60,6 +61,7 @@ corresponding to each DU output.
>   R8A7794 (R-Car E2)   DPAD 0         DPAD 1         -              -
>   R8A7795 (R-Car H3)   DPAD 0         HDMI 0         HDMI 1         LVDS 0
>   R8A7796 (R-Car M3-W) DPAD 0         HDMI 0         LVDS 0         -
> + R8A77995 (R-Car D3)  DPAD 0         LVDS 0         LVDS 1         -
> 
> 
>  Example: R8A7795 (R-Car H3) ES2.0 DU


-- 
Regards,

Laurent Pinchart

[PATCH 2/8] dt-bindings: display: renesas, du: Document r8a77995 bindings

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:17 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Document the D3 (r8a77995) SoC in the R-Car DU bindings.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

and applied to my tree.

> ---
>  Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt
> b/Documentation/devicetree/bindings/display/renesas,du.txt index
> 8f6e0e118e3e..56f67453b9aa 100644
> --- a/Documentation/devicetree/bindings/display/renesas,du.txt
> +++ b/Documentation/devicetree/bindings/display/renesas,du.txt
> @@ -13,6 +13,7 @@ Required Properties:
>      - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
>      - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
>      - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
> +    - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
> 
>    - reg: A list of base address and length of each memory resource, one for
> each entry in the reg-names property.
> @@ -60,6 +61,7 @@ corresponding to each DU output.
>   R8A7794 (R-Car E2)   DPAD 0         DPAD 1         -              -
>   R8A7795 (R-Car H3)   DPAD 0         HDMI 0         HDMI 1         LVDS 0
>   R8A7796 (R-Car M3-W) DPAD 0         HDMI 0         LVDS 0         -
> + R8A77995 (R-Car D3)  DPAD 0         LVDS 0         LVDS 1         -
> 
> 
>  Example: R8A7795 (R-Car H3) ES2.0 DU


-- 
Regards,

Laurent Pinchart

Re: [PATCH 2/8] dt-bindings: display: renesas, du: Document r8a77995 bindings

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:17 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Document the D3 (r8a77995) SoC in the R-Car DU bindings.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

and applied to my tree.

> ---
>  Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt
> b/Documentation/devicetree/bindings/display/renesas,du.txt index
> 8f6e0e118e3e..56f67453b9aa 100644
> --- a/Documentation/devicetree/bindings/display/renesas,du.txt
> +++ b/Documentation/devicetree/bindings/display/renesas,du.txt
> @@ -13,6 +13,7 @@ Required Properties:
>      - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
>      - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
>      - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
> +    - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
> 
>    - reg: A list of base address and length of each memory resource, one for
> each entry in the reg-names property.
> @@ -60,6 +61,7 @@ corresponding to each DU output.
>   R8A7794 (R-Car E2)   DPAD 0         DPAD 1         -              -
>   R8A7795 (R-Car H3)   DPAD 0         HDMI 0         HDMI 1         LVDS 0
>   R8A7796 (R-Car M3-W) DPAD 0         HDMI 0         LVDS 0         -
> + R8A77995 (R-Car D3)  DPAD 0         LVDS 0         LVDS 1         -
> 
> 
>  Example: R8A7795 (R-Car H3) ES2.0 DU


-- 
Regards,

Laurent Pinchart

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[PATCH 3/8] dt-bindings: display: renesas,lvds: Add LVDS binding for D3

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

The D3 supports two LVDS channels. Extend the binding to support them.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
index 79860f58a7ad..0dcf488b70df 100644
--- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
+++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
@@ -14,6 +14,7 @@ Required properties:
 - compatible : Shall contain one of
   - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS encoders
   - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS encoders
+  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS encoders
 
 - reg: Base address and length for the memory-mapped registers
 - clocks: A phandle + clock-specifier pair for the functional clock
-- 
2.7.4

[PATCH 3/8] dt-bindings: display: renesas, lvds: Add LVDS binding for D3

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

The D3 supports two LVDS channels. Extend the binding to support them.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
index 79860f58a7ad..0dcf488b70df 100644
--- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
+++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
@@ -14,6 +14,7 @@ Required properties:
 - compatible : Shall contain one of
   - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS encoders
   - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS encoders
+  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS encoders
 
 - reg: Base address and length for the memory-mapped registers
 - clocks: A phandle + clock-specifier pair for the functional clock
-- 
2.7.4

[PATCH 3/8] dt-bindings: display: renesas, lvds: Add LVDS binding for D3

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

The D3 supports two LVDS channels. Extend the binding to support them.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
index 79860f58a7ad..0dcf488b70df 100644
--- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
+++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
@@ -14,6 +14,7 @@ Required properties:
 - compatible : Shall contain one of
   - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS encoders
   - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS encoders
+  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS encoders
 
 - reg: Base address and length for the memory-mapped registers
 - clocks: A phandle + clock-specifier pair for the functional clock
-- 
2.7.4

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https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 3/8] dt-bindings: display: renesas,lvds: Add LVDS binding for D3

[Kieran Bingham]

On 15/02/18 08:38, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> The D3 supports two LVDS channels. Extend the binding to support them.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
>  Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> index 79860f58a7ad..0dcf488b70df 100644
> --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> @@ -14,6 +14,7 @@ Required properties:
>  - compatible : Shall contain one of
>    - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS encoders
>    - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS encoders
> +  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS encoders

Hi Laurent,

Are we unable to have a generic lvds-gen3 here?

(Although to perhaps answer my own question I see that the D3/E3 have extra
registers)

Also "lets pretend" that I intentionally separated out the LVDS updates to the
rcar_lvds_of_table :)

--
Kieran

>  
>  - reg: Base address and length for the memory-mapped registers
>  - clocks: A phandle + clock-specifier pair for the functional clock
> 

[PATCH 3/8] dt-bindings: display: renesas, lvds: Add LVDS binding for D3

[Kieran Bingham]

On 15/02/18 08:38, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> The D3 supports two LVDS channels. Extend the binding to support them.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
>  Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> index 79860f58a7ad..0dcf488b70df 100644
> --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> @@ -14,6 +14,7 @@ Required properties:
>  - compatible : Shall contain one of
>    - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS encoders
>    - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS encoders
> +  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS encoders

Hi Laurent,

Are we unable to have a generic lvds-gen3 here?

(Although to perhaps answer my own question I see that the D3/E3 have extra
registers)

Also "lets pretend" that I intentionally separated out the LVDS updates to the
rcar_lvds_of_table :)

--
Kieran

>  
>  - reg: Base address and length for the memory-mapped registers
>  - clocks: A phandle + clock-specifier pair for the functional clock
> 

Re: [PATCH 3/8] dt-bindings: display: renesas,lvds: Add LVDS binding for D3

[Laurent Pinchart]

Hi Kieran,

On Thursday, 15 February 2018 10:45:33 EET Kieran Bingham wrote:
> On 15/02/18 08:38, Kieran Bingham wrote:
> > From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > 
> > The D3 supports two LVDS channels. Extend the binding to support them.
> > 
> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > ---
> > 
> >  Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index
> > 79860f58a7ad..0dcf488b70df 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > 
> > @@ -14,6 +14,7 @@ Required properties:
> >  - compatible : Shall contain one of
> >    - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS
> >    encoders
> >    - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS
> >    encoders
> > +  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS
> > encoders
> 
> Hi Laurent,
> 
> Are we unable to have a generic lvds-gen3 here?
> 
> (Although to perhaps answer my own question I see that the D3/E3 have extra
> registers)
> 
> Also "lets pretend" that I intentionally separated out the LVDS updates to
> the rcar_lvds_of_table :)

We could for H3 and M3-W, but as you've noticed D3/E3 differ, and so does V3M.

> >  - reg: Base address and length for the memory-mapped registers
> >  - clocks: A phandle + clock-specifier pair for the functional clock

-- 
Regards,

Laurent Pinchart

[PATCH 3/8] dt-bindings: display: renesas, lvds: Add LVDS binding for D3

[Laurent Pinchart]

Hi Kieran,

On Thursday, 15 February 2018 10:45:33 EET Kieran Bingham wrote:
> On 15/02/18 08:38, Kieran Bingham wrote:
> > From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > 
> > The D3 supports two LVDS channels. Extend the binding to support them.
> > 
> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > ---
> > 
> >  Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index
> > 79860f58a7ad..0dcf488b70df 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > 
> > @@ -14,6 +14,7 @@ Required properties:
> >  - compatible : Shall contain one of
> >    - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS
> >    encoders
> >    - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS
> >    encoders
> > +  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS
> > encoders
> 
> Hi Laurent,
> 
> Are we unable to have a generic lvds-gen3 here?
> 
> (Although to perhaps answer my own question I see that the D3/E3 have extra
> registers)
> 
> Also "lets pretend" that I intentionally separated out the LVDS updates to
> the rcar_lvds_of_table :)

We could for H3 and M3-W, but as you've noticed D3/E3 differ, and so does V3M.

> >  - reg: Base address and length for the memory-mapped registers
> >  - clocks: A phandle + clock-specifier pair for the functional clock

-- 
Regards,

Laurent Pinchart

Re: [PATCH 3/8] dt-bindings: display: renesas, lvds: Add LVDS binding for D3

[Laurent Pinchart]

Hi Kieran,

On Thursday, 15 February 2018 10:45:33 EET Kieran Bingham wrote:
> On 15/02/18 08:38, Kieran Bingham wrote:
> > From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > 
> > The D3 supports two LVDS channels. Extend the binding to support them.
> > 
> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > ---
> > 
> >  Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index
> > 79860f58a7ad..0dcf488b70df 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > 
> > @@ -14,6 +14,7 @@ Required properties:
> >  - compatible : Shall contain one of
> >    - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS
> >    encoders
> >    - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS
> >    encoders
> > +  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS
> > encoders
> 
> Hi Laurent,
> 
> Are we unable to have a generic lvds-gen3 here?
> 
> (Although to perhaps answer my own question I see that the D3/E3 have extra
> registers)
> 
> Also "lets pretend" that I intentionally separated out the LVDS updates to
> the rcar_lvds_of_table :)

We could for H3 and M3-W, but as you've noticed D3/E3 differ, and so does V3M.

> >  - reg: Base address and length for the memory-mapped registers
> >  - clocks: A phandle + clock-specifier pair for the functional clock

-- 
Regards,

Laurent Pinchart

_______________________________________________
dri-devel mailing list
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Re: [PATCH 3/8] dt-bindings: display: renesas,lvds: Add LVDS binding for D3

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:18 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> The D3 supports two LVDS channels. Extend the binding to support them.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
>  Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git
> a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index
> 79860f58a7ad..0dcf488b70df 100644
> --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> @@ -14,6 +14,7 @@ Required properties:
>  - compatible : Shall contain one of
>    - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS encoders
>    - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS
> encoders
> +  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible
> LVDS encoders

This should be "renesas,r8a77995-lvds". I've already fixed the series you've 
based this patch on.

Apart from this,

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

and taken in my tree with the compatible string fixed.

> 
>  - reg: Base address and length for the memory-mapped registers
>  - clocks: A phandle + clock-specifier pair for the functional clock


-- 
Regards,

Laurent Pinchart

[PATCH 3/8] dt-bindings: display: renesas, lvds: Add LVDS binding for D3

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:18 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> The D3 supports two LVDS channels. Extend the binding to support them.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
>  Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git
> a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index
> 79860f58a7ad..0dcf488b70df 100644
> --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> @@ -14,6 +14,7 @@ Required properties:
>  - compatible : Shall contain one of
>    - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS encoders
>    - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS
> encoders
> +  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible
> LVDS encoders

This should be "renesas,r8a77995-lvds". I've already fixed the series you've 
based this patch on.

Apart from this,

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

and taken in my tree with the compatible string fixed.

> 
>  - reg: Base address and length for the memory-mapped registers
>  - clocks: A phandle + clock-specifier pair for the functional clock


-- 
Regards,

Laurent Pinchart

Re: [PATCH 3/8] dt-bindings: display: renesas,lvds: Add LVDS binding for D3

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:18 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
> 
> The D3 supports two LVDS channels. Extend the binding to support them.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git
> a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index
> 79860f58a7ad..0dcf488b70df 100644
> --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> @@ -14,6 +14,7 @@ Required properties:
>  - compatible : Shall contain one of
>    - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS encoders
>    - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS
> encoders
> +  - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible
> LVDS encoders

This should be "renesas,r8a77995-lvds". I've already fixed the series you've 
based this patch on.

Apart from this,

Reviewed-by: Laurent Pinchart <laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>

and taken in my tree with the compatible string fixed.

> 
>  - reg: Base address and length for the memory-mapped registers
>  - clocks: A phandle + clock-specifier pair for the functional clock


-- 
Regards,

Laurent Pinchart

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[PATCH 4/8] arm64: dts: renesas: r8a77995: add DU support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Define the generic r8a77995 part of the DU device node.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 35 +++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 0db242114bc5..a57d5fecf79c 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -748,6 +748,41 @@
 			resets = <&cpg 602>;
 			iommus = <&ipmmu_vi0 9>;
 		};
+
+		du: display@feb00000 {
+			compatible = "renesas,du-r8a77995";
+			reg = <0 0xfeb00000 0 0x80000>;
+			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 724>,
+				 <&cpg CPG_MOD 723>;
+			clock-names = "du.0", "du.1";
+			vsps = <&vspd0 0 &vspd1 0>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					du_out_rgb: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					du_out_lvds0: endpoint {
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+					du_out_lvds1: endpoint {
+					};
+				};
+			};
+		};
 	};
 
 	timer {
-- 
2.7.4

[PATCH 4/8] arm64: dts: renesas: r8a77995: add DU support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Define the generic r8a77995 part of the DU device node.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 35 +++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 0db242114bc5..a57d5fecf79c 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -748,6 +748,41 @@
 			resets = <&cpg 602>;
 			iommus = <&ipmmu_vi0 9>;
 		};
+
+		du: display at feb00000 {
+			compatible = "renesas,du-r8a77995";
+			reg = <0 0xfeb00000 0 0x80000>;
+			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 724>,
+				 <&cpg CPG_MOD 723>;
+			clock-names = "du.0", "du.1";
+			vsps = <&vspd0 0 &vspd1 0>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port at 0 {
+					reg = <0>;
+					du_out_rgb: endpoint {
+					};
+				};
+
+				port at 1 {
+					reg = <1>;
+					du_out_lvds0: endpoint {
+					};
+				};
+
+				port at 2 {
+					reg = <2>;
+					du_out_lvds1: endpoint {
+					};
+				};
+			};
+		};
 	};
 
 	timer {
-- 
2.7.4

[PATCH 4/8] arm64: dts: renesas: r8a77995: add DU support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>

Define the generic r8a77995 part of the DU device node.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 35 +++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 0db242114bc5..a57d5fecf79c 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -748,6 +748,41 @@
 			resets = <&cpg 602>;
 			iommus = <&ipmmu_vi0 9>;
 		};
+
+		du: display@feb00000 {
+			compatible = "renesas,du-r8a77995";
+			reg = <0 0xfeb00000 0 0x80000>;
+			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 724>,
+				 <&cpg CPG_MOD 723>;
+			clock-names = "du.0", "du.1";
+			vsps = <&vspd0 0 &vspd1 0>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					du_out_rgb: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					du_out_lvds0: endpoint {
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+					du_out_lvds1: endpoint {
+					};
+				};
+			};
+		};
 	};
 
 	timer {
-- 
2.7.4

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Re: [PATCH 4/8] arm64: dts: renesas: r8a77995: add DU support

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:19 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Define the generic r8a77995 part of the DU device node.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

I assume Simon will take care of this patch.

> ---
>  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 35 ++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index
> 0db242114bc5..a57d5fecf79c 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -748,6 +748,41 @@
>  			resets = <&cpg 602>;
>  			iommus = <&ipmmu_vi0 9>;
>  		};
> +
> +		du: display@feb00000 {
> +			compatible = "renesas,du-r8a77995";
> +			reg = <0 0xfeb00000 0 0x80000>;
> +			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 724>,
> +				 <&cpg CPG_MOD 723>;
> +			clock-names = "du.0", "du.1";
> +			vsps = <&vspd0 0 &vspd1 0>;
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@0 {
> +					reg = <0>;
> +					du_out_rgb: endpoint {
> +					};
> +				};
> +
> +				port@1 {
> +					reg = <1>;
> +					du_out_lvds0: endpoint {
> +					};
> +				};
> +
> +				port@2 {
> +					reg = <2>;
> +					du_out_lvds1: endpoint {
> +					};
> +				};
> +			};
> +		};
>  	};
> 
>  	timer {


-- 
Regards,

Laurent Pinchart

[PATCH 4/8] arm64: dts: renesas: r8a77995: add DU support

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:19 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Define the generic r8a77995 part of the DU device node.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

I assume Simon will take care of this patch.

> ---
>  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 35 ++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index
> 0db242114bc5..a57d5fecf79c 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -748,6 +748,41 @@
>  			resets = <&cpg 602>;
>  			iommus = <&ipmmu_vi0 9>;
>  		};
> +
> +		du: display at feb00000 {
> +			compatible = "renesas,du-r8a77995";
> +			reg = <0 0xfeb00000 0 0x80000>;
> +			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 724>,
> +				 <&cpg CPG_MOD 723>;
> +			clock-names = "du.0", "du.1";
> +			vsps = <&vspd0 0 &vspd1 0>;
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port at 0 {
> +					reg = <0>;
> +					du_out_rgb: endpoint {
> +					};
> +				};
> +
> +				port at 1 {
> +					reg = <1>;
> +					du_out_lvds0: endpoint {
> +					};
> +				};
> +
> +				port at 2 {
> +					reg = <2>;
> +					du_out_lvds1: endpoint {
> +					};
> +				};
> +			};
> +		};
>  	};
> 
>  	timer {


-- 
Regards,

Laurent Pinchart

Re: [PATCH 4/8] arm64: dts: renesas: r8a77995: add DU support

[Simon Horman]

On Thu, Feb 15, 2018 at 04:07:35PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:19 EET Kieran Bingham wrote:
> > From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > 
> > Define the generic r8a77995 part of the DU device node.
> > 
> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> 
> I assume Simon will take care of this patch.

Thanks, applied.

[PATCH 4/8] arm64: dts: renesas: r8a77995: add DU support

[Simon Horman]

On Thu, Feb 15, 2018 at 04:07:35PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:19 EET Kieran Bingham wrote:
> > From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > 
> > Define the generic r8a77995 part of the DU device node.
> > 
> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> 
> I assume Simon will take care of this patch.

Thanks, applied.

[PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

The r8a77995 D3 platform has 2 LVDS channels connected to the DU.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 52 +++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index a57d5fecf79c..7851e37cfff1 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -773,18 +773,70 @@
 				port@1 {
 					reg = <1>;
 					du_out_lvds0: endpoint {
+						remote-endpoint = <&du_out_lvds0>;
 					};
 				};
 
 				port@2 {
 					reg = <2>;
 					du_out_lvds1: endpoint {
+						remote-endpoint = <&du_out_lvds1>;
 					};
 				};
 			};
 		};
 	};
 
+	lvds0: lvds@feb90000 {
+		compatible = "renesas,lvds-r8a77995";
+		reg = <0 0xfeb90000 0 0x20>;
+		clocks = <&cpg CPG_MOD 727>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				lvds0_in: endpoint {
+					remote-endpoint = <&du_out_lvds0>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				lvds0_out: endpoint {
+				};
+			};
+		};
+	};
+
+	lvds1: lvds@feb90100 {
+		compatible = "renesas,lvds-r8a77995";
+		reg = <0 0xfeb90100 0 0x20>;
+		clocks = <&cpg CPG_MOD 727>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				lvds1_in: endpoint {
+					remote-endpoint = <&du_out_lvds1>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				lvds1_out: endpoint {
+				};
+			};
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
-- 
2.7.4

[PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

The r8a77995 D3 platform has 2 LVDS channels connected to the DU.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 52 +++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index a57d5fecf79c..7851e37cfff1 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -773,18 +773,70 @@
 				port at 1 {
 					reg = <1>;
 					du_out_lvds0: endpoint {
+						remote-endpoint = <&du_out_lvds0>;
 					};
 				};
 
 				port at 2 {
 					reg = <2>;
 					du_out_lvds1: endpoint {
+						remote-endpoint = <&du_out_lvds1>;
 					};
 				};
 			};
 		};
 	};
 
+	lvds0: lvds at feb90000 {
+		compatible = "renesas,lvds-r8a77995";
+		reg = <0 0xfeb90000 0 0x20>;
+		clocks = <&cpg CPG_MOD 727>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				lvds0_in: endpoint {
+					remote-endpoint = <&du_out_lvds0>;
+				};
+			};
+
+			port at 1 {
+				reg = <1>;
+				lvds0_out: endpoint {
+				};
+			};
+		};
+	};
+
+	lvds1: lvds at feb90100 {
+		compatible = "renesas,lvds-r8a77995";
+		reg = <0 0xfeb90100 0 0x20>;
+		clocks = <&cpg CPG_MOD 727>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				lvds1_in: endpoint {
+					remote-endpoint = <&du_out_lvds1>;
+				};
+			};
+
+			port at 1 {
+				reg = <1>;
+				lvds1_out: endpoint {
+				};
+			};
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
-- 
2.7.4

[PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

The r8a77995 D3 platform has 2 LVDS channels connected to the DU.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 52 +++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index a57d5fecf79c..7851e37cfff1 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -773,18 +773,70 @@
 				port@1 {
 					reg = <1>;
 					du_out_lvds0: endpoint {
+						remote-endpoint = <&du_out_lvds0>;
 					};
 				};
 
 				port@2 {
 					reg = <2>;
 					du_out_lvds1: endpoint {
+						remote-endpoint = <&du_out_lvds1>;
 					};
 				};
 			};
 		};
 	};
 
+	lvds0: lvds@feb90000 {
+		compatible = "renesas,lvds-r8a77995";
+		reg = <0 0xfeb90000 0 0x20>;
+		clocks = <&cpg CPG_MOD 727>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				lvds0_in: endpoint {
+					remote-endpoint = <&du_out_lvds0>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				lvds0_out: endpoint {
+				};
+			};
+		};
+	};
+
+	lvds1: lvds@feb90100 {
+		compatible = "renesas,lvds-r8a77995";
+		reg = <0 0xfeb90100 0 0x20>;
+		clocks = <&cpg CPG_MOD 727>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				lvds1_in: endpoint {
+					remote-endpoint = <&du_out_lvds1>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				lvds1_out: endpoint {
+				};
+			};
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
-- 
2.7.4

Re: [PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Geert Uytterhoeven]

Hi Kieran,

On Thu, Feb 15, 2018 at 9:38 AM, Kieran Bingham <kbingham@kernel.org> wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>
> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

I love your patch!
Yet something to improve...

> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -773,18 +773,70 @@
>                                 port@1 {
>                                         reg = <1>;
>                                         du_out_lvds0: endpoint {
> +                                               remote-endpoint = <&du_out_lvds0>;
>                                         };
>                                 };
>
>                                 port@2 {
>                                         reg = <2>;
>                                         du_out_lvds1: endpoint {
> +                                               remote-endpoint = <&du_out_lvds1>;
>                                         };
>                                 };
>                         };
>                 };
>         };
>
> +       lvds0: lvds@feb90000 {
> +               compatible = "renesas,lvds-r8a77995";
> +               reg = <0 0xfeb90000 0 0x20>;
> +               clocks = <&cpg CPG_MOD 727>;
> +               status = "disabled";

Missing resets, power-domains

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Geert Uytterhoeven]

Hi Kieran,

On Thu, Feb 15, 2018 at 9:38 AM, Kieran Bingham <kbingham@kernel.org> wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>
> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

I love your patch!
Yet something to improve...

> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -773,18 +773,70 @@
>                                 port at 1 {
>                                         reg = <1>;
>                                         du_out_lvds0: endpoint {
> +                                               remote-endpoint = <&du_out_lvds0>;
>                                         };
>                                 };
>
>                                 port at 2 {
>                                         reg = <2>;
>                                         du_out_lvds1: endpoint {
> +                                               remote-endpoint = <&du_out_lvds1>;
>                                         };
>                                 };
>                         };
>                 };
>         };
>
> +       lvds0: lvds at feb90000 {
> +               compatible = "renesas,lvds-r8a77995";
> +               reg = <0 0xfeb90000 0 0x20>;
> +               clocks = <&cpg CPG_MOD 727>;
> +               status = "disabled";

Missing resets, power-domains

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Kieran Bingham]

Hi Geert,

On 15/02/18 09:07, Geert Uytterhoeven wrote:
> Hi Kieran,
> 
> On Thu, Feb 15, 2018 at 9:38 AM, Kieran Bingham <kbingham@kernel.org> wrote:
>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> I love your patch!
> Yet something to improve...
> 
>> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> @@ -773,18 +773,70 @@
>>                                 port@1 {
>>                                         reg = <1>;
>>                                         du_out_lvds0: endpoint {
>> +                                               remote-endpoint = <&du_out_lvds0>;
>>                                         };
>>                                 };
>>
>>                                 port@2 {
>>                                         reg = <2>;
>>                                         du_out_lvds1: endpoint {
>> +                                               remote-endpoint = <&du_out_lvds1>;
>>                                         };
>>                                 };
>>                         };
>>                 };
>>         };
>>
>> +       lvds0: lvds@feb90000 {
>> +               compatible = "renesas,lvds-r8a77995";
>> +               reg = <0 0xfeb90000 0 0x20>;
>> +               clocks = <&cpg CPG_MOD 727>;
>> +               status = "disabled";
> 
> Missing resets, power-domains

Both lvds0, and lvds1 are actually the same 'module' (just different mappings
within the same IP block).

That means they will share clock, reset etc.

Will specifying the resets cause one to affect the other unduly?

like if one becomes un-used, will it power down? or is it refcounted, and will
gracefully handle both device nodes from the same device?

I'm already fairly sure clocks is fine for this - but it's just the reset's that
worry me. If the reset module tries to reset lvds0 for some reason - would lvds1
get reset as a side effect ...

Or perhaps that won't ever happen with an :

		power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
		resets = <&cpg 727>;

Regards
--
Kieran


> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
> 

[PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Kieran Bingham]

Hi Geert,

On 15/02/18 09:07, Geert Uytterhoeven wrote:
> Hi Kieran,
> 
> On Thu, Feb 15, 2018 at 9:38 AM, Kieran Bingham <kbingham@kernel.org> wrote:
>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> I love your patch!
> Yet something to improve...
> 
>> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> @@ -773,18 +773,70 @@
>>                                 port at 1 {
>>                                         reg = <1>;
>>                                         du_out_lvds0: endpoint {
>> +                                               remote-endpoint = <&du_out_lvds0>;
>>                                         };
>>                                 };
>>
>>                                 port at 2 {
>>                                         reg = <2>;
>>                                         du_out_lvds1: endpoint {
>> +                                               remote-endpoint = <&du_out_lvds1>;
>>                                         };
>>                                 };
>>                         };
>>                 };
>>         };
>>
>> +       lvds0: lvds at feb90000 {
>> +               compatible = "renesas,lvds-r8a77995";
>> +               reg = <0 0xfeb90000 0 0x20>;
>> +               clocks = <&cpg CPG_MOD 727>;
>> +               status = "disabled";
> 
> Missing resets, power-domains

Both lvds0, and lvds1 are actually the same 'module' (just different mappings
within the same IP block).

That means they will share clock, reset etc.

Will specifying the resets cause one to affect the other unduly?

like if one becomes un-used, will it power down? or is it refcounted, and will
gracefully handle both device nodes from the same device?

I'm already fairly sure clocks is fine for this - but it's just the reset's that
worry me. If the reset module tries to reset lvds0 for some reason - would lvds1
get reset as a side effect ...

Or perhaps that won't ever happen with an :

		power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
		resets = <&cpg 727>;

Regards
--
Kieran


> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
> 

Re: [PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Geert Uytterhoeven]

Hi Kieran,

On Thu, Feb 15, 2018 at 1:41 PM, Kieran Bingham
<kieran.bingham@ideasonboard.com> wrote:
> On 15/02/18 09:07, Geert Uytterhoeven wrote:
>> On Thu, Feb 15, 2018 at 9:38 AM, Kieran Bingham <kbingham@kernel.org> wrote:
>>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>>
>>> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>>>
>>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>> I love your patch!
>> Yet something to improve...
>>
>>> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>>> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>>> @@ -773,18 +773,70 @@
>>>                                 port@1 {
>>>                                         reg = <1>;
>>>                                         du_out_lvds0: endpoint {
>>> +                                               remote-endpoint = <&du_out_lvds0>;
>>>                                         };
>>>                                 };
>>>
>>>                                 port@2 {
>>>                                         reg = <2>;
>>>                                         du_out_lvds1: endpoint {
>>> +                                               remote-endpoint = <&du_out_lvds1>;
>>>                                         };
>>>                                 };
>>>                         };
>>>                 };
>>>         };
>>>
>>> +       lvds0: lvds@feb90000 {
>>> +               compatible = "renesas,lvds-r8a77995";
>>> +               reg = <0 0xfeb90000 0 0x20>;
>>> +               clocks = <&cpg CPG_MOD 727>;
>>> +               status = "disabled";
>>
>> Missing resets, power-domains
>
> Both lvds0, and lvds1 are actually the same 'module' (just different mappings
> within the same IP block).
>
> That means they will share clock, reset etc.
>
> Will specifying the resets cause one to affect the other unduly?
>
> like if one becomes un-used, will it power down? or is it refcounted, and will
> gracefully handle both device nodes from the same device?
>
> I'm already fairly sure clocks is fine for this - but it's just the reset's that
> worry me. If the reset module tries to reset lvds0 for some reason - would lvds1
> get reset as a side effect ...

Clocks handle sharing fine, they do refcounting.

For resets, there is some sharing/exclusive support, but we don't have that
much experience with resets as we don't use it that much yet (USB uses it).
So for now it's mostly about "describing the hardware".

Triggering a reset will indeed reset all modules using the same reset.
The same is true for e.g. PWM.

> Or perhaps that won't ever happen with an :
>
>                 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
>                 resets = <&cpg 727>;

The power-domains property is related to power management (in this case
clock domain only, as it's the "always-on" domain), not reset.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Geert Uytterhoeven]

Hi Kieran,

On Thu, Feb 15, 2018 at 1:41 PM, Kieran Bingham
<kieran.bingham@ideasonboard.com> wrote:
> On 15/02/18 09:07, Geert Uytterhoeven wrote:
>> On Thu, Feb 15, 2018 at 9:38 AM, Kieran Bingham <kbingham@kernel.org> wrote:
>>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>>
>>> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>>>
>>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>> I love your patch!
>> Yet something to improve...
>>
>>> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>>> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>>> @@ -773,18 +773,70 @@
>>>                                 port at 1 {
>>>                                         reg = <1>;
>>>                                         du_out_lvds0: endpoint {
>>> +                                               remote-endpoint = <&du_out_lvds0>;
>>>                                         };
>>>                                 };
>>>
>>>                                 port at 2 {
>>>                                         reg = <2>;
>>>                                         du_out_lvds1: endpoint {
>>> +                                               remote-endpoint = <&du_out_lvds1>;
>>>                                         };
>>>                                 };
>>>                         };
>>>                 };
>>>         };
>>>
>>> +       lvds0: lvds at feb90000 {
>>> +               compatible = "renesas,lvds-r8a77995";
>>> +               reg = <0 0xfeb90000 0 0x20>;
>>> +               clocks = <&cpg CPG_MOD 727>;
>>> +               status = "disabled";
>>
>> Missing resets, power-domains
>
> Both lvds0, and lvds1 are actually the same 'module' (just different mappings
> within the same IP block).
>
> That means they will share clock, reset etc.
>
> Will specifying the resets cause one to affect the other unduly?
>
> like if one becomes un-used, will it power down? or is it refcounted, and will
> gracefully handle both device nodes from the same device?
>
> I'm already fairly sure clocks is fine for this - but it's just the reset's that
> worry me. If the reset module tries to reset lvds0 for some reason - would lvds1
> get reset as a side effect ...

Clocks handle sharing fine, they do refcounting.

For resets, there is some sharing/exclusive support, but we don't have that
much experience with resets as we don't use it that much yet (USB uses it).
So for now it's mostly about "describing the hardware".

Triggering a reset will indeed reset all modules using the same reset.
The same is true for e.g. PWM.

> Or perhaps that won't ever happen with an :
>
>                 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
>                 resets = <&cpg 727>;

The power-domains property is related to power management (in this case
clock domain only, as it's the "always-on" domain), not reset.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:20 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 52 ++++++++++++++++++++++++++++
>  1 file changed, 52 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index
> a57d5fecf79c..7851e37cfff1 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -773,18 +773,70 @@
>  				port@1 {
>  					reg = <1>;
>  					du_out_lvds0: endpoint {
> +						remote-endpoint = <&du_out_lvds0>;
>  					};
>  				};
> 
>  				port@2 {
>  					reg = <2>;
>  					du_out_lvds1: endpoint {
> +						remote-endpoint = <&du_out_lvds1>;

It's interesting how the DU ports reference themselves :-)

>  					};
>  				};
>  			};
>  		};
>  	};
> 
> +	lvds0: lvds@feb90000 {
> +		compatible = "renesas,lvds-r8a77995";
> +		reg = <0 0xfeb90000 0 0x20>;
> +		clocks = <&cpg CPG_MOD 727>;
> +		status = "disabled";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +				lvds0_in: endpoint {
> +					remote-endpoint = <&du_out_lvds0>;
> +				};
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +				lvds0_out: endpoint {
> +				};
> +			};
> +		};
> +	};
> +
> +	lvds1: lvds@feb90100 {
> +		compatible = "renesas,lvds-r8a77995";
> +		reg = <0 0xfeb90100 0 0x20>;
> +		clocks = <&cpg CPG_MOD 727>;
> +		status = "disabled";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +				lvds1_in: endpoint {
> +					remote-endpoint = <&du_out_lvds1>;
> +				};
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +				lvds1_out: endpoint {
> +				};
> +			};
> +		};
> +	};
> +
>  	timer {
>  		compatible = "arm,armv8-timer";
>  		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
> IRQ_TYPE_LEVEL_LOW)>,

-- 
Regards,

Laurent Pinchart

[PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:20 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 52 ++++++++++++++++++++++++++++
>  1 file changed, 52 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index
> a57d5fecf79c..7851e37cfff1 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -773,18 +773,70 @@
>  				port at 1 {
>  					reg = <1>;
>  					du_out_lvds0: endpoint {
> +						remote-endpoint = <&du_out_lvds0>;
>  					};
>  				};
> 
>  				port at 2 {
>  					reg = <2>;
>  					du_out_lvds1: endpoint {
> +						remote-endpoint = <&du_out_lvds1>;

It's interesting how the DU ports reference themselves :-)

>  					};
>  				};
>  			};
>  		};
>  	};
> 
> +	lvds0: lvds at feb90000 {
> +		compatible = "renesas,lvds-r8a77995";
> +		reg = <0 0xfeb90000 0 0x20>;
> +		clocks = <&cpg CPG_MOD 727>;
> +		status = "disabled";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port at 0 {
> +				reg = <0>;
> +				lvds0_in: endpoint {
> +					remote-endpoint = <&du_out_lvds0>;
> +				};
> +			};
> +
> +			port at 1 {
> +				reg = <1>;
> +				lvds0_out: endpoint {
> +				};
> +			};
> +		};
> +	};
> +
> +	lvds1: lvds at feb90100 {
> +		compatible = "renesas,lvds-r8a77995";
> +		reg = <0 0xfeb90100 0 0x20>;
> +		clocks = <&cpg CPG_MOD 727>;
> +		status = "disabled";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port at 0 {
> +				reg = <0>;
> +				lvds1_in: endpoint {
> +					remote-endpoint = <&du_out_lvds1>;
> +				};
> +			};
> +
> +			port at 1 {
> +				reg = <1>;
> +				lvds1_out: endpoint {
> +				};
> +			};
> +		};
> +	};
> +
>  	timer {
>  		compatible = "arm,armv8-timer";
>  		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
> IRQ_TYPE_LEVEL_LOW)>,

-- 
Regards,

Laurent Pinchart

Re: [PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Kieran Bingham]

On 15/02/18 14:10, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:20 EET Kieran Bingham wrote:
>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>> ---
>>  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 52 ++++++++++++++++++++++++++++
>>  1 file changed, 52 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index
>> a57d5fecf79c..7851e37cfff1 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> @@ -773,18 +773,70 @@
>>  				port@1 {
>>  					reg = <1>;
>>  					du_out_lvds0: endpoint {
>> +						remote-endpoint = <&du_out_lvds0>;
>>  					};
>>  				};
>>
>>  				port@2 {
>>  					reg = <2>;
>>  					du_out_lvds1: endpoint {
>> +						remote-endpoint = <&du_out_lvds1>;
> 
> It's interesting how the DU ports reference themselves :-)

Ah, yes - that's ...  that's a feature...

--
Kieran



>>  					};
>>  				};
>>  			};
>>  		};
>>  	};
>>
>> +	lvds0: lvds@feb90000 {
>> +		compatible = "renesas,lvds-r8a77995";
>> +		reg = <0 0xfeb90000 0 0x20>;
>> +		clocks = <&cpg CPG_MOD 727>;
>> +		status = "disabled";
>> +
>> +		ports {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			port@0 {
>> +				reg = <0>;
>> +				lvds0_in: endpoint {
>> +					remote-endpoint = <&du_out_lvds0>;
>> +				};
>> +			};
>> +
>> +			port@1 {
>> +				reg = <1>;
>> +				lvds0_out: endpoint {
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>> +	lvds1: lvds@feb90100 {
>> +		compatible = "renesas,lvds-r8a77995";
>> +		reg = <0 0xfeb90100 0 0x20>;
>> +		clocks = <&cpg CPG_MOD 727>;
>> +		status = "disabled";
>> +
>> +		ports {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			port@0 {
>> +				reg = <0>;
>> +				lvds1_in: endpoint {
>> +					remote-endpoint = <&du_out_lvds1>;
>> +				};
>> +			};
>> +
>> +			port@1 {
>> +				reg = <1>;
>> +				lvds1_out: endpoint {
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>>  	timer {
>>  		compatible = "arm,armv8-timer";
>>  		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
>> IRQ_TYPE_LEVEL_LOW)>,
> 

[PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Kieran Bingham]

On 15/02/18 14:10, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:20 EET Kieran Bingham wrote:
>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>> ---
>>  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 52 ++++++++++++++++++++++++++++
>>  1 file changed, 52 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index
>> a57d5fecf79c..7851e37cfff1 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> @@ -773,18 +773,70 @@
>>  				port at 1 {
>>  					reg = <1>;
>>  					du_out_lvds0: endpoint {
>> +						remote-endpoint = <&du_out_lvds0>;
>>  					};
>>  				};
>>
>>  				port at 2 {
>>  					reg = <2>;
>>  					du_out_lvds1: endpoint {
>> +						remote-endpoint = <&du_out_lvds1>;
> 
> It's interesting how the DU ports reference themselves :-)

Ah, yes - that's ...  that's a feature...

--
Kieran



>>  					};
>>  				};
>>  			};
>>  		};
>>  	};
>>
>> +	lvds0: lvds at feb90000 {
>> +		compatible = "renesas,lvds-r8a77995";
>> +		reg = <0 0xfeb90000 0 0x20>;
>> +		clocks = <&cpg CPG_MOD 727>;
>> +		status = "disabled";
>> +
>> +		ports {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			port at 0 {
>> +				reg = <0>;
>> +				lvds0_in: endpoint {
>> +					remote-endpoint = <&du_out_lvds0>;
>> +				};
>> +			};
>> +
>> +			port at 1 {
>> +				reg = <1>;
>> +				lvds0_out: endpoint {
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>> +	lvds1: lvds at feb90100 {
>> +		compatible = "renesas,lvds-r8a77995";
>> +		reg = <0 0xfeb90100 0 0x20>;
>> +		clocks = <&cpg CPG_MOD 727>;
>> +		status = "disabled";
>> +
>> +		ports {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			port at 0 {
>> +				reg = <0>;
>> +				lvds1_in: endpoint {
>> +					remote-endpoint = <&du_out_lvds1>;
>> +				};
>> +			};
>> +
>> +			port at 1 {
>> +				reg = <1>;
>> +				lvds1_out: endpoint {
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>>  	timer {
>>  		compatible = "arm,armv8-timer";
>>  		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
>> IRQ_TYPE_LEVEL_LOW)>,
> 

Re: [PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Simon Horman]

On Thu, Feb 15, 2018 at 08:38:20AM +0000, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

It looks like there has been some review of this patch that needs
addressing, I've marked it as "Changes Requested".

[PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Simon Horman]

On Thu, Feb 15, 2018 at 08:38:20AM +0000, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

It looks like there has been some review of this patch that needs
addressing, I've marked it as "Changes Requested".

Re: [PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

[Simon Horman]

On Thu, Feb 15, 2018 at 08:38:20AM +0000, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
> 
> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>

It looks like there has been some review of this patch that needs
addressing, I've marked it as "Changes Requested".
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[PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Enable the DU, providing only the VGA output for now.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 ++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index af07da240be0..668e246dfc5d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,38 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	vga {
+		compatible = "vga-connector";
+
+		port {
+			vga_in: endpoint {
+				remote-endpoint = <&adv7123_out>;
+			};
+		};
+	};
+
+	vga-encoder {
+		compatible = "adi,adv7123";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7123_in: endpoint {
+					remote-endpoint = <&du_out_rgb>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+				adv7123_out: endpoint {
+					remote-endpoint = <&vga_in>;
+				};
+			};
+		};
+	};
+
 	memory@48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -46,6 +78,11 @@
 		};
 	};
 
+	du_pins: du {
+		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";
+		function = "du";
+	};
+
 	i2c0_pins: i2c0 {
 		groups = "i2c0";
 		function = "i2c0";
@@ -95,6 +132,20 @@
 	status = "okay";
 };
 
+&du {
+	pinctrl-0 = <&du_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	ports {
+		port@0 {
+			endpoint {
+				remote-endpoint = <&adv7123_in>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
-- 
2.7.4

[PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Enable the DU, providing only the VGA output for now.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 ++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index af07da240be0..668e246dfc5d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,38 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	vga {
+		compatible = "vga-connector";
+
+		port {
+			vga_in: endpoint {
+				remote-endpoint = <&adv7123_out>;
+			};
+		};
+	};
+
+	vga-encoder {
+		compatible = "adi,adv7123";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				adv7123_in: endpoint {
+					remote-endpoint = <&du_out_rgb>;
+				};
+			};
+			port at 1 {
+				reg = <1>;
+				adv7123_out: endpoint {
+					remote-endpoint = <&vga_in>;
+				};
+			};
+		};
+	};
+
 	memory at 48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -46,6 +78,11 @@
 		};
 	};
 
+	du_pins: du {
+		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";
+		function = "du";
+	};
+
 	i2c0_pins: i2c0 {
 		groups = "i2c0";
 		function = "i2c0";
@@ -95,6 +132,20 @@
 	status = "okay";
 };
 
+&du {
+	pinctrl-0 = <&du_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	ports {
+		port at 0 {
+			endpoint {
+				remote-endpoint = <&adv7123_in>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
-- 
2.7.4

[PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Enable the DU, providing only the VGA output for now.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 ++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index af07da240be0..668e246dfc5d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,38 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	vga {
+		compatible = "vga-connector";
+
+		port {
+			vga_in: endpoint {
+				remote-endpoint = <&adv7123_out>;
+			};
+		};
+	};
+
+	vga-encoder {
+		compatible = "adi,adv7123";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7123_in: endpoint {
+					remote-endpoint = <&du_out_rgb>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+				adv7123_out: endpoint {
+					remote-endpoint = <&vga_in>;
+				};
+			};
+		};
+	};
+
 	memory@48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -46,6 +78,11 @@
 		};
 	};
 
+	du_pins: du {
+		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";
+		function = "du";
+	};
+
 	i2c0_pins: i2c0 {
 		groups = "i2c0";
 		function = "i2c0";
@@ -95,6 +132,20 @@
 	status = "okay";
 };
 
+&du {
+	pinctrl-0 = <&du_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	ports {
+		port@0 {
+			endpoint {
+				remote-endpoint = <&adv7123_in>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
-- 
2.7.4

Re: [PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:21 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Enable the DU, providing only the VGA output for now.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

I assume Simon will take care of this patch.

> ---
>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 +++++++++++++++++++++++
>  1 file changed, 51 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
> af07da240be0..668e246dfc5d 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> @@ -27,6 +27,38 @@
>  		stdout-path = "serial0:115200n8";
>  	};
> 
> +	vga {
> +		compatible = "vga-connector";
> +
> +		port {
> +			vga_in: endpoint {
> +				remote-endpoint = <&adv7123_out>;
> +			};
> +		};
> +	};
> +
> +	vga-encoder {
> +		compatible = "adi,adv7123";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +				adv7123_in: endpoint {
> +					remote-endpoint = <&du_out_rgb>;
> +				};
> +			};
> +			port@1 {
> +				reg = <1>;
> +				adv7123_out: endpoint {
> +					remote-endpoint = <&vga_in>;
> +				};
> +			};
> +		};
> +	};
> +
>  	memory@48000000 {
>  		device_type = "memory";
>  		/* first 128MB is reserved for secure area. */
> @@ -46,6 +78,11 @@
>  		};
>  	};
> 
> +	du_pins: du {
> +		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";
> +		function = "du";
> +	};
> +
>  	i2c0_pins: i2c0 {
>  		groups = "i2c0";
>  		function = "i2c0";
> @@ -95,6 +132,20 @@
>  	status = "okay";
>  };
> 
> +&du {
> +	pinctrl-0 = <&du_pins>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +
> +	ports {
> +		port@0 {
> +			endpoint {
> +				remote-endpoint = <&adv7123_in>;
> +			};
> +		};
> +	};
> +};
> +
>  &ehci0 {
>  	status = "okay";
>  };


-- 
Regards,

Laurent Pinchart

[PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:21 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Enable the DU, providing only the VGA output for now.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

I assume Simon will take care of this patch.

> ---
>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 +++++++++++++++++++++++
>  1 file changed, 51 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
> af07da240be0..668e246dfc5d 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> @@ -27,6 +27,38 @@
>  		stdout-path = "serial0:115200n8";
>  	};
> 
> +	vga {
> +		compatible = "vga-connector";
> +
> +		port {
> +			vga_in: endpoint {
> +				remote-endpoint = <&adv7123_out>;
> +			};
> +		};
> +	};
> +
> +	vga-encoder {
> +		compatible = "adi,adv7123";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port at 0 {
> +				reg = <0>;
> +				adv7123_in: endpoint {
> +					remote-endpoint = <&du_out_rgb>;
> +				};
> +			};
> +			port at 1 {
> +				reg = <1>;
> +				adv7123_out: endpoint {
> +					remote-endpoint = <&vga_in>;
> +				};
> +			};
> +		};
> +	};
> +
>  	memory at 48000000 {
>  		device_type = "memory";
>  		/* first 128MB is reserved for secure area. */
> @@ -46,6 +78,11 @@
>  		};
>  	};
> 
> +	du_pins: du {
> +		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";
> +		function = "du";
> +	};
> +
>  	i2c0_pins: i2c0 {
>  		groups = "i2c0";
>  		function = "i2c0";
> @@ -95,6 +132,20 @@
>  	status = "okay";
>  };
> 
> +&du {
> +	pinctrl-0 = <&du_pins>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +
> +	ports {
> +		port at 0 {
> +			endpoint {
> +				remote-endpoint = <&adv7123_in>;
> +			};
> +		};
> +	};
> +};
> +
>  &ehci0 {
>  	status = "okay";
>  };


-- 
Regards,

Laurent Pinchart

Re: [PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:21 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
> 
> Enable the DU, providing only the VGA output for now.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>

Reviewed-by: Laurent Pinchart <laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>

I assume Simon will take care of this patch.

> ---
>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 +++++++++++++++++++++++
>  1 file changed, 51 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
> af07da240be0..668e246dfc5d 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> @@ -27,6 +27,38 @@
>  		stdout-path = "serial0:115200n8";
>  	};
> 
> +	vga {
> +		compatible = "vga-connector";
> +
> +		port {
> +			vga_in: endpoint {
> +				remote-endpoint = <&adv7123_out>;
> +			};
> +		};
> +	};
> +
> +	vga-encoder {
> +		compatible = "adi,adv7123";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +				adv7123_in: endpoint {
> +					remote-endpoint = <&du_out_rgb>;
> +				};
> +			};
> +			port@1 {
> +				reg = <1>;
> +				adv7123_out: endpoint {
> +					remote-endpoint = <&vga_in>;
> +				};
> +			};
> +		};
> +	};
> +
>  	memory@48000000 {
>  		device_type = "memory";
>  		/* first 128MB is reserved for secure area. */
> @@ -46,6 +78,11 @@
>  		};
>  	};
> 
> +	du_pins: du {
> +		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";
> +		function = "du";
> +	};
> +
>  	i2c0_pins: i2c0 {
>  		groups = "i2c0";
>  		function = "i2c0";
> @@ -95,6 +132,20 @@
>  	status = "okay";
>  };
> 
> +&du {
> +	pinctrl-0 = <&du_pins>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +
> +	ports {
> +		port@0 {
> +			endpoint {
> +				remote-endpoint = <&adv7123_in>;
> +			};
> +		};
> +	};
> +};
> +
>  &ehci0 {
>  	status = "okay";
>  };


-- 
Regards,

Laurent Pinchart

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Re: [PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Kieran Bingham]

Hi Laurent, Simon,

On 15/02/18 14:12, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:21 EET Kieran Bingham wrote:
>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>> Enable the DU, providing only the VGA output for now.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> 
> I assume Simon will take care of this patch.

That will be great, - One small caveat on this patch though:


>> ---
>>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 +++++++++++++++++++++++
>>  1 file changed, 51 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
>> af07da240be0..668e246dfc5d 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> @@ -27,6 +27,38 @@
>>  		stdout-path = "serial0:115200n8";
>>  	};
>>
>> +	vga {
>> +		compatible = "vga-connector";
>> +
>> +		port {
>> +			vga_in: endpoint {
>> +				remote-endpoint = <&adv7123_out>;
>> +			};
>> +		};
>> +	};
>> +
>> +	vga-encoder {
>> +		compatible = "adi,adv7123";
>> +
>> +		ports {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			port@0 {
>> +				reg = <0>;
>> +				adv7123_in: endpoint {
>> +					remote-endpoint = <&du_out_rgb>;
>> +				};
>> +			};
>> +			port@1 {
>> +				reg = <1>;
>> +				adv7123_out: endpoint {
>> +					remote-endpoint = <&vga_in>;
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>>  	memory@48000000 {
>>  		device_type = "memory";
>>  		/* first 128MB is reserved for secure area. */
>> @@ -46,6 +78,11 @@
>>  		};
>>  	};
>>
>> +	du_pins: du {
>> +		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";

The du_dotclkout0 is named differently in Uli's patch. (Of course I believe my
version is correct, but there is some precedent set it would seem).

Anyway, If Uli's version of the PFC is accepted (Which I'm sure it will be),
then I will have to re-spin this patch with the 'different' "du_clk_out_0" value
in the groups.

--
Kieran


>> +		function = "du";
>> +	};
>> +
>>  	i2c0_pins: i2c0 {
>>  		groups = "i2c0";
>>  		function = "i2c0";
>> @@ -95,6 +132,20 @@
>>  	status = "okay";
>>  };
>>
>> +&du {
>> +	pinctrl-0 = <&du_pins>;
>> +	pinctrl-names = "default";
>> +	status = "okay";
>> +
>> +	ports {
>> +		port@0 {
>> +			endpoint {
>> +				remote-endpoint = <&adv7123_in>;
>> +			};
>> +		};
>> +	};
>> +};
>> +
>>  &ehci0 {
>>  	status = "okay";
>>  };
> 
> 

[PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Kieran Bingham]

Hi Laurent, Simon,

On 15/02/18 14:12, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:21 EET Kieran Bingham wrote:
>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>> Enable the DU, providing only the VGA output for now.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> 
> I assume Simon will take care of this patch.

That will be great, - One small caveat on this patch though:


>> ---
>>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 +++++++++++++++++++++++
>>  1 file changed, 51 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
>> af07da240be0..668e246dfc5d 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> @@ -27,6 +27,38 @@
>>  		stdout-path = "serial0:115200n8";
>>  	};
>>
>> +	vga {
>> +		compatible = "vga-connector";
>> +
>> +		port {
>> +			vga_in: endpoint {
>> +				remote-endpoint = <&adv7123_out>;
>> +			};
>> +		};
>> +	};
>> +
>> +	vga-encoder {
>> +		compatible = "adi,adv7123";
>> +
>> +		ports {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			port at 0 {
>> +				reg = <0>;
>> +				adv7123_in: endpoint {
>> +					remote-endpoint = <&du_out_rgb>;
>> +				};
>> +			};
>> +			port at 1 {
>> +				reg = <1>;
>> +				adv7123_out: endpoint {
>> +					remote-endpoint = <&vga_in>;
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>>  	memory at 48000000 {
>>  		device_type = "memory";
>>  		/* first 128MB is reserved for secure area. */
>> @@ -46,6 +78,11 @@
>>  		};
>>  	};
>>
>> +	du_pins: du {
>> +		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";

The du_dotclkout0 is named differently in Uli's patch. (Of course I believe my
version is correct, but there is some precedent set it would seem).

Anyway, If Uli's version of the PFC is accepted (Which I'm sure it will be),
then I will have to re-spin this patch with the 'different' "du_clk_out_0" value
in the groups.

--
Kieran


>> +		function = "du";
>> +	};
>> +
>>  	i2c0_pins: i2c0 {
>>  		groups = "i2c0";
>>  		function = "i2c0";
>> @@ -95,6 +132,20 @@
>>  	status = "okay";
>>  };
>>
>> +&du {
>> +	pinctrl-0 = <&du_pins>;
>> +	pinctrl-names = "default";
>> +	status = "okay";
>> +
>> +	ports {
>> +		port at 0 {
>> +			endpoint {
>> +				remote-endpoint = <&adv7123_in>;
>> +			};
>> +		};
>> +	};
>> +};
>> +
>>  &ehci0 {
>>  	status = "okay";
>>  };
> 
> 

Re: [PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Kieran Bingham]

Hi Laurent, Simon,

On 15/02/18 14:12, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:21 EET Kieran Bingham wrote:
>> From: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
>>
>> Enable the DU, providing only the VGA output for now.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
> 
> Reviewed-by: Laurent Pinchart <laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
> 
> I assume Simon will take care of this patch.

That will be great, - One small caveat on this patch though:


>> ---
>>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 +++++++++++++++++++++++
>>  1 file changed, 51 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
>> af07da240be0..668e246dfc5d 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> @@ -27,6 +27,38 @@
>>  		stdout-path = "serial0:115200n8";
>>  	};
>>
>> +	vga {
>> +		compatible = "vga-connector";
>> +
>> +		port {
>> +			vga_in: endpoint {
>> +				remote-endpoint = <&adv7123_out>;
>> +			};
>> +		};
>> +	};
>> +
>> +	vga-encoder {
>> +		compatible = "adi,adv7123";
>> +
>> +		ports {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			port@0 {
>> +				reg = <0>;
>> +				adv7123_in: endpoint {
>> +					remote-endpoint = <&du_out_rgb>;
>> +				};
>> +			};
>> +			port@1 {
>> +				reg = <1>;
>> +				adv7123_out: endpoint {
>> +					remote-endpoint = <&vga_in>;
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>>  	memory@48000000 {
>>  		device_type = "memory";
>>  		/* first 128MB is reserved for secure area. */
>> @@ -46,6 +78,11 @@
>>  		};
>>  	};
>>
>> +	du_pins: du {
>> +		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";

The du_dotclkout0 is named differently in Uli's patch. (Of course I believe my
version is correct, but there is some precedent set it would seem).

Anyway, If Uli's version of the PFC is accepted (Which I'm sure it will be),
then I will have to re-spin this patch with the 'different' "du_clk_out_0" value
in the groups.

--
Kieran


>> +		function = "du";
>> +	};
>> +
>>  	i2c0_pins: i2c0 {
>>  		groups = "i2c0";
>>  		function = "i2c0";
>> @@ -95,6 +132,20 @@
>>  	status = "okay";
>>  };
>>
>> +&du {
>> +	pinctrl-0 = <&du_pins>;
>> +	pinctrl-names = "default";
>> +	status = "okay";
>> +
>> +	ports {
>> +		port@0 {
>> +			endpoint {
>> +				remote-endpoint = <&adv7123_in>;
>> +			};
>> +		};
>> +	};
>> +};
>> +
>>  &ehci0 {
>>  	status = "okay";
>>  };
> 
> 
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Re: [PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Simon Horman]

On Thu, Feb 15, 2018 at 02:30:28PM +0000, Kieran Bingham wrote:
> Hi Laurent, Simon,
> 
> On 15/02/18 14:12, Laurent Pinchart wrote:
> > Hi Kieran,
> > 
> > Thank you for the patch.
> > 
> > On Thursday, 15 February 2018 10:38:21 EET Kieran Bingham wrote:
> >> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> >>
> >> Enable the DU, providing only the VGA output for now.
> >>
> >> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > 
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > 
> > I assume Simon will take care of this patch.
> 
> That will be great, - One small caveat on this patch though:
> 
> 
> >> ---
> >>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 +++++++++++++++++++++++
> >>  1 file changed, 51 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> >> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
> >> af07da240be0..668e246dfc5d 100644
> >> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> >> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> >> @@ -27,6 +27,38 @@
> >>  		stdout-path = "serial0:115200n8";
> >>  	};
> >>
> >> +	vga {
> >> +		compatible = "vga-connector";
> >> +
> >> +		port {
> >> +			vga_in: endpoint {
> >> +				remote-endpoint = <&adv7123_out>;
> >> +			};
> >> +		};
> >> +	};
> >> +
> >> +	vga-encoder {
> >> +		compatible = "adi,adv7123";
> >> +
> >> +		ports {
> >> +			#address-cells = <1>;
> >> +			#size-cells = <0>;
> >> +
> >> +			port@0 {
> >> +				reg = <0>;
> >> +				adv7123_in: endpoint {
> >> +					remote-endpoint = <&du_out_rgb>;
> >> +				};
> >> +			};
> >> +			port@1 {
> >> +				reg = <1>;
> >> +				adv7123_out: endpoint {
> >> +					remote-endpoint = <&vga_in>;
> >> +				};
> >> +			};
> >> +		};
> >> +	};
> >> +
> >>  	memory@48000000 {
> >>  		device_type = "memory";
> >>  		/* first 128MB is reserved for secure area. */
> >> @@ -46,6 +78,11 @@
> >>  		};
> >>  	};
> >>
> >> +	du_pins: du {
> >> +		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";
> 
> The du_dotclkout0 is named differently in Uli's patch. (Of course I believe my
> version is correct, but there is some precedent set it would seem).
> 
> Anyway, If Uli's version of the PFC is accepted (Which I'm sure it will be),
> then I will have to re-spin this patch with the 'different' "du_clk_out_0" value
> in the groups.

Thanks, please repost once this has been shaken out.

[PATCH 6/8] arm64: dts: renesas: r8a77995-draak: Enable DU

[Simon Horman]

On Thu, Feb 15, 2018 at 02:30:28PM +0000, Kieran Bingham wrote:
> Hi Laurent, Simon,
> 
> On 15/02/18 14:12, Laurent Pinchart wrote:
> > Hi Kieran,
> > 
> > Thank you for the patch.
> > 
> > On Thursday, 15 February 2018 10:38:21 EET Kieran Bingham wrote:
> >> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> >>
> >> Enable the DU, providing only the VGA output for now.
> >>
> >> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > 
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > 
> > I assume Simon will take care of this patch.
> 
> That will be great, - One small caveat on this patch though:
> 
> 
> >> ---
> >>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 +++++++++++++++++++++++
> >>  1 file changed, 51 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> >> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
> >> af07da240be0..668e246dfc5d 100644
> >> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> >> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> >> @@ -27,6 +27,38 @@
> >>  		stdout-path = "serial0:115200n8";
> >>  	};
> >>
> >> +	vga {
> >> +		compatible = "vga-connector";
> >> +
> >> +		port {
> >> +			vga_in: endpoint {
> >> +				remote-endpoint = <&adv7123_out>;
> >> +			};
> >> +		};
> >> +	};
> >> +
> >> +	vga-encoder {
> >> +		compatible = "adi,adv7123";
> >> +
> >> +		ports {
> >> +			#address-cells = <1>;
> >> +			#size-cells = <0>;
> >> +
> >> +			port at 0 {
> >> +				reg = <0>;
> >> +				adv7123_in: endpoint {
> >> +					remote-endpoint = <&du_out_rgb>;
> >> +				};
> >> +			};
> >> +			port at 1 {
> >> +				reg = <1>;
> >> +				adv7123_out: endpoint {
> >> +					remote-endpoint = <&vga_in>;
> >> +				};
> >> +			};
> >> +		};
> >> +	};
> >> +
> >>  	memory at 48000000 {
> >>  		device_type = "memory";
> >>  		/* first 128MB is reserved for secure area. */
> >> @@ -46,6 +78,11 @@
> >>  		};
> >>  	};
> >>
> >> +	du_pins: du {
> >> +		groups = "du_rgb888", "du_sync", "du_disp", "du_dotclkout0";
> 
> The du_dotclkout0 is named differently in Uli's patch. (Of course I believe my
> version is correct, but there is some precedent set it would seem).
> 
> Anyway, If Uli's version of the PFC is accepted (Which I'm sure it will be),
> then I will have to re-spin this patch with the 'different' "du_clk_out_0" value
> in the groups.

Thanks, please repost once this has been shaken out.

[PATCH v2] arm64: dts: renesas: r8a77995-draak: Enable DU

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Enable the DU, providing only the VGA output for now.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---

Just a v2 update to fix the PFC name, and collect Laurent's RB tag.  The
remainder of the series will likely be postponed due to dependencies on LVDS
changes etc.

v2:
 - Update du_dot_clk_0 name to match Ulrich's PFC configuration.

 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 ++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index af07da240be0..37025251078a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,38 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	vga {
+		compatible = "vga-connector";
+
+		port {
+			vga_in: endpoint {
+				remote-endpoint = <&adv7123_out>;
+			};
+		};
+	};
+
+	vga-encoder {
+		compatible = "adi,adv7123";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7123_in: endpoint {
+					remote-endpoint = <&du_out_rgb>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+				adv7123_out: endpoint {
+					remote-endpoint = <&vga_in>;
+				};
+			};
+		};
+	};
+
 	memory@48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -46,6 +78,11 @@
 		};
 	};
 
+	du_pins: du {
+		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
+		function = "du";
+	};
+
 	i2c0_pins: i2c0 {
 		groups = "i2c0";
 		function = "i2c0";
@@ -95,6 +132,20 @@
 	status = "okay";
 };
 
+&du {
+	pinctrl-0 = <&du_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	ports {
+		port@0 {
+			endpoint {
+				remote-endpoint = <&adv7123_in>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
-- 
2.7.4

[PATCH v2] arm64: dts: renesas: r8a77995-draak: Enable DU

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Enable the DU, providing only the VGA output for now.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---

Just a v2 update to fix the PFC name, and collect Laurent's RB tag.  The
remainder of the series will likely be postponed due to dependencies on LVDS
changes etc.

v2:
 - Update du_dot_clk_0 name to match Ulrich's PFC configuration.

 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 ++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index af07da240be0..37025251078a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,38 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	vga {
+		compatible = "vga-connector";
+
+		port {
+			vga_in: endpoint {
+				remote-endpoint = <&adv7123_out>;
+			};
+		};
+	};
+
+	vga-encoder {
+		compatible = "adi,adv7123";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				adv7123_in: endpoint {
+					remote-endpoint = <&du_out_rgb>;
+				};
+			};
+			port at 1 {
+				reg = <1>;
+				adv7123_out: endpoint {
+					remote-endpoint = <&vga_in>;
+				};
+			};
+		};
+	};
+
 	memory at 48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -46,6 +78,11 @@
 		};
 	};
 
+	du_pins: du {
+		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
+		function = "du";
+	};
+
 	i2c0_pins: i2c0 {
 		groups = "i2c0";
 		function = "i2c0";
@@ -95,6 +132,20 @@
 	status = "okay";
 };
 
+&du {
+	pinctrl-0 = <&du_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	ports {
+		port at 0 {
+			endpoint {
+				remote-endpoint = <&adv7123_in>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
-- 
2.7.4

[PATCH v2] arm64: dts: renesas: r8a77995-draak: Enable DU

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Enable the DU, providing only the VGA output for now.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---

Just a v2 update to fix the PFC name, and collect Laurent's RB tag.  The
remainder of the series will likely be postponed due to dependencies on LVDS
changes etc.

v2:
 - Update du_dot_clk_0 name to match Ulrich's PFC configuration.

 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 51 ++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index af07da240be0..37025251078a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,38 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	vga {
+		compatible = "vga-connector";
+
+		port {
+			vga_in: endpoint {
+				remote-endpoint = <&adv7123_out>;
+			};
+		};
+	};
+
+	vga-encoder {
+		compatible = "adi,adv7123";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7123_in: endpoint {
+					remote-endpoint = <&du_out_rgb>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+				adv7123_out: endpoint {
+					remote-endpoint = <&vga_in>;
+				};
+			};
+		};
+	};
+
 	memory@48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -46,6 +78,11 @@
 		};
 	};
 
+	du_pins: du {
+		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
+		function = "du";
+	};
+
 	i2c0_pins: i2c0 {
 		groups = "i2c0";
 		function = "i2c0";
@@ -95,6 +132,20 @@
 	status = "okay";
 };
 
+&du {
+	pinctrl-0 = <&du_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	ports {
+		port@0 {
+			endpoint {
+				remote-endpoint = <&adv7123_in>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
-- 
2.7.4

Re: [PATCH v2] arm64: dts: renesas: r8a77995-draak: Enable DU

[Simon Horman]

On Fri, Feb 16, 2018 at 12:32:35PM +0000, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Enable the DU, providing only the VGA output for now.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> 
> Just a v2 update to fix the PFC name, and collect Laurent's RB tag.  The
> remainder of the series will likely be postponed due to dependencies on LVDS
> changes etc.
> 
> v2:
>  - Update du_dot_clk_0 name to match Ulrich's PFC configuration.

Thanks, applied with s/r8a77995-// adjustment to the subject.

[PATCH v2] arm64: dts: renesas: r8a77995-draak: Enable DU

[Simon Horman]

On Fri, Feb 16, 2018 at 12:32:35PM +0000, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Enable the DU, providing only the VGA output for now.
> 
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> 
> Just a v2 update to fix the PFC name, and collect Laurent's RB tag.  The
> remainder of the series will likely be postponed due to dependencies on LVDS
> changes etc.
> 
> v2:
>  - Update du_dot_clk_0 name to match Ulrich's PFC configuration.

Thanks, applied with s/r8a77995-// adjustment to the subject.

[PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham@ideasonboard.com>

Provide a device node for the ADV7511 as found on the Draak D3 platform.

The ADV7511 is connected to the DU through a parallel mux chip, and is
configurable in hardware whether it is connected to LVDS0 or LVDS1.

Connect through to LVDS0 as a default implementation.

Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 56 ++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 668e246dfc5d..df0c7773cb7d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_out: endpoint {
+				remote-endpoint = <&adv7511_out>;
+			};
+		};
+	};
+
 	vga {
 		compatible = "vga-connector";
 
@@ -124,6 +135,39 @@
 		reg = <0x50>;
 		pagesize = <8>;
 	};
+
+	hdmi@39 {
+		compatible = "adi,adv7511w";
+		reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
+		reg-names = "main", "edid", "packet", "cec";
+		interrupt-parent = <&gpio1>;
+		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+
+		adi,input-depth = <8>;
+		adi,input-colorspace = "rgb";
+		adi,input-clock = "1x";
+		adi,input-style = <1>;
+		adi,input-justification = "evenly";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7511_in: endpoint {
+					remote-endpoint = <&lvds0_out>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				adv7511_out: endpoint {
+					remote-endpoint = <&hdmi_con_out>;
+				};
+			};
+		};
+	};
 };
 
 &i2c1 {
@@ -146,6 +190,18 @@
 	};
 };
 
+&lvds0 {
+	status = "okay";
+
+	ports {
+		port@1 {
+			endpoint {
+				remote-endpoint = <&adv7511_in>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
-- 
2.7.4

[PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham@ideasonboard.com>

Provide a device node for the ADV7511 as found on the Draak D3 platform.

The ADV7511 is connected to the DU through a parallel mux chip, and is
configurable in hardware whether it is connected to LVDS0 or LVDS1.

Connect through to LVDS0 as a default implementation.

Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 56 ++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 668e246dfc5d..df0c7773cb7d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_out: endpoint {
+				remote-endpoint = <&adv7511_out>;
+			};
+		};
+	};
+
 	vga {
 		compatible = "vga-connector";
 
@@ -124,6 +135,39 @@
 		reg = <0x50>;
 		pagesize = <8>;
 	};
+
+	hdmi at 39 {
+		compatible = "adi,adv7511w";
+		reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
+		reg-names = "main", "edid", "packet", "cec";
+		interrupt-parent = <&gpio1>;
+		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+
+		adi,input-depth = <8>;
+		adi,input-colorspace = "rgb";
+		adi,input-clock = "1x";
+		adi,input-style = <1>;
+		adi,input-justification = "evenly";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				adv7511_in: endpoint {
+					remote-endpoint = <&lvds0_out>;
+				};
+			};
+
+			port at 1 {
+				reg = <1>;
+				adv7511_out: endpoint {
+					remote-endpoint = <&hdmi_con_out>;
+				};
+			};
+		};
+	};
 };
 
 &i2c1 {
@@ -146,6 +190,18 @@
 	};
 };
 
+&lvds0 {
+	status = "okay";
+
+	ports {
+		port at 1 {
+			endpoint {
+				remote-endpoint = <&adv7511_in>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
-- 
2.7.4

[PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>

Provide a device node for the ADV7511 as found on the Draak D3 platform.

The ADV7511 is connected to the DU through a parallel mux chip, and is
configurable in hardware whether it is connected to LVDS0 or LVDS1.

Connect through to LVDS0 as a default implementation.

Signed-off-by: Kieran Bingham <kieran.bingham-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 56 ++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 668e246dfc5d..df0c7773cb7d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_out: endpoint {
+				remote-endpoint = <&adv7511_out>;
+			};
+		};
+	};
+
 	vga {
 		compatible = "vga-connector";
 
@@ -124,6 +135,39 @@
 		reg = <0x50>;
 		pagesize = <8>;
 	};
+
+	hdmi@39 {
+		compatible = "adi,adv7511w";
+		reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
+		reg-names = "main", "edid", "packet", "cec";
+		interrupt-parent = <&gpio1>;
+		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+
+		adi,input-depth = <8>;
+		adi,input-colorspace = "rgb";
+		adi,input-clock = "1x";
+		adi,input-style = <1>;
+		adi,input-justification = "evenly";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7511_in: endpoint {
+					remote-endpoint = <&lvds0_out>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				adv7511_out: endpoint {
+					remote-endpoint = <&hdmi_con_out>;
+				};
+			};
+		};
+	};
 };
 
 &i2c1 {
@@ -146,6 +190,18 @@
 	};
 };
 
+&lvds0 {
+	status = "okay";
+
+	ports {
+		port@1 {
+			endpoint {
+				remote-endpoint = <&adv7511_in>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
-- 
2.7.4

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Re: [PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham@ideasonboard.com>
> 
> Provide a device node for the ADV7511 as found on the Draak D3 platform.
> 
> The ADV7511 is connected to the DU through a parallel mux chip, and is
> configurable in hardware whether it is connected to LVDS0 or LVDS1.
> 
> Connect through to LVDS0 as a default implementation.

You need to model the LVDS decoder in DT too. I know that no driver and no DT 
bindings are available at the moment, and I'm aware that this patch enables 
the HDMI output on the Draak board, but I don't think it's upstreamable as-is.

> Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 56 +++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
> 668e246dfc5d..df0c7773cb7d 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> @@ -27,6 +27,17 @@
>  		stdout-path = "serial0:115200n8";
>  	};
> 
> +	hdmi-out {
> +		compatible = "hdmi-connector";
> +		type = "a";
> +
> +		port {
> +			hdmi_con_out: endpoint {
> +				remote-endpoint = <&adv7511_out>;
> +			};
> +		};
> +	};
> +
>  	vga {
>  		compatible = "vga-connector";
> 
> @@ -124,6 +135,39 @@
>  		reg = <0x50>;
>  		pagesize = <8>;
>  	};
> +
> +	hdmi@39 {
> +		compatible = "adi,adv7511w";
> +		reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
> +		reg-names = "main", "edid", "packet", "cec";
> +		interrupt-parent = <&gpio1>;
> +		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> +
> +		adi,input-depth = <8>;
> +		adi,input-colorspace = "rgb";
> +		adi,input-clock = "1x";
> +		adi,input-style = <1>;
> +		adi,input-justification = "evenly";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +				adv7511_in: endpoint {
> +					remote-endpoint = <&lvds0_out>;
> +				};
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +				adv7511_out: endpoint {
> +					remote-endpoint = <&hdmi_con_out>;
> +				};
> +			};
> +		};
> +	};
>  };
> 
>  &i2c1 {
> @@ -146,6 +190,18 @@
>  	};
>  };
> 
> +&lvds0 {
> +	status = "okay";
> +
> +	ports {
> +		port@1 {
> +			endpoint {
> +				remote-endpoint = <&adv7511_in>;
> +			};
> +		};
> +	};
> +};
> +
>  &ehci0 {
>  	status = "okay";
>  };


-- 
Regards,

Laurent Pinchart

[PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Laurent Pinchart]

Hi Kieran,

Thank you for the patch.

On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham@ideasonboard.com>
> 
> Provide a device node for the ADV7511 as found on the Draak D3 platform.
> 
> The ADV7511 is connected to the DU through a parallel mux chip, and is
> configurable in hardware whether it is connected to LVDS0 or LVDS1.
> 
> Connect through to LVDS0 as a default implementation.

You need to model the LVDS decoder in DT too. I know that no driver and no DT 
bindings are available at the moment, and I'm aware that this patch enables 
the HDMI output on the Draak board, but I don't think it's upstreamable as-is.

> Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 56 +++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
> 668e246dfc5d..df0c7773cb7d 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> @@ -27,6 +27,17 @@
>  		stdout-path = "serial0:115200n8";
>  	};
> 
> +	hdmi-out {
> +		compatible = "hdmi-connector";
> +		type = "a";
> +
> +		port {
> +			hdmi_con_out: endpoint {
> +				remote-endpoint = <&adv7511_out>;
> +			};
> +		};
> +	};
> +
>  	vga {
>  		compatible = "vga-connector";
> 
> @@ -124,6 +135,39 @@
>  		reg = <0x50>;
>  		pagesize = <8>;
>  	};
> +
> +	hdmi at 39 {
> +		compatible = "adi,adv7511w";
> +		reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
> +		reg-names = "main", "edid", "packet", "cec";
> +		interrupt-parent = <&gpio1>;
> +		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> +
> +		adi,input-depth = <8>;
> +		adi,input-colorspace = "rgb";
> +		adi,input-clock = "1x";
> +		adi,input-style = <1>;
> +		adi,input-justification = "evenly";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port at 0 {
> +				reg = <0>;
> +				adv7511_in: endpoint {
> +					remote-endpoint = <&lvds0_out>;
> +				};
> +			};
> +
> +			port at 1 {
> +				reg = <1>;
> +				adv7511_out: endpoint {
> +					remote-endpoint = <&hdmi_con_out>;
> +				};
> +			};
> +		};
> +	};
>  };
> 
>  &i2c1 {
> @@ -146,6 +190,18 @@
>  	};
>  };
> 
> +&lvds0 {
> +	status = "okay";
> +
> +	ports {
> +		port at 1 {
> +			endpoint {
> +				remote-endpoint = <&adv7511_in>;
> +			};
> +		};
> +	};
> +};
> +
>  &ehci0 {
>  	status = "okay";
>  };


-- 
Regards,

Laurent Pinchart

Re: [PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Simon Horman]

On Thu, Feb 15, 2018 at 04:16:00PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
> > From: Kieran Bingham <kieran.bingham@ideasonboard.com>
> > 
> > Provide a device node for the ADV7511 as found on the Draak D3 platform.
> > 
> > The ADV7511 is connected to the DU through a parallel mux chip, and is
> > configurable in hardware whether it is connected to LVDS0 or LVDS1.
> > 
> > Connect through to LVDS0 as a default implementation.
> 
> You need to model the LVDS decoder in DT too. I know that no driver and no DT 
> bindings are available at the moment, and I'm aware that this patch enables 
> the HDMI output on the Draak board, but I don't think it's upstreamable as-is.

Thanks, I've marked this as "Changes Requested".

[PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Simon Horman]

On Thu, Feb 15, 2018 at 04:16:00PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
> > From: Kieran Bingham <kieran.bingham@ideasonboard.com>
> > 
> > Provide a device node for the ADV7511 as found on the Draak D3 platform.
> > 
> > The ADV7511 is connected to the DU through a parallel mux chip, and is
> > configurable in hardware whether it is connected to LVDS0 or LVDS1.
> > 
> > Connect through to LVDS0 as a default implementation.
> 
> You need to model the LVDS decoder in DT too. I know that no driver and no DT 
> bindings are available at the moment, and I'm aware that this patch enables 
> the HDMI output on the Draak board, but I don't think it's upstreamable as-is.

Thanks, I've marked this as "Changes Requested".

Re: [PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Simon Horman]

On Thu, Feb 15, 2018 at 04:16:00PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
> > From: Kieran Bingham <kieran.bingham-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
> > 
> > Provide a device node for the ADV7511 as found on the Draak D3 platform.
> > 
> > The ADV7511 is connected to the DU through a parallel mux chip, and is
> > configurable in hardware whether it is connected to LVDS0 or LVDS1.
> > 
> > Connect through to LVDS0 as a default implementation.
> 
> You need to model the LVDS decoder in DT too. I know that no driver and no DT 
> bindings are available at the moment, and I'm aware that this patch enables 
> the HDMI output on the Draak board, but I don't think it's upstreamable as-is.

Thanks, I've marked this as "Changes Requested".
--
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Re: [PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Kieran Bingham]

Hi Laurent,

On 15/02/18 14:16, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
>> From: Kieran Bingham <kieran.bingham@ideasonboard.com>
>>
>> Provide a device node for the ADV7511 as found on the Draak D3 platform.
>>
>> The ADV7511 is connected to the DU through a parallel mux chip, and is
>> configurable in hardware whether it is connected to LVDS0 or LVDS1.
>>
>> Connect through to LVDS0 as a default implementation.
> 
> You need to model the LVDS decoder in DT too. I know that no driver and no DT 
> bindings are available at the moment, and I'm aware that this patch enables 
> the HDMI output on the Draak board, but I don't think it's upstreamable as-is.

Ok, understood. - I'll drop this patch for now until we can schedule time to
dedicate to looking into this.

I'm sure the archive's will hold on to this patch for us as a starting point :-)

--
Regards

Kieran

> 
>> Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
>> ---
>>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 56 +++++++++++++++++++++++
>>  1 file changed, 56 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
>> 668e246dfc5d..df0c7773cb7d 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> @@ -27,6 +27,17 @@
>>  		stdout-path = "serial0:115200n8";
>>  	};
>>
>> +	hdmi-out {
>> +		compatible = "hdmi-connector";
>> +		type = "a";
>> +
>> +		port {
>> +			hdmi_con_out: endpoint {
>> +				remote-endpoint = <&adv7511_out>;
>> +			};
>> +		};
>> +	};
>> +
>>  	vga {
>>  		compatible = "vga-connector";
>>
>> @@ -124,6 +135,39 @@
>>  		reg = <0x50>;
>>  		pagesize = <8>;
>>  	};
>> +
>> +	hdmi@39 {
>> +		compatible = "adi,adv7511w";
>> +		reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
>> +		reg-names = "main", "edid", "packet", "cec";
>> +		interrupt-parent = <&gpio1>;
>> +		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
>> +
>> +		adi,input-depth = <8>;
>> +		adi,input-colorspace = "rgb";
>> +		adi,input-clock = "1x";
>> +		adi,input-style = <1>;
>> +		adi,input-justification = "evenly";
>> +
>> +		ports {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			port@0 {
>> +				reg = <0>;
>> +				adv7511_in: endpoint {
>> +					remote-endpoint = <&lvds0_out>;
>> +				};
>> +			};
>> +
>> +			port@1 {
>> +				reg = <1>;
>> +				adv7511_out: endpoint {
>> +					remote-endpoint = <&hdmi_con_out>;
>> +				};
>> +			};
>> +		};
>> +	};
>>  };
>>
>>  &i2c1 {
>> @@ -146,6 +190,18 @@
>>  	};
>>  };
>>
>> +&lvds0 {
>> +	status = "okay";
>> +
>> +	ports {
>> +		port@1 {
>> +			endpoint {
>> +				remote-endpoint = <&adv7511_in>;
>> +			};
>> +		};
>> +	};
>> +};
>> +
>>  &ehci0 {
>>  	status = "okay";
>>  };
> 
> 

[PATCH 7/8] arm64: dts: renesas: r8a77995-draak: Add HDMI Out through ADV7511

[Kieran Bingham]

Hi Laurent,

On 15/02/18 14:16, Laurent Pinchart wrote:
> Hi Kieran,
> 
> Thank you for the patch.
> 
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
>> From: Kieran Bingham <kieran.bingham@ideasonboard.com>
>>
>> Provide a device node for the ADV7511 as found on the Draak D3 platform.
>>
>> The ADV7511 is connected to the DU through a parallel mux chip, and is
>> configurable in hardware whether it is connected to LVDS0 or LVDS1.
>>
>> Connect through to LVDS0 as a default implementation.
> 
> You need to model the LVDS decoder in DT too. I know that no driver and no DT 
> bindings are available at the moment, and I'm aware that this patch enables 
> the HDMI output on the Draak board, but I don't think it's upstreamable as-is.

Ok, understood. - I'll drop this patch for now until we can schedule time to
dedicate to looking into this.

I'm sure the archive's will hold on to this patch for us as a starting point :-)

--
Regards

Kieran

> 
>> Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
>> ---
>>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 56 +++++++++++++++++++++++
>>  1 file changed, 56 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index
>> 668e246dfc5d..df0c7773cb7d 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> @@ -27,6 +27,17 @@
>>  		stdout-path = "serial0:115200n8";
>>  	};
>>
>> +	hdmi-out {
>> +		compatible = "hdmi-connector";
>> +		type = "a";
>> +
>> +		port {
>> +			hdmi_con_out: endpoint {
>> +				remote-endpoint = <&adv7511_out>;
>> +			};
>> +		};
>> +	};
>> +
>>  	vga {
>>  		compatible = "vga-connector";
>>
>> @@ -124,6 +135,39 @@
>>  		reg = <0x50>;
>>  		pagesize = <8>;
>>  	};
>> +
>> +	hdmi at 39 {
>> +		compatible = "adi,adv7511w";
>> +		reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
>> +		reg-names = "main", "edid", "packet", "cec";
>> +		interrupt-parent = <&gpio1>;
>> +		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
>> +
>> +		adi,input-depth = <8>;
>> +		adi,input-colorspace = "rgb";
>> +		adi,input-clock = "1x";
>> +		adi,input-style = <1>;
>> +		adi,input-justification = "evenly";
>> +
>> +		ports {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			port at 0 {
>> +				reg = <0>;
>> +				adv7511_in: endpoint {
>> +					remote-endpoint = <&lvds0_out>;
>> +				};
>> +			};
>> +
>> +			port at 1 {
>> +				reg = <1>;
>> +				adv7511_out: endpoint {
>> +					remote-endpoint = <&hdmi_con_out>;
>> +				};
>> +			};
>> +		};
>> +	};
>>  };
>>
>>  &i2c1 {
>> @@ -146,6 +190,18 @@
>>  	};
>>  };
>>
>> +&lvds0 {
>> +	status = "okay";
>> +
>> +	ports {
>> +		port at 1 {
>> +			endpoint {
>> +				remote-endpoint = <&adv7511_in>;
>> +			};
>> +		};
>> +	};
>> +};
>> +
>>  &ehci0 {
>>  	status = "okay";
>>  };
> 
> 

[PATCH 8/8] [PoC] arm64: dts: renesas: r8a77995-draak: Add ADV7612

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham@ideasonboard.com>

Provide a node for the ADV7612. There is no VIN support yet, so this
node will only instantiate the device on the I2C bus for I2C address
testing.

Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 43 ++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index df0c7773cb7d..d7dd471c9fde 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	hdmi-in {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&adv7612_in>;
+			};
+		};
+	};
+
 	hdmi-out {
 		compatible = "hdmi-connector";
 		type = "a";
@@ -168,6 +179,38 @@
 			};
 		};
 	};
+
+	hdmi-in@4c {
+		compatible = "adi,adv7612";
+		reg = <0x4c>, <0x5a>, <0x5b>, <0x5c>, <0x5d>, <0x5e>, <0x5f>,
+		      <0x6a>, <0x6b>, <0x6c>, <0x6d>, <0x6e>, <0x6f>;
+		reg-names = "main", "avlink", "cec", "infoframe", "esdp",
+			    "dpp", "afe", "rep", "edid", "hdmi", "test",
+			    "cp", "vdp";
+
+		/* ADV7612_INTn connected only to test point CP56. */
+
+		default-input = <0>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7612_in: endpoint {
+					remote-endpoint = <&hdmi_con_in>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+				adv7612_out: endpoint {
+					// remote-endpoint = <&vin0ep2>;
+				};
+			};
+		};
+	};
 };
 
 &i2c1 {
-- 
2.7.4

[PATCH 8/8] [PoC] arm64: dts: renesas: r8a77995-draak: Add ADV7612

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham@ideasonboard.com>

Provide a node for the ADV7612. There is no VIN support yet, so this
node will only instantiate the device on the I2C bus for I2C address
testing.

Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 43 ++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index df0c7773cb7d..d7dd471c9fde 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	hdmi-in {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&adv7612_in>;
+			};
+		};
+	};
+
 	hdmi-out {
 		compatible = "hdmi-connector";
 		type = "a";
@@ -168,6 +179,38 @@
 			};
 		};
 	};
+
+	hdmi-in at 4c {
+		compatible = "adi,adv7612";
+		reg = <0x4c>, <0x5a>, <0x5b>, <0x5c>, <0x5d>, <0x5e>, <0x5f>,
+		      <0x6a>, <0x6b>, <0x6c>, <0x6d>, <0x6e>, <0x6f>;
+		reg-names = "main", "avlink", "cec", "infoframe", "esdp",
+			    "dpp", "afe", "rep", "edid", "hdmi", "test",
+			    "cp", "vdp";
+
+		/* ADV7612_INTn connected only to test point CP56. */
+
+		default-input = <0>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				adv7612_in: endpoint {
+					remote-endpoint = <&hdmi_con_in>;
+				};
+			};
+
+			port at 2 {
+				reg = <2>;
+				adv7612_out: endpoint {
+					// remote-endpoint = <&vin0ep2>;
+				};
+			};
+		};
+	};
 };
 
 &i2c1 {
-- 
2.7.4

[PATCH 8/8] [PoC] arm64: dts: renesas: r8a77995-draak: Add ADV7612

[Kieran Bingham]

From: Kieran Bingham <kieran.bingham@ideasonboard.com>

Provide a node for the ADV7612. There is no VIN support yet, so this
node will only instantiate the device on the I2C bus for I2C address
testing.

Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 43 ++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index df0c7773cb7d..d7dd471c9fde 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -27,6 +27,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	hdmi-in {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&adv7612_in>;
+			};
+		};
+	};
+
 	hdmi-out {
 		compatible = "hdmi-connector";
 		type = "a";
@@ -168,6 +179,38 @@
 			};
 		};
 	};
+
+	hdmi-in@4c {
+		compatible = "adi,adv7612";
+		reg = <0x4c>, <0x5a>, <0x5b>, <0x5c>, <0x5d>, <0x5e>, <0x5f>,
+		      <0x6a>, <0x6b>, <0x6c>, <0x6d>, <0x6e>, <0x6f>;
+		reg-names = "main", "avlink", "cec", "infoframe", "esdp",
+			    "dpp", "afe", "rep", "edid", "hdmi", "test",
+			    "cp", "vdp";
+
+		/* ADV7612_INTn connected only to test point CP56. */
+
+		default-input = <0>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7612_in: endpoint {
+					remote-endpoint = <&hdmi_con_in>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+				adv7612_out: endpoint {
+					// remote-endpoint = <&vin0ep2>;
+				};
+			};
+		};
+	};
 };
 
 &i2c1 {
-- 
2.7.4