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* [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
@ 2019-03-11 16:37 Jan Beulich
  2019-03-12 12:49 ` Wei Liu
  2019-03-19 17:01 ` George Dunlap
  0 siblings, 2 replies; 7+ messages in thread
From: Jan Beulich @ 2019-03-11 16:37 UTC (permalink / raw)
  To: xen-devel
  Cc: George Dunlap, Andrew Cooper, Tim Deegan, Wei Liu, Roger Pau Monne

The flag is really only meant for those, both HVM and 32-bit PV tell
kernel from user mode based on CPL/RPL. Remove the all-question-marks
comment and let's be on the safe side here and also suppress clearing
for 32-bit PV (this isn't a fast path after all).

Remove no longer necessary is_pv_32bit_*() from sh_update_cr3() and
sh_walk_guest_tables(). Note that shadow_one_bit_disable() already
assumes the new behavior.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: Also adjust shadow code.

--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -843,9 +843,15 @@ int arch_set_info_guest(
             return -EINVAL;
     }
 
-    v->arch.flags &= ~TF_kernel_mode;
-    if ( (flags & VGCF_in_kernel) || is_hvm_domain(d)/*???*/ )
-        v->arch.flags |= TF_kernel_mode;
+    v->arch.flags |= TF_kernel_mode;
+    if ( unlikely(!(flags & VGCF_in_kernel)) &&
+         /*
+          * TF_kernel_mode is only allowed to be clear for 64-bit PV. See
+          * update_cr3(), sh_update_cr3(), sh_walk_guest_tables(), and
+          * shadow_one_bit_disable() for why that is.
+          */
+         !is_hvm_domain(d) && !is_pv_32bit_domain(d) )
+        v->arch.flags &= ~TF_kernel_mode;
 
     v->arch.vgc_flags = flags;
 
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -180,7 +180,7 @@ sh_walk_guest_tables(struct vcpu *v, uns
                              INVALID_MFN, v->arch.paging.shadow.gl3e);
 #else /* 32 or 64 */
     const struct domain *d = v->domain;
-    mfn_t root_mfn = ((v->arch.flags & TF_kernel_mode) || is_pv_32bit_domain(d)
+    mfn_t root_mfn = (v->arch.flags & TF_kernel_mode
                       ? pagetable_get_mfn(v->arch.guest_table)
                       : pagetable_get_mfn(v->arch.guest_table_user));
     void *root_map = map_domain_page(root_mfn);
@@ -4025,7 +4025,7 @@ sh_update_cr3(struct vcpu *v, int do_loc
                   v, (unsigned long)pagetable_get_pfn(v->arch.guest_table));
 
 #if GUEST_PAGING_LEVELS == 4
-    if ( !(v->arch.flags & TF_kernel_mode) && !is_pv_32bit_domain(d) )
+    if ( !(v->arch.flags & TF_kernel_mode) )
         gmfn = pagetable_get_mfn(v->arch.guest_table_user);
     else
 #endif





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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
  2019-03-11 16:37 [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV Jan Beulich
@ 2019-03-12 12:49 ` Wei Liu
  2019-03-19 17:01 ` George Dunlap
  1 sibling, 0 replies; 7+ messages in thread
From: Wei Liu @ 2019-03-12 12:49 UTC (permalink / raw)
  To: Jan Beulich
  Cc: Wei Liu, George Dunlap, Andrew Cooper, Tim Deegan, xen-devel,
	Roger Pau Monne

On Mon, Mar 11, 2019 at 10:37:44AM -0600, Jan Beulich wrote:
> The flag is really only meant for those, both HVM and 32-bit PV tell
> kernel from user mode based on CPL/RPL. Remove the all-question-marks
> comment and let's be on the safe side here and also suppress clearing
> for 32-bit PV (this isn't a fast path after all).
> 
> Remove no longer necessary is_pv_32bit_*() from sh_update_cr3() and
> sh_walk_guest_tables(). Note that shadow_one_bit_disable() already
> assumes the new behavior.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Wei Liu <wei.liu2@citrix.com>

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
  2019-03-11 16:37 [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV Jan Beulich
  2019-03-12 12:49 ` Wei Liu
@ 2019-03-19 17:01 ` George Dunlap
  2019-04-05  8:12     ` [Xen-devel] " Jan Beulich
  1 sibling, 1 reply; 7+ messages in thread
From: George Dunlap @ 2019-03-19 17:01 UTC (permalink / raw)
  To: Jan Beulich, xen-devel
  Cc: George Dunlap, Andrew Cooper, Tim Deegan, Wei Liu, Roger Pau Monne

On 3/11/19 4:37 PM, Jan Beulich wrote:
> The flag is really only meant for those, both HVM and 32-bit PV tell
> kernel from user mode based on CPL/RPL. Remove the all-question-marks
> comment and let's be on the safe side here and also suppress clearing
> for 32-bit PV (this isn't a fast path after all).
> 
> Remove no longer necessary is_pv_32bit_*() from sh_update_cr3() and
> sh_walk_guest_tables(). Note that shadow_one_bit_disable() already
> assumes the new behavior.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Acked-by: George Dunlap <george.dunlap@citrix.com>

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Ping: [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
@ 2019-04-05  8:12     ` Jan Beulich
  0 siblings, 0 replies; 7+ messages in thread
From: Jan Beulich @ 2019-04-05  8:12 UTC (permalink / raw)
  To: Andrew Cooper; +Cc: xen-devel, Tim Deegan

>>> On 19.03.19 at 18:01, <george.dunlap@citrix.com> wrote:
> On 3/11/19 4:37 PM, Jan Beulich wrote:
>> The flag is really only meant for those, both HVM and 32-bit PV tell
>> kernel from user mode based on CPL/RPL. Remove the all-question-marks
>> comment and let's be on the safe side here and also suppress clearing
>> for 32-bit PV (this isn't a fast path after all).
>> 
>> Remove no longer necessary is_pv_32bit_*() from sh_update_cr3() and
>> sh_walk_guest_tables(). Note that shadow_one_bit_disable() already
>> assumes the new behavior.
>> 
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> Acked-by: George Dunlap <george.dunlap@citrix.com>

While I intend to take George's ack as being sufficient to cover
the shadow side, may I please ask for an ack or otherwise for
the non-mm part of the change? I know you've not been in full
agreement with the change, but iirc I've never heard back on a
subsequent reply of mine. And I further think that with the now
(v2) even more obvious dependency of the shadow code on
this behavior, the change should really be taken as is.

Jan



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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Xen-devel] Ping: [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
@ 2019-04-05  8:12     ` Jan Beulich
  0 siblings, 0 replies; 7+ messages in thread
From: Jan Beulich @ 2019-04-05  8:12 UTC (permalink / raw)
  To: Andrew Cooper; +Cc: xen-devel, Tim Deegan

>>> On 19.03.19 at 18:01, <george.dunlap@citrix.com> wrote:
> On 3/11/19 4:37 PM, Jan Beulich wrote:
>> The flag is really only meant for those, both HVM and 32-bit PV tell
>> kernel from user mode based on CPL/RPL. Remove the all-question-marks
>> comment and let's be on the safe side here and also suppress clearing
>> for 32-bit PV (this isn't a fast path after all).
>> 
>> Remove no longer necessary is_pv_32bit_*() from sh_update_cr3() and
>> sh_walk_guest_tables(). Note that shadow_one_bit_disable() already
>> assumes the new behavior.
>> 
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> Acked-by: George Dunlap <george.dunlap@citrix.com>

While I intend to take George's ack as being sufficient to cover
the shadow side, may I please ask for an ack or otherwise for
the non-mm part of the change? I know you've not been in full
agreement with the change, but iirc I've never heard back on a
subsequent reply of mine. And I further think that with the now
(v2) even more obvious dependency of the shadow code on
this behavior, the change should really be taken as is.

Jan



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Xen-devel mailing list
Xen-devel@lists.xenproject.org
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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Ping: [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
@ 2019-04-05 13:03       ` Andrew Cooper
  0 siblings, 0 replies; 7+ messages in thread
From: Andrew Cooper @ 2019-04-05 13:03 UTC (permalink / raw)
  To: Jan Beulich; +Cc: xen-devel, Tim Deegan

On 05/04/2019 09:12, Jan Beulich wrote:
>>>> On 19.03.19 at 18:01, <george.dunlap@citrix.com> wrote:
>> On 3/11/19 4:37 PM, Jan Beulich wrote:
>>> The flag is really only meant for those, both HVM and 32-bit PV tell
>>> kernel from user mode based on CPL/RPL. Remove the all-question-marks
>>> comment and let's be on the safe side here and also suppress clearing
>>> for 32-bit PV (this isn't a fast path after all).
>>>
>>> Remove no longer necessary is_pv_32bit_*() from sh_update_cr3() and
>>> sh_walk_guest_tables(). Note that shadow_one_bit_disable() already
>>> assumes the new behavior.
>>>
>>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>> Acked-by: George Dunlap <george.dunlap@citrix.com>
> While I intend to take George's ack as being sufficient to cover
> the shadow side, may I please ask for an ack or otherwise for
> the non-mm part of the change? I know you've not been in full
> agreement with the change, but iirc I've never heard back on a
> subsequent reply of mine. And I further think that with the now
> (v2) even more obvious dependency of the shadow code on
> this behavior, the change should really be taken as is.

Also, I've just managed to invalidate my own objection to this change on
the basis that it will break migration.

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Xen-devel] Ping: [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
@ 2019-04-05 13:03       ` Andrew Cooper
  0 siblings, 0 replies; 7+ messages in thread
From: Andrew Cooper @ 2019-04-05 13:03 UTC (permalink / raw)
  To: Jan Beulich; +Cc: xen-devel, Tim Deegan

On 05/04/2019 09:12, Jan Beulich wrote:
>>>> On 19.03.19 at 18:01, <george.dunlap@citrix.com> wrote:
>> On 3/11/19 4:37 PM, Jan Beulich wrote:
>>> The flag is really only meant for those, both HVM and 32-bit PV tell
>>> kernel from user mode based on CPL/RPL. Remove the all-question-marks
>>> comment and let's be on the safe side here and also suppress clearing
>>> for 32-bit PV (this isn't a fast path after all).
>>>
>>> Remove no longer necessary is_pv_32bit_*() from sh_update_cr3() and
>>> sh_walk_guest_tables(). Note that shadow_one_bit_disable() already
>>> assumes the new behavior.
>>>
>>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>> Acked-by: George Dunlap <george.dunlap@citrix.com>
> While I intend to take George's ack as being sufficient to cover
> the shadow side, may I please ask for an ack or otherwise for
> the non-mm part of the change? I know you've not been in full
> agreement with the change, but iirc I've never heard back on a
> subsequent reply of mine. And I further think that with the now
> (v2) even more obvious dependency of the shadow code on
> this behavior, the change should really be taken as is.

Also, I've just managed to invalidate my own objection to this change on
the basis that it will break migration.

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

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Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2019-04-05 13:05 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-11 16:37 [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV Jan Beulich
2019-03-12 12:49 ` Wei Liu
2019-03-19 17:01 ` George Dunlap
2019-04-05  8:12   ` Ping: " Jan Beulich
2019-04-05  8:12     ` [Xen-devel] " Jan Beulich
2019-04-05 13:03     ` Andrew Cooper
2019-04-05 13:03       ` [Xen-devel] " Andrew Cooper

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