From: Atish Patra <atish.patra@wdc.com> To: Sudeep Holla <sudeep.holla@arm.com> Cc: open list <linux-kernel@vger.kernel.org>, Albert Ou <aou@eecs.berkeley.edu>, Andreas Schwab <schwab@suse.de>, Anup Patel <anup@brainfault.org>, Dmitriy Cherkasov <dmitriy@oss-tech.org>, Johan Hovold <johan@kernel.org>, "linux-riscv@lists.infradead.org" <linux-riscv@lists.infradead.org>, Palmer Dabbelt <palmer@sifive.com>, Paul Walmsley <paul.walmsley@sifive.com>, Thomas Gleixner <tglx@linutronix.de>, Christoph Hellwig <hch@infradead.org> Subject: Re: [PATCH v3 1/3] RISC-V: Add RISC-V specific arch_match_cpu_phys_id Date: Wed, 24 Apr 2019 09:50:56 -0700 [thread overview] Message-ID: <0d7be79c-3a74-dcb2-6618-d391e4cfec70@wdc.com> (raw) In-Reply-To: <CAPKp9uZNEdL=Jt7vsxMBo72WR=ArefB6Vi7fLxnxMwAfUT3JOw@mail.gmail.com> On 4/24/19 2:07 AM, Sudeep Holla wrote: > On Wed, Apr 24, 2019 at 1:03 AM Atish Patra <atish.patra@wdc.com> wrote: >> >> OF/DT core has a hook for architecture specific logical cpuid to hartid >> mapping. By implementing this, we can pass the logical cpu id to cpu >> node parsing functions. >> >> Fix the instances where logical cpuid is expected as an argument in >> of_get_cpu_node. >> > > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> > >> Signed-off-by: Atish Patra <atish.patra@wdc.com> >> --- >> arch/riscv/kernel/cpu.c | 3 +-- >> arch/riscv/kernel/smp.c | 5 +++++ >> 2 files changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c >> index cf2fca12414a..c8d2a3223099 100644 >> --- a/arch/riscv/kernel/cpu.c >> +++ b/arch/riscv/kernel/cpu.c >> @@ -136,8 +136,7 @@ static void c_stop(struct seq_file *m, void *v) >> static int c_show(struct seq_file *m, void *v) >> { >> unsigned long cpu_id = (unsigned long)v - 1; >> - struct device_node *node = of_get_cpu_node(cpuid_to_hartid_map(cpu_id), >> - NULL); > > I assume it work working just fine as you are doing cpu to hartid > conversion here and > weak implementation of arch_match_cpu_phys_id does direct match. > Yup. That's correct. Regards, Atish >> + struct device_node *node = of_get_cpu_node(cpu_id, NULL); >> const char *compat, *isa, *mmu; >> >> seq_printf(m, "processor\t: %lu\n", cpu_id); >> diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c >> index 0c41d07ec281..94db72662f60 100644 >> --- a/arch/riscv/kernel/smp.c >> +++ b/arch/riscv/kernel/smp.c >> @@ -70,6 +70,11 @@ void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out) >> for_each_cpu(cpu, in) >> cpumask_set_cpu(cpuid_to_hartid_map(cpu), out); >> } >> + >> +bool arch_match_cpu_phys_id(int cpu, u64 phys_id) >> +{ >> + return phys_id == cpuid_to_hartid_map(cpu); >> +} >> /* Unsupported */ >> int setup_profiling_timer(unsigned int multiplier) >> { >> -- >> 2.21.0 >> >
WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atish.patra@wdc.com> To: Sudeep Holla <sudeep.holla@arm.com> Cc: Albert Ou <aou@eecs.berkeley.edu>, Dmitriy Cherkasov <dmitriy@oss-tech.org>, Andreas Schwab <schwab@suse.de>, Palmer Dabbelt <palmer@sifive.com>, Johan Hovold <johan@kernel.org>, open list <linux-kernel@vger.kernel.org>, Christoph Hellwig <hch@infradead.org>, Paul Walmsley <paul.walmsley@sifive.com>, Anup Patel <anup@brainfault.org>, "linux-riscv@lists.infradead.org" <linux-riscv@lists.infradead.org>, Thomas Gleixner <tglx@linutronix.de> Subject: Re: [PATCH v3 1/3] RISC-V: Add RISC-V specific arch_match_cpu_phys_id Date: Wed, 24 Apr 2019 09:50:56 -0700 [thread overview] Message-ID: <0d7be79c-3a74-dcb2-6618-d391e4cfec70@wdc.com> (raw) In-Reply-To: <CAPKp9uZNEdL=Jt7vsxMBo72WR=ArefB6Vi7fLxnxMwAfUT3JOw@mail.gmail.com> On 4/24/19 2:07 AM, Sudeep Holla wrote: > On Wed, Apr 24, 2019 at 1:03 AM Atish Patra <atish.patra@wdc.com> wrote: >> >> OF/DT core has a hook for architecture specific logical cpuid to hartid >> mapping. By implementing this, we can pass the logical cpu id to cpu >> node parsing functions. >> >> Fix the instances where logical cpuid is expected as an argument in >> of_get_cpu_node. >> > > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> > >> Signed-off-by: Atish Patra <atish.patra@wdc.com> >> --- >> arch/riscv/kernel/cpu.c | 3 +-- >> arch/riscv/kernel/smp.c | 5 +++++ >> 2 files changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c >> index cf2fca12414a..c8d2a3223099 100644 >> --- a/arch/riscv/kernel/cpu.c >> +++ b/arch/riscv/kernel/cpu.c >> @@ -136,8 +136,7 @@ static void c_stop(struct seq_file *m, void *v) >> static int c_show(struct seq_file *m, void *v) >> { >> unsigned long cpu_id = (unsigned long)v - 1; >> - struct device_node *node = of_get_cpu_node(cpuid_to_hartid_map(cpu_id), >> - NULL); > > I assume it work working just fine as you are doing cpu to hartid > conversion here and > weak implementation of arch_match_cpu_phys_id does direct match. > Yup. That's correct. Regards, Atish >> + struct device_node *node = of_get_cpu_node(cpu_id, NULL); >> const char *compat, *isa, *mmu; >> >> seq_printf(m, "processor\t: %lu\n", cpu_id); >> diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c >> index 0c41d07ec281..94db72662f60 100644 >> --- a/arch/riscv/kernel/smp.c >> +++ b/arch/riscv/kernel/smp.c >> @@ -70,6 +70,11 @@ void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out) >> for_each_cpu(cpu, in) >> cpumask_set_cpu(cpuid_to_hartid_map(cpu), out); >> } >> + >> +bool arch_match_cpu_phys_id(int cpu, u64 phys_id) >> +{ >> + return phys_id == cpuid_to_hartid_map(cpu); >> +} >> /* Unsupported */ >> int setup_profiling_timer(unsigned int multiplier) >> { >> -- >> 2.21.0 >> > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2019-04-24 16:51 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-04-24 0:02 [PATCH v3 0/3] Miscellaneous kernel command line fixes Atish Patra 2019-04-24 0:02 ` Atish Patra 2019-04-24 0:02 ` [PATCH v3 1/3] RISC-V: Add RISC-V specific arch_match_cpu_phys_id Atish Patra 2019-04-24 0:02 ` Atish Patra 2019-04-24 6:21 ` Christoph Hellwig 2019-04-24 6:21 ` Christoph Hellwig 2019-04-30 0:36 ` Palmer Dabbelt 2019-04-30 0:36 ` Palmer Dabbelt 2019-04-24 9:07 ` Sudeep Holla 2019-04-24 9:07 ` Sudeep Holla 2019-04-24 16:50 ` Atish Patra [this message] 2019-04-24 16:50 ` Atish Patra 2019-04-24 0:02 ` [PATCH v3 2/3] RISC-V: Implement nosmp commandline option Atish Patra 2019-04-24 0:02 ` Atish Patra 2019-04-24 6:21 ` Christoph Hellwig 2019-04-24 6:21 ` Christoph Hellwig 2019-04-29 23:50 ` Palmer Dabbelt 2019-04-29 23:50 ` Palmer Dabbelt 2019-04-24 0:02 ` [PATCH v3 3/3] RISC-V: Support nr_cpus command line option Atish Patra 2019-04-24 0:02 ` Atish Patra 2019-04-24 6:22 ` Christoph Hellwig 2019-04-24 6:22 ` Christoph Hellwig
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=0d7be79c-3a74-dcb2-6618-d391e4cfec70@wdc.com \ --to=atish.patra@wdc.com \ --cc=anup@brainfault.org \ --cc=aou@eecs.berkeley.edu \ --cc=dmitriy@oss-tech.org \ --cc=hch@infradead.org \ --cc=johan@kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-riscv@lists.infradead.org \ --cc=palmer@sifive.com \ --cc=paul.walmsley@sifive.com \ --cc=schwab@suse.de \ --cc=sudeep.holla@arm.com \ --cc=tglx@linutronix.de \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.