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From: Marek Vasut <marek.vasut@mailbox.org>
To: Ralph Siemsen <ralph.siemsen@linaro.org>
Cc: u-boot@lists.denx.de, Hai Pham <hai.pham.ud@renesas.com>,
	Lukasz Majewski <lukma@denx.de>,
	Marek Vasut <marek.vasut+renesas@mailbox.org>,
	Sean Anderson <seanga2@gmail.com>
Subject: Re: [RFC PATCH v3 3/9] clk: renesas: add R906G032 driver
Date: Wed, 22 Feb 2023 19:45:45 +0100	[thread overview]
Message-ID: <0e3597e5-d72a-f246-c779-1fd153299ce8@mailbox.org> (raw)
In-Reply-To: <20230222183220.GC50215@maple.netwinder.org>

On 2/22/23 19:32, Ralph Siemsen wrote:
> On Wed, Feb 22, 2023 at 06:47:44PM +0100, Marek Vasut wrote:
>> On 2/22/23 18:21, Ralph Siemsen wrote:
>>> On Wed, Feb 22, 2023 at 06:07:45PM +0100, Marek Vasut wrote:
>>>> On 2/22/23 17:57, Ralph Siemsen wrote:
>>>>> On Wed, Feb 22, 2023 at 05:06:14PM +0100, Marek Vasut wrote:
>>>>>> On 2/22/23 16:44, Ralph Siemsen wrote:
>>>>>>> Clock driver for the Renesas RZ/N1 SoC family. This is based
>>>>>>> on the Linux kernel drivers/clk/renesas/r9a06g032-clocks.c.
>>>>>>
>>>>>> For starters, can you please include the exact kernel version , 
>>>>>> ideally commit ID, from which this way pulled, so that future 
>>>>>> updates can pull in the diffs from that commit easily ?
>>>>>
>>>>> Very reasonable request, but a bit difficult to give a concise 
>>>>> answer. Originally I took the driver as found in the 5.15 kernel. 
>>>>> The driver actually had not changed since 5.13 commit 6bd913f54f2f 
>>>>> ("clk: renesas: r9a06g032: Switch to .determine_rate()"). So that's 
>>>>> the starting point.
>>>>>
>>>>> I incorporated subsequent changes to the clock tables and related 
>>>>> cleanups. Those were only merged into Linux much later:
>>>>>
>>>>> 2dee50ab9e72 clk: renesas: r9a06g032: Fix UART clkgrp bitsel
>>>>> f46efcc4746f clk: renesas: r9a06g032: Drop some unused fields
>>>>> 2a6da4a11f47 clk: renesas: r9a06g032: Fix the RTC hclock description
>>>>>
>>>>> Linux driver also had a few other commits, but these are not 
>>>>> applicable to the u-boot version due to structural changes:
>>>>>
>>>>> 6bd913f54f2f clk: renesas: r9a06g032: Switch to .determine_rate()
>>>>> f2fb4fe62390 clk: renesas: Zero init clk_init_data
>>>>> 2182066d95c3 clk: renesas: r9a06g032: Probe possible children
>>>>> 885525c1e7e2 clk: renesas: r9a06g032: Export function to set dmamux
>>>>> 02693e11611e clk: renesas: r9a06g032: Repair grave increment error
>>>>>
>>>>> So I would say it is "up to date" with the lastest Linux commit, 
>>>>> even though it is based on an earlier version. Is there a good way 
>>>>> to include the above in the commit message, succinctly?
>>>>
>>>> Is this still in sync with Linux 6.1.y ? That's the latest LTS .
>>>
>>> Yes. Although the commits have different hashes than what I reported 
>>> above, the 6.1.y LTS branch has the same changes.
>>
>> Then please include the Linux 6.1.y commit ID , or Torvalds' tree if 
>> that contains new fixes . Let's not use some old/downstream stuff .
> 
> I've amended the commit message as follows:
> 
>      Clock driver for the Renesas RZ/N1 SoC family. This is based
>      on the Linux kernel drivers/clk/renesas/r9a06g032-clocks.c as found in
>      commit 02693e11611e ("clk: renesas: r9a06g032: Repair grave 
> increment error")
>      included in Torvalds kernel v6.2. Identical code is in LTS 6.1.y.

Thank you !

>>> Note that the u-boot version of the driver has changed considerably 
>>> from the Linux version. In terms of pulling future diffs over, I 
>>> would be concerned mostly about keeping the clock tables in sync. 
>>> There have been a few mistakes found and fixed in those already.
>>
>> Are those fixes in mainline Linux ?
> 
> Yes, they are in mainline:
> 2dee50ab9e72 clk: renesas: r9a06g032: Fix UART clkgrp bitsel
>    merged into 6.0, and also backported to earlier LTS branches
> 2a6da4a11f47 clk: renesas: r9a06g032: Fix the RTC hclock description
>     merged into 5.19, seems to be missing from LTS branches

Use Linux 6.2.y as a base then. And please submit the missing patches 
for LTS branch inclusion too if possible, I guess they were missing 
Fixes: tag ?

  reply	other threads:[~2023-02-22 18:45 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-22 15:44 [RFC PATCH v3 0/9] Renesas RZ/N1 SoC initial support Ralph Siemsen
2023-02-22 15:44 ` [RFC PATCH v3 1/9] ARM: armv7: add non-SPL enable for Cortex SMPEN Ralph Siemsen
2023-02-22 15:44 ` [RFC PATCH v3 2/9] clk: renesas: prepare for non-RCAR clock drivers Ralph Siemsen
2023-02-22 15:44 ` [RFC PATCH v3 3/9] clk: renesas: add R906G032 driver Ralph Siemsen
2023-02-22 16:06   ` Marek Vasut
2023-02-22 16:57     ` Ralph Siemsen
2023-02-22 17:07       ` Marek Vasut
2023-02-22 17:21         ` Ralph Siemsen
2023-02-22 17:47           ` Marek Vasut
2023-02-22 18:32             ` Ralph Siemsen
2023-02-22 18:45               ` Marek Vasut [this message]
2023-02-22 19:32                 ` Ralph Siemsen
2023-02-23  0:12                   ` Marek Vasut
2023-02-23  7:17                     ` Miquel Raynal
2023-02-23 13:56                       ` Marek Vasut
2023-02-23 14:09                         ` Miquel Raynal
2023-02-24 15:14                           ` Ralph Siemsen
2023-02-24 17:05                             ` Marek Vasut
2023-02-24 18:00                               ` Ralph Siemsen
2023-02-25  6:16                                 ` Marek Vasut
2023-02-22 15:44 ` [RFC PATCH v3 4/9] pinctrl: " Ralph Siemsen
2023-02-22 15:44 ` [RFC PATCH v3 5/9] ram: cadence: add driver for Cadence EDAC Ralph Siemsen
2023-02-23 19:54   ` Bryan Brattlof
2023-02-24 15:19     ` Ralph Siemsen
2023-03-08  1:19       ` Ralph Siemsen
2023-02-22 15:44 ` [RFC PATCH v3 6/9] dts: basic devicetree for Renesas RZ/N1 SoC Ralph Siemsen
2023-02-22 15:44 ` [RFC PATCH v3 7/9] ARM: rzn1: basic support " Ralph Siemsen
2023-02-22 15:44 ` [RFC PATCH v3 8/9] board: schneider: add RZN1 board support Ralph Siemsen
2023-02-22 15:44 ` [RFC PATCH v3 9/9] tools: spkgimage: add Renesas SPKG format Ralph Siemsen
2023-02-22 19:16   ` Simon Glass
2023-02-22 21:17     ` Ralph Siemsen
2023-02-22 21:20       ` Simon Glass

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