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* [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
@ 2022-03-10 18:06 Alex Deucher
  2022-03-11 10:24 ` Michel Dänzer
  2022-03-11 12:17 ` Christian König
  0 siblings, 2 replies; 11+ messages in thread
From: Alex Deucher @ 2022-03-10 18:06 UTC (permalink / raw)
  To: amd-gfx; +Cc: Alex Deucher

If the GPU is passed through to a guest VM, use the PCI
BAR for CPU FB access rather than the physical address of
carve out.  The physical address is not valid in a guest.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c  | 5 +++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c  | 2 +-
 4 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index f60b7bd4dbf5..9887a60e8eae 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -814,7 +814,7 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
 	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
 
 #ifdef CONFIG_X86_64
-	if (adev->flags & AMD_IS_APU) {
+	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
 		adev->gmc.aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
 		adev->gmc.aper_size = adev->gmc.real_vram_size;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 344d819b4c1b..979da6f510e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -381,8 +381,9 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
 	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
 
 #ifdef CONFIG_X86_64
-	if (adev->flags & AMD_IS_APU &&
-	    adev->gmc.real_vram_size > adev->gmc.aper_size) {
+	if ((adev->flags & AMD_IS_APU) &&
+	    adev->gmc.real_vram_size > adev->gmc.aper_size &&
+	    !amdgpu_passthrough(adev)) {
 		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
 		adev->gmc.aper_size = adev->gmc.real_vram_size;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index ca9841d5669f..1932a3e4af7e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -581,7 +581,7 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
 	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
 
 #ifdef CONFIG_X86_64
-	if (adev->flags & AMD_IS_APU) {
+	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
 		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
 		adev->gmc.aper_size = adev->gmc.real_vram_size;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 431742eb7811..5fa613d41799 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1456,7 +1456,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
 	 */
 
 	/* check whether both host-gpu and gpu-gpu xgmi links exist */
-	if ((adev->flags & AMD_IS_APU) ||
+	if (((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) ||
 	    (adev->gmc.xgmi.supported &&
 	     adev->gmc.xgmi.connected_to_cpu)) {
 		adev->gmc.aper_base =
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
  2022-03-10 18:06 [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough Alex Deucher
@ 2022-03-11 10:24 ` Michel Dänzer
  2022-03-11 10:32   ` Christian König
  2022-03-11 12:17 ` Christian König
  1 sibling, 1 reply; 11+ messages in thread
From: Michel Dänzer @ 2022-03-11 10:24 UTC (permalink / raw)
  To: Alex Deucher; +Cc: amd-gfx

On 2022-03-10 19:06, Alex Deucher wrote:
> If the GPU is passed through to a guest VM, use the PCI
> BAR for CPU FB access rather than the physical address of
> carve out.  The physical address is not valid in a guest.

I think amdgpu_device_flush_hdp & amdgpu_device_invalidate_hdp need to be modified accordingly.


Also, I wonder if BAR resizing could work with APUs?


-- 
Earthling Michel Dänzer            |                  https://redhat.com
Libre software enthusiast          |         Mesa and Xwayland developer

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
  2022-03-11 10:24 ` Michel Dänzer
@ 2022-03-11 10:32   ` Christian König
  2022-03-11 17:43     ` Michel Dänzer
  0 siblings, 1 reply; 11+ messages in thread
From: Christian König @ 2022-03-11 10:32 UTC (permalink / raw)
  To: Michel Dänzer, Alex Deucher; +Cc: amd-gfx

Am 11.03.22 um 11:24 schrieb Michel Dänzer:
> On 2022-03-10 19:06, Alex Deucher wrote:
>> If the GPU is passed through to a guest VM, use the PCI
>> BAR for CPU FB access rather than the physical address of
>> carve out.  The physical address is not valid in a guest.
> I think amdgpu_device_flush_hdp & amdgpu_device_invalidate_hdp need to be modified accordingly.
>
>
> Also, I wonder if BAR resizing could work with APUs?

At least trivial to implement.

The host had to resize the BAR for the client or otherwise the client 
could easily bring down the system.

Christian.

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
  2022-03-10 18:06 [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough Alex Deucher
  2022-03-11 10:24 ` Michel Dänzer
@ 2022-03-11 12:17 ` Christian König
  1 sibling, 0 replies; 11+ messages in thread
From: Christian König @ 2022-03-11 12:17 UTC (permalink / raw)
  To: Alex Deucher, amd-gfx

Am 10.03.22 um 19:06 schrieb Alex Deucher:
> If the GPU is passed through to a guest VM, use the PCI
> BAR for CPU FB access rather than the physical address of
> carve out.  The physical address is not valid in a guest.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 2 +-
>   drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c  | 5 +++--
>   drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c  | 2 +-
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c  | 2 +-
>   4 files changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index f60b7bd4dbf5..9887a60e8eae 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -814,7 +814,7 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
>   	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
>   
>   #ifdef CONFIG_X86_64
> -	if (adev->flags & AMD_IS_APU) {
> +	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
>   		adev->gmc.aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
>   		adev->gmc.aper_size = adev->gmc.real_vram_size;
>   	}
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> index 344d819b4c1b..979da6f510e8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> @@ -381,8 +381,9 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
>   	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
>   
>   #ifdef CONFIG_X86_64
> -	if (adev->flags & AMD_IS_APU &&
> -	    adev->gmc.real_vram_size > adev->gmc.aper_size) {
> +	if ((adev->flags & AMD_IS_APU) &&
> +	    adev->gmc.real_vram_size > adev->gmc.aper_size &&
> +	    !amdgpu_passthrough(adev)) {
>   		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
>   		adev->gmc.aper_size = adev->gmc.real_vram_size;
>   	}
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index ca9841d5669f..1932a3e4af7e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -581,7 +581,7 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
>   	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
>   
>   #ifdef CONFIG_X86_64
> -	if (adev->flags & AMD_IS_APU) {
> +	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
>   		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
>   		adev->gmc.aper_size = adev->gmc.real_vram_size;
>   	}
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 431742eb7811..5fa613d41799 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1456,7 +1456,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
>   	 */
>   
>   	/* check whether both host-gpu and gpu-gpu xgmi links exist */
> -	if ((adev->flags & AMD_IS_APU) ||
> +	if (((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) ||
>   	    (adev->gmc.xgmi.supported &&
>   	     adev->gmc.xgmi.connected_to_cpu)) {
>   		adev->gmc.aper_base =


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
  2022-03-11 10:32   ` Christian König
@ 2022-03-11 17:43     ` Michel Dänzer
  2022-03-16 15:52       ` Michel Dänzer
  0 siblings, 1 reply; 11+ messages in thread
From: Michel Dänzer @ 2022-03-11 17:43 UTC (permalink / raw)
  To: Christian König, Alex Deucher; +Cc: amd-gfx

On 2022-03-11 11:32, Christian König wrote:
> Am 11.03.22 um 11:24 schrieb Michel Dänzer:
>> On 2022-03-10 19:06, Alex Deucher wrote:
>>> If the GPU is passed through to a guest VM, use the PCI
>>> BAR for CPU FB access rather than the physical address of
>>> carve out.  The physical address is not valid in a guest.
>> I think amdgpu_device_flush_hdp & amdgpu_device_invalidate_hdp need to be modified accordingly.

I'm surprised you gave your R-b despite this. Surely the HDP cache needs to be handled when going through the BAR?


>> Also, I wonder if BAR resizing could work with APUs?
> 
> At least trivial to implement.
> 
> The host had to resize the BAR for the client or otherwise the client could easily bring down the system.

Gotcha, makes sense.


-- 
Earthling Michel Dänzer            |                  https://redhat.com
Libre software enthusiast          |         Mesa and Xwayland developer

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
  2022-03-11 17:43     ` Michel Dänzer
@ 2022-03-16 15:52       ` Michel Dänzer
  2022-03-16 15:55         ` Alex Deucher
  0 siblings, 1 reply; 11+ messages in thread
From: Michel Dänzer @ 2022-03-16 15:52 UTC (permalink / raw)
  To: Christian König, Alex Deucher; +Cc: amd-gfx

On 2022-03-11 18:43, Michel Dänzer wrote:
> On 2022-03-11 11:32, Christian König wrote:
>> Am 11.03.22 um 11:24 schrieb Michel Dänzer:
>>> On 2022-03-10 19:06, Alex Deucher wrote:
>>>> If the GPU is passed through to a guest VM, use the PCI
>>>> BAR for CPU FB access rather than the physical address of
>>>> carve out.  The physical address is not valid in a guest.
>>> I think amdgpu_device_flush_hdp & amdgpu_device_invalidate_hdp need to be modified accordingly.
> 
> I'm surprised you gave your R-b despite this. Surely the HDP cache needs to be handled when going through the BAR?

I'm a bit confused why there's still been no response on this point from either of you. Are you guys checking internally whether or not this is needed?


-- 
Earthling Michel Dänzer            |                  https://redhat.com
Libre software enthusiast          |         Mesa and Xwayland developer

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
  2022-03-16 15:52       ` Michel Dänzer
@ 2022-03-16 15:55         ` Alex Deucher
  2022-03-16 15:58           ` Michel Dänzer
  0 siblings, 1 reply; 11+ messages in thread
From: Alex Deucher @ 2022-03-16 15:55 UTC (permalink / raw)
  To: Michel Dänzer; +Cc: Alex Deucher, Christian König, amd-gfx list

On Wed, Mar 16, 2022 at 11:52 AM Michel Dänzer
<michel.daenzer@mailbox.org> wrote:
>
> On 2022-03-11 18:43, Michel Dänzer wrote:
> > On 2022-03-11 11:32, Christian König wrote:
> >> Am 11.03.22 um 11:24 schrieb Michel Dänzer:
> >>> On 2022-03-10 19:06, Alex Deucher wrote:
> >>>> If the GPU is passed through to a guest VM, use the PCI
> >>>> BAR for CPU FB access rather than the physical address of
> >>>> carve out.  The physical address is not valid in a guest.
> >>> I think amdgpu_device_flush_hdp & amdgpu_device_invalidate_hdp need to be modified accordingly.
> >
> > I'm surprised you gave your R-b despite this. Surely the HDP cache needs to be handled when going through the BAR?
>
> I'm a bit confused why there's still been no response on this point from either of you. Are you guys checking internally whether or not this is needed?

Yes, it is needed.  I added it in v2 of the patch.

Alex

>
>
> --
> Earthling Michel Dänzer            |                  https://redhat.com
> Libre software enthusiast          |         Mesa and Xwayland developer

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
  2022-03-16 15:55         ` Alex Deucher
@ 2022-03-16 15:58           ` Michel Dänzer
  0 siblings, 0 replies; 11+ messages in thread
From: Michel Dänzer @ 2022-03-16 15:58 UTC (permalink / raw)
  To: Alex Deucher; +Cc: Alex Deucher, Christian König, amd-gfx list

On 2022-03-16 16:55, Alex Deucher wrote:
> On Wed, Mar 16, 2022 at 11:52 AM Michel Dänzer
> <michel.daenzer@mailbox.org> wrote:
>>
>> On 2022-03-11 18:43, Michel Dänzer wrote:
>>> On 2022-03-11 11:32, Christian König wrote:
>>>> Am 11.03.22 um 11:24 schrieb Michel Dänzer:
>>>>> On 2022-03-10 19:06, Alex Deucher wrote:
>>>>>> If the GPU is passed through to a guest VM, use the PCI
>>>>>> BAR for CPU FB access rather than the physical address of
>>>>>> carve out.  The physical address is not valid in a guest.
>>>>> I think amdgpu_device_flush_hdp & amdgpu_device_invalidate_hdp need to be modified accordingly.
>>>
>>> I'm surprised you gave your R-b despite this. Surely the HDP cache needs to be handled when going through the BAR?
>>
>> I'm a bit confused why there's still been no response on this point from either of you. Are you guys checking internally whether or not this is needed?
> 
> Yes, it is needed.  I added it in v2 of the patch.

Ah, great, hadn't seen the v2 patch yet. :)


-- 
Earthling Michel Dänzer            |                  https://redhat.com
Libre software enthusiast          |         Mesa and Xwayland developer

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
  2022-03-16  7:18 ` Christian König
@ 2022-03-16 15:59   ` Michel Dänzer
  0 siblings, 0 replies; 11+ messages in thread
From: Michel Dänzer @ 2022-03-16 15:59 UTC (permalink / raw)
  To: Christian König, Alex Deucher, amd-gfx

On 2022-03-16 08:18, Christian König wrote:
> Am 15.03.22 um 19:13 schrieb Alex Deucher:
>> If the GPU is passed through to a guest VM, use the PCI
>> BAR for CPU FB access rather than the physical address of
>> carve out.  The physical address is not valid in a guest.
>>
>> v2: Fix HDP handing as suggested by Michel
>>
>> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> 
> Might be a good idea to have a function or macro to figure out if we should use the BAR or not on APUs.
> 
> Anyway patch is Reviewed-by: Christian König <christian.koenig@amd.com>.

And

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>


-- 
Earthling Michel Dänzer            |                  https://redhat.com
Libre software enthusiast          |         Mesa and Xwayland developer

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
  2022-03-15 18:13 Alex Deucher
@ 2022-03-16  7:18 ` Christian König
  2022-03-16 15:59   ` Michel Dänzer
  0 siblings, 1 reply; 11+ messages in thread
From: Christian König @ 2022-03-16  7:18 UTC (permalink / raw)
  To: Alex Deucher, amd-gfx

Am 15.03.22 um 19:13 schrieb Alex Deucher:
> If the GPU is passed through to a guest VM, use the PCI
> BAR for CPU FB access rather than the physical address of
> carve out.  The physical address is not valid in a guest.
>
> v2: Fix HDP handing as suggested by Michel
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Might be a good idea to have a function or macro to figure out if we 
should use the BAR or not on APUs.

Anyway patch is Reviewed-by: Christian König <christian.koenig@amd.com>.

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
>   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c     | 2 +-
>   drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c      | 5 +++--
>   drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c      | 2 +-
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c      | 2 +-
>   5 files changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 1b313a95c7e5..eb902654f35d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -5733,7 +5733,7 @@ void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
>   		struct amdgpu_ring *ring)
>   {
>   #ifdef CONFIG_X86_64
> -	if (adev->flags & AMD_IS_APU)
> +	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev))
>   		return;
>   #endif
>   	if (adev->gmc.xgmi.connected_to_cpu)
> @@ -5749,7 +5749,7 @@ void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
>   		struct amdgpu_ring *ring)
>   {
>   #ifdef CONFIG_X86_64
> -	if (adev->flags & AMD_IS_APU)
> +	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev))
>   		return;
>   #endif
>   	if (adev->gmc.xgmi.connected_to_cpu)
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index f60b7bd4dbf5..9887a60e8eae 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -814,7 +814,7 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
>   	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
>   
>   #ifdef CONFIG_X86_64
> -	if (adev->flags & AMD_IS_APU) {
> +	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
>   		adev->gmc.aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
>   		adev->gmc.aper_size = adev->gmc.real_vram_size;
>   	}
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> index 344d819b4c1b..979da6f510e8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> @@ -381,8 +381,9 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
>   	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
>   
>   #ifdef CONFIG_X86_64
> -	if (adev->flags & AMD_IS_APU &&
> -	    adev->gmc.real_vram_size > adev->gmc.aper_size) {
> +	if ((adev->flags & AMD_IS_APU) &&
> +	    adev->gmc.real_vram_size > adev->gmc.aper_size &&
> +	    !amdgpu_passthrough(adev)) {
>   		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
>   		adev->gmc.aper_size = adev->gmc.real_vram_size;
>   	}
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index ca9841d5669f..1932a3e4af7e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -581,7 +581,7 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
>   	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
>   
>   #ifdef CONFIG_X86_64
> -	if (adev->flags & AMD_IS_APU) {
> +	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
>   		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
>   		adev->gmc.aper_size = adev->gmc.real_vram_size;
>   	}
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 431742eb7811..5fa613d41799 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1456,7 +1456,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
>   	 */
>   
>   	/* check whether both host-gpu and gpu-gpu xgmi links exist */
> -	if ((adev->flags & AMD_IS_APU) ||
> +	if (((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) ||
>   	    (adev->gmc.xgmi.supported &&
>   	     adev->gmc.xgmi.connected_to_cpu)) {
>   		adev->gmc.aper_base =


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough
@ 2022-03-15 18:13 Alex Deucher
  2022-03-16  7:18 ` Christian König
  0 siblings, 1 reply; 11+ messages in thread
From: Alex Deucher @ 2022-03-15 18:13 UTC (permalink / raw)
  To: amd-gfx; +Cc: Alex Deucher

If the GPU is passed through to a guest VM, use the PCI
BAR for CPU FB access rather than the physical address of
carve out.  The physical address is not valid in a guest.

v2: Fix HDP handing as suggested by Michel

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c     | 2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c      | 5 +++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c      | 2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c      | 2 +-
 5 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 1b313a95c7e5..eb902654f35d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -5733,7 +5733,7 @@ void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
 		struct amdgpu_ring *ring)
 {
 #ifdef CONFIG_X86_64
-	if (adev->flags & AMD_IS_APU)
+	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev))
 		return;
 #endif
 	if (adev->gmc.xgmi.connected_to_cpu)
@@ -5749,7 +5749,7 @@ void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
 		struct amdgpu_ring *ring)
 {
 #ifdef CONFIG_X86_64
-	if (adev->flags & AMD_IS_APU)
+	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev))
 		return;
 #endif
 	if (adev->gmc.xgmi.connected_to_cpu)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index f60b7bd4dbf5..9887a60e8eae 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -814,7 +814,7 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
 	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
 
 #ifdef CONFIG_X86_64
-	if (adev->flags & AMD_IS_APU) {
+	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
 		adev->gmc.aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
 		adev->gmc.aper_size = adev->gmc.real_vram_size;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 344d819b4c1b..979da6f510e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -381,8 +381,9 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
 	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
 
 #ifdef CONFIG_X86_64
-	if (adev->flags & AMD_IS_APU &&
-	    adev->gmc.real_vram_size > adev->gmc.aper_size) {
+	if ((adev->flags & AMD_IS_APU) &&
+	    adev->gmc.real_vram_size > adev->gmc.aper_size &&
+	    !amdgpu_passthrough(adev)) {
 		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
 		adev->gmc.aper_size = adev->gmc.real_vram_size;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index ca9841d5669f..1932a3e4af7e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -581,7 +581,7 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
 	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
 
 #ifdef CONFIG_X86_64
-	if (adev->flags & AMD_IS_APU) {
+	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
 		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
 		adev->gmc.aper_size = adev->gmc.real_vram_size;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 431742eb7811..5fa613d41799 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1456,7 +1456,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
 	 */
 
 	/* check whether both host-gpu and gpu-gpu xgmi links exist */
-	if ((adev->flags & AMD_IS_APU) ||
+	if (((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) ||
 	    (adev->gmc.xgmi.supported &&
 	     adev->gmc.xgmi.connected_to_cpu)) {
 		adev->gmc.aper_base =
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2022-03-16 15:59 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-10 18:06 [PATCH] drm/amdgpu/gmc: use PCI BARs for APUs in passthrough Alex Deucher
2022-03-11 10:24 ` Michel Dänzer
2022-03-11 10:32   ` Christian König
2022-03-11 17:43     ` Michel Dänzer
2022-03-16 15:52       ` Michel Dänzer
2022-03-16 15:55         ` Alex Deucher
2022-03-16 15:58           ` Michel Dänzer
2022-03-11 12:17 ` Christian König
2022-03-15 18:13 Alex Deucher
2022-03-16  7:18 ` Christian König
2022-03-16 15:59   ` Michel Dänzer

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