[U-Boot] [PATCH 1/2] nand/fsl_elbc: shrink SPL a bit by converting out_be32() to __raw_writel()

[U-Boot] [PATCH 1/2] nand/fsl_elbc: shrink SPL a bit by converting out_be32() to __raw_writel()

[Scott Wood]

This is needed to make room for a bugfix on p1_p2_rdb_pc.  A sync is used
before the final write to LSOR that initiates the transaction, to ensure
all the other set up has been completed.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 nand_spl/nand_boot_fsl_elbc.c |   47 ++++++++++++++++++++++-------------------
 1 file changed, 25 insertions(+), 22 deletions(-)

diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c
index 502605b..e9d6497 100644
--- a/nand_spl/nand_boot_fsl_elbc.c
+++ b/nand_spl/nand_boot_fsl_elbc.c
@@ -66,39 +66,42 @@ static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
 
 	if (large) {
 		fmr |= FMR_ECCM;
-		out_be32(&regs->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
-		                     (NAND_CMD_READSTART << FCR_CMD1_SHIFT));
-		out_be32(&regs->fir,
-		         (FIR_OP_CW0 << FIR_OP0_SHIFT) |
-		         (FIR_OP_CA  << FIR_OP1_SHIFT) |
-		         (FIR_OP_PA  << FIR_OP2_SHIFT) |
-		         (FIR_OP_CW1 << FIR_OP3_SHIFT) |
-		         (FIR_OP_RBW << FIR_OP4_SHIFT));
+		__raw_writel((NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
+			(NAND_CMD_READSTART << FCR_CMD1_SHIFT),
+			&regs->fcr);
+		__raw_writel(
+			(FIR_OP_CW0 << FIR_OP0_SHIFT) |
+			(FIR_OP_CA  << FIR_OP1_SHIFT) |
+			(FIR_OP_PA  << FIR_OP2_SHIFT) |
+			(FIR_OP_CW1 << FIR_OP3_SHIFT) |
+			(FIR_OP_RBW << FIR_OP4_SHIFT),
+			&regs->fir);
 	} else {
-		out_be32(&regs->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
-		out_be32(&regs->fir,
-		         (FIR_OP_CW0 << FIR_OP0_SHIFT) |
-		         (FIR_OP_CA  << FIR_OP1_SHIFT) |
-		         (FIR_OP_PA  << FIR_OP2_SHIFT) |
-		         (FIR_OP_RBW << FIR_OP3_SHIFT));
+		__raw_writel(NAND_CMD_READ0 << FCR_CMD0_SHIFT, &regs->fcr);
+		__raw_writel(
+			(FIR_OP_CW0 << FIR_OP0_SHIFT) |
+			(FIR_OP_CA  << FIR_OP1_SHIFT) |
+			(FIR_OP_PA  << FIR_OP2_SHIFT) |
+			(FIR_OP_RBW << FIR_OP3_SHIFT),
+			&regs->fir);
 	}
 
-	out_be32(&regs->fbcr, 0);
-	clrsetbits_be32(&regs->bank[0].br, BR_DECC, BR_DECC_CHK_GEN);
+	__raw_writel(0, &regs->fbcr);
 
 	while (pos < uboot_size) {
 		int i = 0;
-		out_be32(&regs->fbar, offs >> block_shift);
+		__raw_writel(offs >> block_shift, &regs->fbar);
 
 		do {
 			int j;
 			unsigned int page_offs = (offs & (block_size - 1)) << 1;
 
-			out_be32(&regs->ltesr, ~0);
-			out_be32(&regs->lteatr, 0);
-			out_be32(&regs->fpar, page_offs);
-			out_be32(&regs->fmr, fmr);
-			out_be32(&regs->lsor, 0);
+			__raw_writel(~0, &regs->ltesr);
+			__raw_writel(0, &regs->lteatr);
+			__raw_writel(page_offs, &regs->fpar);
+			__raw_writel(fmr, &regs->fmr);
+			sync();
+			__raw_writel(0, &regs->lsor);
 			nand_wait();
 
 			page_offs %= WINDOW_SIZE;
-- 
1.7.9.5

[U-Boot] [PATCH 2/2] powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPL

[Scott Wood]

LAW init is skipped in the SPL payload because it's assumed that the SPL
has taken care of it -- so make sure the SPL loads all the LAWs as is
done on other boards.

This bug was introduced by:

  commit 4589728e214958a4e6e011a081a68d360c49d7a5
  Author: Kumar Gala <galak@kernel.crashing.org>
  Date:   Fri Nov 11 08:14:53 2011 -0600

    powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
    
    Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
    LAW entries not needed during SPL phase.
    
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 board/freescale/p1_p2_rdb_pc/law.c |    2 --
 1 file changed, 2 deletions(-)

diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
index 7968919..0da8300 100644
--- a/board/freescale/p1_p2_rdb_pc/law.c
+++ b/board/freescale/p1_p2_rdb_pc/law.c
@@ -25,13 +25,11 @@
 #include <asm/mmu.h>
 
 struct law_entry law_table[] = {
-#ifndef CONFIG_NAND_SPL
 	SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
 	SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
 #ifdef CONFIG_VSC7385_ENET
 	SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
 #endif
-#endif
 	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
 #ifdef CONFIG_SYS_NAND_BASE_PHYS
 	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
-- 
1.7.9.5

[U-Boot] [PATCH 2/2] powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPL

[McClintock Matthew-B29882]

On Wed, Aug 8, 2012 at 8:06 PM, Scott Wood <scottwood@freescale.com> wrote:
> LAW init is skipped in the SPL payload because it's assumed that the SPL
> has taken care of it -- so make sure the SPL loads all the LAWs as is
> done on other boards.

It might be good to try this on a few different compilers to see if
they are all under the size requirement. I've made this smaller from
other work so it could still be OK.

-M

>
> This bug was introduced by:
>
>   commit 4589728e214958a4e6e011a081a68d360c49d7a5
>   Author: Kumar Gala <galak@kernel.crashing.org>
>   Date:   Fri Nov 11 08:14:53 2011 -0600
>
>     powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
>
>     Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
>     LAW entries not needed during SPL phase.
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  board/freescale/p1_p2_rdb_pc/law.c |    2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
> index 7968919..0da8300 100644
> --- a/board/freescale/p1_p2_rdb_pc/law.c
> +++ b/board/freescale/p1_p2_rdb_pc/law.c
> @@ -25,13 +25,11 @@
>  #include <asm/mmu.h>
>
>  struct law_entry law_table[] = {
> -#ifndef CONFIG_NAND_SPL
>         SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
>         SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
>  #ifdef CONFIG_VSC7385_ENET
>         SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
>  #endif
> -#endif
>         SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
>  #ifdef CONFIG_SYS_NAND_BASE_PHYS
>         SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
> --
> 1.7.9.5
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 2/2] powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPL

[McClintock Matthew-B29882]

On Wed, Aug 8, 2012 at 9:27 PM, Matthew McClintock <msm@freescale.com> wrote:
> On Wed, Aug 8, 2012 at 8:06 PM, Scott Wood <scottwood@freescale.com> wrote:
>> LAW init is skipped in the SPL payload because it's assumed that the SPL
>> has taken care of it -- so make sure the SPL loads all the LAWs as is
>> done on other boards.
>
> It might be good to try this on a few different compilers to see if
> they are all under the size requirement. I've made this smaller from
> other work so it could still be OK.

Err, I spoke too soon... this might not be upstreamed though.

-M

>
> -M
>
>>
>> This bug was introduced by:
>>
>>   commit 4589728e214958a4e6e011a081a68d360c49d7a5
>>   Author: Kumar Gala <galak@kernel.crashing.org>
>>   Date:   Fri Nov 11 08:14:53 2011 -0600
>>
>>     powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
>>
>>     Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
>>     LAW entries not needed during SPL phase.
>>
>> Signed-off-by: Scott Wood <scottwood@freescale.com>
>> ---
>>  board/freescale/p1_p2_rdb_pc/law.c |    2 --
>>  1 file changed, 2 deletions(-)
>>
>> diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
>> index 7968919..0da8300 100644
>> --- a/board/freescale/p1_p2_rdb_pc/law.c
>> +++ b/board/freescale/p1_p2_rdb_pc/law.c
>> @@ -25,13 +25,11 @@
>>  #include <asm/mmu.h>
>>
>>  struct law_entry law_table[] = {
>> -#ifndef CONFIG_NAND_SPL
>>         SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
>>         SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
>>  #ifdef CONFIG_VSC7385_ENET
>>         SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
>>  #endif
>> -#endif
>>         SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
>>  #ifdef CONFIG_SYS_NAND_BASE_PHYS
>>         SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
>> --
>> 1.7.9.5
>>
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 2/2] powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPL

[Scott Wood]

On 08/08/2012 09:28 PM, McClintock Matthew-B29882 wrote:
> On Wed, Aug 8, 2012 at 9:27 PM, Matthew McClintock <msm@freescale.com> wrote:
>> On Wed, Aug 8, 2012 at 8:06 PM, Scott Wood <scottwood@freescale.com> wrote:
>>> LAW init is skipped in the SPL payload because it's assumed that the SPL
>>> has taken care of it -- so make sure the SPL loads all the LAWs as is
>>> done on other boards.
>>
>> It might be good to try this on a few different compilers to see if
>> they are all under the size requirement. I've made this smaller from
>> other work so it could still be OK.

I don't have "a few different compilers" handy to test with -- and even
if I did, it wouldn't be exhaustive.  This fixes a bug.  If someone
finds that they can't build with some other compiler, they can report
the bug and we'll deal with it.

> Err, I spoke too soon... this might not be upstreamed though.

Why not?

-Scott

[U-Boot] [PATCH 2/2] powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPL

[Huang Changming-R66093]

This maybe cause the overlap error:
powerpc-linux-gnu-ld: section .resetvec loaded at [00000000ff800ffc,00000000ff800fff] overlaps section .data loaded at [00000000ff800ec8,00000000ff80102f]

maybe we can think about to remove or modify Kumar's patch:

commit 7639675131673e8f1582d760203a9af34fba9e79
Author: Kumar Gala <galak@kernel.crashing.org>
Date:   Thu Feb 3 09:02:13 2011 -0600

    powerpc/8xxx: Fix LAW init to respect pre-initialized entries

    If some pre-boot or earlier stage bootloader (NAND SPL) has setup LAW
    entries consider them good and mark them used.

    In the NAND SPL case we skip re-initializing based on the law_table
    since the SPL phase already did that.

    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>


Best Regards
Jerry Huang


> -----Original Message-----
> From: u-boot-bounces at lists.denx.de [mailto:u-boot-bounces at lists.denx.de]
> On Behalf Of Scott Wood
> Sent: Friday, August 10, 2012 12:52 AM
> To: McClintock Matthew-B29882
> Cc: Wood Scott-B07421; Kumar Gala; u-boot at lists.denx.de
> Subject: Re: [U-Boot] [PATCH 2/2] powerpc/mpc85xx/p1_p2_rdb: add all LAWs
> during SPL
> 
> On 08/08/2012 09:28 PM, McClintock Matthew-B29882 wrote:
> > On Wed, Aug 8, 2012 at 9:27 PM, Matthew McClintock <msm@freescale.com>
> wrote:
> >> On Wed, Aug 8, 2012 at 8:06 PM, Scott Wood <scottwood@freescale.com>
> wrote:
> >>> LAW init is skipped in the SPL payload because it's assumed that the
> >>> SPL has taken care of it -- so make sure the SPL loads all the LAWs
> >>> as is done on other boards.
> >>
> >> It might be good to try this on a few different compilers to see if
> >> they are all under the size requirement. I've made this smaller from
> >> other work so it could still be OK.
> 
> I don't have "a few different compilers" handy to test with -- and even
> if I did, it wouldn't be exhaustive.  This fixes a bug.  If someone finds
> that they can't build with some other compiler, they can report the bug
> and we'll deal with it.
> 
> > Err, I spoke too soon... this might not be upstreamed though.
> 
> Why not?
> 
> -Scott
> 
> 
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 2/2] powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPL

[Scott Wood]

On 08/10/2012 01:54 AM, Huang Changming-R66093 wrote:
> This maybe cause the overlap error:
>
> powerpc-linux-gnu-ld: section .resetvec loaded at
> [00000000ff800ffc,00000000ff800fff] overlaps section .data loaded at
> [00000000ff800ec8,00000000ff80102f]

What tree and toolchain are you using?  Did you apply patch 1/2 as well?
 Did it build OK for you before these two patches?

> maybe we can think about to remove or modify Kumar's patch:
> 
> commit 7639675131673e8f1582d760203a9af34fba9e79
> Author: Kumar Gala <galak@kernel.crashing.org>
> Date:   Thu Feb 3 09:02:13 2011 -0600
> 
>     powerpc/8xxx: Fix LAW init to respect pre-initialized entries
> 
>     If some pre-boot or earlier stage bootloader (NAND SPL) has setup LAW
>     entries consider them good and mark them used.
> 
>     In the NAND SPL case we skip re-initializing based on the law_table
>     since the SPL phase already did that.
> 
>     Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Kumar, was this patch to fix a bug (e.g. was one of the LAWs actually in
use at the time?) or just seemed nice?

-Scott