From: Arnd Bergmann <arnd@arndb.de>
To: linux-arm-kernel@lists.infradead.org
Cc: One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>,
Mark Rutland <mark.rutland@arm.com>,
gabriele.paoloni@huawei.com, benh@kernel.crashing.org,
will.deacon@arm.com, linuxarm@huawei.com,
lorenzo.pieralisi@arm.com, xuwei5@hisilicon.com,
linux-serial@vger.kernel.org, catalin.marinas@arm.com,
devicetree@vger.kernel.org, minyard@acm.org,
marc.zyngier@arm.com, liviu.dudau@arm.com, john.garry@huawei.com,
zourongrong@gmail.com, robh+dt@kernel.org, bhelgaas@google.com,
kantyzc@163.com, zhichang.yuan02@gmail.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
"zhichang.yuan" <yuanzhichang@hisilicon.com>,
olof@lixom.net
Subject: Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA
Date: Fri, 18 Nov 2016 10:22:46 +0100 [thread overview]
Message-ID: <11716372.n451O5j8Vs@wuerfel> (raw)
In-Reply-To: <20161114111111.1b753dc3@lxorguk.ukuu.org.uk>
On Monday, November 14, 2016 11:11:11 AM CET One Thousand Gnomes wrote:
> > > It's not a safe assumption for x86 at least. There are a few systems with
> > > multiple ISA busses particularly older laptops with a docking station.
> >
> > But do they have multiple ISA domains? There is no real harm in supporting
> > it, the (small) downsides I can think of are:
>
> I don't believe they x86 class ones have multiple ISA domains. But as
> I've said I don't know how the electronics in the older ThinkPad worked
> when it used two PIIX4s with some LPC or ISA stuff on each.
>
> It works in DOS and unmodified Linux so I'm pretty sure there are no
> additional domains. Likewise the various x86 schemes that route some bits
> of ISA bus off into strange places work in DOS and don't have any
> overlaps.
>
> yenta_socket handles PCI/PCMCIA bridging and routes a range of that flat
> ISA space appropriately to the card.
Right, that's what I had expected, so we still don't even
need to handle multiple ISA I/O address spaces for the
only known case of multiple ISA buses, though we may decide
to generalize the code like that anyway.
Arnd
WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@arndb.de>
To: linux-arm-kernel@lists.infradead.org
Cc: Mark Rutland <mark.rutland@arm.com>,
One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>,
catalin.marinas@arm.com, gabriele.paoloni@huawei.com,
benh@kernel.crashing.org, will.deacon@arm.com,
linuxarm@huawei.com, lorenzo.pieralisi@arm.com,
xuwei5@hisilicon.com, linux-serial@vger.kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
minyard@acm.org, marc.zyngier@arm.com, liviu.dudau@arm.com,
john.garry@huawei.com, olof@lixom.net, robh+dt@kernel.org,
bhelgaas@google.com, kantyzc@163.com, zhichang.yuan02@gmail.com,
linux-kernel@vger.kernel.org,
"zhichang.yuan" <yuanzhichang@hisilicon.com>,
zourongrong@gmail.com
Subject: Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA
Date: Fri, 18 Nov 2016 10:22:46 +0100 [thread overview]
Message-ID: <11716372.n451O5j8Vs@wuerfel> (raw)
In-Reply-To: <20161114111111.1b753dc3@lxorguk.ukuu.org.uk>
On Monday, November 14, 2016 11:11:11 AM CET One Thousand Gnomes wrote:
> > > It's not a safe assumption for x86 at least. There are a few systems with
> > > multiple ISA busses particularly older laptops with a docking station.
> >
> > But do they have multiple ISA domains? There is no real harm in supporting
> > it, the (small) downsides I can think of are:
>
> I don't believe they x86 class ones have multiple ISA domains. But as
> I've said I don't know how the electronics in the older ThinkPad worked
> when it used two PIIX4s with some LPC or ISA stuff on each.
>
> It works in DOS and unmodified Linux so I'm pretty sure there are no
> additional domains. Likewise the various x86 schemes that route some bits
> of ISA bus off into strange places work in DOS and don't have any
> overlaps.
>
> yenta_socket handles PCI/PCMCIA bridging and routes a range of that flat
> ISA space appropriately to the card.
Right, that's what I had expected, so we still don't even
need to handle multiple ISA I/O address spaces for the
only known case of multiple ISA buses, though we may decide
to generalize the code like that anyway.
Arnd
WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@arndb.de>
To: linux-arm-kernel@lists.infradead.org
Cc: Mark Rutland <mark.rutland@arm.com>,
One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>,
catalin.marinas@arm.com, gabriele.paoloni@huawei.com,
benh@kernel.crashing.org, will.deacon@arm.com,
linuxarm@huawei.com, lorenzo.pieralisi@arm.com,
xuwei5@hisilicon.com, linux-serial@vger.kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
minyard@acm.org, marc.zyngier@arm.com, liviu.dudau@arm.com,
john.garry@huawei.com, olof@lixom.net, robh+dt@kernel.org,
bhelgaas@google.com, kantyzc@163.com, zhichang.yuan02@gmail.com,
linux-kernel@vger.kernel.org,
"zhichang.yuan" <yuanzhichang@hisilicon.com>,
zourongrong@gmail.com
Subject: Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA
Date: Fri, 18 Nov 2016 10:22:46 +0100 [thread overview]
Message-ID: <11716372.n451O5j8Vs@wuerfel> (raw)
In-Reply-To: <20161114111111.1b753dc3@lxorguk.ukuu.org.uk>
On Monday, November 14, 2016 11:11:11 AM CET One Thousand Gnomes wrote:
> > > It's not a safe assumption for x86 at least. There are a few systems with
> > > multiple ISA busses particularly older laptops with a docking station.
> >
> > But do they have multiple ISA domains? There is no real harm in supporting
> > it, the (small) downsides I can think of are:
>
> I don't believe they x86 class ones have multiple ISA domains. But as
> I've said I don't know how the electronics in the older ThinkPad worked
> when it used two PIIX4s with some LPC or ISA stuff on each.
>
> It works in DOS and unmodified Linux so I'm pretty sure there are no
> additional domains. Likewise the various x86 schemes that route some bits
> of ISA bus off into strange places work in DOS and don't have any
> overlaps.
>
> yenta_socket handles PCI/PCMCIA bridging and routes a range of that flat
> ISA space appropriately to the card.
Right, that's what I had expected, so we still don't even
need to handle multiple ISA I/O address spaces for the
only known case of multiple ISA buses, though we may decide
to generalize the code like that anyway.
Arnd
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA
Date: Fri, 18 Nov 2016 10:22:46 +0100 [thread overview]
Message-ID: <11716372.n451O5j8Vs@wuerfel> (raw)
In-Reply-To: <20161114111111.1b753dc3@lxorguk.ukuu.org.uk>
On Monday, November 14, 2016 11:11:11 AM CET One Thousand Gnomes wrote:
> > > It's not a safe assumption for x86 at least. There are a few systems with
> > > multiple ISA busses particularly older laptops with a docking station.
> >
> > But do they have multiple ISA domains? There is no real harm in supporting
> > it, the (small) downsides I can think of are:
>
> I don't believe they x86 class ones have multiple ISA domains. But as
> I've said I don't know how the electronics in the older ThinkPad worked
> when it used two PIIX4s with some LPC or ISA stuff on each.
>
> It works in DOS and unmodified Linux so I'm pretty sure there are no
> additional domains. Likewise the various x86 schemes that route some bits
> of ISA bus off into strange places work in DOS and don't have any
> overlaps.
>
> yenta_socket handles PCI/PCMCIA bridging and routes a range of that flat
> ISA space appropriately to the card.
Right, that's what I had expected, so we still don't even
need to handle multiple ISA I/O address spaces for the
only known case of multiple ISA buses, though we may decide
to generalize the code like that anyway.
Arnd
next prev parent reply other threads:[~2016-11-18 9:24 UTC|newest]
Thread overview: 286+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-08 3:47 [PATCH V5 0/3] ARM64 LPC: legacy ISA I/O support zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 12:03 ` Mark Rutland
2016-11-08 12:03 ` Mark Rutland
2016-11-08 12:03 ` Mark Rutland
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:15 ` Arnd Bergmann
2016-11-08 16:15 ` Arnd Bergmann
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-10 8:33 ` zhichang.yuan
2016-11-10 8:33 ` zhichang.yuan
2016-11-10 8:33 ` zhichang.yuan
2016-11-10 11:22 ` Mark Rutland
2016-11-10 11:22 ` Mark Rutland
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-11 10:07 ` zhichang.yuan
2016-11-11 10:07 ` zhichang.yuan
2016-11-11 10:07 ` zhichang.yuan
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:38 ` Arnd Bergmann
2016-11-18 11:38 ` Arnd Bergmann
2016-11-21 12:58 ` John Garry
2016-11-21 12:58 ` John Garry
2016-11-21 12:58 ` John Garry
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:33 ` John Garry
2016-11-08 16:33 ` John Garry
2016-11-08 16:33 ` John Garry
2016-11-08 16:33 ` John Garry
2016-11-08 16:49 ` Will Deacon
2016-11-08 16:49 ` Will Deacon
2016-11-08 17:05 ` John Garry
2016-11-08 17:05 ` John Garry
2016-11-08 17:05 ` John Garry
2016-11-08 22:35 ` Arnd Bergmann
2016-11-08 22:35 ` Arnd Bergmann
2016-11-08 22:35 ` Arnd Bergmann
2016-11-09 11:29 ` John Garry
2016-11-09 11:29 ` John Garry
2016-11-09 11:29 ` John Garry
2016-11-09 21:33 ` Arnd Bergmann
2016-11-09 21:33 ` Arnd Bergmann
2016-11-09 21:33 ` Arnd Bergmann
2016-12-22 8:15 ` Ming Lei
2016-12-22 8:15 ` Ming Lei
2016-12-22 8:15 ` Ming Lei
2016-12-22 8:15 ` Ming Lei
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 7:24 ` Ming Lei
2016-12-23 7:24 ` Ming Lei
2016-12-23 7:24 ` Ming Lei
2016-12-23 7:24 ` Ming Lei
2017-01-06 11:43 ` Arnd Bergmann
2017-01-06 11:43 ` Arnd Bergmann
2017-01-06 11:43 ` Arnd Bergmann
2017-01-06 11:43 ` Arnd Bergmann
2017-01-07 1:25 ` 答复: " Yuanzhichang
2016-11-08 3:47 ` [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 11:49 ` Mark Rutland
2016-11-08 11:49 ` Mark Rutland
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 17:10 ` Mark Rutland
2016-11-08 17:10 ` Mark Rutland
2016-11-08 17:10 ` Mark Rutland
2016-11-09 13:54 ` One Thousand Gnomes
2016-11-09 13:54 ` One Thousand Gnomes
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 21:38 ` Arnd Bergmann
2016-11-09 21:38 ` Arnd Bergmann
2016-11-09 21:38 ` Arnd Bergmann
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-18 9:22 ` Arnd Bergmann [this message]
2016-11-18 9:22 ` Arnd Bergmann
2016-11-18 9:22 ` Arnd Bergmann
2016-11-18 9:22 ` Arnd Bergmann
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-09 11:20 ` Mark Rutland
2016-11-09 11:20 ` Mark Rutland
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-09 11:39 ` liviu.dudau
2016-11-09 11:39 ` liviu.dudau at arm.com
2016-11-09 11:39 ` liviu.dudau-5wv7dgnIgG8
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:50 ` liviu.dudau
2016-11-09 16:50 ` liviu.dudau at arm.com
2016-11-09 16:50 ` liviu.dudau
2016-11-09 16:50 ` liviu.dudau-5wv7dgnIgG8
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-11 10:37 ` liviu.dudau
2016-11-11 10:37 ` liviu.dudau at arm.com
2016-11-11 10:37 ` liviu.dudau
2016-11-11 10:37 ` liviu.dudau
2016-11-08 3:47 ` [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06 zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 6:11 ` kbuild test robot
2016-11-08 6:11 ` kbuild test robot
2016-11-08 6:11 ` kbuild test robot
2016-11-08 16:24 ` Arnd Bergmann
2016-11-08 16:24 ` Arnd Bergmann
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 21:34 ` Arnd Bergmann
2016-11-09 21:34 ` Arnd Bergmann
2016-11-09 21:34 ` Arnd Bergmann
2016-11-09 21:34 ` Arnd Bergmann
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 12:36 ` zhichang.yuan
2016-11-10 12:36 ` zhichang.yuan
2016-11-10 12:36 ` zhichang.yuan
2016-11-18 11:46 ` Arnd Bergmann
2016-11-18 11:46 ` Arnd Bergmann
2016-11-18 11:46 ` Arnd Bergmann
2016-11-18 11:46 ` Arnd Bergmann
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 16:07 ` Arnd Bergmann
2016-11-10 16:07 ` Arnd Bergmann
2016-11-10 16:07 ` Arnd Bergmann
2016-11-10 16:07 ` Arnd Bergmann
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:48 ` liviu.dudau
2016-11-11 10:48 ` liviu.dudau at arm.com
2016-11-11 10:48 ` liviu.dudau
2016-11-11 10:48 ` liviu.dudau
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 14:45 ` liviu.dudau
2016-11-11 14:45 ` liviu.dudau at arm.com
2016-11-11 14:45 ` liviu.dudau
2016-11-11 14:45 ` liviu.dudau-5wv7dgnIgG8
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 18:16 ` liviu.dudau
2016-11-11 18:16 ` liviu.dudau at arm.com
2016-11-11 18:16 ` liviu.dudau
2016-11-11 18:16 ` liviu.dudau
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 11:26 ` liviu.dudau
2016-11-14 11:26 ` liviu.dudau at arm.com
2016-11-14 11:26 ` liviu.dudau
2016-11-14 11:26 ` liviu.dudau
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 10:24 ` Arnd Bergmann
2016-11-24 10:24 ` Arnd Bergmann
2016-11-24 10:24 ` Arnd Bergmann
2016-11-24 10:24 ` Arnd Bergmann
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-11 16:54 ` zhichang.yuan
2016-11-11 16:54 ` zhichang.yuan
2016-11-11 16:54 ` zhichang.yuan
2016-11-11 16:54 ` zhichang.yuan
2016-11-14 11:06 ` One Thousand Gnomes
2016-11-14 11:06 ` One Thousand Gnomes
2016-11-14 11:06 ` One Thousand Gnomes
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