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* [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1
@ 2010-04-09 11:06 Gao Ya'nan
  2010-04-09 11:06 ` [U-Boot] [PATCH 2/2] {ACR,SPCR,SCCR}_XXX have left-shifted values Gao Ya'nan
  2010-04-14  1:59 ` [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1 Kim Phillips
  0 siblings, 2 replies; 4+ messages in thread
From: Gao Ya'nan @ 2010-04-09 11:06 UTC (permalink / raw)
  To: u-boot

---
 cpu/mpc83xx/start.S |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index 68bb620..d7b03a9 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -1156,7 +1156,7 @@ map_flash_by_law1:
 	ori r4, r4, (CONFIG_SYS_FLASH_BASE)@l
 	stw r4, LBLAWBAR1(r3) /* LBLAWBAR1 <= CONFIG_SYS_FLASH_BASE */
 
-	/* Store 0x80000012 + log2(CONFIG_SYS_FLASH_SIZE) into LBLAWAR1 */
+	/* Store 0x80000012 + log2(CONFIG_SYS_FLASH_SIZE) + 1 into LBLAWAR1 */
 	lis r4, (0x80000012)@h
 	ori r4, r4, (0x80000012)@l
 	li r5, CONFIG_SYS_FLASH_SIZE
@@ -1164,7 +1164,7 @@ map_flash_by_law1:
 	addi r4, r4, 1
 	bne 1b
 
-	stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= 8MB Flash Size */
+	stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= Flash Size */
 	blr
 
 	/* Though all the LBIU Local Access Windows and LBC Banks will be
-- 
1.7.0

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH 2/2] {ACR,SPCR,SCCR}_XXX have left-shifted values
  2010-04-09 11:06 [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1 Gao Ya'nan
@ 2010-04-09 11:06 ` Gao Ya'nan
  2010-04-14  1:59 ` [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1 Kim Phillips
  1 sibling, 0 replies; 4+ messages in thread
From: Gao Ya'nan @ 2010-04-09 11:06 UTC (permalink / raw)
  To: u-boot

---
 cpu/mpc83xx/cpu_init.c |   36 ++++++++++++++++++------------------
 1 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 75b4522..f3b67ae 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -65,16 +65,16 @@ void cpu_init_f (volatile immap_t * im)
 {
 	__be32 acr_mask =
 #ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */
-		(ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT) |
+		ACR_PIPE_DEP |
 #endif
 #ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
-		(ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
+		ACR_RPTCNT |
 #endif
 #ifdef CONFIG_SYS_ACR_APARK	/* Arbiter address parking mode */
-		(ACR_APARK << ACR_APARK_SHIFT) |
+		ACR_APARK |
 #endif
 #ifdef CONFIG_SYS_ACR_PARKM	/* Arbiter parking master */
-		(ACR_PARKM << ACR_PARKM_SHIFT) |
+		ACR_PARKM |
 #endif
 		0;
 	__be32 acr_val =
@@ -93,16 +93,16 @@ void cpu_init_f (volatile immap_t * im)
 		0;
 	__be32 spcr_mask =
 #ifdef CONFIG_SYS_SPCR_OPT /* Optimize transactions between CSB and other dev */
-		(SPCR_OPT << SPCR_OPT_SHIFT) |
+		SPCR_OPT |
 #endif
 #ifdef CONFIG_SYS_SPCR_TSECEP /* all eTSEC's Emergency priority */
-		(SPCR_TSECEP << SPCR_TSECEP_SHIFT) |
+		SPCR_TSECEP |
 #endif
 #ifdef CONFIG_SYS_SPCR_TSEC1EP /* TSEC1 Emergency priority */
-		(SPCR_TSEC1EP << SPCR_TSEC1EP_SHIFT) |
+		SPCR_TSEC1EP |
 #endif
 #ifdef CONFIG_SYS_SPCR_TSEC2EP /* TSEC2 Emergency priority */
-		(SPCR_TSEC2EP << SPCR_TSEC2EP_SHIFT) |
+		SPCR_TSEC2EP |
 #endif
 		0;
 	__be32 spcr_val =
@@ -121,34 +121,34 @@ void cpu_init_f (volatile immap_t * im)
 		0;
 	__be32 sccr_mask =
 #ifdef CONFIG_SYS_SCCR_ENCCM /* Encryption clock mode */
-		(SCCR_ENCCM << SCCR_ENCCM_SHIFT) |
+		SCCR_ENCCM |
 #endif
 #ifdef CONFIG_SYS_SCCR_PCICM /* PCI & DMA clock mode */
-		(SCCR_PCICM << SCCR_PCICM_SHIFT) |
+		SCCR_PCICM |
 #endif
 #ifdef CONFIG_SYS_SCCR_TSECCM /* all TSEC's clock mode */
-		(SCCR_TSECCM << SCCR_TSECCM_SHIFT) |
+		SCCR_TSECCM |
 #endif
 #ifdef CONFIG_SYS_SCCR_TSEC1CM /* TSEC1 clock mode */
-		(SCCR_TSEC1CM << SCCR_TSEC1CM_SHIFT) |
+		SCCR_TSEC1CM |
 #endif
 #ifdef CONFIG_SYS_SCCR_TSEC2CM /* TSEC2 clock mode */
-		(SCCR_TSEC2CM << SCCR_TSEC2CM_SHIFT) |
+		SCCR_TSEC2CM |
 #endif
 #ifdef CONFIG_SYS_SCCR_TSEC1ON /* TSEC1 clock switch */
-		(SCCR_TSEC1ON << SCCR_TSEC1ON_SHIFT) |
+		SCCR_TSEC1ON |
 #endif
 #ifdef CONFIG_SYS_SCCR_TSEC2ON /* TSEC2 clock switch */
-		(SCCR_TSEC2ON << SCCR_TSEC2ON_SHIFT) |
+		SCCR_TSEC2ON |
 #endif
 #ifdef CONFIG_SYS_SCCR_USBMPHCM /* USB MPH clock mode */
-		(SCCR_USBMPHCM << SCCR_USBMPHCM_SHIFT) |
+		SCCR_USBMPHCM |
 #endif
 #ifdef CONFIG_SYS_SCCR_USBDRCM /* USB DR clock mode */
-		(SCCR_USBDRCM << SCCR_USBDRCM_SHIFT) |
+		SCCR_USBDRCM |
 #endif
 #ifdef CONFIG_SYS_SCCR_SATACM /* SATA controller clock mode */
-		(SCCR_SATACM << SCCR_SATACM_SHIFT) |
+		SCCR_SATACM |
 #endif
 		0;
 	__be32 sccr_val =
-- 
1.7.0

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1
  2010-04-09 11:06 [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1 Gao Ya'nan
  2010-04-09 11:06 ` [U-Boot] [PATCH 2/2] {ACR,SPCR,SCCR}_XXX have left-shifted values Gao Ya'nan
@ 2010-04-14  1:59 ` Kim Phillips
  2010-04-15 22:26   ` Kim Phillips
  1 sibling, 1 reply; 4+ messages in thread
From: Kim Phillips @ 2010-04-14  1:59 UTC (permalink / raw)
  To: u-boot

On Fri, 9 Apr 2010 19:06:49 +0800
"Gao Ya'nan" <abutter.gao@gmail.com> wrote:

> ---
>  cpu/mpc83xx/start.S |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

I need a signoff on both these patches.

Thanks,

Kim

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1
  2010-04-14  1:59 ` [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1 Kim Phillips
@ 2010-04-15 22:26   ` Kim Phillips
  0 siblings, 0 replies; 4+ messages in thread
From: Kim Phillips @ 2010-04-15 22:26 UTC (permalink / raw)
  To: u-boot

On Tue, 13 Apr 2010 20:59:04 -0500
Kim Phillips <kim.phillips@freescale.com> wrote:

> On Fri, 9 Apr 2010 19:06:49 +0800
> "Gao Ya'nan" <abutter.gao@gmail.com> wrote:
> 
> > ---
> >  cpu/mpc83xx/start.S |    4 ++--
> >  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> I need a signoff on both these patches.

Gao, I can't commit these patches without a signoff.

please read section 11 of http://lwn.net/Articles/139918/ and if you
can certify the Developer's Certificate of Origin for these two
patches, simply reply to this email with your Signed-off-by:, and I'll
take care of the rest.

Thanks,

Kim

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2010-04-15 22:26 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-04-09 11:06 [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1 Gao Ya'nan
2010-04-09 11:06 ` [U-Boot] [PATCH 2/2] {ACR,SPCR,SCCR}_XXX have left-shifted values Gao Ya'nan
2010-04-14  1:59 ` [U-Boot] [PATCH 1/2] Fix comments for map_flash_by_law1 Kim Phillips
2010-04-15 22:26   ` Kim Phillips

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