[PATCH] mtd/nand: Spansion S30MLxxxP support

[PATCH] mtd/nand: Spansion S30MLxxxP support

[Brian Norris]

Some Spansion chips have a method for determining eraseblock size that
is incompatible with similar ID chips of other sizes. This implements
some heuristic detection of these differences.

Note that I am unsure about the wraparound nature of the ID string here.
I have not been able to fully test this with the physical chip.
Essentially, the rule is correct, but the ID string detection may fail
here. Let me know if anyone can fix this.

Signed-off-by: Brian Norris <norris@broadcom.com>
---
 drivers/mtd/nand/nand_base.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a3c7473..66f4412 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2899,6 +2899,17 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 		mtd->writesize = type->pagesize;
 		mtd->oobsize = mtd->writesize / 32;
 		busw = type->options & NAND_BUSWIDTH_16;
+
+		/*
+		 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
+		 * some Spansion chips have erasesize that conflicts with size
+		 * listed in nand_ids table
+		 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
+		 */
+		if (*maf_id == NAND_MFR_AMD && id_data[5] == 0x01 &&
+				id_data[6] == 0x01)
+			mtd->erasesize = (128 * 1024) << ((id_data[3] & 0x03)
+					<< 1);
 	}
 
 	/* Try to identify manufacturer */
-- 
1.7.0.4

Re: Re: [PATCH] mtd/nand: Spansion S30MLxxxP support

[Gernot Hoyler]

 > Note that I am unsure about the wraparound nature of the ID string
 > here. I have not been able to fully test this with the physical chip.
 > Essentially, the rule is correct, but the ID string detection may fail
 > here. Let me know if anyone can fix this.

I have just tested this on a physical device (S30ML512P30TFE51).
Unfortunately, the extended device IDs are a little bit different so
the patch does not work yet. With a S30ML512P30TFE51, the device IDs
are as follows:

   id_data[0]=0x01
   id_data[1]=0x56
   id_data[2]=0x00
   id_data[3]=0x01
   id_data[4]=0x10
   id_data[5]=0x00
   id_data[6]=0x00
   id_data[7]=0x00

My suggestion would be to check the page size instead of the extended
IDs (seems like the patch applies to all Spansion S30ML devices with
small pages, i.e. 512 bytes). So you might write:

+		if (*maf_id == NAND_MFR_AMD && type->pagesize == 512) {
...

This works for me.

[PATCH v2] mtd/nand: Spansion S30MLxxxP support

[Brian Norris]

Thanks for the help, I will add that.

I also don't know how I got confused thinking that the ID trails with
0x01 instead of 0x00. I think the following patch is a little more
robust. We need to be sure that chips don't accidentally get
misdetected as ORNAND.

Brian

---------------------------------------------------------------------

Some Spansion chips have a method for determining eraseblock size that
is incompatible with similar ID chips of other sizes. This implements
some heuristic detection of these differences.

This patch checks for a 5-byte ID with trailing zeros as well as a
512-byte page size to ensure that chips are not misdetected as the
S30MLxxxP ORNAND series.

Signed-off-by: Brian Norris <norris@broadcom.com>
---
 drivers/mtd/nand/nand_base.c |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a3c7473..8bdcf64 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2899,6 +2899,18 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 		mtd->writesize = type->pagesize;
 		mtd->oobsize = mtd->writesize / 32;
 		busw = type->options & NAND_BUSWIDTH_16;
+
+		/*
+		 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
+		 * some Spansion chips have erasesize that conflicts with size
+		 * listed in nand_ids table
+		 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
+		 */
+		if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 &&
+				id_data[5] == 0x00 && id_data[6] == 0x00 &&
+				id_data[7] == 0x00 && mtd->writesize == 512)
+			mtd->erasesize = (128 * 1024) << ((id_data[3] & 0x03)
+					<< 1);
 	}
 
 	/* Try to identify manufacturer */
-- 
1.7.0.4

Re: [PATCH v2] mtd/nand: Spansion S30MLxxxP support

[Artem Bityutskiy]

Hi,

On Thu, 2010-08-19 at 08:11 -0700, Brian Norris wrote:
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index a3c7473..8bdcf64 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -2899,6 +2899,18 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
>  		mtd->writesize = type->pagesize;
>  		mtd->oobsize = mtd->writesize / 32;
>  		busw = type->options & NAND_BUSWIDTH_16;
> +
> +		/*
> +		 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
> +		 * some Spansion chips have erasesize that conflicts with size
> +		 * listed in nand_ids table
> +		 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
> +		 */
> +		if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 &&
> +				id_data[5] == 0x00 && id_data[6] == 0x00 &&
> +				id_data[7] == 0x00 && mtd->writesize == 512)
> +			mtd->erasesize = (128 * 1024) << ((id_data[3] & 0x03)
> +					<< 1);

IMO, it is untidy to move just this little << 1 piece to another line.
I've amended this part and made it look like:

                        mtd->erasesize = (128 * 1024);
                        mtd->erasesize <<= ((id_data[3] & 0x03) << 1);

instead, if you do not mind, and pushed to l2-mtd-2.6.git / master,
thanks!

-- 
Best Regards,
Artem Bityutskiy (Битюцкий Артём)