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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 19/23] intel-gtt: consolidate i9xx setup
Date: Wed,  1 Sep 2010 22:30:06 +0200	[thread overview]
Message-ID: <1283373010-1314-20-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1283373010-1314-1-git-send-email-daniel.vetter@ffwll.ch>

The only difference between i915 and i965 was the calculation of the
gtt address. So merge these two paths into one. Otherwise the same
changes as in the i830 setup consolidation.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |  154 +++++++++++++++++-------------------------
 1 files changed, 61 insertions(+), 93 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 4c1ba87..198efb9 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -873,7 +873,13 @@ static void intel_enable_gtt(void)
 
 	ptetbl_addr = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
 
-	pci_read_config_dword(intel_private.pcidev, I810_GMADDR, &gma_addr);
+	if (INTEL_GTT_GEN == 2)
+		pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
+				      &gma_addr);
+	else
+		pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
+				      &gma_addr);
+
 	intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
 
 	pci_read_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, &gmch_ctrl);
@@ -1135,23 +1141,11 @@ static void intel_i9xx_setup_flush(void)
 
 static int intel_i9xx_configure(void)
 {
-	struct aper_size_info_fixed *current_size;
-	u32 temp;
-	u16 gmch_ctrl;
 	int i;
 
-	current_size = A_SIZE_FIX(agp_bridge->current_size);
-
-	pci_read_config_dword(intel_private.pcidev, I915_GMADDR, &temp);
-
-	agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
-
-	pci_read_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, &gmch_ctrl);
-	gmch_ctrl |= I830_GMCH_ENABLED;
-	pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl);
+	intel_enable_gtt();
 
-	writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL);
-	readl(intel_private.registers+I810_PGETBL_CTL);	/* PCI Posting. */
+	agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;
 
 	if (agp_bridge->driver->needs_scratch_page) {
 		for (i = intel_private.base.gtt_stolen_entries; i <
@@ -1163,8 +1157,6 @@ static int intel_i9xx_configure(void)
 
 	global_cache_flush();
 
-	intel_i9xx_setup_flush();
-
 	return 0;
 }
 
@@ -1260,40 +1252,62 @@ static int intel_i915_remove_entries(struct agp_memory *mem, off_t pg_start,
 	return 0;
 }
 
-/* The intel i915 automatically initializes the agp aperture during POST.
- * Use the memory already set aside for in the GTT.
- */
-static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
+static int i9xx_setup(void)
 {
-	int page_order, ret;
-	struct aper_size_info_fixed *size;
-	int num_entries;
-	u32 temp, temp2;
-
-	size = agp_bridge->current_size;
-	page_order = size->page_order;
-	num_entries = size->num_entries;
-	agp_bridge->gatt_table_real = NULL;
+	u32 reg_addr;
 
-	pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
-	pci_read_config_dword(intel_private.pcidev, I915_PTEADDR, &temp2);
+	pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &reg_addr);
 
-	temp &= 0xfff80000;
+	reg_addr &= 0xfff80000;
 
-	intel_private.registers = ioremap(temp, 128 * 4096);
+	intel_private.registers = ioremap(reg_addr, 128 * 4096);
 	if (!intel_private.registers)
 		return -ENOMEM;
 
-	intel_private.gtt_bus_addr = temp2;
-	temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
+	if (INTEL_GTT_GEN == 3) {
+		u32 gtt_addr;
+		pci_read_config_dword(intel_private.pcidev,
+				      I915_PTEADDR, &gtt_addr);
+		intel_private.gtt_bus_addr = gtt_addr;
+	} else {
+		u32 gtt_offset;
+
+		switch (INTEL_GTT_GEN) {
+		case 5:
+		case 6:
+			gtt_offset = MB(2);
+			break;
+		case 4:
+		default:
+			gtt_offset =  KB(512);
+			break;
+		}
+		intel_private.gtt_bus_addr = reg_addr + gtt_offset;
+	}
+
+	intel_i9xx_setup_flush();
+
+	return 0;
+}
+
+/* The intel i915 automatically initializes the agp aperture during POST.
+ * Use the memory already set aside for in the GTT.
+ */
+static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
+{
+	int ret;
+
+	ret = intel_private.driver->setup();
+	if (ret != 0)
+		return ret;
 
 	ret = intel_gtt_init();
 	if (ret != 0)
 		return ret;
 
+	agp_bridge->gatt_table_real = NULL;
 	agp_bridge->gatt_table = NULL;
-
-	agp_bridge->gatt_bus_addr = temp;
+	agp_bridge->gatt_bus_addr = 0;
 
 	return 0;
 }
@@ -1327,59 +1341,6 @@ static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,
 	return addr | bridge->driver->masks[type].mask;
 }
 
-static void intel_i965_get_gtt_range(int *gtt_offset)
-{
-	switch (INTEL_GTT_GEN) {
-	case 5:
-	case 6:
-		*gtt_offset = MB(2);
-		break;
-	case 4:
-	default:
-		*gtt_offset =  KB(512);
-		break;
-	}
-}
-
-/* The intel i965 automatically initializes the agp aperture during POST.
- * Use the memory already set aside for in the GTT.
- */
-static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
-{
-	int page_order, ret;
-	struct aper_size_info_fixed *size;
-	int num_entries;
-	u32 temp;
-	int gtt_offset;
-
-	size = agp_bridge->current_size;
-	page_order = size->page_order;
-	num_entries = size->num_entries;
-	agp_bridge->gatt_table_real = NULL;
-
-	pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
-
-	temp &= 0xfff00000;
-
-	intel_private.registers = ioremap(temp, 128 * 4096);
-	if (!intel_private.registers) 
-		return -ENOMEM;
-
-	intel_i965_get_gtt_range(&gtt_offset);
-	intel_private.gtt_bus_addr = temp + gtt_offset;
-	temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
-
-	ret = intel_gtt_init();
-	if (ret != 0)
-		return ret;
-
-	agp_bridge->gatt_table = NULL;
-
-	agp_bridge->gatt_bus_addr = temp;
-
-	return 0;
-}
-
 static const struct agp_bridge_driver intel_810_driver = {
 	.owner			= THIS_MODULE,
 	.aperture_sizes		= intel_i810_sizes,
@@ -1479,7 +1440,7 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.masks			= intel_i810_masks,
 	.agp_enable		= intel_fake_agp_enable,
 	.cache_flush		= global_cache_flush,
-	.create_gatt_table	= intel_i965_create_gatt_table,
+	.create_gatt_table	= intel_i915_create_gatt_table,
 	.free_gatt_table	= intel_fake_agp_free_gatt_table,
 	.insert_memory		= intel_i915_insert_entries,
 	.remove_memory		= intel_i915_remove_entries,
@@ -1512,7 +1473,7 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.masks			= intel_i810_masks,
 	.agp_enable		= intel_fake_agp_enable,
 	.cache_flush		= global_cache_flush,
-	.create_gatt_table	= intel_i965_create_gatt_table,
+	.create_gatt_table	= intel_i915_create_gatt_table,
 	.free_gatt_table	= intel_fake_agp_free_gatt_table,
 	.insert_memory		= intel_i915_insert_entries,
 	.remove_memory		= intel_i915_remove_entries,
@@ -1571,27 +1532,34 @@ static const struct intel_gtt_driver i8xx_gtt_driver = {
 };
 static const struct intel_gtt_driver i915_gtt_driver = {
 	.gen = 3,
+	.setup = i9xx_setup,
 };
 static const struct intel_gtt_driver g33_gtt_driver = {
 	.gen = 3,
 	.is_g33 = 1,
+	.setup = i9xx_setup,
 };
 static const struct intel_gtt_driver pineview_gtt_driver = {
 	.gen = 3,
 	.is_pineview = 1, .is_g33 = 1,
+	.setup = i9xx_setup,
 };
 static const struct intel_gtt_driver i965_gtt_driver = {
 	.gen = 4,
+	.setup = i9xx_setup,
 };
 static const struct intel_gtt_driver g4x_gtt_driver = {
 	.gen = 5,
+	.setup = i9xx_setup,
 };
 static const struct intel_gtt_driver ironlake_gtt_driver = {
 	.gen = 5,
 	.is_ironlake = 1,
+	.setup = i9xx_setup,
 };
 static const struct intel_gtt_driver sandybridge_gtt_driver = {
 	.gen = 6,
+	.setup = i9xx_setup,
 };
 
 /* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
-- 
1.7.2.2

  parent reply	other threads:[~2010-09-01 20:29 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-09-01 20:29 [PATCH 00/23] intel gtt rework, part 1: initialization Daniel Vetter
2010-09-01 20:29 ` [PATCH 01/23] agp/intel: split out gmch/gtt probe, part 2 Daniel Vetter
2010-09-01 20:29 ` [PATCH 02/23] agp/intel: make intel-gtt.c into a real source file Daniel Vetter
2010-09-01 20:29 ` [PATCH 03/23] intel-gtt: introduce drm/intel-gtt.h Daniel Vetter
2010-09-01 20:29 ` [PATCH 04/23] intel-gtt: store a local pointer to the bridge pci dev Daniel Vetter
2010-09-01 20:29 ` [PATCH 05/23] intel-gtt: s/intel_i830_init_gtt_entries/intel_gtt_stolen_entries Daniel Vetter
2010-09-01 20:29 ` [PATCH 06/23] intel-gtt: new function intel_gtt_mappable_entries Daniel Vetter
2010-09-01 20:29 ` [PATCH 07/23] intel-gtt: generic intel_fake_agp_fetch_size Daniel Vetter
2010-09-01 20:29 ` [PATCH 08/23] intel-gtt: sane variable names for intel_gtt_stolen_entries Daniel Vetter
2010-09-01 20:29 ` [PATCH 09/23] intel-gtt: drop unnecessary conditions in intel_gtt_stolen_entries Daniel Vetter
2010-09-01 20:29 ` [PATCH 10/23] intel-gtt: adjust overhead entries " Daniel Vetter
2010-09-01 20:29 ` [PATCH 11/23] intel-gtt: s/i8[13]0/fake_agp for generic functions Daniel Vetter
2010-09-01 20:29 ` [PATCH 12/23] intel-gtt: fix gtt_total_entries detection Daniel Vetter
2010-09-01 20:30 ` [PATCH 13/23] intel-gtt: introduce intel_gtt_driver Daniel Vetter
2010-09-01 20:30 ` [PATCH 14/23] intel-gtt: i915: use detected gtt size for mapping Daniel Vetter
2010-09-01 20:30 ` [PATCH 15/23] intel-gtt: i965: " Daniel Vetter
2010-09-01 20:30 ` [PATCH 16/23] intel-gtt: i830: adjust ioremap of regs and gtt to i9xx Daniel Vetter
2010-09-01 20:30 ` [PATCH 17/23] intel-gtt: consolidate the gtt ioremap calls Daniel Vetter
2010-09-01 20:30 ` [PATCH 18/23] intel-gtt: consolidate i830 setup Daniel Vetter
2010-09-01 20:30 ` Daniel Vetter [this message]
2010-09-01 20:30 ` [PATCH 20/23] intel-gtt: call init_gtt_init in probe function Daniel Vetter
2010-09-01 20:30 ` [PATCH 21/23] intel-gtt: use chipset generation number some more Daniel Vetter
2010-09-01 20:30 ` [PATCH 22/23] drm/i915: drop prealloc_start from i915_dma.c gtt init Daniel Vetter
2010-09-01 20:30 ` [PATCH 23/23] drm/i915: die, i915_probe_agp, die Daniel Vetter
2010-09-05 16:10   ` Chris Wilson
2010-09-02  1:19 ` [PATCH 00/23] intel gtt rework, part 1: initialization Dave Airlie
2010-09-02 11:20 ` Chris Wilson

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