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From: Keith Packard <keithp@keithp.com>
To: Dave Airlie <airlied@redhat.com>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	intel-gfx@lists.freedesktop.org,
	Keith Packard <keithp@keithp.com>
Subject: [PATCH 7/9] drm/i915: Use CK505 as non-SSC source where available
Date: Mon, 26 Sep 2011 23:11:44 -0700	[thread overview]
Message-ID: <1317103906-4649-8-git-send-email-keithp@keithp.com> (raw)
In-Reply-To: <1317103906-4649-1-git-send-email-keithp@keithp.com>

This eliminates VGA shimmer on some Ironlake machines which have a
CK505 clock source.

Signed-off-by: Keith Packard <keithp@keithp.com>
---
 drivers/gpu/drm/i915/intel_display.c |   12 +++++++++---
 1 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f999935..66cd351 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5137,8 +5137,10 @@ static void ironlake_update_pch_refclk(struct drm_device *dev)
 			break;
 		}
 	}
-	DRM_DEBUG_KMS("has_panel %d has_lvds %d has_pch_edp %d has_cpu_edp %d\n",
-		      has_panel, has_lvds, has_pch_edp, has_cpu_edp);
+
+	DRM_DEBUG_KMS("has_panel %d has_lvds %d has_pch_edp %d has_cpu_edp %d has_ck505 %d\n",
+		      has_panel, has_lvds, has_pch_edp, has_cpu_edp,
+		      dev_priv->display_clock_mode);  
 
 	/* Ironlake: try to setup display ref clock before DPLL
 	 * enabling. This is only under driver's control after
@@ -5148,7 +5150,11 @@ static void ironlake_update_pch_refclk(struct drm_device *dev)
 	temp = I915_READ(PCH_DREF_CONTROL);
 	/* Always enable nonspread source */
 	temp &= ~DREF_NONSPREAD_SOURCE_MASK;
-	temp |= DREF_NONSPREAD_SOURCE_ENABLE;
+
+	if (dev_priv->display_clock_mode)
+		temp |= DREF_NONSPREAD_CK505_ENABLE;
+	else
+		temp |= DREF_NONSPREAD_SOURCE_ENABLE;
 
 	if (has_panel) {
 		temp &= ~DREF_SSC_SOURCE_MASK;
-- 
1.7.6.3


  parent reply	other threads:[~2011-09-27  6:12 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-22 18:13 [PATCH] drm/i915: add missing "break" przanoni
2011-09-22 19:55 ` Keith Packard
2011-09-23  2:43   ` Jesse Barnes
2011-09-23  4:35     ` Keith Packard
2011-09-23 12:06       ` Paulo Zanoni
2011-09-23 16:15         ` Keith Packard
2011-09-23 16:30           ` Paulo Zanoni
2011-09-23 19:07           ` Chris Wilson
2011-09-26 20:56             ` Keith Packard
2011-09-26 23:05               ` Keith Packard
2011-09-27  6:11                 ` PCH reference clock cleanups Keith Packard
2011-09-27  6:11                   ` [PATCH 1/9] drm/i915: broken copyright encoding in intel_bios.c Keith Packard
2011-09-27  6:11                   ` [PATCH 2/9] drm/i915: Use DRM_DEBUG_KMS for all messages " Keith Packard
2011-09-27 16:39                     ` Chris Wilson
2011-09-27 16:39                       ` Chris Wilson
2011-09-27  6:11                   ` [PATCH 3/9] drv/i915: Pull display_clock_mode out of VBT table Keith Packard
2011-09-27 16:40                     ` Chris Wilson
2011-09-27 16:40                       ` Chris Wilson
2011-09-27  6:11                   ` [PATCH 4/9] drm/i915: Document a few more BDB_GENERAL_FEATURES bits from PCH BIOS Keith Packard
2011-09-27  6:11                   ` [PATCH 5/9] drm/i915: Allow SSC parameter to override VBT value Keith Packard
2011-09-27 16:41                     ` Chris Wilson
2011-09-27 16:41                       ` Chris Wilson
2011-09-27  6:11                   ` [PATCH 6/9] drm/i915: Fix PCH SSC reference clock settings Keith Packard
2011-09-27 16:47                     ` Chris Wilson
2011-09-27 16:47                       ` Chris Wilson
2011-09-27 18:03                       ` Keith Packard
2011-09-28  9:09                         ` Chris Wilson
2011-09-28 16:36                           ` Keith Packard
2011-09-27  6:11                   ` Keith Packard [this message]
2011-09-27 16:49                     ` [PATCH 7/9] drm/i915: Use CK505 as non-SSC source where available Chris Wilson
2011-09-27 16:49                       ` Chris Wilson
2011-09-27  6:11                   ` [PATCH 8/9] drm/i915: All PCH refclks are 120MHz Keith Packard
2011-09-27 16:53                     ` Chris Wilson
2011-09-27 16:53                       ` Chris Wilson
2011-09-27  6:11                   ` [PATCH 9/9] drm/i915: Initialize PCH refclks at modeset init time Keith Packard
2011-09-27 16:56                     ` Chris Wilson
2011-09-27 16:56                       ` Chris Wilson
2011-09-27 18:11                       ` Keith Packard
2011-10-03 21:12                         ` [Intel-gfx] " Jesse Barnes
2011-09-28 23:15                     ` Keith Packard
2011-09-27  9:01                   ` PCH reference clock cleanups Chris Wilson
2011-09-27  9:01                     ` Chris Wilson
2011-09-27 16:54                     ` Keith Packard
2011-09-28 18:22                   ` [Intel-gfx] " Paulo Zanoni
2011-09-28 20:02                     ` Keith Packard
2011-10-03 21:14                     ` Jesse Barnes
2011-10-03 21:14                       ` Jesse Barnes
2011-10-03 23:18                       ` [Intel-gfx] " Keith Packard
2011-10-03 23:21                         ` Jesse Barnes
2011-10-03 23:39                           ` Keith Packard

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