From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Keith Packard <keithp@keithp.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915: add missing "break"
Date: Fri, 23 Sep 2011 08:13:15 +0530 [thread overview]
Message-ID: <20110923081315.7a327fcd@jbarnes-x220> (raw)
In-Reply-To: <yunr5381hed.fsf@aiko.keithp.com>
On Thu, 22 Sep 2011 12:55:22 -0700
Keith Packard <keithp@keithp.com> wrote:
> On Thu, 22 Sep 2011 15:13:42 -0300, przanoni@gmail.com wrote:
>
> > It seems to be missing from this commit:
> > "drm/i915: split out PCH refclk update code"
>
> Oh, this code is missing far more than that. It doesn't deal with the
> LVDS case at all.
>
> Here's a patch which turns on the right bits of SSC, in the right
> order, for any combination of CPU-eDP, PCH-eDP and LVDS.
>
> Jesse: you wrote this stuff, can you review what I did? Also, my two
> SNB systems (X220 and MacBook Air) both have a BIOS table that
> disables SSC, is there any reason for us to believe the BIOS table on
> a PCH system? Can't we always use SSC?
I think it depends on the platform. On some, enabling SSC may actually
create more noise than not for some components (not that I've run the
EMF calculations...).
I don't have this code in my tree though... is this the patch I sent
awhile back? I thought it broke external outputs too? The last time
we touched this we broke the dual head case (a config change caused one
head to go blank), did you test that?
What I don't understand about the refclk code is that we should be able
to leave everything enabled and just select the right clock source in
the DPLL_SEL bits. But that doesn't seem to help the wavy VGA bug,
since in that case I think we're explicitly choosing the non-SSC clock
and we still get waviness.
I *think* the code you changed is ok; just needs lots of testing and
verification that the SSC bits are set like we expect as we change
configurations. I like the "has_panel" cleanup too; previous versions
of this code had is_lvds || is_edp && pch_edp etc sprinkled all over.
Jesse
next prev parent reply other threads:[~2011-09-23 2:43 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-22 18:13 [PATCH] drm/i915: add missing "break" przanoni
2011-09-22 19:55 ` Keith Packard
2011-09-23 2:43 ` Jesse Barnes [this message]
2011-09-23 4:35 ` Keith Packard
2011-09-23 12:06 ` Paulo Zanoni
2011-09-23 16:15 ` Keith Packard
2011-09-23 16:30 ` Paulo Zanoni
2011-09-23 19:07 ` Chris Wilson
2011-09-26 20:56 ` Keith Packard
2011-09-26 23:05 ` Keith Packard
2011-09-27 6:11 ` PCH reference clock cleanups Keith Packard
2011-09-27 6:11 ` [PATCH 1/9] drm/i915: broken copyright encoding in intel_bios.c Keith Packard
2011-09-27 6:11 ` [PATCH 2/9] drm/i915: Use DRM_DEBUG_KMS for all messages " Keith Packard
2011-09-27 16:39 ` Chris Wilson
2011-09-27 16:39 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 3/9] drv/i915: Pull display_clock_mode out of VBT table Keith Packard
2011-09-27 16:40 ` Chris Wilson
2011-09-27 16:40 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 4/9] drm/i915: Document a few more BDB_GENERAL_FEATURES bits from PCH BIOS Keith Packard
2011-09-27 6:11 ` [PATCH 5/9] drm/i915: Allow SSC parameter to override VBT value Keith Packard
2011-09-27 16:41 ` Chris Wilson
2011-09-27 16:41 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 6/9] drm/i915: Fix PCH SSC reference clock settings Keith Packard
2011-09-27 16:47 ` Chris Wilson
2011-09-27 16:47 ` Chris Wilson
2011-09-27 18:03 ` Keith Packard
2011-09-28 9:09 ` Chris Wilson
2011-09-28 16:36 ` Keith Packard
2011-09-27 6:11 ` [PATCH 7/9] drm/i915: Use CK505 as non-SSC source where available Keith Packard
2011-09-27 16:49 ` Chris Wilson
2011-09-27 16:49 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 8/9] drm/i915: All PCH refclks are 120MHz Keith Packard
2011-09-27 16:53 ` Chris Wilson
2011-09-27 16:53 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 9/9] drm/i915: Initialize PCH refclks at modeset init time Keith Packard
2011-09-27 16:56 ` Chris Wilson
2011-09-27 16:56 ` Chris Wilson
2011-09-27 18:11 ` Keith Packard
2011-10-03 21:12 ` [Intel-gfx] " Jesse Barnes
2011-09-28 23:15 ` Keith Packard
2011-09-27 9:01 ` PCH reference clock cleanups Chris Wilson
2011-09-27 9:01 ` Chris Wilson
2011-09-27 16:54 ` Keith Packard
2011-09-28 18:22 ` [Intel-gfx] " Paulo Zanoni
2011-09-28 20:02 ` Keith Packard
2011-10-03 21:14 ` Jesse Barnes
2011-10-03 21:14 ` Jesse Barnes
2011-10-03 23:18 ` [Intel-gfx] " Keith Packard
2011-10-03 23:21 ` Jesse Barnes
2011-10-03 23:39 ` Keith Packard
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