From: Keith Packard <keithp@keithp.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: add missing "break"
Date: Mon, 26 Sep 2011 13:56:17 -0700 [thread overview]
Message-ID: <yunehz3kopa.fsf@aiko.keithp.com> (raw)
In-Reply-To: <e39f63$22rqp1@fmsmga002.fm.intel.com>
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On Fri, 23 Sep 2011 20:07:52 +0100, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Fri, 23 Sep 2011 09:15:05 -0700, Keith Packard <keithp@keithp.com> wrote:
> > What I didn't find there was any mention of the display_clock_mode
> > field; perhaps jbarnes has newer VBIOS sources or actual BDB
> > documentation.
>
> iirc display_clock_mode was found in the Capella VBIOS assembly, so
> indeed comparatively ancient.
Ok, so it appears to have disappeared in more recent hardware. I'm
betting that with PCH hardware, there is always a CK505 source to use,
so the BIOS just uses it unconditionally and may not actually be
configured in the VBT.
> I do enjoy how our best guides for programming the hardware comes from
> RE the bioses. :(
It's not the best, it's just yet another source of information :-)
So, what I think we should be doing is using display_clock_mode to
select between ck505 and internal clock source on pre-PCH hardware. For
PCH hardware, we unconditionally use the ck505 source for the non-SSC
reference. When we need to drive two outputs and are *not* using ck505,
then we disable SSC.
Seem reasonable?
--
keith.packard@intel.com
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next prev parent reply other threads:[~2011-09-26 20:56 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-22 18:13 [PATCH] drm/i915: add missing "break" przanoni
2011-09-22 19:55 ` Keith Packard
2011-09-23 2:43 ` Jesse Barnes
2011-09-23 4:35 ` Keith Packard
2011-09-23 12:06 ` Paulo Zanoni
2011-09-23 16:15 ` Keith Packard
2011-09-23 16:30 ` Paulo Zanoni
2011-09-23 19:07 ` Chris Wilson
2011-09-26 20:56 ` Keith Packard [this message]
2011-09-26 23:05 ` Keith Packard
2011-09-27 6:11 ` PCH reference clock cleanups Keith Packard
2011-09-27 6:11 ` [PATCH 1/9] drm/i915: broken copyright encoding in intel_bios.c Keith Packard
2011-09-27 6:11 ` [PATCH 2/9] drm/i915: Use DRM_DEBUG_KMS for all messages " Keith Packard
2011-09-27 16:39 ` Chris Wilson
2011-09-27 16:39 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 3/9] drv/i915: Pull display_clock_mode out of VBT table Keith Packard
2011-09-27 16:40 ` Chris Wilson
2011-09-27 16:40 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 4/9] drm/i915: Document a few more BDB_GENERAL_FEATURES bits from PCH BIOS Keith Packard
2011-09-27 6:11 ` [PATCH 5/9] drm/i915: Allow SSC parameter to override VBT value Keith Packard
2011-09-27 16:41 ` Chris Wilson
2011-09-27 16:41 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 6/9] drm/i915: Fix PCH SSC reference clock settings Keith Packard
2011-09-27 16:47 ` Chris Wilson
2011-09-27 16:47 ` Chris Wilson
2011-09-27 18:03 ` Keith Packard
2011-09-28 9:09 ` Chris Wilson
2011-09-28 16:36 ` Keith Packard
2011-09-27 6:11 ` [PATCH 7/9] drm/i915: Use CK505 as non-SSC source where available Keith Packard
2011-09-27 16:49 ` Chris Wilson
2011-09-27 16:49 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 8/9] drm/i915: All PCH refclks are 120MHz Keith Packard
2011-09-27 16:53 ` Chris Wilson
2011-09-27 16:53 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 9/9] drm/i915: Initialize PCH refclks at modeset init time Keith Packard
2011-09-27 16:56 ` Chris Wilson
2011-09-27 16:56 ` Chris Wilson
2011-09-27 18:11 ` Keith Packard
2011-10-03 21:12 ` [Intel-gfx] " Jesse Barnes
2011-09-28 23:15 ` Keith Packard
2011-09-27 9:01 ` PCH reference clock cleanups Chris Wilson
2011-09-27 9:01 ` Chris Wilson
2011-09-27 16:54 ` Keith Packard
2011-09-28 18:22 ` [Intel-gfx] " Paulo Zanoni
2011-09-28 20:02 ` Keith Packard
2011-10-03 21:14 ` Jesse Barnes
2011-10-03 21:14 ` Jesse Barnes
2011-10-03 23:18 ` [Intel-gfx] " Keith Packard
2011-10-03 23:21 ` Jesse Barnes
2011-10-03 23:39 ` Keith Packard
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