[PATCH 1/3] gpio: langwell: use devm_* helpers to simplify probe

[PATCH 1/3] gpio: langwell: use devm_* helpers to simplify probe

[Mika Westerberg]

Use devm_* helper functions where possible to make the error handling in
the probe function simpler.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/gpio/gpio-langwell.c |   18 +++++++-----------
 1 files changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
index 00692e8..0bea41b 100644
--- a/drivers/gpio/gpio-langwell.c
+++ b/drivers/gpio/gpio-langwell.c
@@ -309,7 +309,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
 
 	retval = pci_enable_device(pdev);
 	if (retval)
-		goto done;
+		return retval;
 
 	retval = pci_request_regions(pdev, "langwell_gpio");
 	if (retval) {
@@ -331,18 +331,18 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
 	/* get the register base from bar0 */
 	start = pci_resource_start(pdev, 0);
 	len = pci_resource_len(pdev, 0);
-	base = ioremap_nocache(start, len);
+	base = devm_ioremap_nocache(&pdev->dev, start, len);
 	if (!base) {
 		dev_err(&pdev->dev, "error mapping bar0\n");
 		retval = -EFAULT;
 		goto err3;
 	}
 
-	lnw = kzalloc(sizeof(struct lnw_gpio), GFP_KERNEL);
+	lnw = devm_kzalloc(&pdev->dev, sizeof(struct lnw_gpio), GFP_KERNEL);
 	if (!lnw) {
 		dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n");
 		retval = -ENOMEM;
-		goto err4;
+		goto err3;
 	}
 	lnw->reg_base = base;
 	lnw->irq_base = irq_base;
@@ -361,7 +361,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
 	retval = gpiochip_add(&lnw->chip);
 	if (retval) {
 		dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval);
-		goto err5;
+		goto err3;
 	}
 	irq_set_handler_data(pdev->irq, lnw);
 	irq_set_chained_handler(pdev->irq, lnw_irq_handler);
@@ -376,16 +376,12 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
 	pm_runtime_put_noidle(&pdev->dev);
 	pm_runtime_allow(&pdev->dev);
 
-	goto done;
-err5:
-	kfree(lnw);
-err4:
-	iounmap(base);
+	return 0;
+
 err3:
 	pci_release_regions(pdev);
 err2:
 	pci_disable_device(pdev);
-done:
 	return retval;
 }
 
-- 
1.7.9.1

[PATCH 2/3] gpio: langwell: allocate IRQ descriptors dynamically for SPARSE_IRQ

[Mika Westerberg]

Since x86 is using SPARSE_IRQ by default nowadays it means that we need to
allocate IRQ descriptors dynamically using irq_alloc_descs() otherwise the
genirq code fails to convert our irq numbers to suitable descriptors.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/gpio/gpio-langwell.c |   16 +++++++++++++---
 1 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
index 0bea41b..bc15ae3 100644
--- a/drivers/gpio/gpio-langwell.c
+++ b/drivers/gpio/gpio-langwell.c
@@ -306,6 +306,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
 	u32 irq_base;
 	u32 gpio_base;
 	int retval = 0;
+	int ngpio = id->driver_data;
 
 	retval = pci_enable_device(pdev);
 	if (retval)
@@ -344,8 +345,15 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
 		retval = -ENOMEM;
 		goto err3;
 	}
+
+	retval = irq_alloc_descs(-1, irq_base, ngpio, 0);
+	if (retval < 0) {
+		dev_err(&pdev->dev, "can't allocate IRQ descs\n");
+		goto err3;
+	}
+	lnw->irq_base = retval;
+
 	lnw->reg_base = base;
-	lnw->irq_base = irq_base;
 	lnw->chip.label = dev_name(&pdev->dev);
 	lnw->chip.request = lnw_gpio_request;
 	lnw->chip.direction_input = lnw_gpio_direction_input;
@@ -354,14 +362,14 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
 	lnw->chip.set = lnw_gpio_set;
 	lnw->chip.to_irq = lnw_gpio_to_irq;
 	lnw->chip.base = gpio_base;
-	lnw->chip.ngpio = id->driver_data;
+	lnw->chip.ngpio = ngpio;
 	lnw->chip.can_sleep = 0;
 	lnw->pdev = pdev;
 	pci_set_drvdata(pdev, lnw);
 	retval = gpiochip_add(&lnw->chip);
 	if (retval) {
 		dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval);
-		goto err3;
+		goto err4;
 	}
 	irq_set_handler_data(pdev->irq, lnw);
 	irq_set_chained_handler(pdev->irq, lnw_irq_handler);
@@ -378,6 +386,8 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
 
 	return 0;
 
+err4:
+	irq_free_descs(lnw->irq_base, ngpio);
 err3:
 	pci_release_regions(pdev);
 err2:
-- 
1.7.9.1

[PATCH 3/3] gpio: langwell: clear IRQ edge detect registers at init

[Mika Westerberg]

The boot firmware might leave the registers configured causing interrupts
to happen even when no handler for them is yet registered. Fix this by
clearing the IRQ edge detect registers at init.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/gpio/gpio-langwell.c |   21 +++++++++++++++++++++
 1 files changed, 21 insertions(+), 0 deletions(-)

diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
index bc15ae3..52f00d3 100644
--- a/drivers/gpio/gpio-langwell.c
+++ b/drivers/gpio/gpio-langwell.c
@@ -263,6 +263,24 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc)
 	chip->irq_eoi(data);
 }
 
+static void lnw_irq_init_hw(struct lnw_gpio *lnw)
+{
+	void __iomem *reg;
+	unsigned base;
+
+	for (base = 0; base < lnw->chip.ngpio; base += 32) {
+		/* Clear the rising-edge detect register */
+		reg = gpio_reg(&lnw->chip, base, GRER);
+		writel(0, reg);
+		/* Clear the falling-edge detect register */
+		reg = gpio_reg(&lnw->chip, base, GFER);
+		writel(0, reg);
+		/* Clear the edge detect status register */
+		reg = gpio_reg(&lnw->chip, base, GEDR);
+		writel(~0, reg);
+	}
+}
+
 #ifdef CONFIG_PM
 static int lnw_gpio_runtime_resume(struct device *dev)
 {
@@ -371,6 +389,9 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
 		dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval);
 		goto err4;
 	}
+
+	lnw_irq_init_hw(lnw);
+
 	irq_set_handler_data(pdev->irq, lnw);
 	irq_set_chained_handler(pdev->irq, lnw_irq_handler);
 	for (i = 0; i < lnw->chip.ngpio; i++) {
-- 
1.7.9.1

Re: [PATCH 1/3] gpio: langwell: use devm_* helpers to simplify probe

[Grant Likely]

On Thu,  5 Apr 2012 12:15:15 +0300, Mika Westerberg <mika.westerberg@linux.intel.com> wrote:
> Use devm_* helper functions where possible to make the error handling in
> the probe function simpler.
> 
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Applied, thanks.

g.

> ---
>  drivers/gpio/gpio-langwell.c |   18 +++++++-----------
>  1 files changed, 7 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
> index 00692e8..0bea41b 100644
> --- a/drivers/gpio/gpio-langwell.c
> +++ b/drivers/gpio/gpio-langwell.c
> @@ -309,7 +309,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>  
>  	retval = pci_enable_device(pdev);
>  	if (retval)
> -		goto done;
> +		return retval;
>  
>  	retval = pci_request_regions(pdev, "langwell_gpio");
>  	if (retval) {
> @@ -331,18 +331,18 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>  	/* get the register base from bar0 */
>  	start = pci_resource_start(pdev, 0);
>  	len = pci_resource_len(pdev, 0);
> -	base = ioremap_nocache(start, len);
> +	base = devm_ioremap_nocache(&pdev->dev, start, len);
>  	if (!base) {
>  		dev_err(&pdev->dev, "error mapping bar0\n");
>  		retval = -EFAULT;
>  		goto err3;
>  	}
>  
> -	lnw = kzalloc(sizeof(struct lnw_gpio), GFP_KERNEL);
> +	lnw = devm_kzalloc(&pdev->dev, sizeof(struct lnw_gpio), GFP_KERNEL);
>  	if (!lnw) {
>  		dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n");
>  		retval = -ENOMEM;
> -		goto err4;
> +		goto err3;
>  	}
>  	lnw->reg_base = base;
>  	lnw->irq_base = irq_base;
> @@ -361,7 +361,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>  	retval = gpiochip_add(&lnw->chip);
>  	if (retval) {
>  		dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval);
> -		goto err5;
> +		goto err3;
>  	}
>  	irq_set_handler_data(pdev->irq, lnw);
>  	irq_set_chained_handler(pdev->irq, lnw_irq_handler);
> @@ -376,16 +376,12 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>  	pm_runtime_put_noidle(&pdev->dev);
>  	pm_runtime_allow(&pdev->dev);
>  
> -	goto done;
> -err5:
> -	kfree(lnw);
> -err4:
> -	iounmap(base);
> +	return 0;
> +
>  err3:
>  	pci_release_regions(pdev);
>  err2:
>  	pci_disable_device(pdev);
> -done:
>  	return retval;
>  }
>  
> -- 
> 1.7.9.1
> 

-- 
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies,Ltd.

Re: [PATCH 2/3] gpio: langwell: allocate IRQ descriptors dynamically for SPARSE_IRQ

[Grant Likely]

On Thu,  5 Apr 2012 12:15:16 +0300, Mika Westerberg <mika.westerberg@linux.intel.com> wrote:
> Since x86 is using SPARSE_IRQ by default nowadays it means that we need to
> allocate IRQ descriptors dynamically using irq_alloc_descs() otherwise the
> genirq code fails to convert our irq numbers to suitable descriptors.
> 
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Applied, thakns.

While you're in this driver, you should look at converting to using an
irq_domain for irq <==> hwirq mapping.  At the very least,
irq_data->hwirq should be used instead of abusing irq_set_chip_data().

g.

> ---
>  drivers/gpio/gpio-langwell.c |   16 +++++++++++++---
>  1 files changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
> index 0bea41b..bc15ae3 100644
> --- a/drivers/gpio/gpio-langwell.c
> +++ b/drivers/gpio/gpio-langwell.c
> @@ -306,6 +306,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>  	u32 irq_base;
>  	u32 gpio_base;
>  	int retval = 0;
> +	int ngpio = id->driver_data;
>  
>  	retval = pci_enable_device(pdev);
>  	if (retval)
> @@ -344,8 +345,15 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>  		retval = -ENOMEM;
>  		goto err3;
>  	}
> +
> +	retval = irq_alloc_descs(-1, irq_base, ngpio, 0);
> +	if (retval < 0) {
> +		dev_err(&pdev->dev, "can't allocate IRQ descs\n");
> +		goto err3;
> +	}
> +	lnw->irq_base = retval;
> +
>  	lnw->reg_base = base;
> -	lnw->irq_base = irq_base;
>  	lnw->chip.label = dev_name(&pdev->dev);
>  	lnw->chip.request = lnw_gpio_request;
>  	lnw->chip.direction_input = lnw_gpio_direction_input;
> @@ -354,14 +362,14 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>  	lnw->chip.set = lnw_gpio_set;
>  	lnw->chip.to_irq = lnw_gpio_to_irq;
>  	lnw->chip.base = gpio_base;
> -	lnw->chip.ngpio = id->driver_data;
> +	lnw->chip.ngpio = ngpio;
>  	lnw->chip.can_sleep = 0;
>  	lnw->pdev = pdev;
>  	pci_set_drvdata(pdev, lnw);
>  	retval = gpiochip_add(&lnw->chip);
>  	if (retval) {
>  		dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval);
> -		goto err3;
> +		goto err4;
>  	}
>  	irq_set_handler_data(pdev->irq, lnw);
>  	irq_set_chained_handler(pdev->irq, lnw_irq_handler);
> @@ -378,6 +386,8 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>  
>  	return 0;
>  
> +err4:
> +	irq_free_descs(lnw->irq_base, ngpio);
>  err3:
>  	pci_release_regions(pdev);
>  err2:
> -- 
> 1.7.9.1
> 

-- 
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies,Ltd.

Re: [PATCH 3/3] gpio: langwell: clear IRQ edge detect registers at init

[Grant Likely]

On Thu,  5 Apr 2012 12:15:17 +0300, Mika Westerberg <mika.westerberg@linux.intel.com> wrote:
> The boot firmware might leave the registers configured causing interrupts
> to happen even when no handler for them is yet registered. Fix this by
> clearing the IRQ edge detect registers at init.
> 
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Applied, thanks

g.

> ---
>  drivers/gpio/gpio-langwell.c |   21 +++++++++++++++++++++
>  1 files changed, 21 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
> index bc15ae3..52f00d3 100644
> --- a/drivers/gpio/gpio-langwell.c
> +++ b/drivers/gpio/gpio-langwell.c
> @@ -263,6 +263,24 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc)
>  	chip->irq_eoi(data);
>  }
>  
> +static void lnw_irq_init_hw(struct lnw_gpio *lnw)
> +{
> +	void __iomem *reg;
> +	unsigned base;
> +
> +	for (base = 0; base < lnw->chip.ngpio; base += 32) {
> +		/* Clear the rising-edge detect register */
> +		reg = gpio_reg(&lnw->chip, base, GRER);
> +		writel(0, reg);
> +		/* Clear the falling-edge detect register */
> +		reg = gpio_reg(&lnw->chip, base, GFER);
> +		writel(0, reg);
> +		/* Clear the edge detect status register */
> +		reg = gpio_reg(&lnw->chip, base, GEDR);
> +		writel(~0, reg);
> +	}
> +}
> +
>  #ifdef CONFIG_PM
>  static int lnw_gpio_runtime_resume(struct device *dev)
>  {
> @@ -371,6 +389,9 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>  		dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval);
>  		goto err4;
>  	}
> +
> +	lnw_irq_init_hw(lnw);
> +
>  	irq_set_handler_data(pdev->irq, lnw);
>  	irq_set_chained_handler(pdev->irq, lnw_irq_handler);
>  	for (i = 0; i < lnw->chip.ngpio; i++) {
> -- 
> 1.7.9.1
> 

-- 
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies,Ltd.

Re: [PATCH 2/3] gpio: langwell: allocate IRQ descriptors dynamically for SPARSE_IRQ

[Mika Westerberg]

On Thu, Apr 05, 2012 at 09:34:14PM -0700, Grant Likely wrote:
> On Thu,  5 Apr 2012 12:15:16 +0300, Mika Westerberg <mika.westerberg@linux.intel.com> wrote:
> > Since x86 is using SPARSE_IRQ by default nowadays it means that we need to
> > allocate IRQ descriptors dynamically using irq_alloc_descs() otherwise the
> > genirq code fails to convert our irq numbers to suitable descriptors.
> > 
> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> 
> Applied, thakns.
> 
> While you're in this driver, you should look at converting to using an
> irq_domain for irq <==> hwirq mapping.  At the very least,
> irq_data->hwirq should be used instead of abusing irq_set_chip_data().

Ok, will do. Thanks.

Re: [PATCH 2/3] gpio: langwell: allocate IRQ descriptors dynamically for SPARSE_IRQ

[Mika Westerberg]

On Thu, Apr 05, 2012 at 09:34:14PM -0700, Grant Likely wrote:
> On Thu,  5 Apr 2012 12:15:16 +0300, Mika Westerberg <mika.westerberg@linux.intel.com> wrote:
> > Since x86 is using SPARSE_IRQ by default nowadays it means that we need to
> > allocate IRQ descriptors dynamically using irq_alloc_descs() otherwise the
> > genirq code fails to convert our irq numbers to suitable descriptors.
> > 
> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> 
> Applied, thakns.
> 

Grant, is there any change getting this particular patch merged for 3.4 as
well? Without this the driver will fail on 3.4.