From: Alex Shi <alex.shi@intel.com>
To: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
arnd@arndb.de, rostedt@goodmis.org, fweisbec@gmail.com
Cc: jeremy@goop.org, riel@redhat.com, luto@mit.edu,
alex.shi@intel.com, avi@redhat.com, len.brown@intel.com,
dhowells@redhat.com, fenghua.yu@intel.com,
borislav.petkov@amd.com, yinghai@kernel.org, ak@linux.intel.com,
cpw@sgi.com, steiner@sgi.com, akpm@linux-foundation.org,
penberg@kernel.org, hughd@google.com, rientjes@google.com,
kosaki.motohiro@jp.fujitsu.com, n-horiguchi@ah.jp.nec.com,
tj@kernel.org, oleg@redhat.com, axboe@kernel.dk,
jmorris@namei.org, a.p.zijlstra@chello.nl,
kamezawa.hiroyu@jp.fujitsu.com, viro@zeniv.linux.org.uk,
linux-kernel@vger.kernel.org, yongjie.ren@intel.com
Subject: [PATCH v5 1/7] x86/tlb: unify TLB_FLUSH_ALL definition
Date: Tue, 15 May 2012 16:55:32 +0800 [thread overview]
Message-ID: <1337072138-8323-2-git-send-email-alex.shi@intel.com> (raw)
In-Reply-To: <1337072138-8323-1-git-send-email-alex.shi@intel.com>
32bits kernel is using ILP32 model. 64 bits kernel is using LP64 model.
So, here TLB_FLUSH_ALL can be defined as '-1UL', that fit in both
x86_32/x86_64 mode.
Thanks for Rob Landley and Peter Avin's infos
http://www.unix.org/whitepapers/64bit.html
http://www.unix.org/version2/whatsnew/lp64_wp.html
Signed-off-by: Alex Shi <alex.shi@intel.com>
---
arch/x86/include/asm/tlbflush.h | 6 +-----
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index c0e108e..7e8a096 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -62,11 +62,7 @@ static inline void __flush_tlb_one(unsigned long addr)
__flush_tlb();
}
-#ifdef CONFIG_X86_32
-# define TLB_FLUSH_ALL 0xffffffff
-#else
-# define TLB_FLUSH_ALL -1ULL
-#endif
+#define TLB_FLUSH_ALL -1UL
/*
* TLB flushing:
--
1.7.5.4
next prev parent reply other threads:[~2012-05-15 8:57 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-15 8:55 [PATCH v5 0/7] tlb flush optimization for x86 Alex Shi
2012-05-15 8:55 ` Alex Shi [this message]
2012-05-15 8:55 ` [PATCH v5 2/7] x86/tlb_info: get last level TLB entry number of CPU Alex Shi
2012-05-15 8:55 ` [PATCH v5 3/7] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range Alex Shi
2012-05-15 8:55 ` [PATCH v5 4/7] x86/tlb: fall back to flush all when meet a THP large page Alex Shi
2012-05-15 8:55 ` [PATCH v5 5/7] x86/tlb: add tlb_flushall_shift for specific CPU Alex Shi
2012-05-16 6:49 ` Alex Shi
2012-05-16 17:55 ` H. Peter Anvin
2012-05-17 1:46 ` Alex Shi
2012-05-15 8:55 ` [PATCH v5 6/7] x86/tlb: optimizing flush_tlb_mm Alex Shi
2012-05-15 9:11 ` Peter Zijlstra
2012-05-15 9:15 ` Nick Piggin
2012-05-15 9:17 ` Nick Piggin
2012-05-15 12:58 ` Luming Yu
2012-05-15 13:06 ` Peter Zijlstra
2012-05-15 13:27 ` Luming Yu
2012-05-15 13:28 ` Alex Shi
2012-05-15 13:33 ` Alex Shi
2012-05-15 13:39 ` Steven Rostedt
2012-05-15 14:04 ` Borislav Petkov
2012-05-15 13:08 ` Luming Yu
2012-05-15 14:07 ` Alex Shi
2012-05-15 9:18 ` Peter Zijlstra
2012-05-15 9:52 ` Nick Piggin
2012-05-15 10:00 ` Peter Zijlstra
2012-05-15 10:06 ` Nick Piggin
2012-05-15 10:13 ` Peter Zijlstra
2012-05-15 14:04 ` Alex Shi
2012-05-15 13:24 ` Alex Shi
2012-05-15 14:36 ` Peter Zijlstra
2012-05-15 14:57 ` Peter Zijlstra
2012-05-15 15:01 ` Alex Shi
2012-05-16 6:46 ` Alex Shi
2012-05-16 6:46 ` Alex Shi
2012-05-16 8:00 ` Peter Zijlstra
2012-05-16 8:04 ` Peter Zijlstra
2012-05-16 8:53 ` Alex Shi
2012-05-16 8:58 ` Peter Zijlstra
2012-05-16 10:58 ` Alex Shi
2012-05-16 11:04 ` Peter Zijlstra
2012-05-16 12:57 ` Alex Shi
2012-05-16 13:34 ` Alex Shi
2012-05-16 13:34 ` Alex Shi
2012-05-16 21:09 ` Peter Zijlstra
2012-05-17 0:43 ` Alex Shi
2012-05-17 2:07 ` Steven Rostedt
2012-05-17 8:04 ` Alex Shi
2012-05-17 2:14 ` Paul Mundt
2012-05-16 13:44 ` Alex Shi
2012-05-15 8:55 ` [PATCH v5 7/7] x86/tlb: add tlb_flushall_shift knob into debugfs Alex Shi
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