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From: Cyril Chemparathy <cyril@ti.com>
To: <linux-arm-kernel@lists.infradead.org>
Cc: <linux-kernel@vger.kernel.org>, <nico@linaro.org>,
	<will.deacon@arm.com>, <catalin.marinas@arm.com>,
	Cyril Chemparathy <cyril@ti.com>,
	Vitaly Andrianov <vitalya@ti.com>
Subject: [RFC 02/23] ARM: LPAE: use signed arithmetic for mask definitions
Date: Mon, 23 Jul 2012 21:09:04 -0400	[thread overview]
Message-ID: <1343092165-9470-3-git-send-email-cyril@ti.com> (raw)
In-Reply-To: <1343092165-9470-1-git-send-email-cyril@ti.com>

This patch applies to PAGE_MASK, PMD_MASK, and PGDIR_MASK, where forcing
unsigned long math truncates the mask at the 32-bits.  This clearly does bad
things on PAE systems.

This patch fixes this problem by defining these masks as signed quantities.
We then rely on sign extension to do the right thing.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
---
 arch/arm/include/asm/page.h           |    7 ++++++-
 arch/arm/include/asm/pgtable-3level.h |    6 +++---
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index ecf9019..1c810d2 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -13,7 +13,12 @@
 /* PAGE_SHIFT determines the page size */
 #define PAGE_SHIFT		12
 #define PAGE_SIZE		(_AC(1,UL) << PAGE_SHIFT)
-#define PAGE_MASK		(~(PAGE_SIZE-1))
+
+/*
+ * We do not use PAGE_SIZE in the following because we rely on sign
+ * extension to appropriately extend upper bits for PAE systems
+ */
+#define PAGE_MASK		(~((1 << PAGE_SHIFT) - 1))
 
 #ifndef __ASSEMBLY__
 
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
index b249035..ae39d11 100644
--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -48,16 +48,16 @@
 #define PMD_SHIFT		21
 
 #define PMD_SIZE		(1UL << PMD_SHIFT)
-#define PMD_MASK		(~(PMD_SIZE-1))
+#define PMD_MASK		(~((1 << PMD_SHIFT) - 1))
 #define PGDIR_SIZE		(1UL << PGDIR_SHIFT)
-#define PGDIR_MASK		(~(PGDIR_SIZE-1))
+#define PGDIR_MASK		(~((1 << PGDIR_SHIFT) - 1))
 
 /*
  * section address mask and size definitions.
  */
 #define SECTION_SHIFT		21
 #define SECTION_SIZE		(1UL << SECTION_SHIFT)
-#define SECTION_MASK		(~(SECTION_SIZE-1))
+#define SECTION_MASK		(~((1 << SECTION_SHIFT) - 1))
 
 #define USER_PTRS_PER_PGD	(PAGE_OFFSET / PGDIR_SIZE)
 
-- 
1.7.9.5


WARNING: multiple messages have this Message-ID (diff)
From: cyril@ti.com (Cyril Chemparathy)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC 02/23] ARM: LPAE: use signed arithmetic for mask definitions
Date: Tue, 24 Jul 2012 01:09:58 -0000	[thread overview]
Message-ID: <1343092165-9470-3-git-send-email-cyril@ti.com> (raw)
In-Reply-To: <1343092165-9470-1-git-send-email-cyril@ti.com>

This patch applies to PAGE_MASK, PMD_MASK, and PGDIR_MASK, where forcing
unsigned long math truncates the mask at the 32-bits.  This clearly does bad
things on PAE systems.

This patch fixes this problem by defining these masks as signed quantities.
We then rely on sign extension to do the right thing.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
---
 arch/arm/include/asm/page.h           |    7 ++++++-
 arch/arm/include/asm/pgtable-3level.h |    6 +++---
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index ecf9019..1c810d2 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -13,7 +13,12 @@
 /* PAGE_SHIFT determines the page size */
 #define PAGE_SHIFT		12
 #define PAGE_SIZE		(_AC(1,UL) << PAGE_SHIFT)
-#define PAGE_MASK		(~(PAGE_SIZE-1))
+
+/*
+ * We do not use PAGE_SIZE in the following because we rely on sign
+ * extension to appropriately extend upper bits for PAE systems
+ */
+#define PAGE_MASK		(~((1 << PAGE_SHIFT) - 1))
 
 #ifndef __ASSEMBLY__
 
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
index b249035..ae39d11 100644
--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -48,16 +48,16 @@
 #define PMD_SHIFT		21
 
 #define PMD_SIZE		(1UL << PMD_SHIFT)
-#define PMD_MASK		(~(PMD_SIZE-1))
+#define PMD_MASK		(~((1 << PMD_SHIFT) - 1))
 #define PGDIR_SIZE		(1UL << PGDIR_SHIFT)
-#define PGDIR_MASK		(~(PGDIR_SIZE-1))
+#define PGDIR_MASK		(~((1 << PGDIR_SHIFT) - 1))
 
 /*
  * section address mask and size definitions.
  */
 #define SECTION_SHIFT		21
 #define SECTION_SIZE		(1UL << SECTION_SHIFT)
-#define SECTION_MASK		(~(SECTION_SIZE-1))
+#define SECTION_MASK		(~((1 << SECTION_SHIFT) - 1))
 
 #define USER_PTRS_PER_PGD	(PAGE_OFFSET / PGDIR_SIZE)
 
-- 
1.7.9.5

  parent reply	other threads:[~2012-07-24  1:09 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-24  1:09 [RFC 00/23] Introducing the TI Keystone platform Cyril Chemparathy
2012-07-24  1:09 ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 01/23] ARM: LPAE: disable phys-to-virt patching on PAE systems Cyril Chemparathy
2012-07-24  1:09   ` Cyril Chemparathy
2012-07-24  9:41   ` Catalin Marinas
2012-07-24  9:41     ` Catalin Marinas
2012-07-24 10:43     ` Cyril Chemparathy
2012-07-24 10:43       ` Cyril Chemparathy
2012-07-24  1:09 ` Cyril Chemparathy [this message]
2012-07-24  1:09   ` [RFC 02/23] ARM: LPAE: use signed arithmetic for mask definitions Cyril Chemparathy
2012-07-24 10:05   ` Catalin Marinas
2012-07-24 10:05     ` Catalin Marinas
2012-07-24 10:52     ` Cyril Chemparathy
2012-07-24 10:52       ` Cyril Chemparathy
2012-07-31 15:35     ` Cyril Chemparathy
2012-07-31 15:35       ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 03/23] ARM: LPAE: use phys_addr_t on virt <--> phys conversion Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24 10:37   ` Catalin Marinas
2012-07-24 10:37     ` Catalin Marinas
2012-07-24 10:55     ` Cyril Chemparathy
2012-07-24 10:55       ` Cyril Chemparathy
2012-07-24 11:02       ` Catalin Marinas
2012-07-24 11:02         ` Catalin Marinas
2012-07-24  1:09 ` [RFC 04/23] ARM: LPAE: use phys_addr_t in alloc_init_pud() Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 05/23] ARM: LPAE: use phys_addr_t in free_memmap() Cyril Chemparathy
2012-07-24  1:09   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 06/23] ARM: LPAE: use phys_addr_t for initrd location and size Cyril Chemparathy
2012-07-24  1:33   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 07/23] ARM: LPAE: use phys_addr_t for membank size Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24 10:04   ` Will Deacon
2012-07-24 10:04     ` Will Deacon
2012-07-24 10:46     ` Cyril Chemparathy
2012-07-24 10:46       ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 08/23] ARM: LPAE: use 64-bit pgd physical address in switch_mm() Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 09/23] ARM: LPAE: use 64-bit accessors for TTBR registers Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 10/23] ARM: mm: use physical addresses in highmem sanity checks Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 11/23] ARM: mm: cleanup checks for membank overlap with vmalloc area Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 12/23] ARM: mm: clean up membank size limit checks Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 13/23] ARM: LPAE: define ARCH_LOW_ADDRESS_LIMIT for bootmem Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 14/23] ARM: LPAE: factor out T1SZ and TTBR1 computations Cyril Chemparathy
2012-07-24  1:38   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 15/23] ARM: LPAE: allow proc override of TTB setup Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 16/23] ARM: LPAE: accomodate >32-bit addresses for page table base Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 17/23] ARM: add machine desc hook for early memory/paging initialization Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24 14:32   ` Arnd Bergmann
2012-07-24 14:32     ` Arnd Bergmann
2012-07-24 14:47     ` Cyril Chemparathy
2012-07-24 14:47       ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 18/23] ARM: add virt_to_idmap for interconnect aliasing Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 19/23] drivers: cma: fix addressing on PAE machines Cyril Chemparathy
2012-07-24  1:38   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 20/23] mm: bootmem: use phys_addr_t for physical addresses Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 21/23] ARM: keystone: introducing TI Keystone platform Cyril Chemparathy
2012-07-24  1:38   ` Cyril Chemparathy
2012-07-24 14:46   ` Arnd Bergmann
2012-07-24 14:46     ` Arnd Bergmann
2012-07-24 17:56     ` Cyril Chemparathy
2012-07-24 17:56       ` Cyril Chemparathy
2012-07-24 18:45       ` Arnd Bergmann
2012-07-24 18:45         ` Arnd Bergmann
2012-07-24  1:09 ` [RFC 22/23] ARM: keystone: enable SMP on Keystone machines Cyril Chemparathy
2012-07-24  1:10   ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 23/23] ARM: keystone: add switch over to high physical address range Cyril Chemparathy
2012-07-24  1:33   ` Cyril Chemparathy
2012-07-24  9:49   ` Catalin Marinas
2012-07-24  9:49     ` Catalin Marinas
2012-07-24 14:39   ` Arnd Bergmann
2012-07-24 14:39     ` Arnd Bergmann
2012-07-24 14:59     ` Cyril Chemparathy
2012-07-24 14:59       ` Cyril Chemparathy
2012-07-24  9:08 ` [RFC 00/23] Introducing the TI Keystone platform Will Deacon
2012-07-24  9:08   ` Will Deacon
2012-07-24 10:41   ` Cyril Chemparathy
2012-07-24 10:41     ` Cyril Chemparathy

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