[U-Boot] [PATCH 0/3] ARM: OMAP4+: Misc Cleanup

[U-Boot] [PATCH 0/3] ARM: OMAP4+: Misc Cleanup

[Lokesh Vutla]

Misc cleanup.
And also adding a Generic bus init and write functions
for PMIC.
This series is applied on top of u-boot-ti:
git://git.denx.de/u-boot-ti.git

Lokesh Vutla (2):
  ARM: OMAP4+: Cleanup header files
  ARM: OMAP4+: pmic: Make generic bus init and write functions

Sricharan R (1):
  ARM: OMAP5: clocks: Do not enable sgx clocks

 arch/arm/cpu/armv7/omap-common/clocks-common.c |    6 ++---
 arch/arm/cpu/armv7/omap-common/vc.c            |   14 ++++++++++-
 arch/arm/cpu/armv7/omap4/hw_data.c             |   11 ++++++++-
 arch/arm/cpu/armv7/omap4/prcm-regs.c           |    3 +++
 arch/arm/cpu/armv7/omap5/hw_data.c             |    9 +++----
 arch/arm/cpu/armv7/omap5/prcm-regs.c           |    2 ++
 arch/arm/include/asm/arch-omap4/clocks.h       |   28 ---------------------
 arch/arm/include/asm/arch-omap4/cpu.h          |   12 ---------
 arch/arm/include/asm/arch-omap4/omap.h         |   14 -----------
 arch/arm/include/asm/arch-omap4/sys_proto.h    |    2 +-
 arch/arm/include/asm/arch-omap5/clocks.h       |   22 -----------------
 arch/arm/include/asm/arch-omap5/cpu.h          |   12 ---------
 arch/arm/include/asm/arch-omap5/omap.h         |   31 +-----------------------
 arch/arm/include/asm/arch-omap5/sys_proto.h    |    2 +-
 arch/arm/include/asm/omap_common.h             |    7 +++---
 board/ti/omap5_uevm/evm.c                      |   12 ++++++---
 board/ti/panda/panda.c                         |   20 +++++++++------
 board/ti/sdp4430/sdp.c                         |   16 +++++++-----
 drivers/usb/musb/omap3.c                       |    4 ++-
 19 files changed, 73 insertions(+), 154 deletions(-)

-- 
1.7.9.5

[U-Boot] [PATCH 1/3] ARM: OMAP4+: Cleanup header files

[Lokesh Vutla]

After having the u-boot clean up series, there are
many definitions that are unused in header files.
Removing all those unused ones.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 arch/arm/cpu/armv7/omap4/prcm-regs.c     |    3 +++
 arch/arm/cpu/armv7/omap5/prcm-regs.c     |    2 ++
 arch/arm/include/asm/arch-omap4/clocks.h |   28 ---------------------------
 arch/arm/include/asm/arch-omap4/cpu.h    |   12 ------------
 arch/arm/include/asm/arch-omap4/omap.h   |   14 --------------
 arch/arm/include/asm/arch-omap5/clocks.h |   22 ---------------------
 arch/arm/include/asm/arch-omap5/cpu.h    |   12 ------------
 arch/arm/include/asm/arch-omap5/omap.h   |   31 +-----------------------------
 arch/arm/include/asm/omap_common.h       |    4 +---
 board/ti/omap5_uevm/evm.c                |   12 ++++++++----
 board/ti/panda/panda.c                   |   20 +++++++++++--------
 board/ti/sdp4430/sdp.c                   |   16 +++++++++------
 drivers/usb/musb/omap3.c                 |    4 +++-
 13 files changed, 40 insertions(+), 140 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap4/prcm-regs.c b/arch/arm/cpu/armv7/omap4/prcm-regs.c
index 7225a30..7e71ca0 100644
--- a/arch/arm/cpu/armv7/omap4/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap4/prcm-regs.c
@@ -301,6 +301,8 @@ struct omap_sys_ctrl_regs const omap4_ctrl = {
 	.control_ldosram_iva_voltage_ctrl	= 0x4A002320,
 	.control_ldosram_mpu_voltage_ctrl	= 0x4A002324,
 	.control_ldosram_core_voltage_ctrl	= 0x4A002328,
+	.control_usbotghs_ctrl			= 0x4A00233C,
+	.control_padconf_core_base		= 0x4A100000,
 	.control_pbiaslite			= 0x4A100600,
 	.control_lpddr2io1_0			= 0x4A100638,
 	.control_lpddr2io1_1			= 0x4A10063C,
@@ -312,4 +314,5 @@ struct omap_sys_ctrl_regs const omap4_ctrl = {
 	.control_lpddr2io2_3			= 0x4A100654,
 	.control_efuse_1			= 0x4A100700,
 	.control_efuse_2			= 0x4A100704,
+	.control_padconf_wkup_base		= 0x4A31E000,
 };
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index e9f6a32..db779f2 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -311,6 +311,7 @@ struct prcm_regs const omap5_es1_prcm = {
 
 struct omap_sys_ctrl_regs const omap5_ctrl = {
 	.control_status				= 0x4A002134,
+	.control_padconf_core_base		= 0x4A002800,
 	.control_paconf_global			= 0x4A002DA0,
 	.control_paconf_mode			= 0x4A002DA4,
 	.control_smart1io_padconf_0		= 0x4A002DA8,
@@ -358,6 +359,7 @@ struct omap_sys_ctrl_regs const omap5_ctrl = {
 	.control_port_emif2_sdram_config	= 0x4AE0C118,
 	.control_emif1_sdram_config_ext		= 0x4AE0C144,
 	.control_emif2_sdram_config_ext		= 0x4AE0C148,
+	.control_padconf_wkup_base		= 0x4AE0C800,
 	.control_smart1nopmio_padconf_0		= 0x4AE0CDA0,
 	.control_smart1nopmio_padconf_1		= 0x4AE0CDA4,
 	.control_padconf_mode			= 0x4AE0CDA8,
diff --git a/arch/arm/include/asm/arch-omap4/clocks.h b/arch/arm/include/asm/arch-omap4/clocks.h
index ed7a1c8..f544edf 100644
--- a/arch/arm/include/asm/arch-omap4/clocks.h
+++ b/arch/arm/include/asm/arch-omap4/clocks.h
@@ -34,25 +34,6 @@
  */
 #define LDELAY		1000000
 
-#define CM_CLKMODE_DPLL_CORE		0x4A004120
-#define CM_CLKMODE_DPLL_PER		0x4A008140
-#define CM_CLKMODE_DPLL_MPU		0x4A004160
-#define CM_CLKSEL_CORE			0x4A004100
-
-/* DPLL register offsets */
-#define CM_CLKMODE_DPLL		0
-#define CM_IDLEST_DPLL		0x4
-#define CM_AUTOIDLE_DPLL	0x8
-#define CM_CLKSEL_DPLL		0xC
-#define CM_DIV_M2_DPLL		0x10
-#define CM_DIV_M3_DPLL		0x14
-#define CM_DIV_M4_DPLL		0x18
-#define CM_DIV_M5_DPLL		0x1C
-#define CM_DIV_M6_DPLL		0x20
-#define CM_DIV_M7_DPLL		0x24
-
-#define DPLL_CLKOUT_DIV_MASK	0x1F /* post-divider mask */
-
 /* CM_DLL_CTRL */
 #define CM_DLL_CTRL_OVERRIDE_SHIFT	0
 #define CM_DLL_CTRL_OVERRIDE_MASK	(1 << 0)
@@ -94,8 +75,6 @@
 #define CM_CLKSEL_DCC_EN_SHIFT			22
 #define CM_CLKSEL_DCC_EN_MASK			(1 << 22)
 
-#define OMAP4_DPLL_MAX_N	127
-
 /* CM_SYS_CLKSEL */
 #define CM_SYS_CLKSEL_SYS_CLKSEL_MASK	7
 
@@ -181,9 +160,7 @@
 #define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK	(1 << 25)
 
 /* Clock frequencies */
-#define OMAP_SYS_CLK_FREQ_38_4_MHZ	38400000
 #define OMAP_SYS_CLK_IND_38_4_MHZ	6
-#define OMAP_32K_CLK_FREQ		32768
 
 /* PRM_VC_VAL_BYPASS */
 #define PRM_VC_I2C_CHANNEL_FREQ_KHZ	400
@@ -234,11 +211,6 @@
 
 #define ALTCLKSRC_MODE_ACTIVE		1
 
-/* Defines for DPLL setup */
-#define DPLL_LOCKED_FREQ_TOLERANCE_0		0
-#define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ	500
-#define DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ	1000
-
 #define DPLL_NO_LOCK	0
 #define DPLL_LOCK	1
 
diff --git a/arch/arm/include/asm/arch-omap4/cpu.h b/arch/arm/include/asm/arch-omap4/cpu.h
index 3a0bfbf..311c6ff 100644
--- a/arch/arm/include/asm/arch-omap4/cpu.h
+++ b/arch/arm/include/asm/arch-omap4/cpu.h
@@ -115,18 +115,6 @@ struct watchdog {
 #define WD_UNLOCK1		0xAAAA
 #define WD_UNLOCK2		0x5555
 
-#define SYSCLKDIV_1		(0x1 << 6)
-#define SYSCLKDIV_2		(0x1 << 7)
-
-#define CLKSEL_GPT1		(0x1 << 0)
-
-#define EN_GPT1			(0x1 << 0)
-#define EN_32KSYNC		(0x1 << 2)
-
-#define ST_WDT2			(0x1 << 5)
-
-#define RESETDONE		(0x1 << 0)
-
 #define TCLR_ST			(0x1 << 0)
 #define TCLR_AR			(0x1 << 1)
 #define TCLR_PRE		(0x1 << 5)
diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index e9a6ffe..2cd034e 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -47,14 +47,6 @@
 #define DRAM_ADDR_SPACE_START	OMAP44XX_DRAM_ADDR_SPACE_START
 #define DRAM_ADDR_SPACE_END	OMAP44XX_DRAM_ADDR_SPACE_END
 
-/* CONTROL */
-#define CTRL_BASE		(OMAP44XX_L4_CORE_BASE + 0x2000)
-#define CONTROL_PADCONF_CORE	(OMAP44XX_L4_CORE_BASE + 0x100000)
-#define CONTROL_PADCONF_WKUP	(OMAP44XX_L4_CORE_BASE + 0x31E000)
-
-/* LPDDR2 IO regs */
-#define LPDDR2_IO_REGS_BASE	0x4A100638
-
 /* CONTROL_ID_CODE */
 #define CONTROL_ID_CODE		0x4A002204
 
@@ -79,15 +71,9 @@
 /* Watchdog Timer2 - MPU watchdog */
 #define WDT2_BASE		(OMAP44XX_L4_WKUP_BASE + 0x14000)
 
-/* 32KTIMER */
-#define SYNC_32KTIMER_BASE	(OMAP44XX_L4_WKUP_BASE + 0x4000)
-
 /* GPMC */
 #define OMAP44XX_GPMC_BASE	0x50000000
 
-/* SYSTEM CONTROL MODULE */
-#define SYSCTRL_GENERAL_CORE_BASE	0x4A002000
-
 /*
  * Hardware Register Details
  */
diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h
index 68afa76..6673a02 100644
--- a/arch/arm/include/asm/arch-omap5/clocks.h
+++ b/arch/arm/include/asm/arch-omap5/clocks.h
@@ -35,19 +35,6 @@
  */
 #define LDELAY		1000000
 
-#define CM_CLKMODE_DPLL_CORE		(OMAP54XX_L4_CORE_BASE + 0x4120)
-#define CM_CLKMODE_DPLL_PER		(OMAP54XX_L4_CORE_BASE + 0x8140)
-#define CM_CLKMODE_DPLL_MPU		(OMAP54XX_L4_CORE_BASE + 0x4160)
-#define CM_CLKSEL_CORE			(OMAP54XX_L4_CORE_BASE + 0x4100)
-
-/* DPLL register offsets */
-#define CM_CLKMODE_DPLL		0
-#define CM_IDLEST_DPLL		0x4
-#define CM_AUTOIDLE_DPLL	0x8
-#define CM_CLKSEL_DPLL		0xC
-
-#define DPLL_CLKOUT_DIV_MASK	0x1F /* post-divider mask */
-
 /* CM_DLL_CTRL */
 #define CM_DLL_CTRL_OVERRIDE_SHIFT		0
 #define CM_DLL_CTRL_OVERRIDE_MASK		(1 << 0)
@@ -93,8 +80,6 @@
 #define CM_CLKSEL_DCC_EN_SHIFT			22
 #define CM_CLKSEL_DCC_EN_MASK			(1 << 22)
 
-#define OMAP4_DPLL_MAX_N	127
-
 /* CM_SYS_CLKSEL */
 #define CM_SYS_CLKSEL_SYS_CLKSEL_MASK	7
 
@@ -195,9 +180,7 @@
 #define RSTTIME1_MASK				(0x3ff << 0)
 
 /* Clock frequencies */
-#define OMAP_SYS_CLK_FREQ_38_4_MHZ	38400000
 #define OMAP_SYS_CLK_IND_38_4_MHZ	6
-#define OMAP_32K_CLK_FREQ		32768
 
 /* PRM_VC_VAL_BYPASS */
 #define PRM_VC_I2C_CHANNEL_FREQ_KHZ	400
@@ -247,11 +230,6 @@
 #define TPS62361_BASE_VOLT_MV	500
 #define TPS62361_VSEL0_GPIO	7
 
-/* Defines for DPLL setup */
-#define DPLL_LOCKED_FREQ_TOLERANCE_0		0
-#define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ	500
-#define DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ	1000
-
 #define DPLL_NO_LOCK	0
 #define DPLL_LOCK	1
 
diff --git a/arch/arm/include/asm/arch-omap5/cpu.h b/arch/arm/include/asm/arch-omap5/cpu.h
index 044ab55..4753f46 100644
--- a/arch/arm/include/asm/arch-omap5/cpu.h
+++ b/arch/arm/include/asm/arch-omap5/cpu.h
@@ -119,18 +119,6 @@ struct watchdog {
 #define WD_UNLOCK1		0xAAAA
 #define WD_UNLOCK2		0x5555
 
-#define SYSCLKDIV_1		(0x1 << 6)
-#define SYSCLKDIV_2		(0x1 << 7)
-
-#define CLKSEL_GPT1		(0x1 << 0)
-
-#define EN_GPT1			(0x1 << 0)
-#define EN_32KSYNC		(0x1 << 2)
-
-#define ST_WDT2			(0x1 << 5)
-
-#define RESETDONE		(0x1 << 0)
-
 #define TCLR_ST			(0x1 << 0)
 #define TCLR_AR			(0x1 << 1)
 #define TCLR_PRE		(0x1 << 5)
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 4f43a90..6dfedf4 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -44,16 +44,8 @@
 #define DRAM_ADDR_SPACE_START	OMAP54XX_DRAM_ADDR_SPACE_START
 #define DRAM_ADDR_SPACE_END	OMAP54XX_DRAM_ADDR_SPACE_END
 
-/* CONTROL */
-#define CTRL_BASE		(OMAP54XX_L4_CORE_BASE + 0x2000)
-#define CONTROL_PADCONF_CORE	(CTRL_BASE + 0x0800)
-#define CONTROL_PADCONF_WKUP	(OMAP54XX_L4_WKUP_BASE + 0xc800)
-
-/* LPDDR2 IO regs. To be verified */
-#define LPDDR2_IO_REGS_BASE	0x4A100638
-
 /* CONTROL_ID_CODE */
-#define CONTROL_ID_CODE		(CTRL_BASE + 0x204)
+#define CONTROL_ID_CODE		0x4A002204
 
 /* To be verified */
 #define OMAP5430_CONTROL_ID_CODE_ES1_0		0x0B94202F
@@ -62,11 +54,6 @@
 #define OMAP5432_CONTROL_ID_CODE_ES2_0          0x1B99802F
 #define DRA752_CONTROL_ID_CODE_ES1_0		0x0B99002F
 
-/* STD_FUSE_PROD_ID_1 */
-#define STD_FUSE_PROD_ID_1		(CTRL_BASE + 0x218)
-#define PROD_ID_1_SILICON_TYPE_SHIFT	16
-#define PROD_ID_1_SILICON_TYPE_MASK	(3 << 16)
-
 /* UART */
 #define UART1_BASE		(OMAP54XX_L4_PER_BASE + 0x6a000)
 #define UART2_BASE		(OMAP54XX_L4_PER_BASE + 0x6c000)
@@ -80,15 +67,9 @@
 /* Watchdog Timer2 - MPU watchdog */
 #define WDT2_BASE		(OMAP54XX_L4_WKUP_BASE + 0x14000)
 
-/* 32KTIMER */
-#define SYNC_32KTIMER_BASE	(OMAP54XX_L4_WKUP_BASE + 0x4000)
-
 /* GPMC */
 #define OMAP54XX_GPMC_BASE	0x50000000
 
-/* SYSTEM CONTROL MODULE */
-#define SYSCTRL_GENERAL_CORE_BASE	0x4A002000
-
 /*
  * Hardware Register Details
  */
@@ -191,16 +172,6 @@ struct s32ktimer {
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE	0x4031F000
 
-/* Silicon revisions */
-#define OMAP4430_SILICON_ID_INVALID	0xFFFFFFFF
-#define OMAP4430_ES1_0	0x44300100
-#define OMAP4430_ES2_0	0x44300200
-#define OMAP4430_ES2_1	0x44300210
-#define OMAP4430_ES2_2	0x44300220
-#define OMAP4430_ES2_3	0x44300230
-#define OMAP4460_ES1_0	0x44600100
-#define OMAP4460_ES1_1	0x44600110
-
 /* CONTROL_SRCOMP_XXX_SIDE */
 #define OVERRIDE_XS_SHIFT		30
 #define OVERRIDE_XS_MASK		(1 << 30)
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index ee7b188..8747bff 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -362,6 +362,7 @@ struct omap_sys_ctrl_regs {
 	u32 control_ldosram_iva_voltage_ctrl;
 	u32 control_ldosram_mpu_voltage_ctrl;
 	u32 control_ldosram_core_voltage_ctrl;
+	u32 control_usbotghs_ctrl;
 	u32 control_padconf_core_base;
 	u32 control_paconf_global;
 	u32 control_paconf_mode;
@@ -546,9 +547,6 @@ void scale_vcores(struct vcores_data const *);
 u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic);
 void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic);
 
-/* Max value for DPLL multiplier M */
-#define OMAP_DPLL_MAX_N	127
-
 /* HW Init Context */
 #define OMAP_INIT_CONTEXT_SPL			0
 #define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR	1
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index 46db1bf..90046e8 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -71,22 +71,26 @@ int misc_init_r(void)
 
 void set_muxconf_regs_essential(void)
 {
-	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential,
+	do_set_mux((*ctrl)->control_padconf_core_base,
+		   core_padconf_array_essential,
 		   sizeof(core_padconf_array_essential) /
 		   sizeof(struct pad_conf_entry));
 
-	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential,
+	do_set_mux((*ctrl)->control_padconf_wkup_base,
+		   wkup_padconf_array_essential,
 		   sizeof(wkup_padconf_array_essential) /
 		   sizeof(struct pad_conf_entry));
 }
 
 void set_muxconf_regs_non_essential(void)
 {
-	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential,
+	do_set_mux((*ctrl)->control_padconf_core_base,
+		   core_padconf_array_non_essential,
 		   sizeof(core_padconf_array_non_essential) /
 		   sizeof(struct pad_conf_entry));
 
-	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential,
+	do_set_mux((*ctrl)->control_padconf_wkup_base,
+		   wkup_padconf_array_non_essential,
 		   sizeof(wkup_padconf_array_non_essential) /
 		   sizeof(struct pad_conf_entry));
 }
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index 2bbe392..4335259 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -139,16 +139,18 @@ int misc_init_r(void)
 
 void set_muxconf_regs_essential(void)
 {
-	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential,
+	do_set_mux((*ctrl)->control_padconf_core_base,
+		   core_padconf_array_essential,
 		   sizeof(core_padconf_array_essential) /
 		   sizeof(struct pad_conf_entry));
 
-	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential,
+	do_set_mux((*ctrl)->control_padconf_wkup_base,
+		   wkup_padconf_array_essential,
 		   sizeof(wkup_padconf_array_essential) /
 		   sizeof(struct pad_conf_entry));
 
 	if (omap_revision() >= OMAP4460_ES1_0)
-		do_set_mux(CONTROL_PADCONF_WKUP,
+		do_set_mux((*ctrl)->control_padconf_wkup_base,
 				 wkup_padconf_array_essential_4460,
 				 sizeof(wkup_padconf_array_essential_4460) /
 				 sizeof(struct pad_conf_entry));
@@ -156,27 +158,29 @@ void set_muxconf_regs_essential(void)
 
 void set_muxconf_regs_non_essential(void)
 {
-	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential,
+	do_set_mux((*ctrl)->control_padconf_core_base,
+		   core_padconf_array_non_essential,
 		   sizeof(core_padconf_array_non_essential) /
 		   sizeof(struct pad_conf_entry));
 
 	if (omap_revision() < OMAP4460_ES1_0)
-		do_set_mux(CONTROL_PADCONF_CORE,
+		do_set_mux((*ctrl)->control_padconf_core_base,
 				core_padconf_array_non_essential_4430,
 				sizeof(core_padconf_array_non_essential_4430) /
 				sizeof(struct pad_conf_entry));
 	else
-		do_set_mux(CONTROL_PADCONF_CORE,
+		do_set_mux((*ctrl)->control_padconf_core_base,
 				core_padconf_array_non_essential_4460,
 				sizeof(core_padconf_array_non_essential_4460) /
 				sizeof(struct pad_conf_entry));
 
-	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential,
+	do_set_mux((*ctrl)->control_padconf_wkup_base,
+		   wkup_padconf_array_non_essential,
 		   sizeof(wkup_padconf_array_non_essential) /
 		   sizeof(struct pad_conf_entry));
 
 	if (omap_revision() < OMAP4460_ES1_0)
-		do_set_mux(CONTROL_PADCONF_WKUP,
+		do_set_mux((*ctrl)->control_padconf_wkup_base,
 				wkup_padconf_array_non_essential_4430,
 				sizeof(wkup_padconf_array_non_essential_4430) /
 				sizeof(struct pad_conf_entry));
diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c
index 4c1a4f7..5dd1ba3 100644
--- a/board/ti/sdp4430/sdp.c
+++ b/board/ti/sdp4430/sdp.c
@@ -72,16 +72,18 @@ int misc_init_r(void)
 
 void set_muxconf_regs_essential(void)
 {
-	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential,
+	do_set_mux((*ctrl)->control_padconf_core_base,
+		   core_padconf_array_essential,
 		   sizeof(core_padconf_array_essential) /
 		   sizeof(struct pad_conf_entry));
 
-	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential,
+	do_set_mux((*ctrl)->control_padconf_wkup_base,
+		   wkup_padconf_array_essential,
 		   sizeof(wkup_padconf_array_essential) /
 		   sizeof(struct pad_conf_entry));
 
 	if (omap_revision() >= OMAP4460_ES1_0)
-		do_set_mux(CONTROL_PADCONF_WKUP,
+		do_set_mux((*ctrl)->control_padconf_wkup_base,
 				 wkup_padconf_array_essential_4460,
 				 sizeof(wkup_padconf_array_essential_4460) /
 				 sizeof(struct pad_conf_entry));
@@ -89,16 +91,18 @@ void set_muxconf_regs_essential(void)
 
 void set_muxconf_regs_non_essential(void)
 {
-	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential,
+	do_set_mux((*ctrl)->control_padconf_core_base,
+		   core_padconf_array_non_essential,
 		   sizeof(core_padconf_array_non_essential) /
 		   sizeof(struct pad_conf_entry));
 
-	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential,
+	do_set_mux((*ctrl)->control_padconf_wkup_base,
+		   wkup_padconf_array_non_essential,
 		   sizeof(wkup_padconf_array_non_essential) /
 		   sizeof(struct pad_conf_entry));
 
 	if (omap_revision() < OMAP4460_ES1_0) {
-		do_set_mux(CONTROL_PADCONF_WKUP,
+		do_set_mux((*ctrl)->control_padconf_wkup_base,
 			wkup_padconf_array_non_essential_4430,
 			sizeof(wkup_padconf_array_non_essential_4430) /
 			sizeof(struct pad_conf_entry));
diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c
index c7876ed..a395ebc 100644
--- a/drivers/usb/musb/omap3.c
+++ b/drivers/usb/musb/omap3.c
@@ -30,6 +30,7 @@
  * MA 02111-1307 USA
  */
 
+#include <asm/omap_common.h>
 #include <twl4030.h>
 #include <twl6030.h>
 #include "omap3.h"
@@ -135,7 +136,8 @@ int musb_platform_init(void)
 #endif
 
 #ifdef CONFIG_OMAP4430
-		u32 *usbotghs_control = (u32 *)(CTRL_BASE + 0x33C);
+		u32 *usbotghs_control =
+			(u32 *)((*ctrl)->control_usbotghs_ctrl);
 		*usbotghs_control = 0x15;
 #endif
 		platform_needs_initialization = 0;
-- 
1.7.9.5

[U-Boot] [PATCH 2/3] ARM: OMAP5: clocks: Do not enable sgx clocks

[Lokesh Vutla]

From: Sricharan R <r.sricharan@ti.com>

SGX clocks should be enabled only for OMAP5 ES1.0.
So this can be removed.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
---
 arch/arm/cpu/armv7/omap5/hw_data.c |    6 ------
 1 file changed, 6 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 604fa42..842cf27 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -383,12 +383,6 @@ void enable_basic_clocks(void)
 			 clk_modules_explicit_en_essential,
 			 1);
 
-	/* Select 384Mhz for GPU as its the POR for ES1.0 */
-	setbits_le32((*prcm)->cm_sgx_sgx_clkctrl,
-			CLKSEL_GPU_HYD_GCLK_MASK);
-	setbits_le32((*prcm)->cm_sgx_sgx_clkctrl,
-			CLKSEL_GPU_CORE_GCLK_MASK);
-
 	/* Enable SCRM OPT clocks for PER and CORE dpll */
 	setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
 			OPTFCLKEN_SCRM_PER_MASK);
-- 
1.7.9.5

[U-Boot] [PATCH 3/3] ARM: OMAP4+: pmic: Make generic bus init and write functions

[Lokesh Vutla]

Voltage scaling can be done in two ways:
-> Using SR I2C
-> Using GP I2C
In order to support both, have a function pointer in pmic_data
so that we can call as per our requirement.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 arch/arm/cpu/armv7/omap-common/clocks-common.c |    6 ++----
 arch/arm/cpu/armv7/omap-common/vc.c            |   14 +++++++++++++-
 arch/arm/cpu/armv7/omap4/hw_data.c             |   11 ++++++++++-
 arch/arm/cpu/armv7/omap5/hw_data.c             |    3 +++
 arch/arm/include/asm/arch-omap4/sys_proto.h    |    2 +-
 arch/arm/include/asm/arch-omap5/sys_proto.h    |    2 +-
 arch/arm/include/asm/omap_common.h             |    3 +++
 7 files changed, 33 insertions(+), 8 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index 99910cd..0daf98c 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -487,6 +487,7 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic)
 	u32 offset = volt_mv;
 	int ret = 0;
 
+	pmic->pmic_bus_init();
 	/* See if we can first get the GPIO if needed */
 	if (pmic->gpio_en)
 		ret = gpio_request(pmic->gpio, "PMIC_GPIO");
@@ -509,8 +510,7 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic)
 	debug("do_scale_vcore: volt - %d offset_code - 0x%x\n", volt_mv,
 		offset_code);
 
-	if (omap_vc_bypass_send_value(SMPS_I2C_SLAVE_ADDR,
-				vcore_reg, offset_code))
+	if (pmic->pmic_write(pmic->i2c_slave_addr, vcore_reg, offset_code))
 		printf("Scaling voltage failed for 0x%x\n", vcore_reg);
 
 	if (pmic->gpio_en)
@@ -525,8 +525,6 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic)
  */
 void scale_vcores(struct vcores_data const *vcores)
 {
-	omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ);
-
 	do_scale_vcore(vcores->core.addr, vcores->core.value,
 					  vcores->core.pmic);
 
diff --git a/arch/arm/cpu/armv7/omap-common/vc.c b/arch/arm/cpu/armv7/omap-common/vc.c
index e6e5f78..911191d 100644
--- a/arch/arm/cpu/armv7/omap-common/vc.c
+++ b/arch/arm/cpu/armv7/omap-common/vc.c
@@ -17,6 +17,7 @@
 #include <common.h>
 #include <asm/omap_common.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/arch/clocks.h>
 
 /*
  * Define Master code if there are multiple masters on the I2C_SR bus.
@@ -57,7 +58,7 @@
  * omap_vc_init() - Initialization for Voltage controller
  * @speed_khz: I2C buspeed in KHz
  */
-void omap_vc_init(u16 speed_khz)
+static void omap_vc_init(u16 speed_khz)
 {
 	u32 val;
 	u32 sys_clk_khz, cycles_hi, cycles_low;
@@ -137,3 +138,14 @@ int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data)
 	/* All good.. */
 	return 0;
 }
+
+void sri2c_init(void)
+{
+	static int sri2c = 1;
+
+	if (sri2c) {
+		omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ);
+		sri2c = 0;
+	}
+	return;
+}
diff --git a/arch/arm/cpu/armv7/omap4/hw_data.c b/arch/arm/cpu/armv7/omap4/hw_data.c
index 06a2fc8..02322cc 100644
--- a/arch/arm/cpu/armv7/omap4/hw_data.c
+++ b/arch/arm/cpu/armv7/omap4/hw_data.c
@@ -219,6 +219,9 @@ struct pmic_data twl6030_4430es1 = {
 	.step = 12660, /* 12.66 mV represented in uV */
 	/* The code starts at 1 not 0 */
 	.start_code = 1,
+	.i2c_slave_addr	= SMPS_I2C_SLAVE_ADDR,
+	.pmic_bus_init	= sri2c_init,
+	.pmic_write	= omap_vc_bypass_send_value,
 };
 
 struct pmic_data twl6030 = {
@@ -226,6 +229,9 @@ struct pmic_data twl6030 = {
 	.step = 12660, /* 12.66 mV represented in uV */
 	/* The code starts at 1 not 0 */
 	.start_code = 1,
+	.i2c_slave_addr	= SMPS_I2C_SLAVE_ADDR,
+	.pmic_bus_init	= sri2c_init,
+	.pmic_write	= omap_vc_bypass_send_value,
 };
 
 struct pmic_data tps62361 = {
@@ -233,7 +239,10 @@ struct pmic_data tps62361 = {
 	.step = 10000, /* 10 mV represented in uV */
 	.start_code = 0,
 	.gpio = TPS62361_VSEL0_GPIO,
-	.gpio_en = 1
+	.gpio_en = 1,
+	.i2c_slave_addr	= SMPS_I2C_SLAVE_ADDR,
+	.pmic_bus_init	= sri2c_init,
+	.pmic_write	= omap_vc_bypass_send_value,
 };
 
 struct vcores_data omap4430_volts_es1 = {
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 842cf27..74e473d 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -289,6 +289,9 @@ struct pmic_data palmas = {
 	 * Offset code 0 switches OFF the SMPS
 	 */
 	.start_code = 6,
+	.i2c_slave_addr	= SMPS_I2C_SLAVE_ADDR,
+	.pmic_bus_init	= sri2c_init,
+	.pmic_write	= omap_vc_bypass_send_value,
 };
 
 struct vcores_data omap5430_volts = {
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index 039a1f2..37d6c69 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -56,7 +56,7 @@ u32 omap_sdram_size(void);
 u32 cortex_rev(void);
 void init_omap_revision(void);
 void do_io_settings(void);
-void omap_vc_init(u16 speed_khz);
+void sri2c_init(void);
 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
 u32 warm_reset(void);
 void force_emif_self_refresh(void);
diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h
index b79161d..32ced5f 100644
--- a/arch/arm/include/asm/arch-omap5/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -60,7 +60,7 @@ u32 omap_sdram_size(void);
 u32 cortex_rev(void);
 void init_omap_revision(void);
 void do_io_settings(void);
-void omap_vc_init(u16 speed_khz);
+void sri2c_init(void);
 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
 u32 warm_reset(void);
 void force_emif_self_refresh(void);
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 8747bff..3f1d31d 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -495,6 +495,9 @@ struct pmic_data {
 	u32 start_code;
 	unsigned gpio;
 	int gpio_en;
+	u32 i2c_slave_addr;
+	void (*pmic_bus_init)(void);
+	int (*pmic_write)(u8 sa, u8 reg_addr, u8 reg_data);
 };
 
 struct volts {
-- 
1.7.9.5

[U-Boot] [PATCH 2/3] ARM: OMAP5: clocks: Do not enable sgx clocks

[Tom Rini]

On Wed, May 29, 2013 at 03:39:54PM +0530, Lokesh Vutla wrote:

> From: Sricharan R <r.sricharan@ti.com>
> 
> SGX clocks should be enabled only for OMAP5 ES1.0.
> So this can be removed.
> 
> Signed-off-by: Sricharan R <r.sricharan@ti.com>
> ---
>  arch/arm/cpu/armv7/omap5/hw_data.c |    6 ------
>  1 file changed, 6 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
> index 604fa42..842cf27 100644
> --- a/arch/arm/cpu/armv7/omap5/hw_data.c
> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c
> @@ -383,12 +383,6 @@ void enable_basic_clocks(void)
>  			 clk_modules_explicit_en_essential,
>  			 1);
>  
> -	/* Select 384Mhz for GPU as its the POR for ES1.0 */
> -	setbits_le32((*prcm)->cm_sgx_sgx_clkctrl,
> -			CLKSEL_GPU_HYD_GCLK_MASK);
> -	setbits_le32((*prcm)->cm_sgx_sgx_clkctrl,
> -			CLKSEL_GPU_CORE_GCLK_MASK);
> -
>  	/* Enable SCRM OPT clocks for PER and CORE dpll */
>  	setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
>  			OPTFCLKEN_SCRM_PER_MASK);

Wait, will everyone with ES1.0 be updating to ES2.0 and be OK with this?
Lubomir's board is ES1.0, currently.  Thanks!

-- 
Tom
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[U-Boot] [PATCH 2/3] ARM: OMAP5: clocks: Do not enable sgx clocks

[Sricharan R]

On Wednesday 29 May 2013 06:10 PM, Tom Rini wrote:
> On Wed, May 29, 2013 at 03:39:54PM +0530, Lokesh Vutla wrote:
>
>> From: Sricharan R <r.sricharan@ti.com>
>>
>> SGX clocks should be enabled only for OMAP5 ES1.0.
>> So this can be removed.
>>
>> Signed-off-by: Sricharan R <r.sricharan@ti.com>
>> ---
>>  arch/arm/cpu/armv7/omap5/hw_data.c |    6 ------
>>  1 file changed, 6 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
>> index 604fa42..842cf27 100644
>> --- a/arch/arm/cpu/armv7/omap5/hw_data.c
>> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c
>> @@ -383,12 +383,6 @@ void enable_basic_clocks(void)
>>  			 clk_modules_explicit_en_essential,
>>  			 1);
>>  
>> -	/* Select 384Mhz for GPU as its the POR for ES1.0 */
>> -	setbits_le32((*prcm)->cm_sgx_sgx_clkctrl,
>> -			CLKSEL_GPU_HYD_GCLK_MASK);
>> -	setbits_le32((*prcm)->cm_sgx_sgx_clkctrl,
>> -			CLKSEL_GPU_CORE_GCLK_MASK);
>> -
>>  	/* Enable SCRM OPT clocks for PER and CORE dpll */
>>  	setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
>>  			OPTFCLKEN_SCRM_PER_MASK);
> Wait, will everyone with ES1.0 be updating to ES2.0 and be OK with this?
> Lubomir's board is ES1.0, currently.  Thanks!
   Even if so, these clocks should/need not be enabled in boot loader.
   It should not have been enabled in, but earlier we had the habit
   enabling unnessecary things..
  
Regards,
 Sricharan