[PATCH v2 0/2] usb: phy: tegra: Read UTMI parameters from device tree

[PATCH v2 0/2] usb: phy: tegra: Read UTMI parameters from device tree

[Mikko Perttunen]

This patchset moves the USB UTMI interface parameters from hardcoded tables
in the PHY driver to device tree and adds code to read them from there.

Mikko Perttunen (2):
  ARM: dts: tegra20: Rename USB UTMI parameters according to new
    definitions
  usb: phy: tegra: Read UTMIP parameters from device tree

 arch/arm/boot/dts/tegra20.dtsi  |  28 ++++-----
 drivers/usb/phy/phy-tegra-usb.c | 129 +++++++++++++++++++++++++++-------------
 2 files changed, 101 insertions(+), 56 deletions(-)

-- 
1.8.1.5

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[PATCH v2 1/2] ARM: dts: tegra20: Rename USB UTMI parameters according to new definitions

[Mikko Perttunen]

This patch changes the Tegra20 USB PHY nodes to use the UTMI configuration
parameter names as specified in the device tree binding documentation
after patch "ARM: tegra: finalize USB EHCI and PHY bindings".

Signed-off-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 arch/arm/boot/dts/tegra20.dtsi | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 9653fd8..e457083 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -477,13 +477,13 @@
 			 <&tegra_car TEGRA20_CLK_USBD>;
 		clock-names = "reg", "pll_u", "timer", "utmi-pads";
 		nvidia,has-legacy-mode;
-		hssync_start_delay = <9>;
-		idle_wait_delay = <17>;
-		elastic_limit = <16>;
-		term_range_adj = <6>;
-		xcvr_setup = <9>;
-		xcvr_lsfslew = <1>;
-		xcvr_lsrslew = <1>;
+		nvidia,hssync-start-delay = <9>;
+		nvidia,idle-wait-delay = <17>;
+		nvidia,elastic-limit = <16>;
+		nvidia,term-range-adj = <6>;
+		nvidia,xcvr-setup = <9>;
+		nvidia,xcvr-lsfslew = <1>;
+		nvidia,xcvr-lsrslew = <1>;
 		status = "disabled";
 	};
 
@@ -527,13 +527,13 @@
 			 <&tegra_car TEGRA20_CLK_CLK_M>,
 			 <&tegra_car TEGRA20_CLK_USBD>;
 		clock-names = "reg", "pll_u", "timer", "utmi-pads";
-		hssync_start_delay = <9>;
-		idle_wait_delay = <17>;
-		elastic_limit = <16>;
-		term_range_adj = <6>;
-		xcvr_setup = <9>;
-		xcvr_lsfslew = <2>;
-		xcvr_lsrslew = <2>;
+		nvidia,hssync-start-delay = <9>;
+		nvidia,idle-wait-delay = <17>;
+		nvidia,elastic-limit = <16>;
+		nvidia,term-range-adj = <6>;
+		nvidia,xcvr-setup = <9>;
+		nvidia,xcvr-lsfslew = <2>;
+		nvidia,xcvr-lsrslew = <2>;
 		status = "disabled";
 	};
 
-- 
1.8.1.5

[PATCH v2 2/2] usb: phy: tegra: Read UTMIP parameters from device tree

[Mikko Perttunen]

UTMIP parameters used to be hardcoded into tables in the
PHY driver. This patch reads them from the device tree instead
in accordance with the phy-tegra-usb DT documentation.

Signed-off-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/usb/phy/phy-tegra-usb.c | 129 +++++++++++++++++++++++++++-------------
 1 file changed, 87 insertions(+), 42 deletions(-)

diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index b3b4809..0352886c 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -185,27 +185,6 @@ static const struct tegra_xtal_freq tegra_freq_table[] = {
 	},
 };
 
-static struct tegra_utmip_config utmip_default[] = {
-	[0] = {
-		.hssync_start_delay = 9,
-		.idle_wait_delay = 17,
-		.elastic_limit = 16,
-		.term_range_adj = 6,
-		.xcvr_setup = 9,
-		.xcvr_lsfslew = 1,
-		.xcvr_lsrslew = 1,
-	},
-	[2] = {
-		.hssync_start_delay = 9,
-		.idle_wait_delay = 17,
-		.elastic_limit = 16,
-		.term_range_adj = 6,
-		.xcvr_setup = 9,
-		.xcvr_lsfslew = 2,
-		.xcvr_lsrslew = 2,
-	},
-};
-
 static void set_pts(struct tegra_usb_phy *phy, u8 pts_val)
 {
 	void __iomem *base = phy->regs;
@@ -727,13 +706,6 @@ static int tegra_usb_phy_init(struct tegra_usb_phy *phy)
 	int i;
 	int err;
 
-	if (!phy->is_ulpi_phy) {
-		if (phy->is_legacy_phy)
-			phy->config = &utmip_default[0];
-		else
-			phy->config = &utmip_default[2];
-	}
-
 	phy->pll_u = devm_clk_get(phy->dev, "pll_u");
 	if (IS_ERR(phy->pll_u)) {
 		pr_err("Can't get pll_u clock\n");
@@ -808,6 +780,88 @@ void tegra_ehci_phy_restore_end(struct usb_phy *x)
 }
 EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_end);
 
+static int read_utmi_param(struct platform_device *pdev, const char *param,
+			   u8 *dest)
+{
+	u32 value;
+	int err = of_property_read_u32(pdev->dev.of_node, param, &value);
+	*dest = (u8)value;
+	if (err < 0)
+		dev_err(&pdev->dev, "Failed to read USB UTMI parameter %s: %d\n",
+			param, err);
+	return err;
+}
+
+static int utmi_phy_probe(struct tegra_usb_phy *tegra_phy,
+			  struct platform_device *pdev)
+{
+	struct resource *res;
+	int err;
+	struct tegra_utmip_config *config;
+
+	tegra_phy->is_ulpi_phy = false;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+	if (!res) {
+		dev_err(&pdev->dev, "Failed to get UTMI Pad regs\n");
+		return  -ENXIO;
+	}
+
+	tegra_phy->pad_regs = devm_ioremap(&pdev->dev, res->start,
+		resource_size(res));
+	if (!tegra_phy->regs) {
+		dev_err(&pdev->dev, "Failed to remap UTMI Pad regs\n");
+		return -ENOMEM;
+	}
+
+	tegra_phy->config = devm_kzalloc(&pdev->dev,
+		sizeof(*tegra_phy->config), GFP_KERNEL);
+	if (!tegra_phy->config) {
+		dev_err(&pdev->dev,
+			"unable to allocate memory for USB UTMIP config\n");
+		return -ENOMEM;
+	}
+
+	config = tegra_phy->config;
+
+	err = read_utmi_param(pdev, "nvidia,hssync-start-delay",
+		&config->hssync_start_delay);
+	if (err < 0)
+		return err;
+
+	err = read_utmi_param(pdev, "nvidia,elastic-limit",
+		&config->elastic_limit);
+	if (err < 0)
+		return err;
+
+	err = read_utmi_param(pdev, "nvidia,idle-wait-delay",
+		&config->idle_wait_delay);
+	if (err < 0)
+		return err;
+
+	err = read_utmi_param(pdev, "nvidia,term-range-adj",
+		&config->term_range_adj);
+	if (err < 0)
+		return err;
+
+	err = read_utmi_param(pdev, "nvidia,xcvr-setup",
+		&config->xcvr_setup);
+	if (err < 0)
+		return err;
+
+	err = read_utmi_param(pdev, "nvidia,xcvr-lsfslew",
+		&config->xcvr_lsfslew);
+	if (err < 0)
+		return err;
+
+	err = read_utmi_param(pdev, "nvidia,xcvr-lsrslew",
+		&config->xcvr_lsrslew);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
 static int tegra_usb_phy_probe(struct platform_device *pdev)
 {
 	struct resource *res;
@@ -839,20 +893,9 @@ static int tegra_usb_phy_probe(struct platform_device *pdev)
 
 	err = of_property_match_string(np, "phy_type", "ulpi");
 	if (err < 0) {
-		tegra_phy->is_ulpi_phy = false;
-
-		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-		if (!res) {
-			dev_err(&pdev->dev, "Failed to get UTMI Pad regs\n");
-			return  -ENXIO;
-		}

Re: [PATCH v2 2/2] usb: phy: tegra: Read UTMIP parameters from device tree

[Stephen Warren]

On 06/26/2013 06:34 AM, Mikko Perttunen wrote:
> UTMIP parameters used to be hardcoded into tables in the
> PHY driver. This patch reads them from the device tree instead
> in accordance with the phy-tegra-usb DT documentation.

This looks fine, although I'd like to have a chance to test all these
patches before actually ack'ing them.
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Re: [PATCH v2 2/2] usb: phy: tegra: Read UTMIP parameters from device tree

[Mikko Perttunen]

On 06/26/2013 08:51 PM, Stephen Warren wrote:
> On 06/26/2013 06:34 AM, Mikko Perttunen wrote:
>> UTMIP parameters used to be hardcoded into tables in the
>> PHY driver. This patch reads them from the device tree instead
>> in accordance with the phy-tegra-usb DT documentation.
>
> This looks fine, although I'd like to have a chance to test all these
> patches before actually ack'ing them.
>

Yeah, I haven't tested these patches on any Tegra20 devices either,
just with my Dalmore. I guess I could scavenge a T20 device from
somewhere..

Re: [PATCH v2 1/2] ARM: dts: tegra20: Rename USB UTMI parameters according to new definitions

[Stephen Warren]

On 06/26/2013 06:34 AM, Mikko Perttunen wrote:
> This patch changes the Tegra20 USB PHY nodes to use the UTMI configuration
> parameter names as specified in the device tree binding documentation
> after patch "ARM: tegra: finalize USB EHCI and PHY bindings".

So, I think the chances of this patch causing any difficult conflicts
are minimal, so it's simplest to just take this series through the USB
tree rather than screwing around with cross-subsystem merge branches.

As such, this one patch,
Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

And the whole series,
Reviewed-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Tested-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

I would guess that since this series was sent a long time ago almost
during the merge window, it has fallen out of Felipe's and Greg's inbox,
so a resend might be in order. Mikko, if so, please cut/paste the
acked-/reviewed-/tested-by lines above into the commit description to
make life easier for Felipe and/or Greg. Thanks.
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