* [U-Boot] [PATCH 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit [not found] ` <0BB3B561D7068A4E89FD8E9ABFB538BEB3B2E44331@PG-ITMSG03.altera.priv.altera.com> @ 2013-06-27 13:27 ` Chin Liang See 2013-06-28 11:44 ` Pavel Machek 0 siblings, 1 reply; 9+ messages in thread From: Chin Liang See @ 2013-06-27 13:27 UTC (permalink / raw) To: u-boot socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit Signed-off-by: Chin Liang See <clsee@altera.com> --- arch/arm/cpu/armv7/socfpga/Makefile | 2 +- arch/arm/cpu/armv7/socfpga/misc.c | 27 ----------- arch/arm/cpu/armv7/socfpga/reset_manager.c | 50 +++++++++++++++++++++ arch/arm/include/asm/arch-socfpga/reset_manager.h | 17 +++++++ 4 files changed, 68 insertions(+), 28 deletions(-) create mode 100644 arch/arm/cpu/armv7/socfpga/reset_manager.c diff --git a/arch/arm/cpu/armv7/socfpga/Makefile b/arch/arm/cpu/armv7/socfpga/Makefile index 376a4bd..518e67a 100644 --- a/arch/arm/cpu/armv7/socfpga/Makefile +++ b/arch/arm/cpu/armv7/socfpga/Makefile @@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o SOBJS := lowlevel_init.o -COBJS-y := misc.o timer.o +COBJS-y := misc.o timer.o reset_manager.o COBJS-$(CONFIG_SPL_BUILD) += spl.o COBJS := $(COBJS-y) diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/cpu/armv7/socfpga/misc.c index fa16424..59f5b94 100644 --- a/arch/arm/cpu/armv7/socfpga/misc.c +++ b/arch/arm/cpu/armv7/socfpga/misc.c @@ -17,36 +17,9 @@ #include <common.h> #include <asm/io.h> -#include <asm/arch/reset_manager.h> DECLARE_GLOBAL_DATA_PTR; -static const struct socfpga_reset_manager *reset_manager_base = - (void *)SOCFPGA_RSTMGR_ADDRESS; - -/* - * Write the reset manager register to cause reset - */ -void reset_cpu(ulong addr) -{ - /* request a warm reset */ - writel(RSTMGR_CTRL_SWWARMRSTREQ_LSB, &reset_manager_base->ctrl); - /* - * infinite loop here as watchdog will trigger and reset - * the processor - */ - while (1) - ; -} - -/* - * Release peripherals from reset based on handoff - */ -void reset_deassert_peripherals_handoff(void) -{ - writel(0, &reset_manager_base->per_mod_reset); -} - int dram_init(void) { gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c b/arch/arm/cpu/armv7/socfpga/reset_manager.c new file mode 100644 index 0000000..b0cc399 --- /dev/null +++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c @@ -0,0 +1,50 @@ +/* + * Copyright Altera Corporation (C) <2013>. All rights reserved + * + * This program is free software; you can redistribute it and/or +modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but +WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/reset_manager.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct socfpga_reset_manager *reset_manager_base = + (void *)SOCFPGA_RSTMGR_ADDRESS; + +/* + * Write the reset manager register to cause reset */ void +reset_cpu(ulong addr) { + /* request a warm reset */ + writel((1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB), + &reset_manager_base->ctrl); + /* + * infinite loop here as watchdog will trigger and reset + * the processor + */ + while (1) + ; +} + +/* + * Release peripherals from reset based on handoff */ void +reset_deassert_peripherals_handoff(void) +{ + writel(0, &reset_manager_base->per_mod_reset); +} + + diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h index d9d2c1c..58d85e3 100644 --- a/arch/arm/include/asm/arch-socfpga/reset_manager.h +++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h @@ -21,6 +21,7 @@ void reset_cpu(ulong addr); void reset_deassert_peripherals_handoff(void); +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) struct socfpga_reset_manager { u32 padding1; u32 ctrl; @@ -31,7 +32,23 @@ struct socfpga_reset_manager { u32 per2_mod_reset; u32 brg_mod_reset; }; +#else +struct socfpga_reset_manager { + u32 status; + u32 ctrl; + u32 counts; + u32 padding1; + u32 mpu_mod_reset; + u32 per_mod_reset; + u32 per2_mod_reset; + u32 brg_mod_reset; +}; +#endif +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) +#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2 +#else #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 +#endif #endif /* _RESET_MANAGER_H_ */ -- 1.7.7.4 Confidentiality Notice. This message may contain information that is confidential or otherwise protected from disclosure. If you are not the intended recipient, you are hereby notified that any use, disclosure, dissemination, distribution, or copying of this message, or any attachments, is strictly prohibited. If you have received this message in error, please advise the sender by reply e-mail, and delete the message and any attachments. Thank you. ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit 2013-06-27 13:27 ` [U-Boot] [PATCH 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit Chin Liang See @ 2013-06-28 11:44 ` Pavel Machek 2013-06-28 16:22 ` Chin Liang See 0 siblings, 1 reply; 9+ messages in thread From: Pavel Machek @ 2013-06-28 11:44 UTC (permalink / raw) To: u-boot Hi! > socfpga: Consolidating reset code into reset_manager.c. Also separating > reset configuration for virtual target and real hardware Cyclone V > development kit > > Signed-off-by: Chin Liang See <clsee@altera.com> > +++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c > @@ -0,0 +1,50 @@ > +/* > + * Copyright Altera Corporation (C) <2013>. All rights reserved > + * > + * This program is free software; you can redistribute it and/or > +modify it > + * under the terms and conditions of the GNU General Public I sense some word wrapping... > @@ -21,6 +21,7 @@ > void reset_cpu(ulong addr); > void reset_deassert_peripherals_handoff(void); > > +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) > struct socfpga_reset_manager { > u32 padding1; > u32 ctrl; > @@ -31,7 +32,23 @@ struct socfpga_reset_manager { > u32 per2_mod_reset; > u32 brg_mod_reset; > }; > +#else > +struct socfpga_reset_manager { > + u32 status; > + u32 ctrl; > + u32 counts; > + u32 padding1; > + u32 mpu_mod_reset; > + u32 per_mod_reset; > + u32 per2_mod_reset; > + u32 brg_mod_reset; > +}; > +#endif > Is it really needed to have two definitions of the struct? AFAICT, structures are same, except that some padding fields have names on real hardware. Thus, if we simply use "real-hardware" version on the emulator, it should work. Perhaps with some comments "this is not emulated on virtual target"...? Thanks, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit 2013-06-28 11:44 ` Pavel Machek @ 2013-06-28 16:22 ` Chin Liang See 2013-06-28 20:48 ` [U-Boot] [PATCH v2 " Chin Liang See 2013-07-01 10:46 ` [U-Boot] [PATCH " Pavel Machek 0 siblings, 2 replies; 9+ messages in thread From: Chin Liang See @ 2013-06-28 16:22 UTC (permalink / raw) To: u-boot Hi Pavel, On Fri, 2013-06-28 at 13:44 +0200, ZY - pavel wrote: > Hi! > > > socfpga: Consolidating reset code into reset_manager.c. Also separating > > reset configuration for virtual target and real hardware Cyclone V > > development kit > > > > Signed-off-by: Chin Liang See <clsee@altera.com> > > > +++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c > > @@ -0,0 +1,50 @@ > > +/* > > + * Copyright Altera Corporation (C) <2013>. All rights reserved > > + * > > + * This program is free software; you can redistribute it and/or > > +modify it > > + * under the terms and conditions of the GNU General Public > > I sense some word wrapping... Noted and will send new patch > > > @@ -21,6 +21,7 @@ > > void reset_cpu(ulong addr); > > void reset_deassert_peripherals_handoff(void); > > > > +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) > > struct socfpga_reset_manager { > > u32 padding1; > > u32 ctrl; > > @@ -31,7 +32,23 @@ struct socfpga_reset_manager { > > u32 per2_mod_reset; > > u32 brg_mod_reset; > > }; > > +#else > > +struct socfpga_reset_manager { > > + u32 status; > > + u32 ctrl; > > + u32 counts; > > + u32 padding1; > > + u32 mpu_mod_reset; > > + u32 per_mod_reset; > > + u32 per2_mod_reset; > > + u32 brg_mod_reset; > > +}; > > +#endif > > > > Is it really needed to have two definitions of the struct? AFAICT, > structures are same, except that some padding fields have names on > real hardware. Thus, if we simply use "real-hardware" version on the > emulator, it should work. Perhaps with some comments "this is not > emulated on virtual target"...? > We decided to leave the Virtual Platform code support within existing code. We need to do that as we have some discrepancy between the real hardware and the virtual platform. But this is only applicable for Altera specific IP. :) Thanks Chin Liang > Thanks, > Pavel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v2 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit 2013-06-28 16:22 ` Chin Liang See @ 2013-06-28 20:48 ` Chin Liang See 2013-06-28 22:49 ` Wolfgang Denk 2013-07-01 10:46 ` [U-Boot] [PATCH " Pavel Machek 1 sibling, 1 reply; 9+ messages in thread From: Chin Liang See @ 2013-06-28 20:48 UTC (permalink / raw) To: u-boot socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit Signed-off-by: Chin Liang See <clsee@altera.com> --- arch/arm/cpu/armv7/socfpga/Makefile | 2 +- arch/arm/cpu/armv7/socfpga/misc.c | 27 ----------- arch/arm/cpu/armv7/socfpga/reset_manager.c | 52 +++++++++++++++++++++ arch/arm/include/asm/arch-socfpga/reset_manager.h | 17 +++++++ 4 files changed, 70 insertions(+), 28 deletions(-) create mode 100644 arch/arm/cpu/armv7/socfpga/reset_manager.c diff --git a/arch/arm/cpu/armv7/socfpga/Makefile b/arch/arm/cpu/armv7/socfpga/Makefile index 376a4bd..518e67a 100644 --- a/arch/arm/cpu/armv7/socfpga/Makefile +++ b/arch/arm/cpu/armv7/socfpga/Makefile @@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o SOBJS := lowlevel_init.o -COBJS-y := misc.o timer.o +COBJS-y := misc.o timer.o reset_manager.o COBJS-$(CONFIG_SPL_BUILD) += spl.o COBJS := $(COBJS-y) diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/cpu/armv7/socfpga/misc.c index fa16424..59f5b94 100644 --- a/arch/arm/cpu/armv7/socfpga/misc.c +++ b/arch/arm/cpu/armv7/socfpga/misc.c @@ -17,36 +17,9 @@ #include <common.h> #include <asm/io.h> -#include <asm/arch/reset_manager.h> DECLARE_GLOBAL_DATA_PTR; -static const struct socfpga_reset_manager *reset_manager_base = - (void *)SOCFPGA_RSTMGR_ADDRESS; - -/* - * Write the reset manager register to cause reset - */ -void reset_cpu(ulong addr) -{ - /* request a warm reset */ - writel(RSTMGR_CTRL_SWWARMRSTREQ_LSB, &reset_manager_base->ctrl); - /* - * infinite loop here as watchdog will trigger and reset - * the processor - */ - while (1) - ; -} - -/* - * Release peripherals from reset based on handoff - */ -void reset_deassert_peripherals_handoff(void) -{ - writel(0, &reset_manager_base->per_mod_reset); -} - int dram_init(void) { gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c b/arch/arm/cpu/armv7/socfpga/reset_manager.c new file mode 100644 index 0000000..b64db68 --- /dev/null +++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c @@ -0,0 +1,52 @@ +/* + * Copyright Altera Corporation (C) <2013>. All rights reserved + * + * This program is free software; you can redistribute it + * and/or modify it under the terms and conditions of the + * GNU General Public License, version 2, as published by + * the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program. If not, see + * <http://www.gnu.org/licenses/>. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/reset_manager.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct socfpga_reset_manager *reset_manager_base = + (void *)SOCFPGA_RSTMGR_ADDRESS; + +/* + * Write the reset manager register to cause reset + */ +void reset_cpu(ulong addr) +{ + /* request a warm reset */ + writel((1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB), + &reset_manager_base->ctrl); + /* + * infinite loop here as watchdog will trigger and reset + * the processor + */ + while (1) + ; +} + +/* + * Release peripherals from reset based on handoff + */ +void reset_deassert_peripherals_handoff(void) +{ + writel(0, &reset_manager_base->per_mod_reset); +} + + diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h index d9d2c1c..58d85e3 100644 --- a/arch/arm/include/asm/arch-socfpga/reset_manager.h +++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h @@ -21,6 +21,7 @@ void reset_cpu(ulong addr); void reset_deassert_peripherals_handoff(void); +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) struct socfpga_reset_manager { u32 padding1; u32 ctrl; @@ -31,7 +32,23 @@ struct socfpga_reset_manager { u32 per2_mod_reset; u32 brg_mod_reset; }; +#else +struct socfpga_reset_manager { + u32 status; + u32 ctrl; + u32 counts; + u32 padding1; + u32 mpu_mod_reset; + u32 per_mod_reset; + u32 per2_mod_reset; + u32 brg_mod_reset; +}; +#endif +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) +#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2 +#else #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 +#endif #endif /* _RESET_MANAGER_H_ */ -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v2 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit 2013-06-28 20:48 ` [U-Boot] [PATCH v2 " Chin Liang See @ 2013-06-28 22:49 ` Wolfgang Denk 0 siblings, 0 replies; 9+ messages in thread From: Wolfgang Denk @ 2013-06-28 22:49 UTC (permalink / raw) To: u-boot Dear Chin Liang See, In message <1372452523.11240.4.camel@drezykow-VirtualBox.altera.com> you wrote: > socfpga: Consolidating reset code into reset_manager.c. > Also separating reset configuration for virtual target > and real hardware Cyclone V development kit Arghhh... 154 characters in the Subject, and repeating the same 1:1 in the commit message is NOT acceptable. NAK!! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de In theory, there is no difference between theory and practice. In practice, however, there is. ^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit 2013-06-28 16:22 ` Chin Liang See 2013-06-28 20:48 ` [U-Boot] [PATCH v2 " Chin Liang See @ 2013-07-01 10:46 ` Pavel Machek 2013-07-01 13:43 ` Chin Liang See 2013-07-01 14:16 ` [U-Boot] [PATCH v2 1/1] socfpga: Creating driver for Reset Manager Chin Liang See 1 sibling, 2 replies; 9+ messages in thread From: Pavel Machek @ 2013-07-01 10:46 UTC (permalink / raw) To: u-boot Hi! > > > @@ -21,6 +21,7 @@ > > > void reset_cpu(ulong addr); > > > void reset_deassert_peripherals_handoff(void); > > > > > > +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) > > > struct socfpga_reset_manager { > > > u32 padding1; > > > u32 ctrl; > > > @@ -31,7 +32,23 @@ struct socfpga_reset_manager { > > > u32 per2_mod_reset; > > > u32 brg_mod_reset; > > > }; > > > +#else > > > +struct socfpga_reset_manager { > > > + u32 status; > > > + u32 ctrl; > > > + u32 counts; > > > + u32 padding1; > > > + u32 mpu_mod_reset; > > > + u32 per_mod_reset; > > > + u32 per2_mod_reset; > > > + u32 brg_mod_reset; > > > +}; > > > +#endif > > > > > > > Is it really needed to have two definitions of the struct? AFAICT, > > structures are same, except that some padding fields have names on > > real hardware. Thus, if we simply use "real-hardware" version on the > > emulator, it should work. Perhaps with some comments "this is not > > emulated on virtual target"...? > > We decided to leave the Virtual Platform code support within existing > code. We need to do that as we have some discrepancy between the real > hardware and the virtual platform. But this is only applicable for > Altera specific IP. :) That is okay... But notice that structure is same on both real hardware and virtual platform... (Just some fields have "paddingX" instead of name on virtual platform). If you remove the #ifdef it will work just fine. (You could add /* this is unimplemented on virtual platform */, or maybe even per-field ifdef. It will still be more readable.) Thanks, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit 2013-07-01 10:46 ` [U-Boot] [PATCH " Pavel Machek @ 2013-07-01 13:43 ` Chin Liang See 2013-07-02 11:52 ` Pavel Machek 2013-07-01 14:16 ` [U-Boot] [PATCH v2 1/1] socfpga: Creating driver for Reset Manager Chin Liang See 1 sibling, 1 reply; 9+ messages in thread From: Chin Liang See @ 2013-07-01 13:43 UTC (permalink / raw) To: u-boot Hi Pavel, On Mon, 2013-07-01 at 12:46 +0200, ZY - pavel wrote: > Hi! > > > > > @@ -21,6 +21,7 @@ > > > > void reset_cpu(ulong addr); > > > > void reset_deassert_peripherals_handoff(void); > > > > > > > > +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) > > > > struct socfpga_reset_manager { > > > > u32 padding1; > > > > u32 ctrl; > > > > @@ -31,7 +32,23 @@ struct socfpga_reset_manager { > > > > u32 per2_mod_reset; > > > > u32 brg_mod_reset; > > > > }; > > > > +#else > > > > +struct socfpga_reset_manager { > > > > + u32 status; > > > > + u32 ctrl; > > > > + u32 counts; > > > > + u32 padding1; > > > > + u32 mpu_mod_reset; > > > > + u32 per_mod_reset; > > > > + u32 per2_mod_reset; > > > > + u32 brg_mod_reset; > > > > +}; > > > > +#endif > > > > > > > > > > Is it really needed to have two definitions of the struct? AFAICT, > > > structures are same, except that some padding fields have names on > > > real hardware. Thus, if we simply use "real-hardware" version on the > > > emulator, it should work. Perhaps with some comments "this is not > > > emulated on virtual target"...? > > > > We decided to leave the Virtual Platform code support within existing > > code. We need to do that as we have some discrepancy between the real > > hardware and the virtual platform. But this is only applicable for > > Altera specific IP. :) > > That is okay... But notice that structure is same on both real > hardware and virtual platform... (Just some fields have "paddingX" > instead of name on virtual platform). If you remove the #ifdef it will > work just fine. > > (You could add /* this is unimplemented on virtual platform */, or > maybe even per-field ifdef. It will still be more readable.) Oh.. I got your point now :) Its a good suggestion and let me do it for next revision. Chin Liang > > Thanks, > Pavel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit 2013-07-01 13:43 ` Chin Liang See @ 2013-07-02 11:52 ` Pavel Machek 0 siblings, 0 replies; 9+ messages in thread From: Pavel Machek @ 2013-07-02 11:52 UTC (permalink / raw) To: u-boot Hi! > > > > > @@ -21,6 +21,7 @@ > > > > > void reset_cpu(ulong addr); > > > > > void reset_deassert_peripherals_handoff(void); > > > > > > > > > > +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) > > > > > struct socfpga_reset_manager { > > > > > u32 padding1; > > > > > u32 ctrl; > > > > > @@ -31,7 +32,23 @@ struct socfpga_reset_manager { > > > > > u32 per2_mod_reset; > > > > > u32 brg_mod_reset; > > > > > }; > > > > > +#else > > > > > +struct socfpga_reset_manager { > > > > > + u32 status; > > > > > + u32 ctrl; > > > > > + u32 counts; > > > > > + u32 padding1; > > > > > + u32 mpu_mod_reset; > > > > > + u32 per_mod_reset; > > > > > + u32 per2_mod_reset; > > > > > + u32 brg_mod_reset; > > > > > +}; > > > > > +#endif > > > > > > > (You could add /* this is unimplemented on virtual platform */, or > > maybe even per-field ifdef. It will still be more readable.) > > Oh.. I got your point now :) > Its a good suggestion and let me do it for next revision. Looks good now. Thanks! Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [PATCH v2 1/1] socfpga: Creating driver for Reset Manager 2013-07-01 10:46 ` [U-Boot] [PATCH " Pavel Machek 2013-07-01 13:43 ` Chin Liang See @ 2013-07-01 14:16 ` Chin Liang See 1 sibling, 0 replies; 9+ messages in thread From: Chin Liang See @ 2013-07-01 14:16 UTC (permalink / raw) To: u-boot socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit Signed-off-by: Chin Liang See <clsee@altera.com> --- arch/arm/cpu/armv7/socfpga/Makefile | 2 +- arch/arm/cpu/armv7/socfpga/misc.c | 27 ----------- arch/arm/cpu/armv7/socfpga/reset_manager.c | 52 +++++++++++++++++++++ arch/arm/include/asm/arch-socfpga/reset_manager.h | 10 ++-- 4 files changed, 60 insertions(+), 31 deletions(-) create mode 100644 arch/arm/cpu/armv7/socfpga/reset_manager.c diff --git a/arch/arm/cpu/armv7/socfpga/Makefile b/arch/arm/cpu/armv7/socfpga/Makefile index 376a4bd..518e67a 100644 --- a/arch/arm/cpu/armv7/socfpga/Makefile +++ b/arch/arm/cpu/armv7/socfpga/Makefile @@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o SOBJS := lowlevel_init.o -COBJS-y := misc.o timer.o +COBJS-y := misc.o timer.o reset_manager.o COBJS-$(CONFIG_SPL_BUILD) += spl.o COBJS := $(COBJS-y) diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/cpu/armv7/socfpga/misc.c index fa16424..59f5b94 100644 --- a/arch/arm/cpu/armv7/socfpga/misc.c +++ b/arch/arm/cpu/armv7/socfpga/misc.c @@ -17,36 +17,9 @@ #include <common.h> #include <asm/io.h> -#include <asm/arch/reset_manager.h> DECLARE_GLOBAL_DATA_PTR; -static const struct socfpga_reset_manager *reset_manager_base = - (void *)SOCFPGA_RSTMGR_ADDRESS; - -/* - * Write the reset manager register to cause reset - */ -void reset_cpu(ulong addr) -{ - /* request a warm reset */ - writel(RSTMGR_CTRL_SWWARMRSTREQ_LSB, &reset_manager_base->ctrl); - /* - * infinite loop here as watchdog will trigger and reset - * the processor - */ - while (1) - ; -} - -/* - * Release peripherals from reset based on handoff - */ -void reset_deassert_peripherals_handoff(void) -{ - writel(0, &reset_manager_base->per_mod_reset); -} - int dram_init(void) { gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c b/arch/arm/cpu/armv7/socfpga/reset_manager.c new file mode 100644 index 0000000..b64db68 --- /dev/null +++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c @@ -0,0 +1,52 @@ +/* + * Copyright Altera Corporation (C) <2013>. All rights reserved + * + * This program is free software; you can redistribute it + * and/or modify it under the terms and conditions of the + * GNU General Public License, version 2, as published by + * the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program. If not, see + * <http://www.gnu.org/licenses/>. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/reset_manager.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct socfpga_reset_manager *reset_manager_base = + (void *)SOCFPGA_RSTMGR_ADDRESS; + +/* + * Write the reset manager register to cause reset + */ +void reset_cpu(ulong addr) +{ + /* request a warm reset */ + writel((1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB), + &reset_manager_base->ctrl); + /* + * infinite loop here as watchdog will trigger and reset + * the processor + */ + while (1) + ; +} + +/* + * Release peripherals from reset based on handoff + */ +void reset_deassert_peripherals_handoff(void) +{ + writel(0, &reset_manager_base->per_mod_reset); +} + + diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h index d9d2c1c..4930914 100644 --- a/arch/arm/include/asm/arch-socfpga/reset_manager.h +++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h @@ -22,16 +22,20 @@ void reset_cpu(ulong addr); void reset_deassert_peripherals_handoff(void); struct socfpga_reset_manager { - u32 padding1; + u32 status; u32 ctrl; - u32 padding2; - u32 padding3; + u32 counts; + u32 padding1; u32 mpu_mod_reset; u32 per_mod_reset; u32 per2_mod_reset; u32 brg_mod_reset; }; +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) +#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2 +#else #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 +#endif #endif /* _RESET_MANAGER_H_ */ -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2013-07-02 11:52 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
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[not found] ` <0BB3B561D7068A4E89FD8E9ABFB538BEB3B2E44331@PG-ITMSG03.altera.priv.altera.com>
2013-06-27 13:27 ` [U-Boot] [PATCH 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit Chin Liang See
2013-06-28 11:44 ` Pavel Machek
2013-06-28 16:22 ` Chin Liang See
2013-06-28 20:48 ` [U-Boot] [PATCH v2 " Chin Liang See
2013-06-28 22:49 ` Wolfgang Denk
2013-07-01 10:46 ` [U-Boot] [PATCH " Pavel Machek
2013-07-01 13:43 ` Chin Liang See
2013-07-02 11:52 ` Pavel Machek
2013-07-01 14:16 ` [U-Boot] [PATCH v2 1/1] socfpga: Creating driver for Reset Manager Chin Liang See
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