From: Tero Kristo <t-kristo@ti.com> To: linux-omap@vger.kernel.org, paul@pwsan.com, khilman@linaro.org, tony@atomide.com, mturquette@linaro.org, nm@ti.com, rnayak@ti.com Cc: linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCHv4 17/33] CLK: DT: add support for set-rate-parent flag Date: Tue, 23 Jul 2013 10:20:12 +0300 [thread overview] Message-ID: <1374564028-11352-18-git-send-email-t-kristo@ti.com> (raw) In-Reply-To: <1374564028-11352-1-git-send-email-t-kristo@ti.com> Adding set-rate-parent to clock node now allows a node to forward clk_set_rate request to its parent clock. Signed-off-by: Tero Kristo <t-kristo@ti.com> --- drivers/clk/clk-divider.c | 6 +++++- drivers/clk/clk-fixed-factor.c | 6 +++++- drivers/clk/clk-gate.c | 8 ++++++-- drivers/clk/clk-mux.c | 6 +++++- 4 files changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index ff24ec2..01d967f 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -388,6 +388,7 @@ void of_divider_clk_setup(struct device_node *node) u32 mask = 0; u32 shift = 0; struct clk_div_table *table; + u32 flags = 0; of_property_read_string(node, "clock-output-names", &clk_name); @@ -418,12 +419,15 @@ void of_divider_clk_setup(struct device_node *node) if (of_property_read_bool(node, "hiword-mask")) clk_divider_flags |= CLK_DIVIDER_HIWORD_MASK; + if (of_property_read_bool(node, "set-rate-parent")) + flags |= CLK_SET_RATE_PARENT; + table = of_clk_get_div_table(node); if (IS_ERR(table)) return; clk = _register_divider(NULL, clk_name, - parent_name, 0, + parent_name, flags, reg, (u8) shift, mask, clk_divider_flags, table, NULL); diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c index 9ff7d51..30aa121 100644 --- a/drivers/clk/clk-fixed-factor.c +++ b/drivers/clk/clk-fixed-factor.c @@ -107,6 +107,7 @@ void __init of_fixed_factor_clk_setup(struct device_node *node) const char *clk_name = node->name; const char *parent_name; u32 div, mult; + u32 flags = 0; if (of_property_read_u32(node, "clock-div", &div)) { pr_err("%s Fixed factor clock <%s> must have a clock-div property\n", @@ -123,7 +124,10 @@ void __init of_fixed_factor_clk_setup(struct device_node *node) of_property_read_string(node, "clock-output-names", &clk_name); parent_name = of_clk_get_parent_name(node, 0); - clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, + if (of_property_read_bool(node, "set-rate-parent")) + flags |= CLK_SET_RATE_PARENT; + + clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags, mult, div); if (!IS_ERR(clk)) of_clk_add_provider(node, of_clk_src_simple_get, clk); diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index cd595ec..0be25b9 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -176,6 +176,7 @@ void of_gate_clk_setup(struct device_node *node) const char *parent_name; u8 clk_gate_flags = 0; u32 bit_idx = 0; + u32 flags = 0; of_property_read_string(node, "clock-output-names", &clk_name); @@ -195,8 +196,11 @@ void of_gate_clk_setup(struct device_node *node) if (of_property_read_bool(node, "hiword-mask")) clk_gate_flags |= CLK_GATE_HIWORD_MASK; - clk = clk_register_gate(NULL, clk_name, parent_name, 0, reg, (u8) bit_idx, - clk_gate_flags, NULL); + if (of_property_read_bool(node, "set-rate-parent")) + flags |= CLK_SET_RATE_PARENT; + + clk = clk_register_gate(NULL, clk_name, parent_name, flags, reg, + (u8) bit_idx, clk_gate_flags, NULL); if (!IS_ERR(clk)) of_clk_add_provider(node, of_clk_src_simple_get, clk); diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 4751bce..890ddbf 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -184,6 +184,7 @@ void of_mux_clk_setup(struct device_node *node) u8 clk_mux_flags = 0; u32 mask = 0; u32 shift = 0; + u32 flags = 0; of_property_read_string(node, "clock-output-names", &clk_name); @@ -219,8 +220,11 @@ void of_mux_clk_setup(struct device_node *node) if (of_property_read_bool(node, "hiword-mask")) clk_mux_flags |= CLK_MUX_HIWORD_MASK; + if (of_property_read_bool(node, "set-rate-parent")) + flags |= CLK_SET_RATE_PARENT; + clk = clk_register_mux_table(NULL, clk_name, parent_names, num_parents, - 0, reg, (u8) shift, mask, clk_mux_flags, + flags, reg, (u8) shift, mask, clk_mux_flags, NULL, NULL); if (!IS_ERR(clk)) -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: t-kristo@ti.com (Tero Kristo) To: linux-arm-kernel@lists.infradead.org Subject: [PATCHv4 17/33] CLK: DT: add support for set-rate-parent flag Date: Tue, 23 Jul 2013 10:20:12 +0300 [thread overview] Message-ID: <1374564028-11352-18-git-send-email-t-kristo@ti.com> (raw) In-Reply-To: <1374564028-11352-1-git-send-email-t-kristo@ti.com> Adding set-rate-parent to clock node now allows a node to forward clk_set_rate request to its parent clock. Signed-off-by: Tero Kristo <t-kristo@ti.com> --- drivers/clk/clk-divider.c | 6 +++++- drivers/clk/clk-fixed-factor.c | 6 +++++- drivers/clk/clk-gate.c | 8 ++++++-- drivers/clk/clk-mux.c | 6 +++++- 4 files changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index ff24ec2..01d967f 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -388,6 +388,7 @@ void of_divider_clk_setup(struct device_node *node) u32 mask = 0; u32 shift = 0; struct clk_div_table *table; + u32 flags = 0; of_property_read_string(node, "clock-output-names", &clk_name); @@ -418,12 +419,15 @@ void of_divider_clk_setup(struct device_node *node) if (of_property_read_bool(node, "hiword-mask")) clk_divider_flags |= CLK_DIVIDER_HIWORD_MASK; + if (of_property_read_bool(node, "set-rate-parent")) + flags |= CLK_SET_RATE_PARENT; + table = of_clk_get_div_table(node); if (IS_ERR(table)) return; clk = _register_divider(NULL, clk_name, - parent_name, 0, + parent_name, flags, reg, (u8) shift, mask, clk_divider_flags, table, NULL); diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c index 9ff7d51..30aa121 100644 --- a/drivers/clk/clk-fixed-factor.c +++ b/drivers/clk/clk-fixed-factor.c @@ -107,6 +107,7 @@ void __init of_fixed_factor_clk_setup(struct device_node *node) const char *clk_name = node->name; const char *parent_name; u32 div, mult; + u32 flags = 0; if (of_property_read_u32(node, "clock-div", &div)) { pr_err("%s Fixed factor clock <%s> must have a clock-div property\n", @@ -123,7 +124,10 @@ void __init of_fixed_factor_clk_setup(struct device_node *node) of_property_read_string(node, "clock-output-names", &clk_name); parent_name = of_clk_get_parent_name(node, 0); - clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, + if (of_property_read_bool(node, "set-rate-parent")) + flags |= CLK_SET_RATE_PARENT; + + clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags, mult, div); if (!IS_ERR(clk)) of_clk_add_provider(node, of_clk_src_simple_get, clk); diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index cd595ec..0be25b9 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -176,6 +176,7 @@ void of_gate_clk_setup(struct device_node *node) const char *parent_name; u8 clk_gate_flags = 0; u32 bit_idx = 0; + u32 flags = 0; of_property_read_string(node, "clock-output-names", &clk_name); @@ -195,8 +196,11 @@ void of_gate_clk_setup(struct device_node *node) if (of_property_read_bool(node, "hiword-mask")) clk_gate_flags |= CLK_GATE_HIWORD_MASK; - clk = clk_register_gate(NULL, clk_name, parent_name, 0, reg, (u8) bit_idx, - clk_gate_flags, NULL); + if (of_property_read_bool(node, "set-rate-parent")) + flags |= CLK_SET_RATE_PARENT; + + clk = clk_register_gate(NULL, clk_name, parent_name, flags, reg, + (u8) bit_idx, clk_gate_flags, NULL); if (!IS_ERR(clk)) of_clk_add_provider(node, of_clk_src_simple_get, clk); diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 4751bce..890ddbf 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -184,6 +184,7 @@ void of_mux_clk_setup(struct device_node *node) u8 clk_mux_flags = 0; u32 mask = 0; u32 shift = 0; + u32 flags = 0; of_property_read_string(node, "clock-output-names", &clk_name); @@ -219,8 +220,11 @@ void of_mux_clk_setup(struct device_node *node) if (of_property_read_bool(node, "hiword-mask")) clk_mux_flags |= CLK_MUX_HIWORD_MASK; + if (of_property_read_bool(node, "set-rate-parent")) + flags |= CLK_SET_RATE_PARENT; + clk = clk_register_mux_table(NULL, clk_name, parent_names, num_parents, - 0, reg, (u8) shift, mask, clk_mux_flags, + flags, reg, (u8) shift, mask, clk_mux_flags, NULL, NULL); if (!IS_ERR(clk)) -- 1.7.9.5
next prev parent reply other threads:[~2013-07-23 7:20 UTC|newest] Thread overview: 204+ messages / expand[flat|nested] mbox.gz Atom feed top 2013-07-23 7:19 [PATCHv4 00/33] ARM: OMAP: clock conversion to DT Tero Kristo 2013-07-23 7:19 ` Tero Kristo 2013-07-23 7:19 ` [PATCHv4 01/33] CLK: clkdev: add support for looking up clocks from DT Tero Kristo 2013-07-23 7:19 ` Tero Kristo 2013-07-30 15:04 ` Nishanth Menon 2013-07-30 15:04 ` Nishanth Menon 2013-07-31 8:43 ` Tero Kristo 2013-07-31 8:43 ` Tero Kristo 2013-07-23 7:19 ` [PATCHv4 02/33] clk: omap: introduce clock driver Tero Kristo 2013-07-23 7:19 ` Tero Kristo 2013-07-30 15:21 ` Nishanth Menon 2013-07-30 15:21 ` Nishanth Menon 2013-07-31 8:59 ` Tero Kristo 2013-07-31 8:59 ` Tero Kristo 2013-08-01 13:44 ` Nishanth Menon 2013-08-01 13:44 ` Nishanth Menon 2013-08-01 14:59 ` Tero Kristo 2013-08-01 14:59 ` Tero Kristo 2013-07-23 7:19 ` [PATCHv4 03/33] CLK: OMAP4: Add DPLL clock support Tero Kristo 2013-07-23 7:19 ` Tero Kristo 2013-07-30 16:23 ` Nishanth Menon 2013-07-30 16:23 ` Nishanth Menon 2013-07-31 9:46 ` Tero Kristo 2013-07-31 9:46 ` Tero Kristo 2013-08-01 14:00 ` Nishanth Menon 2013-08-01 14:00 ` Nishanth Menon 2013-08-01 15:08 ` Tero Kristo 2013-08-01 15:08 ` Tero Kristo 2013-08-01 15:13 ` Nishanth Menon 2013-08-01 15:13 ` Nishanth Menon 2013-08-01 8:29 ` Rajendra Nayak 2013-08-01 8:29 ` Rajendra Nayak 2013-08-01 15:10 ` Nishanth Menon 2013-08-01 15:10 ` Nishanth Menon 2013-08-01 15:41 ` Tero Kristo 2013-08-01 15:41 ` Tero Kristo 2013-07-23 7:19 ` [PATCHv4 04/33] CLK: omap: move part of the machine specific clock header contents to driver Tero Kristo 2013-07-23 7:19 ` Tero Kristo 2013-07-30 18:22 ` Nishanth Menon 2013-07-30 18:22 ` Nishanth Menon 2013-07-31 9:59 ` Tero Kristo 2013-07-31 9:59 ` Tero Kristo 2013-08-01 14:04 ` Nishanth Menon 2013-08-01 14:04 ` Nishanth Menon 2013-08-01 15:12 ` Tero Kristo 2013-08-01 15:12 ` Tero Kristo 2013-08-01 15:21 ` Nishanth Menon 2013-08-01 15:21 ` Nishanth Menon 2013-07-23 7:20 ` [PATCHv4 05/33] CLK: omap: add DT duplicate clock registration mechanism Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 18:40 ` Nishanth Menon 2013-07-30 18:40 ` Nishanth Menon 2013-07-31 10:07 ` Tero Kristo 2013-07-31 10:07 ` Tero Kristo 2013-08-01 14:25 ` Nishanth Menon 2013-08-01 14:25 ` Nishanth Menon 2013-08-01 15:18 ` Tero Kristo 2013-08-01 15:18 ` Tero Kristo 2013-08-01 15:24 ` Nishanth Menon 2013-08-01 15:24 ` Nishanth Menon 2013-08-01 15:30 ` Tero Kristo 2013-08-01 15:30 ` Tero Kristo 2013-08-02 7:22 ` Tony Lindgren 2013-08-02 7:22 ` Tony Lindgren 2013-07-23 7:20 ` [PATCHv4 06/33] CLK: omap: add autoidle support Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 18:56 ` Nishanth Menon 2013-07-30 18:56 ` Nishanth Menon 2013-07-31 10:13 ` Tero Kristo 2013-07-31 10:13 ` Tero Kristo 2013-08-01 14:11 ` Nishanth Menon 2013-08-01 14:11 ` Nishanth Menon 2013-08-01 15:22 ` Tero Kristo 2013-08-01 15:22 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 07/33] CLK: omap: add support for OMAP gate clock Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 19:17 ` Nishanth Menon 2013-07-30 19:17 ` Nishanth Menon 2013-07-31 14:45 ` Tero Kristo 2013-07-31 14:45 ` Tero Kristo 2013-08-01 14:33 ` Nishanth Menon 2013-08-01 14:33 ` Nishanth Menon 2013-08-01 15:29 ` Tero Kristo 2013-08-01 15:29 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 08/33] ARM: dts: omap4 clock data Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 19:27 ` Nishanth Menon 2013-07-30 19:27 ` Nishanth Menon 2013-07-31 14:49 ` Tero Kristo 2013-07-31 14:49 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 09/33] CLK: omap: add omap4 clock init file Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 19:33 ` Nishanth Menon 2013-07-30 19:33 ` Nishanth Menon 2013-07-31 14:52 ` Tero Kristo 2013-07-31 14:52 ` Tero Kristo 2013-08-01 14:40 ` Nishanth Menon 2013-08-01 14:40 ` Nishanth Menon 2013-08-01 15:34 ` Tero Kristo 2013-08-01 15:34 ` Tero Kristo 2013-08-01 16:10 ` Nishanth Menon 2013-08-01 16:10 ` Nishanth Menon 2013-07-23 7:20 ` [PATCHv4 10/33] ARM: OMAP4: remove old clock data and link in new clock init code Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 19:42 ` Nishanth Menon 2013-07-30 19:42 ` Nishanth Menon 2013-07-31 14:55 ` Tero Kristo 2013-07-31 14:55 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 11/33] ARM: dts: omap5 clock data Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 12/33] CLK: omap: add omap5 clock init file Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 13/33] ARM: dts: dra7 clock data Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 14/33] CLK: omap: add dra7 clock init file Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 15/33] CLK: OMAP: DPLL: add support for DT property ti,dpll-no-gate Tero Kristo 2013-07-23 7:20 ` [PATCHv4 15/33] CLK: OMAP: DPLL: add support for DT property ti, dpll-no-gate Tero Kristo 2013-07-30 19:18 ` [PATCHv4 15/33] CLK: OMAP: DPLL: add support for DT property ti,dpll-no-gate Nishanth Menon 2013-07-30 19:18 ` Nishanth Menon 2013-07-31 14:56 ` Tero Kristo 2013-07-31 14:56 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 16/33] CLK: OMAP: DPLL: do not of_iomap NULL autoidle register Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 19:49 ` Nishanth Menon 2013-07-30 19:49 ` Nishanth Menon 2013-07-31 14:57 ` Tero Kristo 2013-07-31 14:57 ` Tero Kristo 2013-07-23 7:20 ` Tero Kristo [this message] 2013-07-23 7:20 ` [PATCHv4 17/33] CLK: DT: add support for set-rate-parent flag Tero Kristo 2013-07-30 19:58 ` Nishanth Menon 2013-07-30 19:58 ` Nishanth Menon 2013-07-23 7:20 ` [PATCHv4 18/33] ARM: dts: am33xx clock data Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 19/33] CLK: omap: add am33xx clock init file Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 20:00 ` Nishanth Menon 2013-07-30 20:00 ` Nishanth Menon 2013-07-31 14:59 ` Tero Kristo 2013-07-31 14:59 ` Tero Kristo 2013-08-01 14:43 ` Nishanth Menon 2013-08-01 14:43 ` Nishanth Menon 2013-08-01 15:35 ` Tero Kristo 2013-08-01 15:35 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 20/33] ARM: AM33xx: remove old clock data and link in new clock init code Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 21/33] CLK: OMAP: DPLL: add omap3 dpll support Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 20:08 ` Nishanth Menon 2013-07-30 20:08 ` Nishanth Menon 2013-07-31 15:03 ` Tero Kristo 2013-07-31 15:03 ` Tero Kristo 2013-08-01 14:46 ` Nishanth Menon 2013-08-01 14:46 ` Nishanth Menon 2013-07-23 7:20 ` [PATCHv4 22/33] CLK: OMAP: update gate clock setup for OMAP3 Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 20:13 ` Nishanth Menon 2013-07-30 20:13 ` Nishanth Menon 2013-07-31 15:05 ` Tero Kristo 2013-07-31 15:05 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 23/33] CLK: OMAP: add interface clock support " Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-30 20:23 ` Nishanth Menon 2013-07-30 20:23 ` Nishanth Menon 2013-07-31 15:09 ` Tero Kristo 2013-07-31 15:09 ` Tero Kristo 2013-08-01 14:50 ` Nishanth Menon 2013-08-01 14:50 ` Nishanth Menon 2013-07-23 7:20 ` [PATCHv4 24/33] CLK: OMAP: move some defines from machine to driver header Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 25/33] ARM: OMAP: hwmod: fix an incorrect clk type cast with _get_clkdm Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 26/33] CLK: omap: gate: add support for OMAP36xx dpllx_mx_ck:s Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 27/33] ARM: OMAP3: hwmod: initialize clkdm from clkdm_name Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 28/33] ARM: dts: omap3 clock data Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 30/33] clk: OMAP: DRA7: Add APLL support Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 31/33] ARM: dts: clk: Add apll related clocks Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 32/33] clk: OMAP: DRA7: Change apll_pcie_m2_ck to fixed factor clock Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 7:20 ` [PATCHv4 33/33] clk: DTS: DRA7: Add PCIe related clock nodes Tero Kristo 2013-07-23 7:20 ` Tero Kristo 2013-07-23 8:24 ` [PATCHv4 00/33] ARM: OMAP: clock conversion to DT Tero Kristo 2013-07-23 8:24 ` Tero Kristo 2013-07-24 14:16 ` Roger Quadros 2013-07-24 14:16 ` Roger Quadros 2013-07-24 14:29 ` Tero Kristo 2013-07-24 14:29 ` Tero Kristo 2013-07-24 14:34 ` Roger Quadros 2013-07-24 14:34 ` Roger Quadros 2013-07-24 14:43 ` Tero Kristo 2013-07-24 14:43 ` Tero Kristo [not found] ` <1374564028-11352-30-git-send-email-t-kristo@ti.com> 2013-07-30 20:19 ` [PATCHv4 29/33] CLK: omap: add omap3 clock init file Nishanth Menon 2013-07-30 20:19 ` Nishanth Menon 2013-07-31 6:35 ` Tony Lindgren 2013-07-31 6:35 ` Tony Lindgren 2013-07-31 15:10 ` Tero Kristo 2013-07-31 15:10 ` Tero Kristo 2013-08-02 7:24 ` Tony Lindgren 2013-08-02 7:24 ` Tony Lindgren
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