[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Andrew Lunn]

The process of making most kirkwood boards boot using DT is nearly
complete. We can now move these boards into mach-mvebu, freeing them
of the legacy code needed for none-DT systems. At the same time, they
can become part of ARCH_MULTI_V5.

Since v1:
mv88f6281gtw_ge switch really does now use DT.
The L2 Cache binding has been re-written.
kirkwood.dtsi changes have been placed into there own patch.
Added mvebu_v5_defconfig
Fixed a few typos in changelogs
Added a few Cc:s

Andrew Lunn (23):
  ARM: Kirkwood: Give pm.c its own header file.
  IRQ: Orion: Fix getting generic chip pointer.
  ARM: Kirkwood: Convert mv88f6281gtw_ge switch setup to DT
  ARM: Kirkwood: Drop printing the SoC type and revision
  ARM: Kirkwood: Seperate board-dt from common and pcie code.
  ARM: Kirkwood: ioremap the cpu_config register before using it.
  ARM: Kirkwood: ioremap memory control register
  ARM: MVEBU: Add ARCH_MULTI_V7 to SoCs
  ARM: Orion: Move cache-feroceon-l2.h out of plat-orion
  ARM: MM: Add DT binding for Feroceon L2 cache
  ARM: Kirkwood: Instantiate L2 cache from DT.
  ARM: Fix default CPU selection for ARCH_MULTI_V5
  ARM: Fix MULTI_TLB for feroceon
  ARM: MM Enable building Feroceon L2 cache controller with ARCH_MVEBU
  ARM: Move kirkwood DT boards into mach-mvebu
  ARM: MVEBU: Let kirkwood use the system controller for restart
  ARM: MVEBU: Instantiate system controller in kirkwood.dtsi
  drivers: Enable building of Kirkwood drivers for mach-mvebu
  ARM: MVEBU: Enable mvebu-soc-id on Kirkwood
  ARM: config: Add a multi_v5_defconfig
  ARM: MVEBU: Simplifiy headers and make local
  ARM: config: Add mvebu_v5_defconfig
  ARM: Kirkwood: Remove DT support

 .../devicetree/bindings/arm/mrvl/feroceon.txt      |  17 ++
 arch/arm/Kconfig                                   |   2 +-
 arch/arm/boot/dts/Makefile                         |  34 ++--
 arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts     |  62 +++++++
 arch/arm/boot/dts/kirkwood.dtsi                    |  10 ++
 arch/arm/configs/kirkwood_defconfig                |   6 -
 arch/arm/configs/multi_v5_defconfig                | 183 ++++++++++++++++++++
 arch/arm/configs/mvebu_v5_defconfig                | 166 ++++++++++++++++++
 arch/arm/include/asm/hardware/cache-feroceon-l2.h  |  13 ++
 arch/arm/mach-kirkwood/Kconfig                     |  25 ---
 arch/arm/mach-kirkwood/Makefile                    |   6 +-
 arch/arm/mach-kirkwood/board-dt.c                  | 150 ----------------
 arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c     |  50 ------
 arch/arm/mach-kirkwood/common.c                    |   3 +-
 arch/arm/mach-kirkwood/common.h                    |  13 --
 arch/arm/mach-kirkwood/include/mach/bridge-regs.h  |   2 +
 arch/arm/mach-kirkwood/pm.c                        |   9 +-
 arch/arm/mach-kirkwood/pm.h                        |  26 +++
 arch/arm/mach-mv78xx0/common.c                     |   2 +-
 arch/arm/mach-mvebu/Kconfig                        |  28 ++-
 arch/arm/mach-mvebu/Makefile                       |   1 +
 arch/arm/mach-mvebu/kirkwood-pm.c                  |  76 +++++++++
 arch/arm/mach-mvebu/kirkwood-pm.h                  |  26 +++
 arch/arm/mach-mvebu/kirkwood.c                     | 189 +++++++++++++++++++++
 arch/arm/mach-mvebu/kirkwood.h                     |  22 +++
 arch/arm/mach-mvebu/mvebu-soc-id.c                 |   1 +
 arch/arm/mm/Kconfig                                |   2 +-
 arch/arm/mm/cache-feroceon-l2.c                    |  54 +++++-
 arch/arm/mm/proc-feroceon.S                        |   2 +-
 arch/arm/mm/tlb-v4wbi.S                            |   3 +
 .../plat-orion/include/plat/cache-feroceon-l2.h    |  11 --
 drivers/cpufreq/Kconfig.arm                        |   2 +-
 drivers/cpuidle/Kconfig.arm                        |   2 +-
 drivers/irqchip/irq-orion.c                        |   3 +-
 drivers/leds/Kconfig                               |   4 +-
 drivers/phy/Kconfig                                |   2 +-
 drivers/thermal/Kconfig                            |   2 +-
 sound/soc/kirkwood/Kconfig                         |   2 +-
 38 files changed, 914 insertions(+), 297 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
 create mode 100644 arch/arm/configs/multi_v5_defconfig
 create mode 100644 arch/arm/configs/mvebu_v5_defconfig
 create mode 100644 arch/arm/include/asm/hardware/cache-feroceon-l2.h
 delete mode 100644 arch/arm/mach-kirkwood/board-dt.c
 delete mode 100644 arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
 create mode 100644 arch/arm/mach-kirkwood/pm.h
 create mode 100644 arch/arm/mach-mvebu/kirkwood-pm.c
 create mode 100644 arch/arm/mach-mvebu/kirkwood-pm.h
 create mode 100644 arch/arm/mach-mvebu/kirkwood.c
 create mode 100644 arch/arm/mach-mvebu/kirkwood.h
 delete mode 100644 arch/arm/plat-orion/include/plat/cache-feroceon-l2.h

-- 
1.8.5.3

[PATCH v2 01/23] ARM: Kirkwood: Give pm.c its own header file.

[Andrew Lunn]

The pm code needs to be seperated from common.h in order to split DT
and non-DT systems apart. Move the declarations into a header file of
its own and include it where needed.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-kirkwood/board-dt.c |  1 +
 arch/arm/mach-kirkwood/common.c   |  1 +
 arch/arm/mach-kirkwood/common.h   |  6 ------
 arch/arm/mach-kirkwood/pm.h       | 26 ++++++++++++++++++++++++++
 4 files changed, 28 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/mach-kirkwood/pm.h

diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 78188159484d..ceffdc8ffbbd 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -24,6 +24,7 @@
 #include <mach/bridge-regs.h>
 #include <plat/common.h>
 #include "common.h"
+#include "pm.h"
 
 #define MV643XX_ETH_MAC_ADDR_LOW	0x0414
 #define MV643XX_ETH_MAC_ADDR_HIGH	0x0418
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f3407a5db216..52aca25432a7 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -36,6 +36,7 @@
 #include <plat/time.h>
 #include <linux/platform_data/dma-mv_xor.h>
 #include "common.h"
+#include "pm.h"
 
 /* These can go away once Kirkwood uses the mvebu-mbus DT binding */
 #define KIRKWOOD_MBUS_NAND_TARGET 0x01
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 05fd648df543..1296de94febf 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -58,12 +58,6 @@ void kirkwood_cpufreq_init(void);
 void kirkwood_restart(enum reboot_mode, const char *);
 void kirkwood_clk_init(void);
 
-#ifdef CONFIG_PM
-void kirkwood_pm_init(void);
-#else
-static inline void kirkwood_pm_init(void) {};
-#endif
-
 /* board init functions for boards not fully converted to fdt */
 #ifdef CONFIG_MACH_MV88F6281GTW_GE_DT
 void mv88f6281gtw_ge_init(void);
diff --git a/arch/arm/mach-kirkwood/pm.h b/arch/arm/mach-kirkwood/pm.h
new file mode 100644
index 000000000000..21e7530f368b
--- /dev/null
+++ b/arch/arm/mach-kirkwood/pm.h
@@ -0,0 +1,26 @@
+/*
+ * Power Management driver for Marvell Kirkwood SoCs
+ *
+ * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com>
+ * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License,
+ * version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ARCH_KIRKWOOD_PM_H
+#define __ARCH_KIRKWOOD_PM_H
+
+#ifdef CONFIG_PM
+void kirkwood_pm_init(void);
+#else
+static inline void kirkwood_pm_init(void) {};
+#endif
+
+#endif
-- 
1.8.5.3

[PATCH v2 01/23] ARM: Kirkwood: Give pm.c its own header file.

[Ezequiel Garcia]

On Sat, Feb 15, 2014 at 11:19:59AM +0100, Andrew Lunn wrote:
> The pm code needs to be seperated from common.h in order to split DT
> and non-DT systems apart. Move the declarations into a header file of
> its own and include it where needed.
> 

s/seperated/separated

Other than that:

Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

[PATCH v2 02/23] IRQ: Orion: Fix getting generic chip pointer.

[Andrew Lunn]

Enabling SPARSE_IRQ shows up a bug in the irq-orion bridge interrupt
handler. The bridge interrupt is implemented using a single generic
chip. Thus the parameter passed to irq_get_domain_generic_chip()
should always be zero.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
 drivers/irqchip/irq-orion.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-orion.c b/drivers/irqchip/irq-orion.c
index e51d40031884..7d4e189ab4ec 100644
--- a/drivers/irqchip/irq-orion.c
+++ b/drivers/irqchip/irq-orion.c
@@ -111,7 +111,8 @@ IRQCHIP_DECLARE(orion_intc, "marvell,orion-intc", orion_irq_init);
 static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
 	struct irq_domain *d = irq_get_handler_data(irq);
-	struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, irq);
+
+	struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, 0);
 	u32 stat = readl_relaxed(gc->reg_base + ORION_BRIDGE_IRQ_CAUSE) &
 		   gc->mask_cache;
 
-- 
1.8.5.3

[PATCH v2 03/23] ARM: Kirkwood: Convert mv88f6281gtw_ge switch setup to DT

[Andrew Lunn]

The mv88f6281gtw_ge has a ethernet switch connected to the ethernet
port of the SoC. Convert the platform device instantiation to a DT
instantiation.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Cc: florian at openwrt.org
---
v2
Remove the spurius Module.symvers
Really do describe the switch in DT.
---
 arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts | 62 ++++++++++++++++++++++++++
 arch/arm/mach-kirkwood/Kconfig                 |  7 ---
 arch/arm/mach-kirkwood/Makefile                |  1 -
 arch/arm/mach-kirkwood/board-dt.c              |  3 --
 arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c | 50 ---------------------
 arch/arm/mach-kirkwood/common.h                |  7 ---
 6 files changed, 62 insertions(+), 68 deletions(-)
 delete mode 100644 arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c

diff --git a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
index dc86429756d7..2cb0dc529165 100644
--- a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
+++ b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
@@ -122,4 +122,66 @@
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 	};
+
+	dsa at 0 {
+		compatible = "marvell,dsa";
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		dsa,ethernet = <&eth0>;
+		dsa,mii-bus = <&ethphy0>;
+
+		switch at 0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0 0>;	/* MDIO address 0, switch 0 in tree */
+
+			port at 0 {
+				reg = <0>;
+				label = "lan1";
+			};
+
+			port at 1 {
+				reg = <1>;
+				label = "lan2";
+			};
+
+			port at 2 {
+				reg = <2>;
+				label = "lan3";
+			};
+
+			port at 3 {
+				reg = <3>;
+				label = "lan4";
+			};
+
+			port at 4 {
+				reg = <4>;
+				label = "wan";
+			};
+
+			port at 5 {
+				reg = <5>;
+				label = "cpu";
+			};
+		};
+	};
+};
+
+&mdio {
+	status = "okay";
+
+	ethphy0: ethernet-phy at ff {
+		reg = <0xff>; 	/* No phy attached */
+		speed = <1000>;
+		duplex = <1>;
+	};
+};
+
+&eth0 {
+	status = "okay";
+	ethernet0-port at 0 {
+		phy-handle = <&ethphy0>;
+	};
 };
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index fe8319ad3158..df4b26340ae4 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -106,13 +106,6 @@ config ARCH_KIRKWOOD_DT
 	  Say 'Y' here if you want your kernel to support the
 	  Marvell Kirkwood using flattened device tree.
 
-config MACH_MV88F6281GTW_GE_DT
-	bool "Marvell 88F6281 GTW GE Board (Flattened Device Tree)"
-	depends on ARCH_KIRKWOOD_DT
-	help
-	  Say 'Y' here if you want your kernel to support the
-	  Marvell 88F6281 GTW GE Board (Flattened Device Tree).
-
 endmenu
 
 endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index 144b51102939..dc22bf5b21ed 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -13,4 +13,3 @@ obj-$(CONFIG_MACH_TS219)		+= ts219-setup.o tsx1x-common.o
 obj-$(CONFIG_MACH_TS41X)		+= ts41x-setup.o tsx1x-common.o
 
 obj-$(CONFIG_ARCH_KIRKWOOD_DT)		+= board-dt.o
-obj-$(CONFIG_MACH_MV88F6281GTW_GE_DT)	+= board-mv88f6281gtw_ge.o
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index ceffdc8ffbbd..e74b31aa9736 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -131,9 +131,6 @@ static void __init kirkwood_dt_init(void)
 	kexec_reinit = kirkwood_enable_pcie;
 #endif
 
-	if (of_machine_is_compatible("marvell,mv88f6281gtw-ge"))
-		mv88f6281gtw_ge_init();
-
 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
 
diff --git a/arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c b/arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
deleted file mode 100644
index ee5eea678c11..000000000000
--- a/arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
- *
- * Marvell 88F6281 GTW GE Board Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/timer.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/ethtool.h>
-#include <linux/gpio.h>
-#include <net/dsa.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
-#include <mach/kirkwood.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data mv88f6281gtw_ge_ge00_data = {
-	.phy_addr	= MV643XX_ETH_PHY_NONE,
-	.speed		= SPEED_1000,
-	.duplex		= DUPLEX_FULL,
-};
-
-static struct dsa_chip_data mv88f6281gtw_ge_switch_chip_data = {
-	.port_names[0]	= "lan1",
-	.port_names[1]	= "lan2",
-	.port_names[2]	= "lan3",
-	.port_names[3]	= "lan4",
-	.port_names[4]	= "wan",
-	.port_names[5]	= "cpu",
-};
-
-static struct dsa_platform_data mv88f6281gtw_ge_switch_plat_data = {
-	.nr_chips	= 1,
-	.chip		= &mv88f6281gtw_ge_switch_chip_data,
-};
-
-void __init mv88f6281gtw_ge_init(void)
-{
-	kirkwood_ge00_init(&mv88f6281gtw_ge_ge00_data);
-	kirkwood_ge00_switch_init(&mv88f6281gtw_ge_switch_plat_data, NO_IRQ);
-}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 1296de94febf..832a4e2ab8d7 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -58,13 +58,6 @@ void kirkwood_cpufreq_init(void);
 void kirkwood_restart(enum reboot_mode, const char *);
 void kirkwood_clk_init(void);
 
-/* board init functions for boards not fully converted to fdt */
-#ifdef CONFIG_MACH_MV88F6281GTW_GE_DT
-void mv88f6281gtw_ge_init(void);
-#else
-static inline void mv88f6281gtw_ge_init(void) {};
-#endif
-
 /* early init functions not converted to fdt yet */
 char *kirkwood_id(void);
 void kirkwood_l2_init(void);
-- 
1.8.5.3

[PATCH v2 04/23] ARM: Kirkwood: Drop printing the SoC type and revision

[Andrew Lunn]

This will be added back using the mach-mvebu equivelent once the move
has been made.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-kirkwood/board-dt.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index e74b31aa9736..a0c0ff39788e 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -107,8 +107,6 @@ eth_fixup_skip:
 
 static void __init kirkwood_dt_init(void)
 {
-	pr_info("Kirkwood: %s.\n", kirkwood_id());
-
 	/*
 	 * Disable propagation of mbus errors to the CPU local bus,
 	 * as this causes mbus errors (which can occur for example
-- 
1.8.5.3

[PATCH v2 04/23] ARM: Kirkwood: Drop printing the SoC type and revision

[Ezequiel Garcia]

On Sat, Feb 15, 2014 at 11:20:02AM +0100, Andrew Lunn wrote:
> This will be added back using the mach-mvebu equivelent once the move
> has been made.
> 

Minor typo: s/equivelent/equivalent

-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

[PATCH v2 05/23] ARM: Kirkwood: Seperate board-dt from common and pcie code.

[Andrew Lunn]

In order to be able to move DT support into mach-mvebu, the DT code
needs to be cleanly separated from common and pcie code. Import the
needed bits of these files into board-dt.c. The "common" code then
becomes purely legacy, supporting none DT boards, so reflect this in
the Makefile targets.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-kirkwood/Makefile   |  3 +-
 arch/arm/mach-kirkwood/board-dt.c | 88 ++++++++++++++++++++++++++++++++++++++-
 2 files changed, 88 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index dc22bf5b21ed..3a72c5c6e747 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -1,5 +1,4 @@
-obj-y				+= common.o pcie.o
-obj-$(CONFIG_KIRKWOOD_LEGACY)	+= irq.o mpp.o
+obj-$(CONFIG_KIRKWOOD_LEGACY)	+= irq.o mpp.o common.o pcie.o
 obj-$(CONFIG_PM)		+= pm.o
 
 obj-$(CONFIG_MACH_D2NET_V2)		+= d2net_v2-setup.o lacie_v2-common.o
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index a0c0ff39788e..64151a4a378f 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -21,11 +21,97 @@
 #include <linux/irqchip.h>
 #include <linux/kexec.h>
 #include <asm/mach/arch.h>
+#include <asm/mach/map.h>
 #include <mach/bridge-regs.h>
 #include <plat/common.h>
-#include "common.h"
+#include <plat/cache-feroceon-l2.h>
+#include <plat/pcie.h>
 #include "pm.h"
 
+static struct map_desc kirkwood_io_desc[] __initdata = {
+	{
+		.virtual	= (unsigned long) KIRKWOOD_REGS_VIRT_BASE,
+		.pfn		= __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
+		.length		= KIRKWOOD_REGS_SIZE,
+		.type		= MT_DEVICE,
+	},
+};
+
+static void __init kirkwood_map_io(void)
+{
+	iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
+}
+
+static void __init kirkwood_l2_init(void)
+{
+#ifdef CONFIG_CACHE_FEROCEON_L2
+#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
+	writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
+	feroceon_l2_init(1);
+#else
+	writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
+	feroceon_l2_init(0);
+#endif
+#endif
+}
+
+static struct resource kirkwood_cpufreq_resources[] = {
+	[0] = {
+		.start  = CPU_CONTROL_PHYS,
+		.end    = CPU_CONTROL_PHYS + 3,
+		.flags  = IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device kirkwood_cpufreq_device = {
+	.name		= "kirkwood-cpufreq",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(kirkwood_cpufreq_resources),
+	.resource	= kirkwood_cpufreq_resources,
+};
+
+static void __init kirkwood_cpufreq_init(void)
+{
+	platform_device_register(&kirkwood_cpufreq_device);
+}
+
+static struct resource kirkwood_cpuidle_resource[] = {
+	{
+		.flags	= IORESOURCE_MEM,
+		.start	= DDR_OPERATION_BASE,
+		.end	= DDR_OPERATION_BASE + 3,
+	},
+};
+
+static struct platform_device kirkwood_cpuidle = {
+	.name		= "kirkwood_cpuidle",
+	.id		= -1,
+	.resource	= kirkwood_cpuidle_resource,
+	.num_resources	= 1,
+};
+
+static void __init kirkwood_cpuidle_init(void)
+{
+	platform_device_register(&kirkwood_cpuidle);
+}
+
+/* Temporary here since mach-mvebu has a function we can use */
+static void kirkwood_restart(enum reboot_mode mode, const char *cmd)
+{
+	/*
+	 * Enable soft reset to assert RSTOUTn.
+	 */
+	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+	/*
+	 * Assert soft reset.
+	 */
+	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+	while (1)
+		;
+}
+
 #define MV643XX_ETH_MAC_ADDR_LOW	0x0414
 #define MV643XX_ETH_MAC_ADDR_HIGH	0x0418
 
-- 
1.8.5.3

[PATCH v2 05/23] ARM: Kirkwood: Seperate board-dt from common and pcie code.

[Arnd Bergmann]

On Saturday 15 February 2014 11:20:03 Andrew Lunn wrote:
> +static void __init kirkwood_l2_init(void)
> +{
> +#ifdef CONFIG_CACHE_FEROCEON_L2
> +#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
> +       writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
> +       feroceon_l2_init(1);
> +#else
> +       writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
> +       feroceon_l2_init(0);
> +#endif
> +#endif
> +}

I assume this is correct, but I don't understand it. Why is there a
configuration option for this? Do both write-through and write-back
work on all machines, or could there be a case where some machine
actually requires a particular mode? If not, isn't write-back
normally "better", so you won't actually ever want to set write-through
mode?

	Arnd

[PATCH v2 05/23] ARM: Kirkwood: Seperate board-dt from common and pcie code.

[Andrew Lunn]

On Sat, Feb 15, 2014 at 02:18:08PM +0100, Arnd Bergmann wrote:
> On Saturday 15 February 2014 11:20:03 Andrew Lunn wrote:
> > +static void __init kirkwood_l2_init(void)
> > +{
> > +#ifdef CONFIG_CACHE_FEROCEON_L2
> > +#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
> > +       writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
> > +       feroceon_l2_init(1);
> > +#else
> > +       writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
> > +       feroceon_l2_init(0);
> > +#endif
> > +#endif
> > +}
> 
> I assume this is correct, but I don't understand it. Why is there a
> configuration option for this? Do both write-through and write-back
> work on all machines, or could there be a case where some machine
> actually requires a particular mode? If not, isn't write-back
> normally "better", so you won't actually ever want to set write-through
> mode?

Hi Arnd

The honest answer is, i've no idea. I'm just shuffling code around in
this patch, and not applying my brain as to what this code does....

Maybe JasonG has a better idea of this history of this?

      Andrew

[PATCH v2 05/23] ARM: Kirkwood: Seperate board-dt from common and pcie code.

[Jason Gunthorpe]

On Sat, Feb 15, 2014 at 03:05:05PM +0100, Andrew Lunn wrote:
> On Sat, Feb 15, 2014 at 02:18:08PM +0100, Arnd Bergmann wrote:
> > On Saturday 15 February 2014 11:20:03 Andrew Lunn wrote:
> > > +static void __init kirkwood_l2_init(void)
> > > +{
> > > +#ifdef CONFIG_CACHE_FEROCEON_L2
> > > +#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
> > > +       writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
> > > +       feroceon_l2_init(1);
> > > +#else
> > > +       writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
> > > +       feroceon_l2_init(0);
> > > +#endif
> > > +#endif
> > > +}
> > 
> > I assume this is correct, but I don't understand it. Why is there a
> > configuration option for this? Do both write-through and write-back
> > work on all machines, or could there be a case where some machine
> > actually requires a particular mode? If not, isn't write-back
> > normally "better", so you won't actually ever want to set write-through
> > mode?
> 
> Hi Arnd
> 
> The honest answer is, i've no idea. I'm just shuffling code around in
> this patch, and not applying my brain as to what this code does....
> 
> Maybe JasonG has a better idea of this history of this?

No idea of the history, but for DMA heavy work loads write-through is
better since you spend less cpu cycles doing cache flushing, while for
CPU centric work loads write-back is better since you spend less time
waiting for memory.

Since these SOCs are popular for storage and networking apps I'm not
surprised to see this option.

But a static config option is not really in-line with current thinking
on these sorts of things. A DT option would be better (IMHO), but even
that is probably not going to be universally loved.

Can we worry about this after Andrew's shuffling is done?

Regards,
Jason

[PATCH v2 05/23] ARM: Kirkwood: Seperate board-dt from common and pcie code.

[Andrew Lunn]

> Can we worry about this after Andrew's shuffling is done?

Hi Jason

I think so. I plan to keep to a config option for the moment and
remove the wt-override from DT. We can put it back again later.

       Andrew

[PATCH v2 05/23] ARM: Kirkwood: Seperate board-dt from common and pcie code.

[Arnd Bergmann]

On Tuesday 18 February 2014 11:37:46 Jason Gunthorpe wrote:
> 
> No idea of the history, but for DMA heavy work loads write-through is
> better since you spend less cpu cycles doing cache flushing, while for
> CPU centric work loads write-back is better since you spend less time
> waiting for memory.
> 
> Since these SOCs are popular for storage and networking apps I'm not
> surprised to see this option.

Ok, that makes much more sense than anything I could come up with ;-)

> But a static config option is not really in-line with current thinking
> on these sorts of things. A DT option would be better (IMHO), but even
> that is probably not going to be universally loved.

One of the later patches actually introduced a DT property for
it, but the implementation of that seemed incomplete, so the current
plan is to keep the Kconfig option for now.

> Can we worry about this after Andrew's shuffling is done?

Sure.

	Arnd

[PATCH v2 06/23] ARM: Kirkwood: ioremap the cpu_config register before using it.

[Andrew Lunn]

With the move to mach-mvebu and MULTI_V5, the global iomap for all
registers will be going away. So explicitly map the CPU configuration
register before using it.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-kirkwood/board-dt.c                 | 22 +++++++++++++++-------
 arch/arm/mach-kirkwood/include/mach/bridge-regs.h |  1 +
 2 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 64151a4a378f..91b61a971af2 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -191,15 +191,23 @@ eth_fixup_skip:
 	}
 }
 
+/*
+ * Disable propagation of mbus errors to the CPU local bus, as this
+ * causes mbus errors (which can occur for example for PCI aborts) to
+ * throw CPU aborts, which we're not set up to deal with.
+ */
+void kirkwood_disable_mbus_error_propagation(void)
+{
+	void __iomem *cpu_config;
+
+	cpu_config = ioremap(CPU_CONFIG_PHYS, 4);
+	writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config);
+}
+
+
 static void __init kirkwood_dt_init(void)
 {
-	/*
-	 * Disable propagation of mbus errors to the CPU local bus,
-	 * as this causes mbus errors (which can occur for example
-	 * for PCI aborts) to throw CPU aborts, which we're not set
-	 * up to deal with.
-	 */
-	writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
+	kirkwood_disable_mbus_error_propagation();
 
 	BUG_ON(mvebu_mbus_dt_init());
 
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 8b9d1c9ff199..2bd12fde1781 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -14,6 +14,7 @@
 #include <mach/kirkwood.h>
 
 #define CPU_CONFIG		(BRIDGE_VIRT_BASE + 0x0100)
+#define CPU_CONFIG_PHYS		(BRIDGE_PHYS_BASE + 0x0100)
 #define CPU_CONFIG_ERROR_PROP	0x00000004
 
 #define CPU_CONTROL		(BRIDGE_VIRT_BASE + 0x0104)
-- 
1.8.5.3

[PATCH v2 06/23] ARM: Kirkwood: ioremap the cpu_config register before using it.

[Ezequiel Garcia]

Hi Andrew,

On Sat, Feb 15, 2014 at 11:20:04AM +0100, Andrew Lunn wrote:
[..]
>  
> +/*
> + * Disable propagation of mbus errors to the CPU local bus, as this
> + * causes mbus errors (which can occur for example for PCI aborts) to
> + * throw CPU aborts, which we're not set up to deal with.
> + */
> +void kirkwood_disable_mbus_error_propagation(void)
> +{
> +	void __iomem *cpu_config;
> +
> +	cpu_config = ioremap(CPU_CONFIG_PHYS, 4);
> +	writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config);
> +}
> +

Any reason why this function above is not static __init?

And then: any reason why you're not unmapping the region?

(Sorry if this was already discussed)
-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

[PATCH v2 07/23] ARM: Kirkwood: ioremap memory control register

[Andrew Lunn]

To allow removal of the global map of registers, make the pm code
ioremap the registers it needs.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 1 +
 arch/arm/mach-kirkwood/pm.c                       | 9 ++++++---
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 2bd12fde1781..6e5077e2ec26 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -80,5 +80,6 @@
 #define CGC_RESERVED		(0x6 << 21)
 
 #define MEMORY_PM_CTRL		(BRIDGE_VIRT_BASE + 0x118)
+#define MEMORY_PM_CTRL_PHYS	(BRIDGE_PHYS_BASE + 0x118)
 
 #endif
diff --git a/arch/arm/mach-kirkwood/pm.c b/arch/arm/mach-kirkwood/pm.c
index c6ab8d9303a5..8e5e0329d04c 100644
--- a/arch/arm/mach-kirkwood/pm.c
+++ b/arch/arm/mach-kirkwood/pm.c
@@ -21,15 +21,16 @@
 #include "common.h"
 
 static void __iomem *ddr_operation_base;
+static void __iomem *memory_pm_ctrl;
 
 static void kirkwood_low_power(void)
 {
 	u32 mem_pm_ctrl;
 
-	mem_pm_ctrl = readl(MEMORY_PM_CTRL);
+	mem_pm_ctrl = readl(memory_pm_ctrl);
 
 	/* Set peripherals to low-power mode */
-	writel_relaxed(~0, MEMORY_PM_CTRL);
+	writel_relaxed(~0, memory_pm_ctrl);
 
 	/* Set DDR in self-refresh */
 	writel_relaxed(0x7, ddr_operation_base);
@@ -41,7 +42,7 @@ static void kirkwood_low_power(void)
 	 */
 	cpu_do_idle();
 
-	writel_relaxed(mem_pm_ctrl, MEMORY_PM_CTRL);
+	writel_relaxed(mem_pm_ctrl, memory_pm_ctrl);
 }
 
 static int kirkwood_suspend_enter(suspend_state_t state)
@@ -69,5 +70,7 @@ static const struct platform_suspend_ops kirkwood_suspend_ops = {
 void __init kirkwood_pm_init(void)
 {
 	ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4);
+	memory_pm_ctrl = ioremap(MEMORY_PM_CTRL_PHYS, 4);
+
 	suspend_set_ops(&kirkwood_suspend_ops);
 }
-- 
1.8.5.3

[PATCH v2 07/23] ARM: Kirkwood: ioremap memory control register

[Ezequiel Garcia]

On Sat, Feb 15, 2014 at 11:20:05AM +0100, Andrew Lunn wrote:
> To allow removal of the global map of registers, make the pm code
> ioremap the registers it needs.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> ---
>  arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 1 +
>  arch/arm/mach-kirkwood/pm.c                       | 9 ++++++---
>  2 files changed, 7 insertions(+), 3 deletions(-)
> 

Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>

-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

[PATCH v2 08/23] ARM: MVEBU: Add ARCH_MULTI_V7 to SoCs

[Andrew Lunn]

Prepare mach-mvebu to house both ARCH_MULTI_V7 and ARCH_MULTI_V5
systems by adding ARCH_MULTI_V7 to the existing SOCs.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-mvebu/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 5e269d7263ce..9ab22e1b26cd 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -29,7 +29,7 @@ config MACH_ARMADA_370_XP
 	select CPU_PJ4B
 
 config MACH_ARMADA_370
-	bool "Marvell Armada 370 boards"
+	bool "Marvell Armada 370 boards" if ARCH_MULTI_V7
 	select ARMADA_370_CLK
 	select MACH_ARMADA_370_XP
 	select PINCTRL_ARMADA_370
@@ -38,7 +38,7 @@ config MACH_ARMADA_370
 	  on the Marvell Armada 370 SoC with device tree.
 
 config MACH_ARMADA_XP
-	bool "Marvell Armada XP boards"
+	bool "Marvell Armada XP boards" if ARCH_MULTI_V7
 	select ARMADA_XP_CLK
 	select MACH_ARMADA_370_XP
 	select PINCTRL_ARMADA_XP
-- 
1.8.5.3

[PATCH v2 09/23] ARM: Orion: Move cache-feroceon-l2.h out of plat-orion

[Andrew Lunn]

With the gradual move to DT, kirkwood has become a lot less dependent
on plat-orion. cache-feroceon-l2.h is the last dependency. Move it out
so we can drop plat-orion when building DT only kirkwood boards.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/include/asm/hardware/cache-feroceon-l2.h    | 11 +++++++++++
 arch/arm/mach-kirkwood/board-dt.c                    |  2 +-
 arch/arm/mach-kirkwood/common.c                      |  2 +-
 arch/arm/mach-mv78xx0/common.c                       |  2 +-
 arch/arm/mm/cache-feroceon-l2.c                      |  2 +-
 arch/arm/plat-orion/include/plat/cache-feroceon-l2.h | 11 -----------
 6 files changed, 15 insertions(+), 15 deletions(-)
 create mode 100644 arch/arm/include/asm/hardware/cache-feroceon-l2.h
 delete mode 100644 arch/arm/plat-orion/include/plat/cache-feroceon-l2.h

diff --git a/arch/arm/include/asm/hardware/cache-feroceon-l2.h b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
new file mode 100644
index 000000000000..8edd330aabf6
--- /dev/null
+++ b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
@@ -0,0 +1,11 @@
+/*
+ * arch/arm/include/asm/hardware/cache-feroceon-l2.h
+ *
+ * Copyright (C) 2008 Marvell Semiconductor
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+extern void __init feroceon_l2_init(int l2_wt_override);
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 91b61a971af2..34c35510fd17 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -20,11 +20,11 @@
 #include <linux/dma-mapping.h>
 #include <linux/irqchip.h>
 #include <linux/kexec.h>
+#include <asm/hardware/cache-feroceon-l2.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/bridge-regs.h>
 #include <plat/common.h>
-#include <plat/cache-feroceon-l2.h>
 #include <plat/pcie.h>
 #include "pm.h"
 
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 52aca25432a7..255f33a3903c 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -25,10 +25,10 @@
 #include <asm/page.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
+#include <asm/hardware/cache-feroceon-l2.h>
 #include <mach/kirkwood.h>
 #include <mach/bridge-regs.h>
 #include <linux/platform_data/asoc-kirkwood.h>
-#include <plat/cache-feroceon-l2.h>
 #include <linux/platform_data/mmc-mvsdio.h>
 #include <linux/platform_data/mtd-orion_nand.h>
 #include <linux/platform_data/usb-ehci-orion.h>
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 75062eff2494..e6ac679bece9 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -15,11 +15,11 @@
 #include <linux/ata_platform.h>
 #include <linux/clk-provider.h>
 #include <linux/ethtool.h>
+#include <asm/hardware/cache-feroceon-l2.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <mach/mv78xx0.h>
 #include <mach/bridge-regs.h>
-#include <plat/cache-feroceon-l2.h>
 #include <linux/platform_data/usb-ehci-orion.h>
 #include <linux/platform_data/mtd-orion_nand.h>
 #include <plat/time.h>
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 48bc3c0a87ce..898362e7972b 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -16,7 +16,7 @@
 #include <linux/highmem.h>
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
-#include <plat/cache-feroceon-l2.h>
+#include <asm/hardware/cache-feroceon-l2.h>
 
 /*
  * Low-level cache maintenance operations.
diff --git a/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
deleted file mode 100644
index 06f982d55697..000000000000
--- a/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
- *
- * Copyright (C) 2008 Marvell Semiconductor
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-extern void __init feroceon_l2_init(int l2_wt_override);
-- 
1.8.5.3

[PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Andrew Lunn]

Instantiate the L2 cache from DT. Indicate in DT where the cache
control register is and if write through should be made.

Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
---
v2:
Change compatible strings to follow l2x0 convention
Only expect register for kirkwood-cache.
Default to write through if no DT node.
Rename writethrough to wt-override to follow l2cc binding.
Split kirkwood.dtsi change into a patch of its own.
---
 .../devicetree/bindings/arm/mrvl/feroceon.txt      | 17 +++++++
 arch/arm/include/asm/hardware/cache-feroceon-l2.h  |  2 +
 arch/arm/mach-kirkwood/board-dt.c                  | 15 +------
 arch/arm/mm/cache-feroceon-l2.c                    | 52 ++++++++++++++++++++++
 4 files changed, 72 insertions(+), 14 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/mrvl/feroceon.txt

diff --git a/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
new file mode 100644
index 000000000000..d6d7d6195ed1
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
@@ -0,0 +1,17 @@
+* Marvell Feroceon Cache
+
+Required properties:
+- compatible : Should be either "marvell,ferocean-cache" or
+  	       "marvell,kirkwood-cache".
+
+Optional properties:
+- wt-override: If present then L2 is forced to Write through mode
+- reg        : Address of the L2 cache control register. Mandatory for
+  	       "marvell,kirkwood-cache", not used by "marvell,ferocean-cache"
+
+
+Example:
+		l2: l2-cache@20128 {
+			compatible = "marvell,kirkwood-cache";
+			reg = <0x20128 0x4>;
+		};
diff --git a/arch/arm/include/asm/hardware/cache-feroceon-l2.h b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
index 8edd330aabf6..12e1588dc4f1 100644
--- a/arch/arm/include/asm/hardware/cache-feroceon-l2.h
+++ b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
@@ -9,3 +9,5 @@
  */
 
 extern void __init feroceon_l2_init(int l2_wt_override);
+extern int __init feroceon_of_init(void);
+
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 34c35510fd17..2ef59ee2182d 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -42,19 +42,6 @@ static void __init kirkwood_map_io(void)
 	iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
 }
 
-static void __init kirkwood_l2_init(void)
-{
-#ifdef CONFIG_CACHE_FEROCEON_L2
-#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
-	writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
-	feroceon_l2_init(1);
-#else
-	writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
-	feroceon_l2_init(0);
-#endif
-#endif
-}
-
 static struct resource kirkwood_cpufreq_resources[] = {
 	[0] = {
 		.start  = CPU_CONTROL_PHYS,
@@ -211,7 +198,7 @@ static void __init kirkwood_dt_init(void)
 
 	BUG_ON(mvebu_mbus_dt_init());
 
-	kirkwood_l2_init();
+	feroceon_of_init();
 
 	kirkwood_cpufreq_init();
 	kirkwood_cpuidle_init();
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 898362e7972b..17a1ecd7a40c 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -13,11 +13,16 @@
  */
 
 #include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 #include <linux/highmem.h>
+#include <linux/io.h>
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
 #include <asm/hardware/cache-feroceon-l2.h>
 
+#define L2_WRITETHROUGH_KIRKWOOD	BIT(4)
+
 /*
  * Low-level cache maintenance operations.
  *
@@ -350,3 +355,50 @@ void __init feroceon_l2_init(int __l2_wt_override)
 	printk(KERN_INFO "Feroceon L2: Cache support initialised%s.\n",
 			 l2_wt_override ? ", in WT override mode" : "");
 }
+#ifdef CONFIG_OF
+static const struct of_device_id feroceon_ids[] __initconst = {
+	{ .compatible = "marvell,kirkwood-cache"},
+	{ .compatible = "marvell,feroceon-cache"},
+	{}
+};
+
+int __init feroceon_of_init(void)
+{
+	struct device_node *node;
+	void __iomem *base;
+	bool l2_wt_override = false;
+	struct resource res;
+
+	node = of_find_matching_node(NULL, feroceon_ids);
+	if (!node) {
+		/*
+		 * If we don't know the write through state then
+		 * assume it is write back, as that is the safest
+		 * option.
+		 */
+		feroceon_l2_init(0);
+		return 0;
+	}
+
+	if (of_device_is_compatible(node, "marvell,kirkwood-cache")) {
+		if (of_property_read_bool(node, "wt-override"))
+			l2_wt_override = true;
+
+		if (of_address_to_resource(node, 0, &res))
+			return -ENODEV;
+
+		base = ioremap(res.start, resource_size(&res));
+		if (!base)
+			return -ENOMEM;
+
+		if (l2_wt_override)
+			writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base);
+		else
+			writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base);
+	}
+
+	feroceon_l2_init(l2_wt_override);
+
+	return 0;
+}
+#endif
-- 
1.8.5.3

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[PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Andrew Lunn]

Instantiate the L2 cache from DT. Indicate in DT where the cache
control register is and if write through should be made.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
cc: devicetree at vger.kernel.org
---
v2:
Change compatible strings to follow l2x0 convention
Only expect register for kirkwood-cache.
Default to write through if no DT node.
Rename writethrough to wt-override to follow l2cc binding.
Split kirkwood.dtsi change into a patch of its own.
---
 .../devicetree/bindings/arm/mrvl/feroceon.txt      | 17 +++++++
 arch/arm/include/asm/hardware/cache-feroceon-l2.h  |  2 +
 arch/arm/mach-kirkwood/board-dt.c                  | 15 +------
 arch/arm/mm/cache-feroceon-l2.c                    | 52 ++++++++++++++++++++++
 4 files changed, 72 insertions(+), 14 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/mrvl/feroceon.txt

diff --git a/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
new file mode 100644
index 000000000000..d6d7d6195ed1
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
@@ -0,0 +1,17 @@
+* Marvell Feroceon Cache
+
+Required properties:
+- compatible : Should be either "marvell,ferocean-cache" or
+  	       "marvell,kirkwood-cache".
+
+Optional properties:
+- wt-override: If present then L2 is forced to Write through mode
+- reg        : Address of the L2 cache control register. Mandatory for
+  	       "marvell,kirkwood-cache", not used by "marvell,ferocean-cache"
+
+
+Example:
+		l2: l2-cache at 20128 {
+			compatible = "marvell,kirkwood-cache";
+			reg = <0x20128 0x4>;
+		};
diff --git a/arch/arm/include/asm/hardware/cache-feroceon-l2.h b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
index 8edd330aabf6..12e1588dc4f1 100644
--- a/arch/arm/include/asm/hardware/cache-feroceon-l2.h
+++ b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
@@ -9,3 +9,5 @@
  */
 
 extern void __init feroceon_l2_init(int l2_wt_override);
+extern int __init feroceon_of_init(void);
+
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 34c35510fd17..2ef59ee2182d 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -42,19 +42,6 @@ static void __init kirkwood_map_io(void)
 	iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
 }
 
-static void __init kirkwood_l2_init(void)
-{
-#ifdef CONFIG_CACHE_FEROCEON_L2
-#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
-	writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
-	feroceon_l2_init(1);
-#else
-	writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
-	feroceon_l2_init(0);
-#endif
-#endif
-}
-
 static struct resource kirkwood_cpufreq_resources[] = {
 	[0] = {
 		.start  = CPU_CONTROL_PHYS,
@@ -211,7 +198,7 @@ static void __init kirkwood_dt_init(void)
 
 	BUG_ON(mvebu_mbus_dt_init());
 
-	kirkwood_l2_init();
+	feroceon_of_init();
 
 	kirkwood_cpufreq_init();
 	kirkwood_cpuidle_init();
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 898362e7972b..17a1ecd7a40c 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -13,11 +13,16 @@
  */
 
 #include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 #include <linux/highmem.h>
+#include <linux/io.h>
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
 #include <asm/hardware/cache-feroceon-l2.h>
 
+#define L2_WRITETHROUGH_KIRKWOOD	BIT(4)
+
 /*
  * Low-level cache maintenance operations.
  *
@@ -350,3 +355,50 @@ void __init feroceon_l2_init(int __l2_wt_override)
 	printk(KERN_INFO "Feroceon L2: Cache support initialised%s.\n",
 			 l2_wt_override ? ", in WT override mode" : "");
 }
+#ifdef CONFIG_OF
+static const struct of_device_id feroceon_ids[] __initconst = {
+	{ .compatible = "marvell,kirkwood-cache"},
+	{ .compatible = "marvell,feroceon-cache"},
+	{}
+};
+
+int __init feroceon_of_init(void)
+{
+	struct device_node *node;
+	void __iomem *base;
+	bool l2_wt_override = false;
+	struct resource res;
+
+	node = of_find_matching_node(NULL, feroceon_ids);
+	if (!node) {
+		/*
+		 * If we don't know the write through state then
+		 * assume it is write back, as that is the safest
+		 * option.
+		 */
+		feroceon_l2_init(0);
+		return 0;
+	}
+
+	if (of_device_is_compatible(node, "marvell,kirkwood-cache")) {
+		if (of_property_read_bool(node, "wt-override"))
+			l2_wt_override = true;
+
+		if (of_address_to_resource(node, 0, &res))
+			return -ENODEV;
+
+		base = ioremap(res.start, resource_size(&res));
+		if (!base)
+			return -ENOMEM;
+
+		if (l2_wt_override)
+			writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base);
+		else
+			writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base);
+	}
+
+	feroceon_l2_init(l2_wt_override);
+
+	return 0;
+}
+#endif
-- 
1.8.5.3

Re: [PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Arnd Bergmann]

On Saturday 15 February 2014 11:20:08 Andrew Lunn wrote:
> Instantiate the L2 cache from DT. Indicate in DT where the cache
> control register is and if write through should be made.
> 
> Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
> cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> 

I guess this answers part of my question for patch 5, but I also
wonder if the run-time setting is correct now with the hardcoded
#ifdef in arch/arm/mm/proc-feroceon.S checkign for the
Kconfig option. Presumably the code should match whatever is
set in the cache control register.

	Arnd
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[PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Arnd Bergmann]

On Saturday 15 February 2014 11:20:08 Andrew Lunn wrote:
> Instantiate the L2 cache from DT. Indicate in DT where the cache
> control register is and if write through should be made.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> cc: devicetree at vger.kernel.org
> 

I guess this answers part of my question for patch 5, but I also
wonder if the run-time setting is correct now with the hardcoded
#ifdef in arch/arm/mm/proc-feroceon.S checkign for the
Kconfig option. Presumably the code should match whatever is
set in the cache control register.

	Arnd

Re: [PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Andrew Lunn]

On Sat, Feb 15, 2014 at 02:23:23PM +0100, Arnd Bergmann wrote:
> On Saturday 15 February 2014 11:20:08 Andrew Lunn wrote:
> > Instantiate the L2 cache from DT. Indicate in DT where the cache
> > control register is and if write through should be made.
> > 
> > Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
> > cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > 
> 
> I guess this answers part of my question for patch 5, but I also
> wonder if the run-time setting is correct now with the hardcoded
> #ifdef in arch/arm/mm/proc-feroceon.S checkign for the
> Kconfig option. Presumably the code should match whatever is
> set in the cache control register.

Humm, yes, good point.

None of the _defconfig's ever turn on
CACHE_FEROCEON_L2_WRITETHROUGH. I also did a quick google and could
not find any usage of it.

So i see two options:

1) Remove the wr-override from the DT binding and use
CACHE_FEROCEON_L2_WRITETHROUGH.

2) Remove CACHE_FEROCEON_L2_WRITETHROUGH and make proc-feroceon.S do
the right thing at runtime.

I suspect i will go for 1), it is simpler.

  Thanks
	Andrew


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[PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Andrew Lunn]

On Sat, Feb 15, 2014 at 02:23:23PM +0100, Arnd Bergmann wrote:
> On Saturday 15 February 2014 11:20:08 Andrew Lunn wrote:
> > Instantiate the L2 cache from DT. Indicate in DT where the cache
> > control register is and if write through should be made.
> > 
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > cc: devicetree at vger.kernel.org
> > 
> 
> I guess this answers part of my question for patch 5, but I also
> wonder if the run-time setting is correct now with the hardcoded
> #ifdef in arch/arm/mm/proc-feroceon.S checkign for the
> Kconfig option. Presumably the code should match whatever is
> set in the cache control register.

Humm, yes, good point.

None of the _defconfig's ever turn on
CACHE_FEROCEON_L2_WRITETHROUGH. I also did a quick google and could
not find any usage of it.

So i see two options:

1) Remove the wr-override from the DT binding and use
CACHE_FEROCEON_L2_WRITETHROUGH.

2) Remove CACHE_FEROCEON_L2_WRITETHROUGH and make proc-feroceon.S do
the right thing at runtime.

I suspect i will go for 1), it is simpler.

  Thanks
	Andrew

Re: [PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Arnd Bergmann]

On Saturday 15 February 2014, Andrew Lunn wrote:
> None of the _defconfig's ever turn on
> CACHE_FEROCEON_L2_WRITETHROUGH. I also did a quick google and could
> not find any usage of it.
> 
> So i see two options:
> 
> 1) Remove the wr-override from the DT binding and use
> CACHE_FEROCEON_L2_WRITETHROUGH.
> 
> 2) Remove CACHE_FEROCEON_L2_WRITETHROUGH and make proc-feroceon.S do
> the right thing at runtime.
> 
> I suspect i will go for 1), it is simpler.

Yes, fair enough. I'd hope we could just kill the option altogether,
but it's probably hard to find anyone who would remember what it
was introduced for, unless Nico knows.

Git history points to 

commit 4360bb41920ffacd4a935fa692768129ee5bef4e
Author: Ronen Shitrit <rshitrit-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Date:   Tue Sep 23 15:28:10 2008 +0300

    [ARM] Kirkwood: add support for L2 cache WB/WT selection
    
    Feroceon L2 cache can work in eighther write through or write back mode
    on Kirkwood. Add the option to configure this mode according to Kconfig.
    
    Signed-off-by: Ronen Shitrit <rshitrit-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
    Signed-off-by: Nicolas Pitre <nico-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>

	Arnd
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[PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Arnd Bergmann]

On Saturday 15 February 2014, Andrew Lunn wrote:
> None of the _defconfig's ever turn on
> CACHE_FEROCEON_L2_WRITETHROUGH. I also did a quick google and could
> not find any usage of it.
> 
> So i see two options:
> 
> 1) Remove the wr-override from the DT binding and use
> CACHE_FEROCEON_L2_WRITETHROUGH.
> 
> 2) Remove CACHE_FEROCEON_L2_WRITETHROUGH and make proc-feroceon.S do
> the right thing at runtime.
> 
> I suspect i will go for 1), it is simpler.

Yes, fair enough. I'd hope we could just kill the option altogether,
but it's probably hard to find anyone who would remember what it
was introduced for, unless Nico knows.

Git history points to 

commit 4360bb41920ffacd4a935fa692768129ee5bef4e
Author: Ronen Shitrit <rshitrit@marvell.com>
Date:   Tue Sep 23 15:28:10 2008 +0300

    [ARM] Kirkwood: add support for L2 cache WB/WT selection
    
    Feroceon L2 cache can work in eighther write through or write back mode
    on Kirkwood. Add the option to configure this mode according to Kconfig.
    
    Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
    Signed-off-by: Nicolas Pitre <nico@marvell.com>

	Arnd

Re: [PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Nicolas Pitre]

On Sat, 15 Feb 2014, Arnd Bergmann wrote:

> On Saturday 15 February 2014, Andrew Lunn wrote:
> > None of the _defconfig's ever turn on
> > CACHE_FEROCEON_L2_WRITETHROUGH. I also did a quick google and could
> > not find any usage of it.
> > 
> > So i see two options:
> > 
> > 1) Remove the wr-override from the DT binding and use
> > CACHE_FEROCEON_L2_WRITETHROUGH.
> > 
> > 2) Remove CACHE_FEROCEON_L2_WRITETHROUGH and make proc-feroceon.S do
> > the right thing at runtime.
> > 
> > I suspect i will go for 1), it is simpler.
> 
> Yes, fair enough. I'd hope we could just kill the option altogether,
> but it's probably hard to find anyone who would remember what it
> was introduced for, unless Nico knows.

There was a time when we didn't know what cache mode was the best 
performance wise.  The right answer is "it depends on the work load" of 
course.  Hence it was made optional for people to play with and choose 
for themselves.


Nicolas
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[PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Nicolas Pitre]

On Sat, 15 Feb 2014, Arnd Bergmann wrote:

> On Saturday 15 February 2014, Andrew Lunn wrote:
> > None of the _defconfig's ever turn on
> > CACHE_FEROCEON_L2_WRITETHROUGH. I also did a quick google and could
> > not find any usage of it.
> > 
> > So i see two options:
> > 
> > 1) Remove the wr-override from the DT binding and use
> > CACHE_FEROCEON_L2_WRITETHROUGH.
> > 
> > 2) Remove CACHE_FEROCEON_L2_WRITETHROUGH and make proc-feroceon.S do
> > the right thing at runtime.
> > 
> > I suspect i will go for 1), it is simpler.
> 
> Yes, fair enough. I'd hope we could just kill the option altogether,
> but it's probably hard to find anyone who would remember what it
> was introduced for, unless Nico knows.

There was a time when we didn't know what cache mode was the best 
performance wise.  The right answer is "it depends on the work load" of 
course.  Hence it was made optional for people to play with and choose 
for themselves.


Nicolas

Re: [PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Jason Cooper]

On Sat, Feb 15, 2014 at 11:20:08AM +0100, Andrew Lunn wrote:
> Instantiate the L2 cache from DT. Indicate in DT where the cache
> control register is and if write through should be made.
> 
> Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
> cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> ---
> v2:
> Change compatible strings to follow l2x0 convention
> Only expect register for kirkwood-cache.
> Default to write through if no DT node.
> Rename writethrough to wt-override to follow l2cc binding.
> Split kirkwood.dtsi change into a patch of its own.
> ---
>  .../devicetree/bindings/arm/mrvl/feroceon.txt      | 17 +++++++
>  arch/arm/include/asm/hardware/cache-feroceon-l2.h  |  2 +
>  arch/arm/mach-kirkwood/board-dt.c                  | 15 +------
>  arch/arm/mm/cache-feroceon-l2.c                    | 52 ++++++++++++++++++++++
>  4 files changed, 72 insertions(+), 14 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
> 
> diff --git a/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
> new file mode 100644
> index 000000000000..d6d7d6195ed1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
> @@ -0,0 +1,17 @@
> +* Marvell Feroceon Cache
> +
> +Required properties:
> +- compatible : Should be either "marvell,ferocean-cache" or
> +  	       "marvell,kirkwood-cache".
> +
> +Optional properties:
> +- wt-override: If present then L2 is forced to Write through mode
> +- reg        : Address of the L2 cache control register. Mandatory for
> +  	       "marvell,kirkwood-cache", not used by "marvell,ferocean-cache"

s/ferocean/feroceon/

If there's nothing else deserving a new series, I'll tweak this (and the
other spelling nits that matter) when I pull in the series.

thx,

Jason.

> +
> +
> +Example:
> +		l2: l2-cache@20128 {
> +			compatible = "marvell,kirkwood-cache";
> +			reg = <0x20128 0x4>;
> +		};
> diff --git a/arch/arm/include/asm/hardware/cache-feroceon-l2.h b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
> index 8edd330aabf6..12e1588dc4f1 100644
> --- a/arch/arm/include/asm/hardware/cache-feroceon-l2.h
> +++ b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
> @@ -9,3 +9,5 @@
>   */
>  
>  extern void __init feroceon_l2_init(int l2_wt_override);
> +extern int __init feroceon_of_init(void);
> +
> diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
> index 34c35510fd17..2ef59ee2182d 100644
> --- a/arch/arm/mach-kirkwood/board-dt.c
> +++ b/arch/arm/mach-kirkwood/board-dt.c
> @@ -42,19 +42,6 @@ static void __init kirkwood_map_io(void)
>  	iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
>  }
>  
> -static void __init kirkwood_l2_init(void)
> -{
> -#ifdef CONFIG_CACHE_FEROCEON_L2
> -#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
> -	writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
> -	feroceon_l2_init(1);
> -#else
> -	writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
> -	feroceon_l2_init(0);
> -#endif
> -#endif
> -}
> -
>  static struct resource kirkwood_cpufreq_resources[] = {
>  	[0] = {
>  		.start  = CPU_CONTROL_PHYS,
> @@ -211,7 +198,7 @@ static void __init kirkwood_dt_init(void)
>  
>  	BUG_ON(mvebu_mbus_dt_init());
>  
> -	kirkwood_l2_init();
> +	feroceon_of_init();
>  
>  	kirkwood_cpufreq_init();
>  	kirkwood_cpuidle_init();
> diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
> index 898362e7972b..17a1ecd7a40c 100644
> --- a/arch/arm/mm/cache-feroceon-l2.c
> +++ b/arch/arm/mm/cache-feroceon-l2.c
> @@ -13,11 +13,16 @@
>   */
>  
>  #include <linux/init.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
>  #include <linux/highmem.h>
> +#include <linux/io.h>
>  #include <asm/cacheflush.h>
>  #include <asm/cp15.h>
>  #include <asm/hardware/cache-feroceon-l2.h>
>  
> +#define L2_WRITETHROUGH_KIRKWOOD	BIT(4)
> +
>  /*
>   * Low-level cache maintenance operations.
>   *
> @@ -350,3 +355,50 @@ void __init feroceon_l2_init(int __l2_wt_override)
>  	printk(KERN_INFO "Feroceon L2: Cache support initialised%s.\n",
>  			 l2_wt_override ? ", in WT override mode" : "");
>  }
> +#ifdef CONFIG_OF
> +static const struct of_device_id feroceon_ids[] __initconst = {
> +	{ .compatible = "marvell,kirkwood-cache"},
> +	{ .compatible = "marvell,feroceon-cache"},
> +	{}
> +};
> +
> +int __init feroceon_of_init(void)
> +{
> +	struct device_node *node;
> +	void __iomem *base;
> +	bool l2_wt_override = false;
> +	struct resource res;
> +
> +	node = of_find_matching_node(NULL, feroceon_ids);
> +	if (!node) {
> +		/*
> +		 * If we don't know the write through state then
> +		 * assume it is write back, as that is the safest
> +		 * option.
> +		 */
> +		feroceon_l2_init(0);
> +		return 0;
> +	}
> +
> +	if (of_device_is_compatible(node, "marvell,kirkwood-cache")) {
> +		if (of_property_read_bool(node, "wt-override"))
> +			l2_wt_override = true;
> +
> +		if (of_address_to_resource(node, 0, &res))
> +			return -ENODEV;
> +
> +		base = ioremap(res.start, resource_size(&res));
> +		if (!base)
> +			return -ENOMEM;
> +
> +		if (l2_wt_override)
> +			writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base);
> +		else
> +			writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base);
> +	}
> +
> +	feroceon_l2_init(l2_wt_override);
> +
> +	return 0;
> +}
> +#endif
> -- 
> 1.8.5.3
> 
> 
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> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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[PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Jason Cooper]

On Sat, Feb 15, 2014 at 11:20:08AM +0100, Andrew Lunn wrote:
> Instantiate the L2 cache from DT. Indicate in DT where the cache
> control register is and if write through should be made.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> cc: devicetree at vger.kernel.org
> ---
> v2:
> Change compatible strings to follow l2x0 convention
> Only expect register for kirkwood-cache.
> Default to write through if no DT node.
> Rename writethrough to wt-override to follow l2cc binding.
> Split kirkwood.dtsi change into a patch of its own.
> ---
>  .../devicetree/bindings/arm/mrvl/feroceon.txt      | 17 +++++++
>  arch/arm/include/asm/hardware/cache-feroceon-l2.h  |  2 +
>  arch/arm/mach-kirkwood/board-dt.c                  | 15 +------
>  arch/arm/mm/cache-feroceon-l2.c                    | 52 ++++++++++++++++++++++
>  4 files changed, 72 insertions(+), 14 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
> 
> diff --git a/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
> new file mode 100644
> index 000000000000..d6d7d6195ed1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt
> @@ -0,0 +1,17 @@
> +* Marvell Feroceon Cache
> +
> +Required properties:
> +- compatible : Should be either "marvell,ferocean-cache" or
> +  	       "marvell,kirkwood-cache".
> +
> +Optional properties:
> +- wt-override: If present then L2 is forced to Write through mode
> +- reg        : Address of the L2 cache control register. Mandatory for
> +  	       "marvell,kirkwood-cache", not used by "marvell,ferocean-cache"

s/ferocean/feroceon/

If there's nothing else deserving a new series, I'll tweak this (and the
other spelling nits that matter) when I pull in the series.

thx,

Jason.

> +
> +
> +Example:
> +		l2: l2-cache at 20128 {
> +			compatible = "marvell,kirkwood-cache";
> +			reg = <0x20128 0x4>;
> +		};
> diff --git a/arch/arm/include/asm/hardware/cache-feroceon-l2.h b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
> index 8edd330aabf6..12e1588dc4f1 100644
> --- a/arch/arm/include/asm/hardware/cache-feroceon-l2.h
> +++ b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
> @@ -9,3 +9,5 @@
>   */
>  
>  extern void __init feroceon_l2_init(int l2_wt_override);
> +extern int __init feroceon_of_init(void);
> +
> diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
> index 34c35510fd17..2ef59ee2182d 100644
> --- a/arch/arm/mach-kirkwood/board-dt.c
> +++ b/arch/arm/mach-kirkwood/board-dt.c
> @@ -42,19 +42,6 @@ static void __init kirkwood_map_io(void)
>  	iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
>  }
>  
> -static void __init kirkwood_l2_init(void)
> -{
> -#ifdef CONFIG_CACHE_FEROCEON_L2
> -#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
> -	writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
> -	feroceon_l2_init(1);
> -#else
> -	writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
> -	feroceon_l2_init(0);
> -#endif
> -#endif
> -}
> -
>  static struct resource kirkwood_cpufreq_resources[] = {
>  	[0] = {
>  		.start  = CPU_CONTROL_PHYS,
> @@ -211,7 +198,7 @@ static void __init kirkwood_dt_init(void)
>  
>  	BUG_ON(mvebu_mbus_dt_init());
>  
> -	kirkwood_l2_init();
> +	feroceon_of_init();
>  
>  	kirkwood_cpufreq_init();
>  	kirkwood_cpuidle_init();
> diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
> index 898362e7972b..17a1ecd7a40c 100644
> --- a/arch/arm/mm/cache-feroceon-l2.c
> +++ b/arch/arm/mm/cache-feroceon-l2.c
> @@ -13,11 +13,16 @@
>   */
>  
>  #include <linux/init.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
>  #include <linux/highmem.h>
> +#include <linux/io.h>
>  #include <asm/cacheflush.h>
>  #include <asm/cp15.h>
>  #include <asm/hardware/cache-feroceon-l2.h>
>  
> +#define L2_WRITETHROUGH_KIRKWOOD	BIT(4)
> +
>  /*
>   * Low-level cache maintenance operations.
>   *
> @@ -350,3 +355,50 @@ void __init feroceon_l2_init(int __l2_wt_override)
>  	printk(KERN_INFO "Feroceon L2: Cache support initialised%s.\n",
>  			 l2_wt_override ? ", in WT override mode" : "");
>  }
> +#ifdef CONFIG_OF
> +static const struct of_device_id feroceon_ids[] __initconst = {
> +	{ .compatible = "marvell,kirkwood-cache"},
> +	{ .compatible = "marvell,feroceon-cache"},
> +	{}
> +};
> +
> +int __init feroceon_of_init(void)
> +{
> +	struct device_node *node;
> +	void __iomem *base;
> +	bool l2_wt_override = false;
> +	struct resource res;
> +
> +	node = of_find_matching_node(NULL, feroceon_ids);
> +	if (!node) {
> +		/*
> +		 * If we don't know the write through state then
> +		 * assume it is write back, as that is the safest
> +		 * option.
> +		 */
> +		feroceon_l2_init(0);
> +		return 0;
> +	}
> +
> +	if (of_device_is_compatible(node, "marvell,kirkwood-cache")) {
> +		if (of_property_read_bool(node, "wt-override"))
> +			l2_wt_override = true;
> +
> +		if (of_address_to_resource(node, 0, &res))
> +			return -ENODEV;
> +
> +		base = ioremap(res.start, resource_size(&res));
> +		if (!base)
> +			return -ENOMEM;
> +
> +		if (l2_wt_override)
> +			writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base);
> +		else
> +			writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base);
> +	}
> +
> +	feroceon_l2_init(l2_wt_override);
> +
> +	return 0;
> +}
> +#endif
> -- 
> 1.8.5.3
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Andrew Lunn]

> > +Required properties:
> > +- compatible : Should be either "marvell,ferocean-cache" or
> > +  	       "marvell,kirkwood-cache".
> > +
> > +Optional properties:
> > +- wt-override: If present then L2 is forced to Write through mode
> > +- reg        : Address of the L2 cache control register. Mandatory for
> > +  	       "marvell,kirkwood-cache", not used by "marvell,ferocean-cache"
> 
> s/ferocean/feroceon/

Arg. I thought i had fixed all of those.
 
> If there's nothing else deserving a new series, I'll tweak this (and the
> other spelling nits that matter) when I pull in the series.

This patch needs a major bit of re-working. There will definitely be a
new series.

    Andrew
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[PATCH v2 10/23] ARM: MM: Add DT binding for Feroceon L2 cache

[Andrew Lunn]

> > +Required properties:
> > +- compatible : Should be either "marvell,ferocean-cache" or
> > +  	       "marvell,kirkwood-cache".
> > +
> > +Optional properties:
> > +- wt-override: If present then L2 is forced to Write through mode
> > +- reg        : Address of the L2 cache control register. Mandatory for
> > +  	       "marvell,kirkwood-cache", not used by "marvell,ferocean-cache"
> 
> s/ferocean/feroceon/

Arg. I thought i had fixed all of those.
 
> If there's nothing else deserving a new series, I'll tweak this (and the
> other spelling nits that matter) when I pull in the series.

This patch needs a major bit of re-working. There will definitely be a
new series.

    Andrew

[PATCH v2 11/23] ARM: Kirkwood: Instantiate L2 cache from DT.

[Andrew Lunn]

Now that the Ferocean L2 cache has a DT binding, make use of it.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/boot/dts/kirkwood.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 6abf44d257df..02c551ee31e5 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -161,6 +161,11 @@
 			#clock-cells = <1>;
 		};
 
+		l2: l2-cache at 20128 {
+			compatible = "marvell,kirkwood-cache";
+			reg = <0x20128 0x4>;
+		};
+
 		intc: main-interrupt-ctrl at 20200 {
 			compatible = "marvell,orion-intc";
 			interrupt-controller;
-- 
1.8.5.3

[PATCH v2 12/23] ARM: Fix default CPU selection for ARCH_MULTI_V5

[Andrew Lunn]

CPU_ARM926T should be selected if no other CPU is. Put the ! in the
right place so this works.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
cc: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e25419817791..beba369d74de 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -898,7 +898,7 @@ config ARCH_MULTI_V5
 	bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 	depends on !ARCH_MULTI_V6_V7
 	select ARCH_MULTI_V4_V5
-	select CPU_ARM926T if (!CPU_ARM946E || CPU_ARM1020 || \
+	select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
 		CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
 		CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
 
-- 
1.8.5.3

[PATCH v2 12/23] ARM: Fix default CPU selection for ARCH_MULTI_V5

[Arnd Bergmann]

On Saturday 15 February 2014, Andrew Lunn wrote:
> CPU_ARM926T should be selected if no other CPU is. Put the ! in the
> right place so this works.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> cc: Arnd Bergmann <arnd@arndb.de>

Acked-by: Arnd Bergmann <arnd@arndb.de>

[PATCH v2 12/23] ARM: Fix default CPU selection for ARCH_MULTI_V5

[Jason Cooper]

Andrew,

12, 13, and 14 should go into rmk's patch tracker.

Russell, we'd really like to move kirkwood DT into mach-mvebu for v3.15.
Is there any possibility you could create a topic branch for us
containing the this patch and the other two I mentioned, above?

Or, if you don't think there will be any significant conflicts, would
you mind Acking these three for us to take through mvebu/arm-soc?

thx,

Jason.

On Sat, Feb 15, 2014 at 11:20:10AM +0100, Andrew Lunn wrote:
> CPU_ARM926T should be selected if no other CPU is. Put the ! in the
> right place so this works.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> cc: Arnd Bergmann <arnd@arndb.de>
> ---
>  arch/arm/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index e25419817791..beba369d74de 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -898,7 +898,7 @@ config ARCH_MULTI_V5
>  	bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
>  	depends on !ARCH_MULTI_V6_V7
>  	select ARCH_MULTI_V4_V5
> -	select CPU_ARM926T if (!CPU_ARM946E || CPU_ARM1020 || \
> +	select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
>  		CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
>  		CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
>  
> -- 
> 1.8.5.3
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v2 13/23] ARM: Fix MULTI_TLB for feroceon

[Andrew Lunn]

Feroceon has the same flush operations as v4wbi, but has an additional
flag, TLB_L2CLEAN_FR. When building with MULTI_TLB this flag is placed
into cpu_tlb.tlb_flags, so there needs to be a cpu_tlb specifically
for feroceon, rather than sharing the v4wbi.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
cc: Russell King <linux@arm.linux.org.uk>
---
 arch/arm/mm/proc-feroceon.S | 2 +-
 arch/arm/mm/tlb-v4wbi.S     | 3 +++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index db79b62c92fb..b76c2706cb02 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -607,7 +607,7 @@ __\name\()_proc_info:
 	.long	HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
 	.long	\cpu_name
 	.long	feroceon_processor_functions
-	.long	v4wbi_tlb_fns
+	.long	fr_tlb_fns
 	.long	feroceon_user_fns
 	.long	\cache
 	 .size	__\name\()_proc_info, . - __\name\()_proc_info
diff --git a/arch/arm/mm/tlb-v4wbi.S b/arch/arm/mm/tlb-v4wbi.S
index 1f6062b6c1c1..4e053fef3487 100644
--- a/arch/arm/mm/tlb-v4wbi.S
+++ b/arch/arm/mm/tlb-v4wbi.S
@@ -28,6 +28,7 @@
  *	- mm    - mm_struct describing address space
  */
 	.align	5
+ENTRY(fr_flush_user_tlb_range)
 ENTRY(v4wbi_flush_user_tlb_range)
 	vma_vm_mm ip, r2
 	act_mm	r3				@ get current->active_mm
@@ -46,6 +47,7 @@ ENTRY(v4wbi_flush_user_tlb_range)
 	blo	1b
 	mov	pc, lr
 
+ENTRY(fr_flush_kern_tlb_range)
 ENTRY(v4wbi_flush_kern_tlb_range)
 	mov	r3, #0
 	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
@@ -62,3 +64,4 @@ ENTRY(v4wbi_flush_kern_tlb_range)
 
 	/* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */
 	define_tlb_functions v4wbi, v4wbi_tlb_flags
+	define_tlb_functions fr, fr_tlb_flags
-- 
1.8.5.3

[PATCH v2 14/23] ARM: MM Enable building Feroceon L2 cache controller with ARCH_MVEBU

[Andrew Lunn]

Kirkwood, which uses the Feroceon L2 cache controller will soon be
moving into mach-mvebu. Allow the cache controller to be built in this
situration.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 1f8fed94c2a4..dccd7e177653 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -855,7 +855,7 @@ config OUTER_CACHE_SYNC
 
 config CACHE_FEROCEON_L2
 	bool "Enable the Feroceon L2 cache controller"
-	depends on ARCH_KIRKWOOD || ARCH_MV78XX0
+	depends on ARCH_KIRKWOOD || ARCH_MV78XX0 || ARCH_MVEBU
 	default y
 	select OUTER_CACHE
 	help
-- 
1.8.5.3

[PATCH v2 15/23] ARM: Move kirkwood DT boards into mach-mvebu

[Andrew Lunn]

Move the kirkwood DT support into mach-mvebu, and make them part of
ARCH_MULTI_V5. Minimal changes have been made in order to make it
boot. Cleanup of the header files and intergration with mvebu will
take place in following patches.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/boot/dts/Makefile                     |  34 ++--
 arch/arm/mach-mvebu/Kconfig                    |  24 ++-
 arch/arm/mach-mvebu/Makefile                   |   1 +
 arch/arm/mach-mvebu/include/mach/bridge-regs.h |  85 ++++++++++
 arch/arm/mach-mvebu/include/mach/kirkwood.h    | 142 +++++++++++++++++
 arch/arm/mach-mvebu/kirkwood-pm.c              |  76 +++++++++
 arch/arm/mach-mvebu/kirkwood-pm.h              |  26 ++++
 arch/arm/mach-mvebu/kirkwood.c                 | 208 +++++++++++++++++++++++++
 8 files changed, 578 insertions(+), 18 deletions(-)
 create mode 100644 arch/arm/mach-mvebu/include/mach/bridge-regs.h
 create mode 100644 arch/arm/mach-mvebu/include/mach/kirkwood.h
 create mode 100644 arch/arm/mach-mvebu/kirkwood-pm.c
 create mode 100644 arch/arm/mach-mvebu/kirkwood-pm.h
 create mode 100644 arch/arm/mach-mvebu/kirkwood.c

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b485e0..c0253830c7db 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -82,7 +82,23 @@ dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
 dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
 	integratorcp.dtb
 dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
-dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
+dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
+dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
+dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
+	qcom-msm8960-cdp.dtb \
+	qcom-apq8074-dragonboard.dtb
+dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
+	armada-370-mirabox.dtb \
+	armada-370-netgear-rn102.dtb \
+	armada-370-netgear-rn104.dtb \
+	armada-370-rd.dtb \
+	armada-xp-axpwifiap.dtb \
+	armada-xp-db.dtb \
+	armada-xp-gp.dtb \
+	armada-xp-netgear-rn2120.dtb \
+	armada-xp-matrix.dtb \
+	armada-xp-openblocks-ax3-4.dtb \
+	kirkwood-cloudbox.dtb \
 	kirkwood-db-88f6281.dtb \
 	kirkwood-db-88f6282.dtb \
 	kirkwood-dns320.dtb \
@@ -116,22 +132,6 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
 	kirkwood-topkick.dtb \
 	kirkwood-ts219-6281.dtb \
 	kirkwood-ts219-6282.dtb
-dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
-dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
-dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
-	qcom-msm8960-cdp.dtb \
-	qcom-apq8074-dragonboard.dtb
-dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
-	armada-370-mirabox.dtb \
-	armada-370-netgear-rn102.dtb \
-	armada-370-netgear-rn104.dtb \
-	armada-370-rd.dtb \
-	armada-xp-axpwifiap.dtb \
-	armada-xp-db.dtb \
-	armada-xp-gp.dtb \
-	armada-xp-netgear-rn2120.dtb \
-	armada-xp-matrix.dtb \
-	armada-xp-openblocks-ax3-4.dtb
 dtb-$(CONFIG_ARCH_MXC) += \
 	imx25-karo-tx25.dtb \
 	imx25-pdk.dtb \
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 9ab22e1b26cd..2afbd59cad5e 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -1,5 +1,5 @@
 config ARCH_MVEBU
-	bool "Marvell SOCs with Device Tree support" if ARCH_MULTI_V7
+	bool "Marvell SOCs with Device Tree support" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
 	select ARCH_SUPPORTS_BIG_ENDIAN
 	select CLKSRC_MMIO
 	select COMMON_CLK
@@ -46,6 +46,28 @@ config MACH_ARMADA_XP
 	  Say 'Y' here if you want your kernel to support boards based
 	  on the Marvell Armada XP SoC with device tree.
 
+config MACH_KIRKWOOD
+	bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
+	select ARCH_HAS_CPUFREQ
+	select ARCH_REQUIRE_GPIOLIB
+	select CPU_FEROCEON
+	select KIRKWOOD_CLK
+	select OF_IRQ
+	select ORION_IRQCHIP
+	select ORION_TIMER
+	select PCI
+	select PCI_QUIRKS
+	select PINCTRL_KIRKWOOD
+	select POWER_SUPPLY
+	select POWER_RESET
+	select POWER_RESET_GPIO
+	select REGULATOR
+	select REGULATOR_FIXED_VOLTAGE
+	select USE_OF
+	help
+	  Say 'Y' here if you want your kernel to support boards based
+	  on the Marvell Kirkwood device tree.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 878aebe98dcc..c44976470ccf 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o
 obj-$(CONFIG_ARCH_MVEBU)	 += coherency.o coherency_ll.o pmsu.o
 obj-$(CONFIG_SMP)                += platsmp.o headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)        += hotplug.o
+obj-$(CONFIG_MACH_KIRKWOOD)	 += kirkwood.o kirkwood-pm.o
\ No newline at end of file
diff --git a/arch/arm/mach-mvebu/include/mach/bridge-regs.h b/arch/arm/mach-mvebu/include/mach/bridge-regs.h
new file mode 100644
index 000000000000..6eb8fea1f76f
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/bridge-regs.h
@@ -0,0 +1,85 @@
+/*
+ * arch/arm/mach-mvebu/include/mach/bridge-regs.h
+ *
+ * Mbus-L to Mbus Bridge Registers
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_BRIDGE_REGS_H
+#define __ASM_ARCH_BRIDGE_REGS_H
+
+#include <mach/kirkwood.h>
+
+#define CPU_CONFIG		(BRIDGE_VIRT_BASE + 0x0100)
+#define CPU_CONFIG_PHYS		(BRIDGE_PHYS_BASE + 0x0100)
+#define CPU_CONFIG_ERROR_PROP	0x00000004
+
+#define CPU_CONTROL		(BRIDGE_VIRT_BASE + 0x0104)
+#define CPU_CONTROL_PHYS	(BRIDGE_PHYS_BASE + 0x0104)
+#define CPU_RESET		0x00000002
+
+#define RSTOUTn_MASK		(BRIDGE_VIRT_BASE + 0x0108)
+#define SOFT_RESET_OUT_EN	0x00000004
+
+#define SYSTEM_SOFT_RESET	(BRIDGE_VIRT_BASE + 0x010c)
+#define SOFT_RESET		0x00000001
+
+#define BRIDGE_CAUSE		(BRIDGE_VIRT_BASE + 0x0110)
+
+#define BRIDGE_INT_TIMER1_CLR	(~0x0004)
+
+#define IRQ_VIRT_BASE		(BRIDGE_VIRT_BASE + 0x0200)
+#define IRQ_CAUSE_LOW_OFF	0x0000
+#define IRQ_MASK_LOW_OFF	0x0004
+#define IRQ_CAUSE_HIGH_OFF	0x0010
+#define IRQ_MASK_HIGH_OFF	0x0014
+
+#define TIMER_VIRT_BASE		(BRIDGE_VIRT_BASE + 0x0300)
+#define TIMER_PHYS_BASE		(BRIDGE_PHYS_BASE + 0x0300)
+
+#define L2_CONFIG_REG		(BRIDGE_VIRT_BASE + 0x0128)
+#define L2_WRITETHROUGH		0x00000010
+
+#define CLOCK_GATING_CTRL	(BRIDGE_VIRT_BASE + 0x11c)
+#define CGC_BIT_GE0		(0)
+#define CGC_BIT_PEX0		(2)
+#define CGC_BIT_USB0		(3)
+#define CGC_BIT_SDIO		(4)
+#define CGC_BIT_TSU		(5)
+#define CGC_BIT_DUNIT		(6)
+#define CGC_BIT_RUNIT		(7)
+#define CGC_BIT_XOR0		(8)
+#define CGC_BIT_AUDIO		(9)
+#define CGC_BIT_SATA0		(14)
+#define CGC_BIT_SATA1		(15)
+#define CGC_BIT_XOR1		(16)
+#define CGC_BIT_CRYPTO		(17)
+#define CGC_BIT_PEX1		(18)
+#define CGC_BIT_GE1		(19)
+#define CGC_BIT_TDM		(20)
+#define CGC_GE0			(1 << 0)
+#define CGC_PEX0		(1 << 2)
+#define CGC_USB0		(1 << 3)
+#define CGC_SDIO		(1 << 4)
+#define CGC_TSU			(1 << 5)
+#define CGC_DUNIT		(1 << 6)
+#define CGC_RUNIT		(1 << 7)
+#define CGC_XOR0		(1 << 8)
+#define CGC_AUDIO		(1 << 9)
+#define CGC_POWERSAVE           (1 << 11)
+#define CGC_SATA0		(1 << 14)
+#define CGC_SATA1		(1 << 15)
+#define CGC_XOR1		(1 << 16)
+#define CGC_CRYPTO		(1 << 17)
+#define CGC_PEX1		(1 << 18)
+#define CGC_GE1			(1 << 19)
+#define CGC_TDM			(1 << 20)
+#define CGC_RESERVED		(0x6 << 21)
+
+#define MEMORY_PM_CTRL		(BRIDGE_VIRT_BASE + 0x118)
+#define MEMORY_PM_CTRL_PHYS	(BRIDGE_PHYS_BASE + 0x118)
+
+#endif
diff --git a/arch/arm/mach-mvebu/include/mach/kirkwood.h b/arch/arm/mach-mvebu/include/mach/kirkwood.h
new file mode 100644
index 000000000000..9d966dc78d67
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/kirkwood.h
@@ -0,0 +1,142 @@
+/*
+ * arch/arm/mach-mvebu/include/mach/kirkwood.h
+ *
+ * Generic definitions for Marvell Kirkwood SoC flavors:
+ *  88F6180, 88F6192 and 88F6281.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_KIRKWOOD_H
+#define __ASM_ARCH_KIRKWOOD_H
+
+/*
+ * Marvell Kirkwood address maps.
+ *
+ * phys
+ * e0000000	PCIe #0 Memory space
+ * e8000000	PCIe #1 Memory space
+ * f1000000	on-chip peripheral registers
+ * f2000000	PCIe #0 I/O space
+ * f3000000	PCIe #1 I/O space
+ * f4000000	NAND controller address window
+ * f5000000	Security Accelerator SRAM
+ *
+ * virt		phys		size
+ * fed00000	f1000000	1M	on-chip peripheral registers
+ * fee00000	f2000000	1M	PCIe #0 I/O space
+ * fef00000	f3000000	1M	PCIe #1 I/O space
+ */
+
+#define KIRKWOOD_SRAM_PHYS_BASE		0xf5000000
+#define KIRKWOOD_SRAM_SIZE		SZ_2K
+
+#define KIRKWOOD_NAND_MEM_PHYS_BASE	0xf4000000
+#define KIRKWOOD_NAND_MEM_SIZE		SZ_1K
+
+#define KIRKWOOD_PCIE1_IO_PHYS_BASE	0xf3000000
+#define KIRKWOOD_PCIE1_IO_BUS_BASE	0x00010000
+#define KIRKWOOD_PCIE1_IO_SIZE		SZ_64K
+
+#define KIRKWOOD_PCIE_IO_PHYS_BASE	0xf2000000
+#define KIRKWOOD_PCIE_IO_BUS_BASE	0x00000000
+#define KIRKWOOD_PCIE_IO_SIZE		SZ_64K
+
+#define KIRKWOOD_REGS_PHYS_BASE		0xf1000000
+#define KIRKWOOD_REGS_VIRT_BASE		IOMEM(0xfed00000)
+#define KIRKWOOD_REGS_SIZE		SZ_1M
+
+#define KIRKWOOD_PCIE_MEM_PHYS_BASE	0xe0000000
+#define KIRKWOOD_PCIE_MEM_BUS_BASE	0xe0000000
+#define KIRKWOOD_PCIE_MEM_SIZE		SZ_128M
+
+#define KIRKWOOD_PCIE1_MEM_PHYS_BASE	0xe8000000
+#define KIRKWOOD_PCIE1_MEM_BUS_BASE	0xe8000000
+#define KIRKWOOD_PCIE1_MEM_SIZE		SZ_128M
+
+/*
+ * Register Map
+ */
+#define DDR_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x00000)
+#define DDR_PHYS_BASE           (KIRKWOOD_REGS_PHYS_BASE + 0x00000)
+#define  DDR_WINDOW_CPU_BASE    (DDR_PHYS_BASE + 0x1500)
+#define  DDR_WINDOW_CPU_SZ      (0x20)
+#define DDR_OPERATION_BASE	(DDR_PHYS_BASE + 0x1418)
+
+#define DEV_BUS_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x10000)
+#define DEV_BUS_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE + 0x10000)
+#define  SAMPLE_AT_RESET	(DEV_BUS_VIRT_BASE + 0x0030)
+#define  DEVICE_ID		(DEV_BUS_VIRT_BASE + 0x0034)
+#define  GPIO_LOW_VIRT_BASE	(DEV_BUS_VIRT_BASE + 0x0100)
+#define  GPIO_HIGH_VIRT_BASE	(DEV_BUS_VIRT_BASE + 0x0140)
+#define  RTC_PHYS_BASE		(DEV_BUS_PHYS_BASE + 0x0300)
+#define  SPI_PHYS_BASE		(DEV_BUS_PHYS_BASE + 0x0600)
+#define  I2C_PHYS_BASE		(DEV_BUS_PHYS_BASE + 0x1000)
+#define  UART0_PHYS_BASE	(DEV_BUS_PHYS_BASE + 0x2000)
+#define  UART0_VIRT_BASE	(DEV_BUS_VIRT_BASE + 0x2000)
+#define  UART1_PHYS_BASE	(DEV_BUS_PHYS_BASE + 0x2100)
+#define  UART1_VIRT_BASE	(DEV_BUS_VIRT_BASE + 0x2100)
+
+#define BRIDGE_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE + 0x20000)
+#define BRIDGE_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x20000)
+#define  BRIDGE_WINS_BASE       (BRIDGE_PHYS_BASE)
+#define  BRIDGE_WINS_SZ         (0x80)
+
+#define CRYPTO_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x30000)
+
+#define PCIE_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x40000)
+#define PCIE_LINK_CTRL		(PCIE_VIRT_BASE + 0x70)
+#define PCIE_STATUS		(PCIE_VIRT_BASE + 0x1a04)
+#define PCIE1_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x44000)
+#define PCIE1_LINK_CTRL		(PCIE1_VIRT_BASE + 0x70)
+#define PCIE1_STATUS		(PCIE1_VIRT_BASE + 0x1a04)
+
+#define USB_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x50000)
+
+#define XOR0_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x60800)
+#define XOR0_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x60800)
+#define XOR1_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x60900)
+#define XOR1_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x60900)
+#define XOR0_HIGH_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x60A00)
+#define XOR0_HIGH_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE + 0x60A00)
+#define XOR1_HIGH_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x60B00)
+#define XOR1_HIGH_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE + 0x60B00)
+
+#define GE00_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x70000)
+#define GE01_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x74000)
+
+#define SATA_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x80000)
+#define SATA_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x80000)
+#define SATA0_IF_CTRL		(SATA_VIRT_BASE + 0x2050)
+#define SATA0_PHY_MODE_2	(SATA_VIRT_BASE + 0x2330)
+#define SATA1_IF_CTRL		(SATA_VIRT_BASE + 0x4050)
+#define SATA1_PHY_MODE_2	(SATA_VIRT_BASE + 0x4330)
+
+#define SDIO_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x90000)
+
+#define AUDIO_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0xA0000)
+#define AUDIO_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0xA0000)
+
+/*
+ * Supported devices and revisions.
+ */
+#define MV88F6281_DEV_ID	0x6281
+#define MV88F6281_REV_Z0	0
+#define MV88F6281_REV_A0	2
+#define MV88F6281_REV_A1	3
+
+#define MV88F6192_DEV_ID	0x6192
+#define MV88F6192_REV_Z0	0
+#define MV88F6192_REV_A0	2
+#define MV88F6192_REV_A1	3
+
+#define MV88F6180_DEV_ID	0x6180
+#define MV88F6180_REV_A0	2
+#define MV88F6180_REV_A1	3
+
+#define MV88F6282_DEV_ID	0x6282
+#define MV88F6282_REV_A0	0
+#define MV88F6282_REV_A1	1
+#endif
diff --git a/arch/arm/mach-mvebu/kirkwood-pm.c b/arch/arm/mach-mvebu/kirkwood-pm.c
new file mode 100644
index 000000000000..b8c8365b84d8
--- /dev/null
+++ b/arch/arm/mach-mvebu/kirkwood-pm.c
@@ -0,0 +1,76 @@
+/*
+ * Power Management driver for Marvell Kirkwood SoCs
+ *
+ * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com>
+ * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License,
+ * version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/suspend.h>
+#include <linux/io.h>
+#include <mach/bridge-regs.h>
+
+static void __iomem *ddr_operation_base;
+static void __iomem *memory_pm_ctrl;
+
+static void kirkwood_low_power(void)
+{
+	u32 mem_pm_ctrl;
+
+	mem_pm_ctrl = readl(memory_pm_ctrl);
+
+	/* Set peripherals to low-power mode */
+	writel_relaxed(~0, memory_pm_ctrl);
+
+	/* Set DDR in self-refresh */
+	writel_relaxed(0x7, ddr_operation_base);
+
+	/*
+	 * Set CPU in wait-for-interrupt state.
+	 * This disables the CPU core clocks,
+	 * the array clocks, and also the L2 controller.
+	 */
+	cpu_do_idle();
+
+	writel_relaxed(mem_pm_ctrl, memory_pm_ctrl);
+}
+
+static int kirkwood_suspend_enter(suspend_state_t state)
+{
+	switch (state) {
+	case PM_SUSPEND_STANDBY:
+		kirkwood_low_power();
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int kirkwood_pm_valid_standby(suspend_state_t state)
+{
+	return state == PM_SUSPEND_STANDBY;
+}
+
+static const struct platform_suspend_ops kirkwood_suspend_ops = {
+	.enter = kirkwood_suspend_enter,
+	.valid = kirkwood_pm_valid_standby,
+};
+
+int __init kirkwood_pm_init(void)
+{
+	ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4);
+	memory_pm_ctrl = ioremap(MEMORY_PM_CTRL_PHYS, 4);
+
+	suspend_set_ops(&kirkwood_suspend_ops);
+	return 0;
+}
diff --git a/arch/arm/mach-mvebu/kirkwood-pm.h b/arch/arm/mach-mvebu/kirkwood-pm.h
new file mode 100644
index 000000000000..21e7530f368b
--- /dev/null
+++ b/arch/arm/mach-mvebu/kirkwood-pm.h
@@ -0,0 +1,26 @@
+/*
+ * Power Management driver for Marvell Kirkwood SoCs
+ *
+ * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com>
+ * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License,
+ * version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ARCH_KIRKWOOD_PM_H
+#define __ARCH_KIRKWOOD_PM_H
+
+#ifdef CONFIG_PM
+void kirkwood_pm_init(void);
+#else
+static inline void kirkwood_pm_init(void) {};
+#endif
+
+#endif
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
new file mode 100644
index 000000000000..56e83035bc97
--- /dev/null
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -0,0 +1,208 @@
+/*
+ * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
+ *
+ * arch/arm/mach-mvebu/kirkwood.c
+ *
+ * Flattened Device Tree board initialization
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include <linux/dma-mapping.h>
+#include <linux/irqchip.h>
+#include <linux/kexec.h>
+#include <asm/hardware/cache-feroceon-l2.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/bridge-regs.h>
+#include <plat/common.h>
+#include <plat/pcie.h>
+#include "kirkwood-pm.h"
+
+static struct resource kirkwood_cpufreq_resources[] = {
+	[0] = {
+		.start  = CPU_CONTROL_PHYS,
+		.end    = CPU_CONTROL_PHYS + 3,
+		.flags  = IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device kirkwood_cpufreq_device = {
+	.name		= "kirkwood-cpufreq",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(kirkwood_cpufreq_resources),
+	.resource	= kirkwood_cpufreq_resources,
+};
+
+static void __init kirkwood_cpufreq_init(void)
+{
+	platform_device_register(&kirkwood_cpufreq_device);
+}
+
+static struct resource kirkwood_cpuidle_resource[] = {
+	{
+		.flags	= IORESOURCE_MEM,
+		.start	= DDR_OPERATION_BASE,
+		.end	= DDR_OPERATION_BASE + 3,
+	},
+};
+
+static struct platform_device kirkwood_cpuidle = {
+	.name		= "kirkwood_cpuidle",
+	.id		= -1,
+	.resource	= kirkwood_cpuidle_resource,
+	.num_resources	= 1,
+};
+
+static void __init kirkwood_cpuidle_init(void)
+{
+	platform_device_register(&kirkwood_cpuidle);
+}
+
+/* Temporary here since mach-mvebu has a function we can use */
+static void kirkwood_restart(enum reboot_mode mode, const char *cmd)
+{
+	/*
+	 * Enable soft reset to assert RSTOUTn.
+	 */
+	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+	/*
+	 * Assert soft reset.
+	 */
+	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+	while (1)
+		;
+}
+
+#define MV643XX_ETH_MAC_ADDR_LOW	0x0414
+#define MV643XX_ETH_MAC_ADDR_HIGH	0x0418
+
+static void __init kirkwood_dt_eth_fixup(void)
+{
+	struct device_node *np;
+
+	/*
+	 * The ethernet interfaces forget the MAC address assigned by u-boot
+	 * if the clocks are turned off. Usually, u-boot on kirkwood boards
+	 * has no DT support to properly set local-mac-address property.
+	 * As a workaround, we get the MAC address from mv643xx_eth registers
+	 * and update the port device node if no valid MAC address is set.
+	 */
+	for_each_compatible_node(np, NULL, "marvell,kirkwood-eth-port") {
+		struct device_node *pnp = of_get_parent(np);
+		struct clk *clk;
+		struct property *pmac;
+		void __iomem *io;
+		u8 *macaddr;
+		u32 reg;
+
+		if (!pnp)
+			continue;
+
+		/* skip disabled nodes or nodes with valid MAC address*/
+		if (!of_device_is_available(pnp) || of_get_mac_address(np))
+			goto eth_fixup_skip;
+
+		clk = of_clk_get(pnp, 0);
+		if (IS_ERR(clk))
+			goto eth_fixup_skip;
+
+		io = of_iomap(pnp, 0);
+		if (!io)
+			goto eth_fixup_no_map;
+
+		/* ensure port clock is not gated to not hang CPU */
+		clk_prepare_enable(clk);
+
+		/* store MAC address register contents in local-mac-address */
+		pr_err(FW_INFO "%s: local-mac-address is not set\n",
+		       np->full_name);
+
+		pmac = kzalloc(sizeof(*pmac) + 6, GFP_KERNEL);
+		if (!pmac)
+			goto eth_fixup_no_mem;
+
+		pmac->value = pmac + 1;
+		pmac->length = 6;
+		pmac->name = kstrdup("local-mac-address", GFP_KERNEL);
+		if (!pmac->name) {
+			kfree(pmac);
+			goto eth_fixup_no_mem;
+		}
+
+		macaddr = pmac->value;
+		reg = readl(io + MV643XX_ETH_MAC_ADDR_HIGH);
+		macaddr[0] = (reg >> 24) & 0xff;
+		macaddr[1] = (reg >> 16) & 0xff;
+		macaddr[2] = (reg >> 8) & 0xff;
+		macaddr[3] = reg & 0xff;
+
+		reg = readl(io + MV643XX_ETH_MAC_ADDR_LOW);
+		macaddr[4] = (reg >> 8) & 0xff;
+		macaddr[5] = reg & 0xff;
+
+		of_update_property(np, pmac);
+
+eth_fixup_no_mem:
+		iounmap(io);
+		clk_disable_unprepare(clk);
+eth_fixup_no_map:
+		clk_put(clk);
+eth_fixup_skip:
+		of_node_put(pnp);
+	}
+}
+
+/*
+ * Disable propagation of mbus errors to the CPU local bus, as this
+ * causes mbus errors (which can occur for example for PCI aborts) to
+ * throw CPU aborts, which we're not set up to deal with.
+ */
+void kirkwood_disable_mbus_error_propagation(void)
+{
+	void __iomem *cpu_config;
+
+	cpu_config = ioremap(CPU_CONFIG_PHYS, 4);
+	writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config);
+}
+
+
+static void __init kirkwood_dt_init(void)
+{
+	kirkwood_disable_mbus_error_propagation();
+
+	BUG_ON(mvebu_mbus_dt_init());
+
+	feroceon_of_init();
+
+	kirkwood_cpufreq_init();
+	kirkwood_cpuidle_init();
+
+	kirkwood_pm_init();
+	kirkwood_dt_eth_fixup();
+
+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char * const kirkwood_dt_board_compat[] = {
+	"marvell,kirkwood",
+	NULL
+};
+
+DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
+	/* Maintainer: Jason Cooper <jason@lakedaemon.net> */
+	.init_machine	= kirkwood_dt_init,
+	.restart	= kirkwood_restart,
+	.dt_compat	= kirkwood_dt_board_compat,
+MACHINE_END
-- 
1.8.5.3

[PATCH v2 16/23] ARM: MVEBU: Let kirkwood use the system controller for restart

[Andrew Lunn]

The mvebu system controller already supports restarting orion
systems. Remove all the C code which will be replaced by the system
controller.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
Split the patch into two, DT goes into a new patch
---
 arch/arm/mach-mvebu/kirkwood.c | 20 ++------------------
 1 file changed, 2 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
index 56e83035bc97..af77923a3483 100644
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -27,6 +27,7 @@
 #include <plat/common.h>
 #include <plat/pcie.h>
 #include "kirkwood-pm.h"
+#include "common.h"
 
 static struct resource kirkwood_cpufreq_resources[] = {
 	[0] = {
@@ -68,23 +69,6 @@ static void __init kirkwood_cpuidle_init(void)
 	platform_device_register(&kirkwood_cpuidle);
 }
 
-/* Temporary here since mach-mvebu has a function we can use */
-static void kirkwood_restart(enum reboot_mode mode, const char *cmd)
-{
-	/*
-	 * Enable soft reset to assert RSTOUTn.
-	 */
-	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-	/*
-	 * Assert soft reset.
-	 */
-	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-	while (1)
-		;
-}
-
 #define MV643XX_ETH_MAC_ADDR_LOW	0x0414
 #define MV643XX_ETH_MAC_ADDR_HIGH	0x0418
 
@@ -203,6 +187,6 @@ static const char * const kirkwood_dt_board_compat[] = {
 DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
 	/* Maintainer: Jason Cooper <jason@lakedaemon.net> */
 	.init_machine	= kirkwood_dt_init,
-	.restart	= kirkwood_restart,
+	.restart	= mvebu_restart,
 	.dt_compat	= kirkwood_dt_board_compat,
 MACHINE_END
-- 
1.8.5.3

[PATCH v2 17/23] ARM: MVEBU: Instantiate system controller in kirkwood.dtsi

[Andrew Lunn]

Make use of the mvebu system controller, by placing a node into the
dtsi file.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/boot/dts/kirkwood.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 02c551ee31e5..ba06124d8f35 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -145,6 +145,11 @@
 			reg = <0x20000 0x80>, <0x1500 0x20>;
 		};
 
+		system-controller at 20000 {
+			compatible = "marvell,orion-system-controller";
+			reg = <0x20000 0x120>;
+		};
+
 		bridge_intc: bridge-interrupt-ctrl at 20110 {
 			compatible = "marvell,orion-bridge-intc";
 			interrupt-controller;
-- 
1.8.5.3

[PATCH v2 18/23] drivers: Enable building of Kirkwood drivers for mach-mvebu

[Andrew Lunn]

With the move to mach-mvebu, drivers Kconfig need tweeking to allow
the kirkwood specific drivers to be built.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
v2
Simplify cpufreq/Kconfig.arm
---
 drivers/cpufreq/Kconfig.arm | 2 +-
 drivers/cpuidle/Kconfig.arm | 2 +-
 drivers/leds/Kconfig        | 4 ++--
 drivers/phy/Kconfig         | 2 +-
 drivers/thermal/Kconfig     | 2 +-
 sound/soc/kirkwood/Kconfig  | 2 +-
 6 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 31297499a60a..077db3aa985b 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -113,7 +113,7 @@ config ARM_INTEGRATOR
 	  If in doubt, say Y.
 
 config ARM_KIRKWOOD_CPUFREQ
-	def_bool ARCH_KIRKWOOD && OF
+	def_bool MACH_KIRKWOOD
 	help
 	  This adds the CPUFreq driver for Marvell Kirkwood
 	  SoCs.
diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
index d988948a89a0..97ccc31dbdd8 100644
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
@@ -22,7 +22,7 @@ config ARM_HIGHBANK_CPUIDLE
 
 config ARM_KIRKWOOD_CPUIDLE
 	bool "CPU Idle Driver for Marvell Kirkwood SoCs"
-	depends on ARCH_KIRKWOOD
+	depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
 	help
 	  This adds the CPU Idle driver for Marvell Kirkwood SoCs.
 
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 72156c123033..44c358ecf5a1 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -421,7 +421,7 @@ config LEDS_MC13783
 config LEDS_NS2
 	tristate "LED support for Network Space v2 GPIO LEDs"
 	depends on LEDS_CLASS
-	depends on ARCH_KIRKWOOD
+	depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
 	default y
 	help
 	  This option enable support for the dual-GPIO LED found on the
@@ -431,7 +431,7 @@ config LEDS_NS2
 config LEDS_NETXBIG
 	tristate "LED support for Big Network series LEDs"
 	depends on LEDS_CLASS
-	depends on ARCH_KIRKWOOD
+	depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
 	default y
 	help
 	  This option enable support for LEDs found on the LaCie 2Big
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index afa2354f6600..5e6b33f9c294 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -24,7 +24,7 @@ config PHY_EXYNOS_MIPI_VIDEO
 
 config PHY_MVEBU_SATA
 	def_bool y
-	depends on ARCH_KIRKWOOD || ARCH_DOVE
+	depends on ARCH_KIRKWOOD || ARCH_DOVE || MACH_KIRKWOOD
 	depends on OF
 	select GENERIC_PHY
 
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 35c066489a19..1bc9cbc4f1b8 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -142,7 +142,7 @@ config RCAR_THERMAL
 
 config KIRKWOOD_THERMAL
 	tristate "Temperature sensor on Marvell Kirkwood SoCs"
-	depends on ARCH_KIRKWOOD
+	depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
 	depends on OF
 	help
 	  Support for the Kirkwood thermal sensor driver into the Linux thermal
diff --git a/sound/soc/kirkwood/Kconfig b/sound/soc/kirkwood/Kconfig
index 78ed4a42ad21..106e2e22fed2 100644
--- a/sound/soc/kirkwood/Kconfig
+++ b/sound/soc/kirkwood/Kconfig
@@ -1,6 +1,6 @@
 config SND_KIRKWOOD_SOC
 	tristate "SoC Audio for the Marvell Kirkwood and Dove chips"
-	depends on ARCH_KIRKWOOD || ARCH_DOVE || COMPILE_TEST
+	depends on ARCH_KIRKWOOD || ARCH_DOVE || MACH_KIRKWOOD || COMPILE_TEST
 	help
 	  Say Y or M if you want to add support for codecs attached to
 	  the Kirkwood I2S interface. You will also need to select the
-- 
1.8.5.3

[PATCH v2 18/23] drivers: Enable building of Kirkwood drivers for mach-mvebu

[Jason Cooper]

Andrew,

Please Cc; this to all of the relevant maintainers to collect Acks.

thx,

Jason.

On Sat, Feb 15, 2014 at 11:20:16AM +0100, Andrew Lunn wrote:
> With the move to mach-mvebu, drivers Kconfig need tweeking to allow
> the kirkwood specific drivers to be built.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> v2
> Simplify cpufreq/Kconfig.arm
> ---
>  drivers/cpufreq/Kconfig.arm | 2 +-
>  drivers/cpuidle/Kconfig.arm | 2 +-
>  drivers/leds/Kconfig        | 4 ++--
>  drivers/phy/Kconfig         | 2 +-
>  drivers/thermal/Kconfig     | 2 +-
>  sound/soc/kirkwood/Kconfig  | 2 +-
>  6 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 31297499a60a..077db3aa985b 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -113,7 +113,7 @@ config ARM_INTEGRATOR
>  	  If in doubt, say Y.
>  
>  config ARM_KIRKWOOD_CPUFREQ
> -	def_bool ARCH_KIRKWOOD && OF
> +	def_bool MACH_KIRKWOOD
>  	help
>  	  This adds the CPUFreq driver for Marvell Kirkwood
>  	  SoCs.
> diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
> index d988948a89a0..97ccc31dbdd8 100644
> --- a/drivers/cpuidle/Kconfig.arm
> +++ b/drivers/cpuidle/Kconfig.arm
> @@ -22,7 +22,7 @@ config ARM_HIGHBANK_CPUIDLE
>  
>  config ARM_KIRKWOOD_CPUIDLE
>  	bool "CPU Idle Driver for Marvell Kirkwood SoCs"
> -	depends on ARCH_KIRKWOOD
> +	depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
>  	help
>  	  This adds the CPU Idle driver for Marvell Kirkwood SoCs.
>  
> diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
> index 72156c123033..44c358ecf5a1 100644
> --- a/drivers/leds/Kconfig
> +++ b/drivers/leds/Kconfig
> @@ -421,7 +421,7 @@ config LEDS_MC13783
>  config LEDS_NS2
>  	tristate "LED support for Network Space v2 GPIO LEDs"
>  	depends on LEDS_CLASS
> -	depends on ARCH_KIRKWOOD
> +	depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
>  	default y
>  	help
>  	  This option enable support for the dual-GPIO LED found on the
> @@ -431,7 +431,7 @@ config LEDS_NS2
>  config LEDS_NETXBIG
>  	tristate "LED support for Big Network series LEDs"
>  	depends on LEDS_CLASS
> -	depends on ARCH_KIRKWOOD
> +	depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
>  	default y
>  	help
>  	  This option enable support for LEDs found on the LaCie 2Big
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index afa2354f6600..5e6b33f9c294 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -24,7 +24,7 @@ config PHY_EXYNOS_MIPI_VIDEO
>  
>  config PHY_MVEBU_SATA
>  	def_bool y
> -	depends on ARCH_KIRKWOOD || ARCH_DOVE
> +	depends on ARCH_KIRKWOOD || ARCH_DOVE || MACH_KIRKWOOD
>  	depends on OF
>  	select GENERIC_PHY
>  
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 35c066489a19..1bc9cbc4f1b8 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -142,7 +142,7 @@ config RCAR_THERMAL
>  
>  config KIRKWOOD_THERMAL
>  	tristate "Temperature sensor on Marvell Kirkwood SoCs"
> -	depends on ARCH_KIRKWOOD
> +	depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
>  	depends on OF
>  	help
>  	  Support for the Kirkwood thermal sensor driver into the Linux thermal
> diff --git a/sound/soc/kirkwood/Kconfig b/sound/soc/kirkwood/Kconfig
> index 78ed4a42ad21..106e2e22fed2 100644
> --- a/sound/soc/kirkwood/Kconfig
> +++ b/sound/soc/kirkwood/Kconfig
> @@ -1,6 +1,6 @@
>  config SND_KIRKWOOD_SOC
>  	tristate "SoC Audio for the Marvell Kirkwood and Dove chips"
> -	depends on ARCH_KIRKWOOD || ARCH_DOVE || COMPILE_TEST
> +	depends on ARCH_KIRKWOOD || ARCH_DOVE || MACH_KIRKWOOD || COMPILE_TEST
>  	help
>  	  Say Y or M if you want to add support for codecs attached to
>  	  the Kirkwood I2S interface. You will also need to select the
> -- 
> 1.8.5.3
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v2 19/23] ARM: MVEBU: Enable mvebu-soc-id on Kirkwood

[Andrew Lunn]

Add the Kirkwood PCIe compatibility string to mvebu-soc-id, so that it
can get the SoC ID and revision from the PCIe endpoints.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-mvebu/mvebu-soc-id.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c
index f3b325f6cbd4..f3d4cf53f746 100644
--- a/arch/arm/mach-mvebu/mvebu-soc-id.c
+++ b/arch/arm/mach-mvebu/mvebu-soc-id.c
@@ -38,6 +38,7 @@ static bool is_id_valid;
 static const struct of_device_id mvebu_pcie_of_match_table[] = {
 	{ .compatible = "marvell,armada-xp-pcie", },
 	{ .compatible = "marvell,armada-370-pcie", },
+	{ .compatible = "marvell,kirkwood-pcie" },
 	{},
 };
 
-- 
1.8.5.3

[PATCH v2 20/23] ARM: config: Add a multi_v5_defconfig

[Andrew Lunn]

To allow regression build testing of multi v5 systems, add a
multi_v5_defconfig, similar to the multi_v7_defconfig. This is based
on kirkwood_defconfig, but with a few other boards added which claim
to be MULTI_v5.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/configs/multi_v5_defconfig | 183 ++++++++++++++++++++++++++++++++++++
 1 file changed, 183 insertions(+)
 create mode 100644 arch/arm/configs/multi_v5_defconfig

diff --git a/arch/arm/configs/multi_v5_defconfig b/arch/arm/configs/multi_v5_defconfig
new file mode 100644
index 000000000000..8282fab6b514
--- /dev/null
+++ b/arch/arm/configs/multi_v5_defconfig
@@ -0,0 +1,183 @@
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_ARCH_MVEBU=y
+CONFIG_MACH_KIRKWOOD=y
+CONFIG_ARCH_MXC=y
+CONFIG_MACH_IMX25_DT=y
+CONFIG_MACH_IMX27_DT=y
+CONFIG_ARCH_U300=y
+CONFIG_PCI_MVEBU=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_KIRKWOOD_CPUIDLE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IPV6 is not set
+CONFIG_NET_PKTGEN=m
+CONFIG_CFG80211=y
+CONFIG_MAC80211=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ORION=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_EEPROM_AT24=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=m
+CONFIG_CHR_DEV_SG=m
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_MV=y
+CONFIG_NETDEVICES=y
+CONFIG_NET_DSA_MV88E6123_61_65=y
+CONFIG_MV643XX_ETH=y
+CONFIG_R8169=y
+CONFIG_MARVELL_PHY=y
+CONFIG_LIBERTAS=y
+CONFIG_LIBERTAS_SDIO=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_NOMADIK=y
+CONFIG_SPI=y
+CONFIG_SPI_ORION=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_POWER_RESET_QNAP=y
+CONFIG_SENSORS_ADT7475=y
+CONFIG_SENSORS_LM63=y
+CONFIG_SENSORS_LM75=y
+CONFIG_SENSORS_LM85=y
+CONFIG_THERMAL=y
+CONFIG_KIRKWOOD_THERMAL=y
+CONFIG_WATCHDOG=y
+# CONFIG_ABX500_CORE is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SOC=y
+CONFIG_SND_KIRKWOOD_SOC=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_PRINTER=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_MMC=y
+CONFIG_SDIO_UART=y
+CONFIG_MMC_MVSDIO=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_RS5C372=y
+CONFIG_RTC_DRV_PCF8563=y
+CONFIG_RTC_DRV_S35390A=y
+CONFIG_RTC_DRV_MV=y
+CONFIG_DMADEVICES=y
+CONFIG_MV_XOR=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_EXT4_FS=y
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_MVEBU_UART_ALTERNATE=y
+CONFIG_DEBUG_UART_VIRT=0xfed12000
+CONFIG_EARLY_PRINTK=y
+CONFIG_CRYPTO_CBC=m
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DEV_MV_CESA=y
+CONFIG_CRC_CCITT=y
+CONFIG_LIBCRC32C=y
-- 
1.8.5.3

[PATCH v2 20/23] ARM: config: Add a multi_v5_defconfig

[Arnd Bergmann]

On Saturday 15 February 2014 11:20:18 Andrew Lunn wrote:
> To allow regression build testing of multi v5 systems, add a
> multi_v5_defconfig, similar to the multi_v7_defconfig. This is based
> on kirkwood_defconfig, but with a few other boards added which claim
> to be MULTI_v5.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>

How about making this a multi_v4_v5_defconfig? We have a much smaller
number of v4/v4t platforms (moxart, i.MX1) that are multiplatform capable or
could besome so in the future (clps711x, gemini, at91rm9200,
some s3c24xx, omap15xx, integrator) compared to the multitude of v5
platforms, so it might not be useful to start a separate
multi_v4_defconfig.

OTOH if there is a significant performance impact in enabling
CPU_32v4 and CPU_32v4T, we probably want to keep them separate.

Any opinions?

	Arnd

[PATCH v2 20/23] ARM: config: Add a multi_v5_defconfig

[Jason Cooper]

On Sat, Feb 15, 2014 at 03:03:45PM +0100, Arnd Bergmann wrote:
> On Saturday 15 February 2014 11:20:18 Andrew Lunn wrote:
> > To allow regression build testing of multi v5 systems, add a
> > multi_v5_defconfig, similar to the multi_v7_defconfig. This is based
> > on kirkwood_defconfig, but with a few other boards added which claim
> > to be MULTI_v5.
> > 
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> 
> How about making this a multi_v4_v5_defconfig? We have a much smaller
> number of v4/v4t platforms (moxart, i.MX1) that are multiplatform
> capable or could besome so in the future (clps711x, gemini,
> at91rm9200, some s3c24xx, omap15xx, integrator) compared to the
> multitude of v5 platforms, so it might not be useful to start a
> separate multi_v4_defconfig.
> 
> OTOH if there is a significant performance impact in enabling CPU_32v4
> and CPU_32v4T, we probably want to keep them separate.
> 
> Any opinions?

Other than ixp4xx, (nslu2, old gateworks boards) I'm hard pressed to
think of anything v4* still in the wild possibly wanting to use mainline
kernels.

I'd prefer to do multi_v5_defconfig and revise later if we find the
extraordinary circumstance.

thx,

Jason.

[PATCH v2 21/23] ARM: MVEBU: Simplifiy headers and make local

[Andrew Lunn]

kirkwood is very nearly fully DT. Remove most of the address
definitions from the header files and make it a local header file.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
v2
Squash in the patch which removed unneeded includes.
---
 arch/arm/mach-mvebu/include/mach/bridge-regs.h |  85 ---------------
 arch/arm/mach-mvebu/include/mach/kirkwood.h    | 142 -------------------------
 arch/arm/mach-mvebu/kirkwood-pm.c              |   2 +-
 arch/arm/mach-mvebu/kirkwood.c                 |   9 +-
 arch/arm/mach-mvebu/kirkwood.h                 |  22 ++++
 5 files changed, 26 insertions(+), 234 deletions(-)
 delete mode 100644 arch/arm/mach-mvebu/include/mach/bridge-regs.h
 delete mode 100644 arch/arm/mach-mvebu/include/mach/kirkwood.h
 create mode 100644 arch/arm/mach-mvebu/kirkwood.h

diff --git a/arch/arm/mach-mvebu/include/mach/bridge-regs.h b/arch/arm/mach-mvebu/include/mach/bridge-regs.h
deleted file mode 100644
index 6eb8fea1f76f..000000000000
--- a/arch/arm/mach-mvebu/include/mach/bridge-regs.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * arch/arm/mach-mvebu/include/mach/bridge-regs.h
- *
- * Mbus-L to Mbus Bridge Registers
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_BRIDGE_REGS_H
-#define __ASM_ARCH_BRIDGE_REGS_H
-
-#include <mach/kirkwood.h>
-
-#define CPU_CONFIG		(BRIDGE_VIRT_BASE + 0x0100)
-#define CPU_CONFIG_PHYS		(BRIDGE_PHYS_BASE + 0x0100)
-#define CPU_CONFIG_ERROR_PROP	0x00000004
-
-#define CPU_CONTROL		(BRIDGE_VIRT_BASE + 0x0104)
-#define CPU_CONTROL_PHYS	(BRIDGE_PHYS_BASE + 0x0104)
-#define CPU_RESET		0x00000002
-
-#define RSTOUTn_MASK		(BRIDGE_VIRT_BASE + 0x0108)
-#define SOFT_RESET_OUT_EN	0x00000004
-
-#define SYSTEM_SOFT_RESET	(BRIDGE_VIRT_BASE + 0x010c)
-#define SOFT_RESET		0x00000001
-
-#define BRIDGE_CAUSE		(BRIDGE_VIRT_BASE + 0x0110)
-
-#define BRIDGE_INT_TIMER1_CLR	(~0x0004)
-
-#define IRQ_VIRT_BASE		(BRIDGE_VIRT_BASE + 0x0200)
-#define IRQ_CAUSE_LOW_OFF	0x0000
-#define IRQ_MASK_LOW_OFF	0x0004
-#define IRQ_CAUSE_HIGH_OFF	0x0010
-#define IRQ_MASK_HIGH_OFF	0x0014
-
-#define TIMER_VIRT_BASE		(BRIDGE_VIRT_BASE + 0x0300)
-#define TIMER_PHYS_BASE		(BRIDGE_PHYS_BASE + 0x0300)
-
-#define L2_CONFIG_REG		(BRIDGE_VIRT_BASE + 0x0128)
-#define L2_WRITETHROUGH		0x00000010
-
-#define CLOCK_GATING_CTRL	(BRIDGE_VIRT_BASE + 0x11c)
-#define CGC_BIT_GE0		(0)
-#define CGC_BIT_PEX0		(2)
-#define CGC_BIT_USB0		(3)
-#define CGC_BIT_SDIO		(4)
-#define CGC_BIT_TSU		(5)
-#define CGC_BIT_DUNIT		(6)
-#define CGC_BIT_RUNIT		(7)
-#define CGC_BIT_XOR0		(8)
-#define CGC_BIT_AUDIO		(9)
-#define CGC_BIT_SATA0		(14)
-#define CGC_BIT_SATA1		(15)
-#define CGC_BIT_XOR1		(16)
-#define CGC_BIT_CRYPTO		(17)
-#define CGC_BIT_PEX1		(18)
-#define CGC_BIT_GE1		(19)
-#define CGC_BIT_TDM		(20)
-#define CGC_GE0			(1 << 0)
-#define CGC_PEX0		(1 << 2)
-#define CGC_USB0		(1 << 3)
-#define CGC_SDIO		(1 << 4)
-#define CGC_TSU			(1 << 5)
-#define CGC_DUNIT		(1 << 6)
-#define CGC_RUNIT		(1 << 7)
-#define CGC_XOR0		(1 << 8)
-#define CGC_AUDIO		(1 << 9)
-#define CGC_POWERSAVE           (1 << 11)
-#define CGC_SATA0		(1 << 14)
-#define CGC_SATA1		(1 << 15)
-#define CGC_XOR1		(1 << 16)
-#define CGC_CRYPTO		(1 << 17)
-#define CGC_PEX1		(1 << 18)
-#define CGC_GE1			(1 << 19)
-#define CGC_TDM			(1 << 20)
-#define CGC_RESERVED		(0x6 << 21)
-
-#define MEMORY_PM_CTRL		(BRIDGE_VIRT_BASE + 0x118)
-#define MEMORY_PM_CTRL_PHYS	(BRIDGE_PHYS_BASE + 0x118)
-
-#endif
diff --git a/arch/arm/mach-mvebu/include/mach/kirkwood.h b/arch/arm/mach-mvebu/include/mach/kirkwood.h
deleted file mode 100644
index 9d966dc78d67..000000000000
--- a/arch/arm/mach-mvebu/include/mach/kirkwood.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * arch/arm/mach-mvebu/include/mach/kirkwood.h
- *
- * Generic definitions for Marvell Kirkwood SoC flavors:
- *  88F6180, 88F6192 and 88F6281.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_KIRKWOOD_H
-#define __ASM_ARCH_KIRKWOOD_H
-
-/*
- * Marvell Kirkwood address maps.
- *
- * phys
- * e0000000	PCIe #0 Memory space
- * e8000000	PCIe #1 Memory space
- * f1000000	on-chip peripheral registers
- * f2000000	PCIe #0 I/O space
- * f3000000	PCIe #1 I/O space
- * f4000000	NAND controller address window
- * f5000000	Security Accelerator SRAM
- *
- * virt		phys		size
- * fed00000	f1000000	1M	on-chip peripheral registers
- * fee00000	f2000000	1M	PCIe #0 I/O space
- * fef00000	f3000000	1M	PCIe #1 I/O space
- */
-
-#define KIRKWOOD_SRAM_PHYS_BASE		0xf5000000
-#define KIRKWOOD_SRAM_SIZE		SZ_2K
-
-#define KIRKWOOD_NAND_MEM_PHYS_BASE	0xf4000000
-#define KIRKWOOD_NAND_MEM_SIZE		SZ_1K
-
-#define KIRKWOOD_PCIE1_IO_PHYS_BASE	0xf3000000
-#define KIRKWOOD_PCIE1_IO_BUS_BASE	0x00010000
-#define KIRKWOOD_PCIE1_IO_SIZE		SZ_64K
-
-#define KIRKWOOD_PCIE_IO_PHYS_BASE	0xf2000000
-#define KIRKWOOD_PCIE_IO_BUS_BASE	0x00000000
-#define KIRKWOOD_PCIE_IO_SIZE		SZ_64K
-
-#define KIRKWOOD_REGS_PHYS_BASE		0xf1000000
-#define KIRKWOOD_REGS_VIRT_BASE		IOMEM(0xfed00000)
-#define KIRKWOOD_REGS_SIZE		SZ_1M
-
-#define KIRKWOOD_PCIE_MEM_PHYS_BASE	0xe0000000
-#define KIRKWOOD_PCIE_MEM_BUS_BASE	0xe0000000
-#define KIRKWOOD_PCIE_MEM_SIZE		SZ_128M
-
-#define KIRKWOOD_PCIE1_MEM_PHYS_BASE	0xe8000000
-#define KIRKWOOD_PCIE1_MEM_BUS_BASE	0xe8000000
-#define KIRKWOOD_PCIE1_MEM_SIZE		SZ_128M
-
-/*
- * Register Map
- */
-#define DDR_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x00000)
-#define DDR_PHYS_BASE           (KIRKWOOD_REGS_PHYS_BASE + 0x00000)
-#define  DDR_WINDOW_CPU_BASE    (DDR_PHYS_BASE + 0x1500)
-#define  DDR_WINDOW_CPU_SZ      (0x20)
-#define DDR_OPERATION_BASE	(DDR_PHYS_BASE + 0x1418)
-
-#define DEV_BUS_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x10000)
-#define DEV_BUS_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE + 0x10000)
-#define  SAMPLE_AT_RESET	(DEV_BUS_VIRT_BASE + 0x0030)
-#define  DEVICE_ID		(DEV_BUS_VIRT_BASE + 0x0034)
-#define  GPIO_LOW_VIRT_BASE	(DEV_BUS_VIRT_BASE + 0x0100)
-#define  GPIO_HIGH_VIRT_BASE	(DEV_BUS_VIRT_BASE + 0x0140)
-#define  RTC_PHYS_BASE		(DEV_BUS_PHYS_BASE + 0x0300)
-#define  SPI_PHYS_BASE		(DEV_BUS_PHYS_BASE + 0x0600)
-#define  I2C_PHYS_BASE		(DEV_BUS_PHYS_BASE + 0x1000)
-#define  UART0_PHYS_BASE	(DEV_BUS_PHYS_BASE + 0x2000)
-#define  UART0_VIRT_BASE	(DEV_BUS_VIRT_BASE + 0x2000)
-#define  UART1_PHYS_BASE	(DEV_BUS_PHYS_BASE + 0x2100)
-#define  UART1_VIRT_BASE	(DEV_BUS_VIRT_BASE + 0x2100)
-
-#define BRIDGE_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE + 0x20000)
-#define BRIDGE_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x20000)
-#define  BRIDGE_WINS_BASE       (BRIDGE_PHYS_BASE)
-#define  BRIDGE_WINS_SZ         (0x80)
-
-#define CRYPTO_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x30000)
-
-#define PCIE_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x40000)
-#define PCIE_LINK_CTRL		(PCIE_VIRT_BASE + 0x70)
-#define PCIE_STATUS		(PCIE_VIRT_BASE + 0x1a04)
-#define PCIE1_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x44000)
-#define PCIE1_LINK_CTRL		(PCIE1_VIRT_BASE + 0x70)
-#define PCIE1_STATUS		(PCIE1_VIRT_BASE + 0x1a04)
-
-#define USB_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x50000)
-
-#define XOR0_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x60800)
-#define XOR0_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x60800)
-#define XOR1_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x60900)
-#define XOR1_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x60900)
-#define XOR0_HIGH_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x60A00)
-#define XOR0_HIGH_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE + 0x60A00)
-#define XOR1_HIGH_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x60B00)
-#define XOR1_HIGH_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE + 0x60B00)
-
-#define GE00_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x70000)
-#define GE01_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x74000)
-
-#define SATA_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x80000)
-#define SATA_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0x80000)
-#define SATA0_IF_CTRL		(SATA_VIRT_BASE + 0x2050)
-#define SATA0_PHY_MODE_2	(SATA_VIRT_BASE + 0x2330)
-#define SATA1_IF_CTRL		(SATA_VIRT_BASE + 0x4050)
-#define SATA1_PHY_MODE_2	(SATA_VIRT_BASE + 0x4330)
-
-#define SDIO_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0x90000)
-
-#define AUDIO_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE + 0xA0000)
-#define AUDIO_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE + 0xA0000)
-
-/*
- * Supported devices and revisions.
- */
-#define MV88F6281_DEV_ID	0x6281
-#define MV88F6281_REV_Z0	0
-#define MV88F6281_REV_A0	2
-#define MV88F6281_REV_A1	3
-
-#define MV88F6192_DEV_ID	0x6192
-#define MV88F6192_REV_Z0	0
-#define MV88F6192_REV_A0	2
-#define MV88F6192_REV_A1	3
-
-#define MV88F6180_DEV_ID	0x6180
-#define MV88F6180_REV_A0	2
-#define MV88F6180_REV_A1	3
-
-#define MV88F6282_DEV_ID	0x6282
-#define MV88F6282_REV_A0	0
-#define MV88F6282_REV_A1	1
-#endif
diff --git a/arch/arm/mach-mvebu/kirkwood-pm.c b/arch/arm/mach-mvebu/kirkwood-pm.c
index b8c8365b84d8..cbb816f2120c 100644
--- a/arch/arm/mach-mvebu/kirkwood-pm.c
+++ b/arch/arm/mach-mvebu/kirkwood-pm.c
@@ -17,7 +17,7 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/io.h>
-#include <mach/bridge-regs.h>
+#include "kirkwood.h"
 
 static void __iomem *ddr_operation_base;
 static void __iomem *memory_pm_ctrl;
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
index af77923a3483..5d7fef04c36d 100644
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -13,19 +13,16 @@
 #include <linux/clk.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/mbus.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_net.h>
 #include <linux/of_platform.h>
-#include <linux/dma-mapping.h>
-#include <linux/irqchip.h>
-#include <linux/kexec.h>
+#include <linux/slab.h>
 #include <asm/hardware/cache-feroceon-l2.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/bridge-regs.h>
-#include <plat/common.h>
-#include <plat/pcie.h>
+#include "kirkwood.h"
 #include "kirkwood-pm.h"
 #include "common.h"
 
diff --git a/arch/arm/mach-mvebu/kirkwood.h b/arch/arm/mach-mvebu/kirkwood.h
new file mode 100644
index 000000000000..89f3d1f51643
--- /dev/null
+++ b/arch/arm/mach-mvebu/kirkwood.h
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-mvebu/kirkwood.h
+ *
+ * Generic definitions for Marvell Kirkwood SoC flavors:
+ * 88F6180, 88F6192 and 88F6281.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#define KIRKWOOD_REGS_PHYS_BASE	0xf1000000
+#define DDR_PHYS_BASE           (KIRKWOOD_REGS_PHYS_BASE + 0x00000)
+#define BRIDGE_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE + 0x20000)
+
+#define DDR_OPERATION_BASE	(DDR_PHYS_BASE + 0x1418)
+
+#define CPU_CONFIG_PHYS		(BRIDGE_PHYS_BASE + 0x0100)
+#define CPU_CONFIG_ERROR_PROP	0x00000004
+
+#define CPU_CONTROL_PHYS	(BRIDGE_PHYS_BASE + 0x0104)
+#define MEMORY_PM_CTRL_PHYS	(BRIDGE_PHYS_BASE + 0x0118)
-- 
1.8.5.3

[PATCH v2 22/23] ARM: config: Add mvebu_v5_defconfig

[Andrew Lunn]

Now that there is both v5 and v7 systems in mach-mvebu, the
mvebu_defconfig is not sufficient, since these systems cannot be
combined. Add a v5 defconfig which is based on kirkwood_defconfig,
but purely DT.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/configs/mvebu_v5_defconfig | 166 ++++++++++++++++++++++++++++++++++++
 1 file changed, 166 insertions(+)
 create mode 100644 arch/arm/configs/mvebu_v5_defconfig

diff --git a/arch/arm/configs/mvebu_v5_defconfig b/arch/arm/configs/mvebu_v5_defconfig
new file mode 100644
index 000000000000..42e4ec641b4c
--- /dev/null
+++ b/arch/arm/configs/mvebu_v5_defconfig
@@ -0,0 +1,166 @@
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_ARCH_MVEBU=y
+CONFIG_MACH_KIRKWOOD=y
+# CONFIG_CPU_FEROCEON_OLD_ID is not set
+CONFIG_PCI_MVEBU=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_IDLE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IPV6 is not set
+CONFIG_NET_PKTGEN=m
+CONFIG_CFG80211=y
+CONFIG_MAC80211=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ORION=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_EEPROM_AT24=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=m
+CONFIG_CHR_DEV_SG=m
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_MV=y
+CONFIG_NETDEVICES=y
+CONFIG_NET_DSA_MV88E6123_61_65=y
+CONFIG_MV643XX_ETH=y
+CONFIG_R8169=y
+CONFIG_MARVELL_PHY=y
+CONFIG_LIBERTAS=y
+CONFIG_LIBERTAS_SDIO=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MV64XXX=y
+CONFIG_SPI=y
+CONFIG_SPI_ORION=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_SENSORS_ADT7475=y
+CONFIG_SENSORS_LM63=y
+CONFIG_SENSORS_LM75=y
+CONFIG_SENSORS_LM85=y
+CONFIG_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_PRINTER=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_MMC=y
+CONFIG_SDIO_UART=y
+CONFIG_MMC_MVSDIO=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_RS5C372=y
+CONFIG_RTC_DRV_PCF8563=y
+CONFIG_RTC_DRV_S35390A=y
+CONFIG_RTC_DRV_MV=y
+CONFIG_DMADEVICES=y
+CONFIG_MV_XOR=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_EXT4_FS=y
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y
+CONFIG_CRYPTO_CBC=m
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DEV_MV_CESA=y
+CONFIG_CRC_CCITT=y
+CONFIG_LIBCRC32C=y
-- 
1.8.5.3

[PATCH v2 22/23] ARM: config: Add mvebu_v5_defconfig

[Ezequiel Garcia]

Andrew,

On Sat, Feb 15, 2014 at 11:20:20AM +0100, Andrew Lunn wrote:
> Now that there is both v5 and v7 systems in mach-mvebu, the
> mvebu_defconfig is not sufficient, since these systems cannot be
> combined. Add a v5 defconfig which is based on kirkwood_defconfig,
> but purely DT.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> ---
>  arch/arm/configs/mvebu_v5_defconfig | 166 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 166 insertions(+)
>  create mode 100644 arch/arm/configs/mvebu_v5_defconfig
> 
> diff --git a/arch/arm/configs/mvebu_v5_defconfig b/arch/arm/configs/mvebu_v5_defconfig
> new file mode 100644
> index 000000000000..42e4ec641b4c
> --- /dev/null
> +++ b/arch/arm/configs/mvebu_v5_defconfig
> @@ -0,0 +1,166 @@
> +CONFIG_SYSVIPC=y
> +CONFIG_NO_HZ=y
> +CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_LOG_BUF_SHIFT=19
> +CONFIG_PROFILING=y
> +CONFIG_OPROFILE=y

You're missing CONFIG_ORION_WATCHDOG=y, probably because it doesn't
build in v3.14-rc1 on ARCH_MVEBU.

I think it's safe to add it to the defconfig, so once the watchdog
MVEBU changes are merged, it'll get selected.
-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

[PATCH v2 23/23] ARM: Kirkwood: Remove DT support

[Andrew Lunn]

Now that all the device tree support is in mach-mvebu, remove it from
mach-kirkwood.

Regenerate kirkwood_defconfig, removing all DT support, and a couple
of other redundent options have been removed in the process.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/configs/kirkwood_defconfig |   6 -
 arch/arm/mach-kirkwood/Kconfig      |  18 ---
 arch/arm/mach-kirkwood/Makefile     |   2 -
 arch/arm/mach-kirkwood/board-dt.c   | 227 ------------------------------------
 4 files changed, 253 deletions(-)
 delete mode 100644 arch/arm/mach-kirkwood/board-dt.c

diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 2e762d94e94b..95b5585c1fbb 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -20,13 +20,9 @@ CONFIG_MACH_RD88F6281=y
 CONFIG_MACH_T5325=y
 CONFIG_MACH_TS219=y
 CONFIG_MACH_TS41X=y
-CONFIG_ARCH_KIRKWOOD_DT=y
-CONFIG_MACH_MV88F6281GTW_GE_DT=y
 # CONFIG_CPU_FEROCEON_OLD_ID is not set
-CONFIG_PCI_MVEBU=y
 CONFIG_PREEMPT=y
 CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
 CONFIG_HIGHMEM=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
@@ -85,7 +81,6 @@ CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_OF_PLATFORM=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 # CONFIG_I2C_COMPAT is not set
@@ -176,5 +171,4 @@ CONFIG_CRYPTO_PCBC=m
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_DEV_MV_CESA=y
 CONFIG_CRC_CCITT=y
-CONFIG_CRC16=y
 CONFIG_LIBCRC32C=y
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index df4b26340ae4..fb4560d2605f 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -88,24 +88,6 @@ config MACH_TS41X
 	  QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo
 	  NAS devices.
 
-comment "Device tree entries"
-
-config ARCH_KIRKWOOD_DT
-	bool "Marvell Kirkwood Flattened Device Tree"
-	select KIRKWOOD_CLK
-	select OF_IRQ
-	select ORION_IRQCHIP
-	select ORION_TIMER
-	select POWER_SUPPLY
-	select POWER_RESET
-	select POWER_RESET_GPIO
-	select REGULATOR
-	select REGULATOR_FIXED_VOLTAGE
-	select USE_OF
-	help
-	  Say 'Y' here if you want your kernel to support the
-	  Marvell Kirkwood using flattened device tree.
-
 endmenu
 
 endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index 3a72c5c6e747..c772d7584937 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -10,5 +10,3 @@ obj-$(CONFIG_MACH_RD88F6281)		+= rd88f6281-setup.o
 obj-$(CONFIG_MACH_T5325)		+= t5325-setup.o
 obj-$(CONFIG_MACH_TS219)		+= ts219-setup.o tsx1x-common.o
 obj-$(CONFIG_MACH_TS41X)		+= ts41x-setup.o tsx1x-common.o
-
-obj-$(CONFIG_ARCH_KIRKWOOD_DT)		+= board-dt.o
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
deleted file mode 100644
index 2ef59ee2182d..000000000000
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ /dev/null
@@ -1,227 +0,0 @@
-/*
- * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
- *
- * arch/arm/mach-kirkwood/board-dt.c
- *
- * Flattened Device Tree board initialization
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/clk.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_net.h>
-#include <linux/of_platform.h>
-#include <linux/dma-mapping.h>
-#include <linux/irqchip.h>
-#include <linux/kexec.h>
-#include <asm/hardware/cache-feroceon-l2.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/bridge-regs.h>
-#include <plat/common.h>
-#include <plat/pcie.h>
-#include "pm.h"
-
-static struct map_desc kirkwood_io_desc[] __initdata = {
-	{
-		.virtual	= (unsigned long) KIRKWOOD_REGS_VIRT_BASE,
-		.pfn		= __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
-		.length		= KIRKWOOD_REGS_SIZE,
-		.type		= MT_DEVICE,
-	},
-};
-
-static void __init kirkwood_map_io(void)
-{
-	iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
-}
-
-static struct resource kirkwood_cpufreq_resources[] = {
-	[0] = {
-		.start  = CPU_CONTROL_PHYS,
-		.end    = CPU_CONTROL_PHYS + 3,
-		.flags  = IORESOURCE_MEM,
-	},
-};
-
-static struct platform_device kirkwood_cpufreq_device = {
-	.name		= "kirkwood-cpufreq",
-	.id		= -1,
-	.num_resources	= ARRAY_SIZE(kirkwood_cpufreq_resources),
-	.resource	= kirkwood_cpufreq_resources,
-};
-
-static void __init kirkwood_cpufreq_init(void)
-{
-	platform_device_register(&kirkwood_cpufreq_device);
-}
-
-static struct resource kirkwood_cpuidle_resource[] = {
-	{
-		.flags	= IORESOURCE_MEM,
-		.start	= DDR_OPERATION_BASE,
-		.end	= DDR_OPERATION_BASE + 3,
-	},
-};
-
-static struct platform_device kirkwood_cpuidle = {
-	.name		= "kirkwood_cpuidle",
-	.id		= -1,
-	.resource	= kirkwood_cpuidle_resource,
-	.num_resources	= 1,
-};
-
-static void __init kirkwood_cpuidle_init(void)
-{
-	platform_device_register(&kirkwood_cpuidle);
-}
-
-/* Temporary here since mach-mvebu has a function we can use */
-static void kirkwood_restart(enum reboot_mode mode, const char *cmd)
-{
-	/*
-	 * Enable soft reset to assert RSTOUTn.
-	 */
-	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-	/*
-	 * Assert soft reset.
-	 */
-	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-	while (1)
-		;
-}
-
-#define MV643XX_ETH_MAC_ADDR_LOW	0x0414
-#define MV643XX_ETH_MAC_ADDR_HIGH	0x0418
-
-static void __init kirkwood_dt_eth_fixup(void)
-{
-	struct device_node *np;
-
-	/*
-	 * The ethernet interfaces forget the MAC address assigned by u-boot
-	 * if the clocks are turned off. Usually, u-boot on kirkwood boards
-	 * has no DT support to properly set local-mac-address property.
-	 * As a workaround, we get the MAC address from mv643xx_eth registers
-	 * and update the port device node if no valid MAC address is set.
-	 */
-	for_each_compatible_node(np, NULL, "marvell,kirkwood-eth-port") {
-		struct device_node *pnp = of_get_parent(np);
-		struct clk *clk;
-		struct property *pmac;
-		void __iomem *io;
-		u8 *macaddr;
-		u32 reg;
-
-		if (!pnp)
-			continue;
-
-		/* skip disabled nodes or nodes with valid MAC address*/
-		if (!of_device_is_available(pnp) || of_get_mac_address(np))
-			goto eth_fixup_skip;
-
-		clk = of_clk_get(pnp, 0);
-		if (IS_ERR(clk))
-			goto eth_fixup_skip;
-
-		io = of_iomap(pnp, 0);
-		if (!io)
-			goto eth_fixup_no_map;
-
-		/* ensure port clock is not gated to not hang CPU */
-		clk_prepare_enable(clk);
-
-		/* store MAC address register contents in local-mac-address */
-		pr_err(FW_INFO "%s: local-mac-address is not set\n",
-		       np->full_name);
-
-		pmac = kzalloc(sizeof(*pmac) + 6, GFP_KERNEL);
-		if (!pmac)
-			goto eth_fixup_no_mem;
-
-		pmac->value = pmac + 1;
-		pmac->length = 6;
-		pmac->name = kstrdup("local-mac-address", GFP_KERNEL);
-		if (!pmac->name) {
-			kfree(pmac);
-			goto eth_fixup_no_mem;
-		}
-
-		macaddr = pmac->value;
-		reg = readl(io + MV643XX_ETH_MAC_ADDR_HIGH);
-		macaddr[0] = (reg >> 24) & 0xff;
-		macaddr[1] = (reg >> 16) & 0xff;
-		macaddr[2] = (reg >> 8) & 0xff;
-		macaddr[3] = reg & 0xff;
-
-		reg = readl(io + MV643XX_ETH_MAC_ADDR_LOW);
-		macaddr[4] = (reg >> 8) & 0xff;
-		macaddr[5] = reg & 0xff;
-
-		of_update_property(np, pmac);
-
-eth_fixup_no_mem:
-		iounmap(io);
-		clk_disable_unprepare(clk);
-eth_fixup_no_map:
-		clk_put(clk);
-eth_fixup_skip:
-		of_node_put(pnp);
-	}
-}
-
-/*
- * Disable propagation of mbus errors to the CPU local bus, as this
- * causes mbus errors (which can occur for example for PCI aborts) to
- * throw CPU aborts, which we're not set up to deal with.
- */
-void kirkwood_disable_mbus_error_propagation(void)
-{
-	void __iomem *cpu_config;
-
-	cpu_config = ioremap(CPU_CONFIG_PHYS, 4);
-	writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config);
-}
-
-
-static void __init kirkwood_dt_init(void)
-{
-	kirkwood_disable_mbus_error_propagation();
-
-	BUG_ON(mvebu_mbus_dt_init());
-
-	feroceon_of_init();
-
-	kirkwood_cpufreq_init();
-	kirkwood_cpuidle_init();
-
-	kirkwood_pm_init();
-	kirkwood_dt_eth_fixup();
-
-#ifdef CONFIG_KEXEC
-	kexec_reinit = kirkwood_enable_pcie;
-#endif
-
-	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char * const kirkwood_dt_board_compat[] = {
-	"marvell,kirkwood",
-	NULL
-};
-
-DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
-	/* Maintainer: Jason Cooper <jason@lakedaemon.net> */
-	.map_io		= kirkwood_map_io,
-	.init_machine	= kirkwood_dt_init,
-	.restart	= kirkwood_restart,
-	.dt_compat	= kirkwood_dt_board_compat,
-MACHINE_END
-- 
1.8.5.3

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Andrew Lunn]

On Sat, Feb 15, 2014 at 11:19:58AM +0100, Andrew Lunn wrote:
> The process of making most kirkwood boards boot using DT is nearly
> complete. We can now move these boards into mach-mvebu, freeing them
> of the legacy code needed for none-DT systems. At the same time, they
> can become part of ARCH_MULTI_V5.

Patchset can also be found in

https://github.com/lunn/linux.git v3.14-rc1-mvebu-v2

	  Andrew

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Arnd Bergmann]

On Saturday 15 February 2014 11:19:58 Andrew Lunn wrote:
> The process of making most kirkwood boards boot using DT is nearly
> complete. We can now move these boards into mach-mvebu, freeing them
> of the legacy code needed for none-DT systems. At the same time, they
> can become part of ARCH_MULTI_V5.

Great to see this happening at last, great work everyone who was
involved!

Feel free to add 'Acked-by: Arnd Bergmann <arnd@arndb.de>' to all
patches I didn't comment on.

	Arnd

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Jason Gunthorpe]

On Sat, Feb 15, 2014 at 11:19:58AM +0100, Andrew Lunn wrote:
> The process of making most kirkwood boards boot using DT is nearly
> complete. We can now move these boards into mach-mvebu, freeing them
> of the legacy code needed for none-DT systems. At the same time, they
> can become part of ARCH_MULTI_V5.

Do you have a GIT URL for this? I can test it if you make it easy :)

Thanks,
Jason

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Jason Cooper]

On Tue, Feb 18, 2014 at 11:57:03AM -0700, Jason Gunthorpe wrote:
> On Sat, Feb 15, 2014 at 11:19:58AM +0100, Andrew Lunn wrote:
> > The process of making most kirkwood boards boot using DT is nearly
> > complete. We can now move these boards into mach-mvebu, freeing them
> > of the legacy code needed for none-DT systems. At the same time, they
> > can become part of ARCH_MULTI_V5.
> 
> Do you have a GIT URL for this? I can test it if you make it easy :)

I believe this is it (web):

  https://github.com/lunn/linux/tree/v3.14-rc1-mvebu-v2

so git ...

  https://github.com/lunn/linux.git v3.14-rc1-mvebu-v2

hth,

Jason.

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Jason Gunthorpe]

On Tue, Feb 18, 2014 at 02:02:12PM -0500, Jason Cooper wrote:
> On Tue, Feb 18, 2014 at 11:57:03AM -0700, Jason Gunthorpe wrote:
> > On Sat, Feb 15, 2014 at 11:19:58AM +0100, Andrew Lunn wrote:
> > > The process of making most kirkwood boards boot using DT is nearly
> > > complete. We can now move these boards into mach-mvebu, freeing them
> > > of the legacy code needed for none-DT systems. At the same time, they
> > > can become part of ARCH_MULTI_V5.
> > 
> > Do you have a GIT URL for this? I can test it if you make it easy :)
> 
> I believe this is it (web):
> 
>   https://github.com/lunn/linux/tree/v3.14-rc1-mvebu-v2

Thanks, I tested v3 of the patchset.

It boots, but I can't do very much because the watchdog driver doesn't
build and my system is configured to watchdog timeout if there is no
watchdog driver.

Presumably the watchdog patchset needs to be a dependency for this? Is
there a git URL for it?

Also, reviewing my 3.13 Kconfig vs the 3.14 Kconfig with the patch,
these options are now forced on, and I'd prefer them to be off:
 CONFIG_ARM_PATCH_PHYS_VIRT=y
 CONFIG_GENERIC_PHY=y
 CONFIG_PHY_MVEBU_SATA=y

And looking at the final kconfig directly a bit:

config ARCH_MVEBU
	bool "Marvell SOCs with Device Tree support" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
	select ARCH_SUPPORTS_BIG_ENDIAN
	select CLKSRC_MMIO
	select COMMON_CLK
	select GENERIC_CLOCKEVENTS
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select PINCTRL
	select PLAT_ORION
	select SPARSE_IRQ
	select CLKDEV_LOOKUP
	select MVEBU_MBUS
	select ZONE_DMA if ARM_LPAE
	select ARCH_REQUIRE_GPIOLIB
	select MIGHT_HAVE_PCI
	select PCI_QUIRKS if PCI
          ^^^^^^^^^^^^^^^^^^^
       This can go now, it was something I added to support the old
       non-dt kirkwood PCI-E driver. The new DT MVEBU driver does not
       require it.

config MACH_KIRKWOOD
	bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
	select ARCH_HAS_CPUFREQ
	select ARCH_REQUIRE_GPIOLIB
	select CPU_FEROCEON
	select KIRKWOOD_CLK
	select OF_IRQ
	select ORION_IRQCHIP
	select ORION_TIMER

	select PCI
	select PCI_QUIRKS
          ^^^^^
      Also unecessary, see above
	select PINCTRL_KIRKWOOD
	select POWER_SUPPLY
	select POWER_RESET
	select POWER_RESET_GPIO
	select REGULATOR
	select REGULATOR_FIXED_VOLTAGE
	select USE_OF

And I feel PCI, POWER_SUPPLY, POWER_RESET, POWER_RESET_GPIO,
REGULATOR, REGULATOR_FIXED_VOLTAGE should not be forced in the master
KConfig as not all boards require them.

Maybe make them forced if !EMBEDDED or something?

Shouldn't USE_OF and OF_IRQ be in ARCH_MVEBU?

These options were also switched on, but I have no opinion on them.. :)
 CONFIG_SPARSE_IRQ is now mandatory
 CONFIG_ARCH_USE_BUILTIN_BSWAP is turned on
 CONFIG_HAVE_CC_STACKPROTECTOR and related are on
 CONFIG_NO_BOOTMEM=y
 CONFIG_AUTO_ZRELADDR=y

Jason

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Andrew Lunn]

> Thanks, I tested v3 of the patchset.

Great, thanks.
 
> It boots, but I can't do very much because the watchdog driver doesn't
> build and my system is configured to watchdog timeout if there is no
> watchdog driver.
> 
> Presumably the watchdog patchset needs to be a dependency for this? Is
> there a git URL for it?

I don't have a tree with both combined. I guess there is a branch in

https://github.com/MISL-EBU-System-SW/mainline-public.git

with it.
 
> Also, reviewing my 3.13 Kconfig vs the 3.14 Kconfig with the patch,
> these options are now forced on, and I'd prefer them to be off:
>  CONFIG_ARM_PATCH_PHYS_VIRT=y

I suspect that comes from multiplatform.

>  CONFIG_GENERIC_PHY=y
>  CONFIG_PHY_MVEBU_SATA=y

If you disable SATA, you can disable these two.  We have had so much
breakage with this, that i want to keep away from it for a while to
let it settle. I can then go back and see about making it truly
optional.

> And looking at the final kconfig directly a bit:
> 
> config ARCH_MVEBU
> 	bool "Marvell SOCs with Device Tree support" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
> 	select ARCH_SUPPORTS_BIG_ENDIAN
> 	select CLKSRC_MMIO
> 	select COMMON_CLK
> 	select GENERIC_CLOCKEVENTS
> 	select GENERIC_IRQ_CHIP
> 	select IRQ_DOMAIN
> 	select MULTI_IRQ_HANDLER
> 	select PINCTRL
> 	select PLAT_ORION
> 	select SPARSE_IRQ
> 	select CLKDEV_LOOKUP
> 	select MVEBU_MBUS
> 	select ZONE_DMA if ARM_LPAE
> 	select ARCH_REQUIRE_GPIOLIB
> 	select MIGHT_HAVE_PCI
> 	select PCI_QUIRKS if PCI
>           ^^^^^^^^^^^^^^^^^^^
>        This can go now, it was something I added to support the old
>        non-dt kirkwood PCI-E driver. The new DT MVEBU driver does not
>        require it.

This has nothing directly to do with this patchset. Please could you
supply a patch?
 
> config MACH_KIRKWOOD
> 	bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
> 	select ARCH_HAS_CPUFREQ
> 	select ARCH_REQUIRE_GPIOLIB
> 	select CPU_FEROCEON
> 	select KIRKWOOD_CLK
> 	select OF_IRQ
> 	select ORION_IRQCHIP
> 	select ORION_TIMER
> 
> 	select PCI
> 	select PCI_QUIRKS
>           ^^^^^
>       Also unecessary, see above
> 	select PINCTRL_KIRKWOOD
> 	select POWER_SUPPLY
> 	select POWER_RESET
> 	select POWER_RESET_GPIO
> 	select REGULATOR
> 	select REGULATOR_FIXED_VOLTAGE
> 	select USE_OF
> 
> And I feel PCI, POWER_SUPPLY, POWER_RESET, POWER_RESET_GPIO,
> REGULATOR, REGULATOR_FIXED_VOLTAGE should not be forced in the master
> KConfig as not all boards require them.

At the moment, we need PCI in order to get the SoC ID. Gregory has a
patch which will help with this, only selecting the minimum
needed. However, ARCH_KIRKWOOD selected both PCI and PCI_QUIRKS, so i
think removing them should be in a separate cleanup patch, which can
follow once the series is accepted. I added the POWER_* and
REGULATOR_* options. I will move them into mvebu_v5_defconfig and
multi_v5_defconfig instead.
 
> Maybe make them forced if !EMBEDDED or something?

I think we first need to define what EMBEDDED means. For me a NAS is
an embedded system, and it is various NAS boxes which want these.
 
> Shouldn't USE_OF and OF_IRQ be in ARCH_MVEBU?

Probably. I'm guessing the others are getting these from
multi_v7_defconfig. I would say this again is something for a cleanup
patch once the series is merged. Dove is also not too far away from
moving in, so i think it makes sense to look at things like this once
we have the complete picture.

   Andrew

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Jason Gunthorpe]

On Thu, Feb 20, 2014 at 10:45:54AM +0100, Andrew Lunn wrote:

> > Presumably the watchdog patchset needs to be a dependency for this? Is
> > there a git URL for it?
> 
> I don't have a tree with both combined. I guess there is a branch in
> 
> https://github.com/MISL-EBU-System-SW/mainline-public.git
> 
> with it.

Thanks, I'll take a peek
  
> > Also, reviewing my 3.13 Kconfig vs the 3.14 Kconfig with the patch,
> > these options are now forced on, and I'd prefer them to be off:
> >  CONFIG_ARM_PATCH_PHYS_VIRT=y
> 
> I suspect that comes from multiplatform.

Right

> >  CONFIG_GENERIC_PHY=y
> >  CONFIG_PHY_MVEBU_SATA=y
> 
> If you disable SATA, you can disable these two.  We have had so much
> breakage with this, that i want to keep away from it for a while to
> let it settle. I can then go back and see about making it truly
> optional.

No, I have SATA off, it is being selected unconditionally:

config PHY_MVEBU_SATA
        def_bool y
        depends on ARCH_KIRKWOOD || ARCH_DOVE || MACH_KIRKWOOD
        depends on OF
        select GENERIC_PHY

Does it need 'depends on ATA'?

> > 	select PCI_QUIRKS if PCI
> >           ^^^^^^^^^^^^^^^^^^^
> >        This can go now, it was something I added to support the old
> >        non-dt kirkwood PCI-E driver. The new DT MVEBU driver does not
> >        require it.
> 
> This has nothing directly to do with this patchset. Please could you
> supply a patch?

Sure, when your patchset is merged I can look at the QUIRKS setting
for mvebu

> > And I feel PCI, POWER_SUPPLY, POWER_RESET, POWER_RESET_GPIO,
> > REGULATOR, REGULATOR_FIXED_VOLTAGE should not be forced in the master
> > KConfig as not all boards require them.
> 
> At the moment, we need PCI in order to get the SoC ID. 

So this is happening because mvebu-soc-id.c is being unconditionally
compiled, even though it is not needed on anything except
armada-370-xp ?

> Gregory has a patch which will help with this, only selecting the
> minimum needed. However, ARCH_KIRKWOOD selected both PCI and
> PCI_QUIRKS, so i think removing them should be in a separate cleanup
> patch, which can follow once the series is accepted.

Agree

> I added the POWER_* and REGULATOR_* options. I will move them into
> mvebu_v5_defconfig and multi_v5_defconfig instead.

Thanks

> > Maybe make them forced if !EMBEDDED or something?
> 
> I think we first need to define what EMBEDDED means. For me a NAS is
> an embedded system, and it is various NAS boxes which want these.

EMBEDDED is just a master option to expose KConfig choices that normal
people wouldn't want to mess with (eg the ability to disable
REGULATOR). It seems to have fallen out of favor these days I guess,
maybe EXPERT is the way to go now?

Jason

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Ezequiel Garcia]

On Wed, Feb 19, 2014 at 03:21:03PM -0700, Jason Gunthorpe wrote:
> On Tue, Feb 18, 2014 at 02:02:12PM -0500, Jason Cooper wrote:
> > On Tue, Feb 18, 2014 at 11:57:03AM -0700, Jason Gunthorpe wrote:
> > > On Sat, Feb 15, 2014 at 11:19:58AM +0100, Andrew Lunn wrote:
> > > > The process of making most kirkwood boards boot using DT is nearly
> > > > complete. We can now move these boards into mach-mvebu, freeing them
> > > > of the legacy code needed for none-DT systems. At the same time, they
> > > > can become part of ARCH_MULTI_V5.
> > > 
> > > Do you have a GIT URL for this? I can test it if you make it easy :)
> > 
> > I believe this is it (web):
> > 
> >   https://github.com/lunn/linux/tree/v3.14-rc1-mvebu-v2
> 
> Thanks, I tested v3 of the patchset.
> 
> It boots, but I can't do very much because the watchdog driver doesn't
> build and my system is configured to watchdog timeout if there is no
> watchdog driver.
> 
> Presumably the watchdog patchset needs to be a dependency for this? Is
> there a git URL for it?
> 

I can take a look at preparing a merged branch for this today.
Or at least making sure the watchdog branches in mvebu, merge cleanly
with this.

After all, I also wanted to give this work a test... :)
-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Ezequiel Garcia]

On Wed, Feb 19, 2014 at 03:21:03PM -0700, Jason Gunthorpe wrote:
> On Tue, Feb 18, 2014 at 02:02:12PM -0500, Jason Cooper wrote:
> > On Tue, Feb 18, 2014 at 11:57:03AM -0700, Jason Gunthorpe wrote:
> > > On Sat, Feb 15, 2014 at 11:19:58AM +0100, Andrew Lunn wrote:
> > > > The process of making most kirkwood boards boot using DT is nearly
> > > > complete. We can now move these boards into mach-mvebu, freeing them
> > > > of the legacy code needed for none-DT systems. At the same time, they
> > > > can become part of ARCH_MULTI_V5.
> > > 
> > > Do you have a GIT URL for this? I can test it if you make it easy :)
> > 
> > I believe this is it (web):
> > 
> >   https://github.com/lunn/linux/tree/v3.14-rc1-mvebu-v2
> 
> Thanks, I tested v3 of the patchset.
> 
> It boots, but I can't do very much because the watchdog driver doesn't
> build and my system is configured to watchdog timeout if there is no
> watchdog driver.
> 
> Presumably the watchdog patchset needs to be a dependency for this? Is
> there a git URL for it?
> 

Andrew's v3 and the mvebu/watchdog branch merges without any conflicts:

https://github.com/lunn/linux/tree/v3.14-rc1-mvebu-v3

http://git.infradead.org/linux-mvebu.git/shortlog/refs/heads/mvebu/watchdog

And multi v5 works great here!
-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Andrew Lunn]

> Andrew's v3 and the mvebu/watchdog branch merges without any conflicts:
> 
> https://github.com/lunn/linux/tree/v3.14-rc1-mvebu-v3
> 
> http://git.infradead.org/linux-mvebu.git/shortlog/refs/heads/mvebu/watchdog
> 
> And multi v5 works great here!

Great, thanks for testing. I will add back the CONFIG for the
watchdog.

	Andrew

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Jason Gunthorpe]

On Fri, Feb 21, 2014 at 12:19:28AM -0300, Ezequiel Garcia wrote:
> > Thanks, I tested v3 of the patchset.
> > 
> > It boots, but I can't do very much because the watchdog driver doesn't
> > build and my system is configured to watchdog timeout if there is no
> > watchdog driver.
> > 
> > Presumably the watchdog patchset needs to be a dependency for this? Is
> > there a git URL for it?
> > 
> 
> Andrew's v3 and the mvebu/watchdog branch merges without any conflicts:
> 
> https://github.com/lunn/linux/tree/v3.14-rc1-mvebu-v3
> 
> http://git.infradead.org/linux-mvebu.git/shortlog/refs/heads/mvebu/watchdog
> 
> And multi v5 works great here!

It is working now for me as well, I haven't noticed any strangeness at
least..

Ezequiel, after I applied your watchdog branch the .dtsi files
lacked the new 2nd register:

                wdt: watchdog-timer at 20300 {
                        compatible = "marvell,orion-wdt";
                        reg = <0x20300 0x28>;
                        interrupt-parent = <&bridge_intc>;
                        interrupts = <3>;
                        clocks = <&gate_clk 7>;
                        status = "okay";
                };

Which creates a nasty warn-on during boot - is that expected?

BTW, for both patche sets:
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> (on kirkwood)

Also, there seems to be some missing request_region in drivers (can
be fixedup later)

f1001418-f100141b : kirkwood_cpuidle
f1001500-f100151f : /mbus/internal at f1000000/mbus-controller at 20000
f1010030-f1010033 : /mbus/internal at f1000000/core-clocks at 10030
f1020000-f102007f : /mbus/internal at f1000000/mbus-controller at 20000
f1020104-f1020107 : kirkwood-cpufreq
f1020108-f102010b : /mbus/internal at f1000000/wdt at 20300
f102011c-f102011f : /mbus/internal at f1000000/clock-gating-control at 2011c
f1020128-f102012b : /mbus/internal at f1000000/l2-cache at 20128
f1020300-f102031f : /mbus/internal at f1000000/timer at 20300
f1040000-f1041fff : /mbus/pex at e0000000/pcie at 1,0
f1072000-f1075fff : /mbus/internal at f1000000/egiga0
  f1072004-f1072087 : /mbus/internal at f1000000/mdio at 72000
f4000000-f40003ff : /mbus/nand at f4000000/nand at 0

In general it should be:

f1012100-f10121ff : /mbus/internal at f1000000/serial at 12100  (<-- OF stanza)
  f1012100-f101211f : serial    (<-- Driver request region)

Jason

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Ezequiel Garcia]

On Fri, Feb 21, 2014 at 10:57:50AM -0700, Jason Gunthorpe wrote:
> On Fri, Feb 21, 2014 at 12:19:28AM -0300, Ezequiel Garcia wrote:
> > > Thanks, I tested v3 of the patchset.
> > > 
> > > It boots, but I can't do very much because the watchdog driver doesn't
> > > build and my system is configured to watchdog timeout if there is no
> > > watchdog driver.
> > > 
> > > Presumably the watchdog patchset needs to be a dependency for this? Is
> > > there a git URL for it?
> > > 
> > 
> > Andrew's v3 and the mvebu/watchdog branch merges without any conflicts:
> > 
> > https://github.com/lunn/linux/tree/v3.14-rc1-mvebu-v3
> > 
> > http://git.infradead.org/linux-mvebu.git/shortlog/refs/heads/mvebu/watchdog
> > 
> > And multi v5 works great here!
> 
> It is working now for me as well, I haven't noticed any strangeness at
> least..
> 
> Ezequiel, after I applied your watchdog branch the .dtsi files
> lacked the new 2nd register:
> 
>                 wdt: watchdog-timer at 20300 {
>                         compatible = "marvell,orion-wdt";
>                         reg = <0x20300 0x28>;
>                         interrupt-parent = <&bridge_intc>;
>                         interrupts = <3>;
>                         clocks = <&gate_clk 7>;
>                         status = "okay";
>                 };
> 
> Which creates a nasty warn-on during boot - is that expected?
>

Yup, that's expected. It avoids any backwards compatibility issues.
The watchdog patchset has been pulled by Jason Cooper in two branches;
if my memory doesn't fail me, they are: mvebu/watchdog and mvebu/dt.

However, the mvebu/dt branch seemed to conflict with Andrew's multi-v5
work, so I haven't advised you to merge it as well. And since the watchdog
can work with the old DT, it's not a big issue.

Just remember to update your DTB.

> BTW, for both patche sets:
> Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> (on kirkwood)
> 

Thanks! The watchdog work is already merged, but maybe Jason Cooper can take
care of adding your tested-by.
-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

[PATCH v2 00/23] Move DT kirkwood into mach-mvebu

[Jason Cooper]

On Fri, Feb 21, 2014 at 10:51:14PM -0300, Ezequiel Garcia wrote:
> On Fri, Feb 21, 2014 at 10:57:50AM -0700, Jason Gunthorpe wrote:
...
> > BTW, for both patche sets:
> > Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> (on kirkwood)
> > 
> 
> Thanks! The watchdog work is already merged, but maybe Jason Cooper can take
> care of adding your tested-by.

Done.  Andrew, please add it to your series if/when there's a new
version.

thx,

Jason.