From: Vivek Gautam <gautam.vivek@samsung.com> To: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org, gregkh@linuxfoundation.org, kishon@ti.com, mathias.nyman@intel.com Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, jwerner@chromium.org, Vivek Gautam <gautam.vivek@samsung.com> Subject: [PATCH 3/4] usb: host: xhci-plat: Caibrate PHY post host reset Date: Fri, 6 Jun 2014 17:42:14 +0530 [thread overview] Message-ID: <1402056736-12674-4-git-send-email-gautam.vivek@samsung.com> (raw) In-Reply-To: <1402056736-12674-1-git-send-email-gautam.vivek@samsung.com> Some quirky PHYs may require to be calibrated post the host controller initialization. The USB 3.0 DRD PHY on Exynos5420/5800 systems is one such PHY which needs to calibrated post xhci's reset at initialization time and at resume time, to get the controller work at SuperSpeed. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> --- drivers/usb/host/xhci-plat.c | 50 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index e7145b5..7be03df 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -32,10 +32,51 @@ static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) xhci->quirks |= XHCI_PLAT; } +static int xhci_plat_calibrate_phy(struct xhci_hcd *xhci) +{ + int ret = 0; + struct usb_hcd *hcd = xhci_to_hcd(xhci); + + /* calibrate phy if available */ + if (!IS_ERR(xhci->phy2_gen)) { + ret = phy_calibrate(xhci->phy2_gen); + if (ret < 0 && ret != -ENOTSUPP) { + dev_err(hcd->self.controller, + "failed to calibrate USB 2.0 type PHY\n"); + return ret; + } + } + + if (!IS_ERR(xhci->phy3_gen)) { + ret = phy_calibrate(xhci->phy3_gen); + if (ret < 0 && ret != -ENOTSUPP) + dev_err(hcd->self.controller, + "failed to calibrate USB 3.0 type PHY\n"); + } + + return ret; +} + /* called during probe() after chip reset completes */ static int xhci_plat_setup(struct usb_hcd *hcd) { - return xhci_gen_setup(hcd, xhci_plat_quirks); + struct xhci_hcd *xhci; + int ret; + + ret = xhci_gen_setup(hcd, xhci_plat_quirks); + if (ret) { + dev_err(hcd->self.controller, "xhci setup failed\n"); + return ret; + } + + if (!usb_hcd_is_primary_hcd(hcd)) { + xhci = hcd_to_xhci(hcd); + ret = xhci_plat_calibrate_phy(xhci); + if (ret) + return ret; + } + + return 0; } static int xhci_plat_start(struct usb_hcd *hcd) @@ -276,8 +317,13 @@ static int xhci_plat_resume(struct device *dev) { struct usb_hcd *hcd = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(hcd); + int ret; + + ret = xhci_resume(xhci, 0); + if (ret) + return ret; - return xhci_resume(xhci, 0); + return xhci_plat_calibrate_phy(xhci); } static const struct dev_pm_ops xhci_plat_pm_ops = { -- 1.7.10.4
WARNING: multiple messages have this Message-ID (diff)
From: gautam.vivek@samsung.com (Vivek Gautam) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/4] usb: host: xhci-plat: Caibrate PHY post host reset Date: Fri, 6 Jun 2014 17:42:14 +0530 [thread overview] Message-ID: <1402056736-12674-4-git-send-email-gautam.vivek@samsung.com> (raw) In-Reply-To: <1402056736-12674-1-git-send-email-gautam.vivek@samsung.com> Some quirky PHYs may require to be calibrated post the host controller initialization. The USB 3.0 DRD PHY on Exynos5420/5800 systems is one such PHY which needs to calibrated post xhci's reset at initialization time and at resume time, to get the controller work at SuperSpeed. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> --- drivers/usb/host/xhci-plat.c | 50 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index e7145b5..7be03df 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -32,10 +32,51 @@ static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) xhci->quirks |= XHCI_PLAT; } +static int xhci_plat_calibrate_phy(struct xhci_hcd *xhci) +{ + int ret = 0; + struct usb_hcd *hcd = xhci_to_hcd(xhci); + + /* calibrate phy if available */ + if (!IS_ERR(xhci->phy2_gen)) { + ret = phy_calibrate(xhci->phy2_gen); + if (ret < 0 && ret != -ENOTSUPP) { + dev_err(hcd->self.controller, + "failed to calibrate USB 2.0 type PHY\n"); + return ret; + } + } + + if (!IS_ERR(xhci->phy3_gen)) { + ret = phy_calibrate(xhci->phy3_gen); + if (ret < 0 && ret != -ENOTSUPP) + dev_err(hcd->self.controller, + "failed to calibrate USB 3.0 type PHY\n"); + } + + return ret; +} + /* called during probe() after chip reset completes */ static int xhci_plat_setup(struct usb_hcd *hcd) { - return xhci_gen_setup(hcd, xhci_plat_quirks); + struct xhci_hcd *xhci; + int ret; + + ret = xhci_gen_setup(hcd, xhci_plat_quirks); + if (ret) { + dev_err(hcd->self.controller, "xhci setup failed\n"); + return ret; + } + + if (!usb_hcd_is_primary_hcd(hcd)) { + xhci = hcd_to_xhci(hcd); + ret = xhci_plat_calibrate_phy(xhci); + if (ret) + return ret; + } + + return 0; } static int xhci_plat_start(struct usb_hcd *hcd) @@ -276,8 +317,13 @@ static int xhci_plat_resume(struct device *dev) { struct usb_hcd *hcd = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(hcd); + int ret; + + ret = xhci_resume(xhci, 0); + if (ret) + return ret; - return xhci_resume(xhci, 0); + return xhci_plat_calibrate_phy(xhci); } static const struct dev_pm_ops xhci_plat_pm_ops = { -- 1.7.10.4
next prev parent reply other threads:[~2014-06-06 12:12 UTC|newest] Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-06-06 12:12 [PATCH v1 0/4] Fine tune USB 3.0 PHY on exynos5420 Vivek Gautam 2014-06-06 12:12 ` Vivek Gautam 2014-06-06 12:12 ` Vivek Gautam 2014-06-06 12:12 ` [PATCH 1/4] phy: Add provision for calibrating phy Vivek Gautam 2014-06-06 12:12 ` Vivek Gautam 2014-06-09 3:49 ` Pratyush Anand 2014-06-09 3:49 ` Pratyush Anand 2014-06-09 3:49 ` Pratyush Anand 2014-07-09 9:02 ` Vivek Gautam 2014-07-09 9:02 ` Vivek Gautam 2014-07-09 9:02 ` Vivek Gautam 2014-06-06 12:12 ` [PATCH 2/4] usb: host: xhci-plat: Add support to get PHYs Vivek Gautam 2014-06-06 12:12 ` Vivek Gautam 2014-06-09 20:22 ` Julius Werner 2014-06-09 20:22 ` Julius Werner 2014-06-09 20:22 ` Julius Werner 2014-06-24 6:10 ` Vivek Gautam 2014-06-24 6:10 ` Vivek Gautam 2014-06-24 6:10 ` Vivek Gautam 2014-06-24 22:34 ` Sergei Shtylyov 2014-06-24 22:34 ` Sergei Shtylyov 2014-06-24 22:34 ` Sergei Shtylyov 2014-06-25 5:49 ` Vivek Gautam 2014-06-25 5:49 ` Vivek Gautam 2014-06-25 5:49 ` Vivek Gautam 2014-06-25 8:44 ` Vivek Gautam 2014-06-25 8:44 ` Vivek Gautam 2014-06-25 8:44 ` Vivek Gautam 2014-07-03 22:39 ` Sergei Shtylyov 2014-07-03 22:39 ` Sergei Shtylyov 2014-07-03 22:39 ` Sergei Shtylyov 2014-06-06 12:12 ` Vivek Gautam [this message] 2014-06-06 12:12 ` [PATCH 3/4] usb: host: xhci-plat: Caibrate PHY post host reset Vivek Gautam 2014-06-06 12:12 ` [PATCH 4/4] phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800 Vivek Gautam 2014-06-06 12:12 ` Vivek Gautam
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