From: Tiejun Chen <tiejun.chen@intel.com> To: pbonzini@redhat.com, anthony.perard@citrix.com, stefano.stabellini@eu.citrix.com, mst@redhat.com, Kelly.Zytaruk@amd.com Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, anthony@codemonkey.ws, yang.z.zhang@intel.com Subject: [Qemu-devel] [v5][PATCH 1/5] xen, gfx passthrough: basic graphics passthrough support Date: Wed, 25 Jun 2014 10:17:17 +0800 [thread overview] Message-ID: <1403662641-28526-2-git-send-email-tiejun.chen@intel.com> (raw) In-Reply-To: <1403662641-28526-1-git-send-email-tiejun.chen@intel.com> basic gfx passthrough support: - add a vga type for gfx passthrough - retrieve VGA bios from sysfs, then load it to guest at 0xC0000 - register/unregister legacy VGA I/O ports and MMIOs for passthrough GFX The original patch is from Weidong Han <weidong.han@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com> Signed-off-by: Tiejun Chen <tiejun.chen@intel.com> Cc: Weidong Han <weidong.han@intel.com> --- v5: * Just rebase. v4: * Fix some typos in the patch head description. * Improve some comments. * Given that xen_pt_register_vga_regions()/xen_pt_unregister_vga_regions() are called unconditionally, so we just return 0 there. * Remove one spurious change. v3: * Fix some typos. * Add more comments to make that readable. * Improve some return paths. v2: * retrieve VGA bios from sysfs properly. * redefine some function name. hw/xen/Makefile.objs | 2 +- hw/xen/xen-host-pci-device.c | 5 + hw/xen/xen-host-pci-device.h | 1 + hw/xen/xen_pt.c | 10 ++ hw/xen/xen_pt.h | 4 + hw/xen/xen_pt_graphics.c | 232 +++++++++++++++++++++++++++++++++++++++++++ qemu-options.hx | 9 ++ vl.c | 10 ++ 8 files changed, 272 insertions(+), 1 deletion(-) create mode 100644 hw/xen/xen_pt_graphics.c diff --git a/hw/xen/Makefile.objs b/hw/xen/Makefile.objs index a0ca0aa..77b7dae 100644 --- a/hw/xen/Makefile.objs +++ b/hw/xen/Makefile.objs @@ -2,4 +2,4 @@ common-obj-$(CONFIG_XEN_BACKEND) += xen_backend.o xen_devconfig.o obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen-host-pci-device.o -obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o xen_pt_msi.o +obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o xen_pt_msi.o xen_pt_graphics.o diff --git a/hw/xen/xen-host-pci-device.c b/hw/xen/xen-host-pci-device.c index 743b37b..a54b7de 100644 --- a/hw/xen/xen-host-pci-device.c +++ b/hw/xen/xen-host-pci-device.c @@ -376,6 +376,11 @@ int xen_host_pci_device_get(XenHostPCIDevice *d, uint16_t domain, goto error; } d->irq = v; + rc = xen_host_pci_get_hex_value(d, "class", &v); + if (rc) { + goto error; + } + d->class_code = v; d->is_virtfn = xen_host_pci_dev_is_virtfn(d); return 0; diff --git a/hw/xen/xen-host-pci-device.h b/hw/xen/xen-host-pci-device.h index c2486f0..f1e1c30 100644 --- a/hw/xen/xen-host-pci-device.h +++ b/hw/xen/xen-host-pci-device.h @@ -25,6 +25,7 @@ typedef struct XenHostPCIDevice { uint16_t vendor_id; uint16_t device_id; + uint32_t class_code; int irq; XenHostPCIIORegion io_regions[PCI_NUM_REGIONS - 1]; diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index be4220b..dac4238 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -450,6 +450,7 @@ static int xen_pt_register_regions(XenPCIPassthroughState *s) d->rom.size, d->rom.base_addr); } + xen_pt_register_vga_regions(d); return 0; } @@ -470,6 +471,8 @@ static void xen_pt_unregister_regions(XenPCIPassthroughState *s) if (d->rom.base_addr && d->rom.size) { memory_region_destroy(&s->rom); } + + xen_pt_unregister_vga_regions(d); } /* region mapping */ @@ -693,6 +696,13 @@ static int xen_pt_initfn(PCIDevice *d) /* Handle real device's MMIO/PIO BARs */ xen_pt_register_regions(s); + /* Setup VGA bios for passthrough GFX */ + if (xen_pt_setup_vga(&s->real_device) < 0) { + XEN_PT_ERR(d, "Setup VGA BIOS of passthrough GFX failed!\n"); + xen_host_pci_device_put(&s->real_device); + return -1; + } + /* reinitialize each config register to be emulated */ if (xen_pt_config_init(s)) { XEN_PT_ERR(d, "PCI Config space initialisation failed.\n"); diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index 942dc60..4d3a18d 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -298,5 +298,9 @@ static inline bool xen_pt_has_msix_mapping(XenPCIPassthroughState *s, int bar) return s->msix && s->msix->bar_index == bar; } +extern int xen_has_gfx_passthru; +int xen_pt_register_vga_regions(XenHostPCIDevice *dev); +int xen_pt_unregister_vga_regions(XenHostPCIDevice *dev); +int xen_pt_setup_vga(XenHostPCIDevice *dev); #endif /* !XEN_PT_H */ diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c new file mode 100644 index 0000000..461e526 --- /dev/null +++ b/hw/xen/xen_pt_graphics.c @@ -0,0 +1,232 @@ +/* + * graphics passthrough + */ +#include "xen_pt.h" +#include "xen-host-pci-device.h" +#include "hw/xen/xen_backend.h" + +static int is_vga_passthrough(XenHostPCIDevice *dev) +{ + return (xen_has_gfx_passthru + && ((dev->class_code >> 0x8) == PCI_CLASS_DISPLAY_VGA)); +} + +typedef struct VGARegion { + int type; /* Memory or port I/O */ + uint64_t guest_base_addr; + uint64_t machine_base_addr; + uint64_t size; /* size of the region */ + int rc; +} VGARegion; + +#define IORESOURCE_IO 0x00000100 +#define IORESOURCE_MEM 0x00000200 + +static struct VGARegion vga_args[] = { + { + .type = IORESOURCE_IO, + .guest_base_addr = 0x3B0, + .machine_base_addr = 0x3B0, + .size = 0xC, + .rc = -1, + }, + { + .type = IORESOURCE_IO, + .guest_base_addr = 0x3C0, + .machine_base_addr = 0x3C0, + .size = 0x20, + .rc = -1, + }, + { + .type = IORESOURCE_MEM, + .guest_base_addr = 0xa0000 >> XC_PAGE_SHIFT, + .machine_base_addr = 0xa0000 >> XC_PAGE_SHIFT, + .size = 0x20, + .rc = -1, + }, +}; + +/* + * register VGA resources for the domain with assigned gfx + */ +int xen_pt_register_vga_regions(XenHostPCIDevice *dev) +{ + int i = 0; + + if (!is_vga_passthrough(dev)) { + return 0; + } + + for (i = 0 ; i < ARRAY_SIZE(vga_args); i++) { + if (vga_args[i].type == IORESOURCE_IO) { + vga_args[i].rc = xc_domain_ioport_mapping(xen_xc, xen_domid, + vga_args[i].guest_base_addr, + vga_args[i].machine_base_addr, + vga_args[i].size, DPCI_ADD_MAPPING); + } else { + vga_args[i].rc = xc_domain_memory_mapping(xen_xc, xen_domid, + vga_args[i].guest_base_addr, + vga_args[i].machine_base_addr, + vga_args[i].size, DPCI_ADD_MAPPING); + } + + if (vga_args[i].rc) { + XEN_PT_ERR(NULL, "VGA %s mapping failed! (rc: %i)\n", + vga_args[i].type == IORESOURCE_IO ? "ioport" : "memory", + vga_args[i].rc); + return vga_args[i].rc; + } + } + + return 0; +} + +/* + * unregister VGA resources for the domain with assigned gfx + */ +int xen_pt_unregister_vga_regions(XenHostPCIDevice *dev) +{ + int i = 0; + + if (!is_vga_passthrough(dev)) { + return 0; + } + + for (i = 0 ; i < ARRAY_SIZE(vga_args); i++) { + if (vga_args[i].type == IORESOURCE_IO) { + vga_args[i].rc = xc_domain_ioport_mapping(xen_xc, xen_domid, + vga_args[i].guest_base_addr, + vga_args[i].machine_base_addr, + vga_args[i].size, DPCI_REMOVE_MAPPING); + } else { + vga_args[i].rc = xc_domain_memory_mapping(xen_xc, xen_domid, + vga_args[i].guest_base_addr, + vga_args[i].machine_base_addr, + vga_args[i].size, DPCI_REMOVE_MAPPING); + } + + if (vga_args[i].rc) { + XEN_PT_ERR(NULL, "VGA %s unmapping failed! (rc: %i)\n", + vga_args[i].type == IORESOURCE_IO ? "ioport" : "memory", + vga_args[i].rc); + return vga_args[i].rc; + } + } + + return 0; +} + +static int get_vgabios(unsigned char *buf, XenHostPCIDevice *dev) +{ + char rom_file[64]; + FILE *fp; + uint8_t val; + struct stat st; + uint16_t magic = 0; + int ret = 0; + + snprintf(rom_file, sizeof(rom_file), + "/sys/bus/pci/devices/%04x:%02x:%02x.%d/rom", + dev->domain, dev->bus, dev->dev, + dev->func); + + if (stat(rom_file, &st)) { + return -ENODEV; + } + + if (access(rom_file, F_OK)) { + XEN_PT_ERR(NULL, "pci-assign: Insufficient privileges for %s", + rom_file); + return -ENODEV; + } + + /* Write "1" to the ROM file to enable it */ + fp = fopen(rom_file, "r+"); + if (fp == NULL) { + return -EACCES; + } + val = 1; + if (fwrite(&val, 1, 1, fp) != 1) { + XEN_PT_LOG("%s\n", "Failed to enable pci-sysfs rom file"); + ret = -EIO; + goto close_rom; + } + fseek(fp, 0, SEEK_SET); + + /* + * Check if it a real bios extension. + * The magic number is 0xAA55. + */ + if (!fread(&magic, sizeof(magic), 1, fp)) { + XEN_PT_ERR(NULL, "VGA: can't get magic.\n"); + ret = -ENODEV; + goto close_rom; + } + if (magic != 0xAA55) { + XEN_PT_ERR(NULL, "VGA: wrong magic %x.\n", magic); + ret = -ENODEV; + goto close_rom; + } + fseek(fp, 0, SEEK_SET); + + if (!fread(buf, 1, st.st_size, fp)) { + XEN_PT_ERR(NULL, "VGA: pci-assign: Cannot read from host %s", rom_file); + XEN_PT_LOG(NULL, "VGA: Device option ROM contents are probably invalid " + "(check dmesg).\nSkip option ROM probe with rombar=0, " + "or load from file with romfile=\n"); + } + +close_rom: + /* Write "0" to disable ROM */ + fseek(fp, 0, SEEK_SET); + val = 0; + if (!fwrite(&val, 1, 1, fp)) { + ret = -EIO; + XEN_PT_LOG("%s\n", "Failed to disable pci-sysfs rom file"); + } + fclose(fp); + return ret; +} + +/* Allocated 128K for the vga bios */ +#define VGA_BIOS_DEFAULT_SIZE (0x20000) + +int xen_pt_setup_vga(XenHostPCIDevice *dev) +{ + unsigned char *bios = NULL; + int bios_size = 0; + char *c = NULL; + char checksum = 0; + int rc = 0; + + if (!is_vga_passthrough(dev)) { + return rc; + } + + bios = g_malloc0(VGA_BIOS_DEFAULT_SIZE); + + bios_size = get_vgabios(bios, dev); + if (bios_size) { + XEN_PT_ERR(NULL, "VGA: Error %d getting VBIOS!\n", bios_size); + if (bios_size < 0) { + XEN_PT_ERR(NULL, "VGA: Error (%s).\n", strerror(bios_size)); + } + rc = -1; + goto out; + } + + /* Adjust the bios checksum */ + for (c = (char *)bios; c < ((char *)bios + bios_size); c++) { + checksum += *c; + } + if (checksum) { + bios[bios_size - 1] -= checksum; + XEN_PT_LOG(NULL, "vga bios checksum is adjusted!\n"); + } + + /* Currently we fixed this address as a primary. */ + cpu_physical_memory_rw(0xc0000, bios, bios_size, 1); +out: + g_free(bios); + return rc; +} diff --git a/qemu-options.hx b/qemu-options.hx index ff76ad4..1c77baa 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -1066,6 +1066,15 @@ STEXI Rotate graphical output some deg left (only PXA LCD). ETEXI +DEF("gfx_passthru", 0, QEMU_OPTION_gfx_passthru, + "-gfx_passthru enable Intel IGD passthrough by XEN\n", + QEMU_ARCH_ALL) +STEXI +@item -gfx_passthru +@findex -gfx_passthru +Enable Intel IGD passthrough by XEN +ETEXI + DEF("vga", HAS_ARG, QEMU_OPTION_vga, "-vga [std|cirrus|vmware|qxl|xenfb|tcx|cg3|none]\n" " select video card type\n", QEMU_ARCH_ALL) diff --git a/vl.c b/vl.c index a1686ef..c5b572d 100644 --- a/vl.c +++ b/vl.c @@ -1418,6 +1418,13 @@ static void configure_msg(QemuOpts *opts) enable_timestamp_msg = qemu_opt_get_bool(opts, "timestamp", true); } +/* We still need this for compatibility with XEN. */ +int xen_has_gfx_passthru; +static void xen_gfx_passthru(const char *optarg) +{ + xen_has_gfx_passthru = 1; +} + /***********************************************************/ /* USB devices */ @@ -3945,6 +3952,9 @@ int main(int argc, char **argv, char **envp) exit(1); } break; + case QEMU_OPTION_gfx_passthru: + xen_gfx_passthru(optarg); + break; default: os_parse_cmd_args(popt->index, optarg); } -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: Tiejun Chen <tiejun.chen@intel.com> To: pbonzini@redhat.com, anthony.perard@citrix.com, stefano.stabellini@eu.citrix.com, mst@redhat.com, Kelly.Zytaruk@amd.com Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, anthony@codemonkey.ws, yang.z.zhang@intel.com Subject: [v5][PATCH 1/5] xen, gfx passthrough: basic graphics passthrough support Date: Wed, 25 Jun 2014 10:17:17 +0800 [thread overview] Message-ID: <1403662641-28526-2-git-send-email-tiejun.chen@intel.com> (raw) In-Reply-To: <1403662641-28526-1-git-send-email-tiejun.chen@intel.com> basic gfx passthrough support: - add a vga type for gfx passthrough - retrieve VGA bios from sysfs, then load it to guest at 0xC0000 - register/unregister legacy VGA I/O ports and MMIOs for passthrough GFX The original patch is from Weidong Han <weidong.han@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com> Signed-off-by: Tiejun Chen <tiejun.chen@intel.com> Cc: Weidong Han <weidong.han@intel.com> --- v5: * Just rebase. v4: * Fix some typos in the patch head description. * Improve some comments. * Given that xen_pt_register_vga_regions()/xen_pt_unregister_vga_regions() are called unconditionally, so we just return 0 there. * Remove one spurious change. v3: * Fix some typos. * Add more comments to make that readable. * Improve some return paths. v2: * retrieve VGA bios from sysfs properly. * redefine some function name. hw/xen/Makefile.objs | 2 +- hw/xen/xen-host-pci-device.c | 5 + hw/xen/xen-host-pci-device.h | 1 + hw/xen/xen_pt.c | 10 ++ hw/xen/xen_pt.h | 4 + hw/xen/xen_pt_graphics.c | 232 +++++++++++++++++++++++++++++++++++++++++++ qemu-options.hx | 9 ++ vl.c | 10 ++ 8 files changed, 272 insertions(+), 1 deletion(-) create mode 100644 hw/xen/xen_pt_graphics.c diff --git a/hw/xen/Makefile.objs b/hw/xen/Makefile.objs index a0ca0aa..77b7dae 100644 --- a/hw/xen/Makefile.objs +++ b/hw/xen/Makefile.objs @@ -2,4 +2,4 @@ common-obj-$(CONFIG_XEN_BACKEND) += xen_backend.o xen_devconfig.o obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen-host-pci-device.o -obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o xen_pt_msi.o +obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o xen_pt_msi.o xen_pt_graphics.o diff --git a/hw/xen/xen-host-pci-device.c b/hw/xen/xen-host-pci-device.c index 743b37b..a54b7de 100644 --- a/hw/xen/xen-host-pci-device.c +++ b/hw/xen/xen-host-pci-device.c @@ -376,6 +376,11 @@ int xen_host_pci_device_get(XenHostPCIDevice *d, uint16_t domain, goto error; } d->irq = v; + rc = xen_host_pci_get_hex_value(d, "class", &v); + if (rc) { + goto error; + } + d->class_code = v; d->is_virtfn = xen_host_pci_dev_is_virtfn(d); return 0; diff --git a/hw/xen/xen-host-pci-device.h b/hw/xen/xen-host-pci-device.h index c2486f0..f1e1c30 100644 --- a/hw/xen/xen-host-pci-device.h +++ b/hw/xen/xen-host-pci-device.h @@ -25,6 +25,7 @@ typedef struct XenHostPCIDevice { uint16_t vendor_id; uint16_t device_id; + uint32_t class_code; int irq; XenHostPCIIORegion io_regions[PCI_NUM_REGIONS - 1]; diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index be4220b..dac4238 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -450,6 +450,7 @@ static int xen_pt_register_regions(XenPCIPassthroughState *s) d->rom.size, d->rom.base_addr); } + xen_pt_register_vga_regions(d); return 0; } @@ -470,6 +471,8 @@ static void xen_pt_unregister_regions(XenPCIPassthroughState *s) if (d->rom.base_addr && d->rom.size) { memory_region_destroy(&s->rom); } + + xen_pt_unregister_vga_regions(d); } /* region mapping */ @@ -693,6 +696,13 @@ static int xen_pt_initfn(PCIDevice *d) /* Handle real device's MMIO/PIO BARs */ xen_pt_register_regions(s); + /* Setup VGA bios for passthrough GFX */ + if (xen_pt_setup_vga(&s->real_device) < 0) { + XEN_PT_ERR(d, "Setup VGA BIOS of passthrough GFX failed!\n"); + xen_host_pci_device_put(&s->real_device); + return -1; + } + /* reinitialize each config register to be emulated */ if (xen_pt_config_init(s)) { XEN_PT_ERR(d, "PCI Config space initialisation failed.\n"); diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index 942dc60..4d3a18d 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -298,5 +298,9 @@ static inline bool xen_pt_has_msix_mapping(XenPCIPassthroughState *s, int bar) return s->msix && s->msix->bar_index == bar; } +extern int xen_has_gfx_passthru; +int xen_pt_register_vga_regions(XenHostPCIDevice *dev); +int xen_pt_unregister_vga_regions(XenHostPCIDevice *dev); +int xen_pt_setup_vga(XenHostPCIDevice *dev); #endif /* !XEN_PT_H */ diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c new file mode 100644 index 0000000..461e526 --- /dev/null +++ b/hw/xen/xen_pt_graphics.c @@ -0,0 +1,232 @@ +/* + * graphics passthrough + */ +#include "xen_pt.h" +#include "xen-host-pci-device.h" +#include "hw/xen/xen_backend.h" + +static int is_vga_passthrough(XenHostPCIDevice *dev) +{ + return (xen_has_gfx_passthru + && ((dev->class_code >> 0x8) == PCI_CLASS_DISPLAY_VGA)); +} + +typedef struct VGARegion { + int type; /* Memory or port I/O */ + uint64_t guest_base_addr; + uint64_t machine_base_addr; + uint64_t size; /* size of the region */ + int rc; +} VGARegion; + +#define IORESOURCE_IO 0x00000100 +#define IORESOURCE_MEM 0x00000200 + +static struct VGARegion vga_args[] = { + { + .type = IORESOURCE_IO, + .guest_base_addr = 0x3B0, + .machine_base_addr = 0x3B0, + .size = 0xC, + .rc = -1, + }, + { + .type = IORESOURCE_IO, + .guest_base_addr = 0x3C0, + .machine_base_addr = 0x3C0, + .size = 0x20, + .rc = -1, + }, + { + .type = IORESOURCE_MEM, + .guest_base_addr = 0xa0000 >> XC_PAGE_SHIFT, + .machine_base_addr = 0xa0000 >> XC_PAGE_SHIFT, + .size = 0x20, + .rc = -1, + }, +}; + +/* + * register VGA resources for the domain with assigned gfx + */ +int xen_pt_register_vga_regions(XenHostPCIDevice *dev) +{ + int i = 0; + + if (!is_vga_passthrough(dev)) { + return 0; + } + + for (i = 0 ; i < ARRAY_SIZE(vga_args); i++) { + if (vga_args[i].type == IORESOURCE_IO) { + vga_args[i].rc = xc_domain_ioport_mapping(xen_xc, xen_domid, + vga_args[i].guest_base_addr, + vga_args[i].machine_base_addr, + vga_args[i].size, DPCI_ADD_MAPPING); + } else { + vga_args[i].rc = xc_domain_memory_mapping(xen_xc, xen_domid, + vga_args[i].guest_base_addr, + vga_args[i].machine_base_addr, + vga_args[i].size, DPCI_ADD_MAPPING); + } + + if (vga_args[i].rc) { + XEN_PT_ERR(NULL, "VGA %s mapping failed! (rc: %i)\n", + vga_args[i].type == IORESOURCE_IO ? "ioport" : "memory", + vga_args[i].rc); + return vga_args[i].rc; + } + } + + return 0; +} + +/* + * unregister VGA resources for the domain with assigned gfx + */ +int xen_pt_unregister_vga_regions(XenHostPCIDevice *dev) +{ + int i = 0; + + if (!is_vga_passthrough(dev)) { + return 0; + } + + for (i = 0 ; i < ARRAY_SIZE(vga_args); i++) { + if (vga_args[i].type == IORESOURCE_IO) { + vga_args[i].rc = xc_domain_ioport_mapping(xen_xc, xen_domid, + vga_args[i].guest_base_addr, + vga_args[i].machine_base_addr, + vga_args[i].size, DPCI_REMOVE_MAPPING); + } else { + vga_args[i].rc = xc_domain_memory_mapping(xen_xc, xen_domid, + vga_args[i].guest_base_addr, + vga_args[i].machine_base_addr, + vga_args[i].size, DPCI_REMOVE_MAPPING); + } + + if (vga_args[i].rc) { + XEN_PT_ERR(NULL, "VGA %s unmapping failed! (rc: %i)\n", + vga_args[i].type == IORESOURCE_IO ? "ioport" : "memory", + vga_args[i].rc); + return vga_args[i].rc; + } + } + + return 0; +} + +static int get_vgabios(unsigned char *buf, XenHostPCIDevice *dev) +{ + char rom_file[64]; + FILE *fp; + uint8_t val; + struct stat st; + uint16_t magic = 0; + int ret = 0; + + snprintf(rom_file, sizeof(rom_file), + "/sys/bus/pci/devices/%04x:%02x:%02x.%d/rom", + dev->domain, dev->bus, dev->dev, + dev->func); + + if (stat(rom_file, &st)) { + return -ENODEV; + } + + if (access(rom_file, F_OK)) { + XEN_PT_ERR(NULL, "pci-assign: Insufficient privileges for %s", + rom_file); + return -ENODEV; + } + + /* Write "1" to the ROM file to enable it */ + fp = fopen(rom_file, "r+"); + if (fp == NULL) { + return -EACCES; + } + val = 1; + if (fwrite(&val, 1, 1, fp) != 1) { + XEN_PT_LOG("%s\n", "Failed to enable pci-sysfs rom file"); + ret = -EIO; + goto close_rom; + } + fseek(fp, 0, SEEK_SET); + + /* + * Check if it a real bios extension. + * The magic number is 0xAA55. + */ + if (!fread(&magic, sizeof(magic), 1, fp)) { + XEN_PT_ERR(NULL, "VGA: can't get magic.\n"); + ret = -ENODEV; + goto close_rom; + } + if (magic != 0xAA55) { + XEN_PT_ERR(NULL, "VGA: wrong magic %x.\n", magic); + ret = -ENODEV; + goto close_rom; + } + fseek(fp, 0, SEEK_SET); + + if (!fread(buf, 1, st.st_size, fp)) { + XEN_PT_ERR(NULL, "VGA: pci-assign: Cannot read from host %s", rom_file); + XEN_PT_LOG(NULL, "VGA: Device option ROM contents are probably invalid " + "(check dmesg).\nSkip option ROM probe with rombar=0, " + "or load from file with romfile=\n"); + } + +close_rom: + /* Write "0" to disable ROM */ + fseek(fp, 0, SEEK_SET); + val = 0; + if (!fwrite(&val, 1, 1, fp)) { + ret = -EIO; + XEN_PT_LOG("%s\n", "Failed to disable pci-sysfs rom file"); + } + fclose(fp); + return ret; +} + +/* Allocated 128K for the vga bios */ +#define VGA_BIOS_DEFAULT_SIZE (0x20000) + +int xen_pt_setup_vga(XenHostPCIDevice *dev) +{ + unsigned char *bios = NULL; + int bios_size = 0; + char *c = NULL; + char checksum = 0; + int rc = 0; + + if (!is_vga_passthrough(dev)) { + return rc; + } + + bios = g_malloc0(VGA_BIOS_DEFAULT_SIZE); + + bios_size = get_vgabios(bios, dev); + if (bios_size) { + XEN_PT_ERR(NULL, "VGA: Error %d getting VBIOS!\n", bios_size); + if (bios_size < 0) { + XEN_PT_ERR(NULL, "VGA: Error (%s).\n", strerror(bios_size)); + } + rc = -1; + goto out; + } + + /* Adjust the bios checksum */ + for (c = (char *)bios; c < ((char *)bios + bios_size); c++) { + checksum += *c; + } + if (checksum) { + bios[bios_size - 1] -= checksum; + XEN_PT_LOG(NULL, "vga bios checksum is adjusted!\n"); + } + + /* Currently we fixed this address as a primary. */ + cpu_physical_memory_rw(0xc0000, bios, bios_size, 1); +out: + g_free(bios); + return rc; +} diff --git a/qemu-options.hx b/qemu-options.hx index ff76ad4..1c77baa 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -1066,6 +1066,15 @@ STEXI Rotate graphical output some deg left (only PXA LCD). ETEXI +DEF("gfx_passthru", 0, QEMU_OPTION_gfx_passthru, + "-gfx_passthru enable Intel IGD passthrough by XEN\n", + QEMU_ARCH_ALL) +STEXI +@item -gfx_passthru +@findex -gfx_passthru +Enable Intel IGD passthrough by XEN +ETEXI + DEF("vga", HAS_ARG, QEMU_OPTION_vga, "-vga [std|cirrus|vmware|qxl|xenfb|tcx|cg3|none]\n" " select video card type\n", QEMU_ARCH_ALL) diff --git a/vl.c b/vl.c index a1686ef..c5b572d 100644 --- a/vl.c +++ b/vl.c @@ -1418,6 +1418,13 @@ static void configure_msg(QemuOpts *opts) enable_timestamp_msg = qemu_opt_get_bool(opts, "timestamp", true); } +/* We still need this for compatibility with XEN. */ +int xen_has_gfx_passthru; +static void xen_gfx_passthru(const char *optarg) +{ + xen_has_gfx_passthru = 1; +} + /***********************************************************/ /* USB devices */ @@ -3945,6 +3952,9 @@ int main(int argc, char **argv, char **envp) exit(1); } break; + case QEMU_OPTION_gfx_passthru: + xen_gfx_passthru(optarg); + break; default: os_parse_cmd_args(popt->index, optarg); } -- 1.9.1
next prev parent reply other threads:[~2014-06-25 2:19 UTC|newest] Thread overview: 338+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-06-25 2:17 [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen [this message] 2014-06-25 2:17 ` [v5][PATCH 1/5] xen, gfx passthrough: basic graphics " Tiejun Chen 2014-06-25 6:21 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 6:21 ` Paolo Bonzini 2014-06-25 7:48 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 7:48 ` Chen, Tiejun 2014-06-25 6:35 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 6:35 ` Michael S. Tsirkin 2014-06-25 9:06 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:06 ` Chen, Tiejun 2014-06-25 9:16 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:16 ` Michael S. Tsirkin 2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 2/5] xen, gfx passthrough: create pseudo intel isa bridge Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 6:22 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 6:22 ` Paolo Bonzini 2014-06-25 7:51 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 7:51 ` Chen, Tiejun 2014-06-25 6:45 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 6:45 ` Michael S. Tsirkin 2014-06-25 8:10 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 8:10 ` Chen, Tiejun 2014-06-25 8:28 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 8:28 ` Michael S. Tsirkin 2014-06-25 8:39 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 8:39 ` Chen, Tiejun 2014-06-25 8:43 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 8:43 ` Michael S. Tsirkin 2014-06-25 8:48 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 8:48 ` Chen, Tiejun 2014-06-25 9:04 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:04 ` Michael S. Tsirkin 2014-06-25 9:14 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:14 ` Chen, Tiejun 2014-06-25 9:21 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:21 ` Michael S. Tsirkin 2014-06-25 9:28 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:28 ` Chen, Tiejun 2014-06-25 9:44 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:44 ` Michael S. Tsirkin 2014-06-25 9:58 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:58 ` Chen, Tiejun 2014-06-27 7:22 ` [Qemu-devel] " Chen, Tiejun 2014-06-27 7:22 ` Chen, Tiejun 2014-06-30 19:34 ` [Qemu-devel] " Stefano Stabellini 2014-06-30 19:34 ` Stefano Stabellini 2014-07-01 2:21 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 2:21 ` Chen, Tiejun 2014-07-01 5:47 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 5:47 ` Michael S. Tsirkin 2014-07-01 9:50 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 9:50 ` Chen, Tiejun 2014-07-01 12:34 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 12:34 ` Michael S. Tsirkin 2014-07-01 16:51 ` [Qemu-devel] " Stefano Stabellini 2014-07-01 16:51 ` Stefano Stabellini 2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 3/5] xen, gfx passthrough: support Intel IGD passthrough with VT-D Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 6:25 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 6:25 ` Paolo Bonzini 2014-06-25 7:54 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 7:54 ` Chen, Tiejun 2014-06-25 7:04 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 7:04 ` Michael S. Tsirkin 2014-06-27 9:16 ` [Qemu-devel] " Chen, Tiejun 2014-06-27 9:16 ` Chen, Tiejun 2014-06-25 14:05 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 14:05 ` Michael S. Tsirkin 2014-06-26 5:34 ` [Qemu-devel] " Chen, Tiejun 2014-06-26 5:34 ` Chen, Tiejun 2014-06-26 6:04 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-26 6:04 ` Michael S. Tsirkin 2014-06-26 8:26 ` [Qemu-devel] " Chen, Tiejun 2014-06-26 8:26 ` Chen, Tiejun 2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 4/5] xen, gfx passthrough: create host bridge to passthrough Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 6:24 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 6:24 ` Paolo Bonzini 2014-06-27 8:34 ` [Qemu-devel] " Chen, Tiejun 2014-06-27 8:34 ` Chen, Tiejun 2014-06-27 11:26 ` [Qemu-devel] " Paolo Bonzini 2014-06-27 11:26 ` Paolo Bonzini 2014-06-29 7:56 ` [Qemu-devel] " Chen, Tiejun 2014-06-29 7:56 ` Chen, Tiejun 2014-06-29 12:14 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-29 12:14 ` Michael S. Tsirkin 2014-06-30 2:52 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 2:52 ` Chen, Tiejun 2014-06-30 19:42 ` [Qemu-devel] " Stefano Stabellini 2014-06-30 19:42 ` Stefano Stabellini 2014-07-01 2:19 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 2:19 ` Chen, Tiejun 2014-07-01 16:49 ` [Qemu-devel] " Stefano Stabellini 2014-07-01 16:49 ` Stefano Stabellini 2014-07-01 18:34 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 18:34 ` Michael S. Tsirkin 2014-07-01 18:45 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 18:45 ` Michael S. Tsirkin 2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 5/5] xen, gfx passthrough: add opregion mapping Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 7:13 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 7:13 ` Michael S. Tsirkin 2014-06-27 9:22 ` [Qemu-devel] " Chen, Tiejun 2014-06-27 9:22 ` Chen, Tiejun 2014-06-29 11:43 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-29 11:43 ` Michael S. Tsirkin 2014-06-30 0:57 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 0:57 ` Chen, Tiejun 2014-06-25 6:19 ` [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support Paolo Bonzini 2014-06-25 6:19 ` Paolo Bonzini 2014-06-25 7:15 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 7:15 ` Michael S. Tsirkin 2014-06-25 7:56 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 7:56 ` Paolo Bonzini 2014-06-25 7:35 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 7:35 ` Chen, Tiejun 2014-06-25 7:40 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 7:40 ` Michael S. Tsirkin 2014-06-25 7:44 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 7:44 ` Paolo Bonzini 2014-06-25 8:31 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 8:31 ` Michael S. Tsirkin 2014-06-25 8:39 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 8:39 ` Paolo Bonzini 2014-06-25 8:48 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 8:48 ` Michael S. Tsirkin 2014-06-25 8:55 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 8:55 ` Chen, Tiejun 2014-06-25 9:09 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:09 ` Michael S. Tsirkin 2014-06-25 9:21 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:21 ` Chen, Tiejun 2014-06-25 9:31 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 9:31 ` Paolo Bonzini 2014-06-25 9:50 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:50 ` Chen, Tiejun 2014-06-25 9:54 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 9:54 ` Paolo Bonzini 2014-06-25 10:00 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:00 ` Michael S. Tsirkin 2014-06-26 9:18 ` [Qemu-devel] " Chen, Tiejun 2014-06-26 9:18 ` Chen, Tiejun 2014-06-26 10:03 ` [Qemu-devel] " Paolo Bonzini 2014-06-26 10:03 ` Paolo Bonzini 2014-06-26 11:26 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-26 11:26 ` Michael S. Tsirkin 2014-06-26 11:30 ` [Qemu-devel] " Paolo Bonzini 2014-06-26 11:30 ` Paolo Bonzini 2014-06-26 11:36 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-26 11:36 ` Michael S. Tsirkin 2014-06-26 13:30 ` [Qemu-devel] " Paolo Bonzini 2014-06-26 13:30 ` Paolo Bonzini 2014-06-26 15:40 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-26 15:40 ` Michael S. Tsirkin 2014-06-30 2:51 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 2:51 ` Chen, Tiejun 2014-06-30 6:48 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 6:48 ` Michael S. Tsirkin 2014-06-30 7:24 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 7:24 ` Chen, Tiejun 2014-06-30 9:05 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 9:05 ` Michael S. Tsirkin 2014-06-30 9:38 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 9:38 ` Chen, Tiejun 2014-06-30 9:55 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 9:55 ` Michael S. Tsirkin 2014-06-30 10:20 ` [Qemu-devel] [Xen-devel] " Chen, Tiejun 2014-06-30 10:20 ` Chen, Tiejun 2014-06-30 11:18 ` [Qemu-devel] " Paolo Bonzini 2014-06-30 11:18 ` Paolo Bonzini 2014-06-30 11:31 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 11:31 ` Michael S. Tsirkin 2014-06-30 11:28 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 11:28 ` Michael S. Tsirkin 2014-07-01 2:40 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 2:40 ` Chen, Tiejun 2014-07-01 9:12 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 9:12 ` Michael S. Tsirkin 2014-07-01 9:46 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 9:46 ` Chen, Tiejun 2014-07-01 12:33 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 12:33 ` Michael S. Tsirkin 2014-07-02 0:59 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 0:59 ` Chen, Tiejun 2014-07-02 6:22 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 6:22 ` Michael S. Tsirkin 2014-07-02 8:45 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 8:45 ` Chen, Tiejun 2014-06-30 19:22 ` [Qemu-devel] " Stefano Stabellini 2014-06-30 19:22 ` Stefano Stabellini 2014-06-30 19:31 ` [Qemu-devel] [Xen-devel] " Ross Philipson 2014-06-30 19:31 ` Ross Philipson 2014-07-01 2:24 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 2:24 ` Chen, Tiejun 2014-07-01 5:39 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 5:39 ` Michael S. Tsirkin 2014-07-01 16:47 ` [Qemu-devel] " Stefano Stabellini 2014-07-01 16:47 ` Stefano Stabellini 2014-07-01 17:02 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 17:02 ` Michael S. Tsirkin 2014-07-01 17:39 ` [Qemu-devel] " Ross Philipson 2014-07-01 17:39 ` Ross Philipson 2014-07-01 18:06 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 18:06 ` Michael S. Tsirkin 2014-07-01 19:29 ` [Qemu-devel] " Ross Philipson 2014-07-01 19:29 ` Ross Philipson 2014-07-02 6:11 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 6:11 ` Michael S. Tsirkin 2014-07-02 7:56 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 7:56 ` Chen, Tiejun 2014-07-02 11:33 ` [Qemu-devel] " Paolo Bonzini 2014-07-02 11:33 ` Paolo Bonzini 2014-07-02 14:00 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-02 14:00 ` Konrad Rzeszutek Wilk 2014-07-02 14:07 ` [Qemu-devel] " Stefano Stabellini 2014-07-02 14:07 ` Stefano Stabellini 2014-07-03 3:00 ` [Qemu-devel] " Chen, Tiejun 2014-07-03 3:00 ` Chen, Tiejun 2014-07-03 18:25 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-03 18:25 ` Konrad Rzeszutek Wilk 2014-07-02 14:08 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 14:08 ` Michael S. Tsirkin 2014-07-02 16:05 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-02 16:05 ` Konrad Rzeszutek Wilk 2014-07-02 17:58 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 17:58 ` Michael S. Tsirkin 2014-07-02 14:50 ` [Qemu-devel] ResettRe: " Paolo Bonzini 2014-07-02 14:50 ` Paolo Bonzini 2014-07-02 15:12 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 15:12 ` Michael S. Tsirkin 2014-07-02 19:33 ` [Qemu-devel] " Alex Williamson 2014-07-02 19:33 ` Alex Williamson 2014-07-02 16:23 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-02 16:23 ` Konrad Rzeszutek Wilk 2014-07-02 16:27 ` [Qemu-devel] " Paolo Bonzini 2014-07-02 16:27 ` Paolo Bonzini 2014-07-02 16:53 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 16:53 ` Michael S. Tsirkin 2014-07-03 7:32 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-03 7:32 ` Michael S. Tsirkin 2014-07-03 18:26 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-03 18:26 ` Konrad Rzeszutek Wilk 2014-07-03 19:09 ` [Qemu-devel] [Intel-gfx] " Jesse Barnes 2014-07-03 19:09 ` Jesse Barnes 2014-07-03 20:27 ` [Qemu-devel] [Intel-gfx] " Michael S. Tsirkin 2014-07-03 20:27 ` Michael S. Tsirkin 2014-07-16 14:20 ` [Qemu-devel] [Intel-gfx] " Konrad Rzeszutek Wilk 2014-07-16 14:20 ` Konrad Rzeszutek Wilk 2014-07-17 9:42 ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun 2014-07-17 9:42 ` Chen, Tiejun 2014-07-17 17:37 ` [Qemu-devel] [Intel-gfx] " Kay, Allen M 2014-07-17 17:37 ` Kay, Allen M 2014-07-18 13:44 ` [Qemu-devel] [Intel-gfx] " Konrad Rzeszutek Wilk 2014-07-18 13:44 ` Konrad Rzeszutek Wilk 2014-07-19 0:27 ` [Qemu-devel] [Intel-gfx] " Kay, Allen M 2014-07-19 0:27 ` Kay, Allen M 2014-07-23 20:54 ` [Qemu-devel] [Intel-gfx] " Konrad Rzeszutek Wilk 2014-07-23 20:54 ` Konrad Rzeszutek Wilk 2014-07-24 1:44 ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun 2014-07-24 1:44 ` Chen, Tiejun 2014-07-25 17:01 ` [Qemu-devel] [Intel-gfx] " Konrad Rzeszutek Wilk 2014-07-25 17:01 ` Konrad Rzeszutek Wilk 2014-07-29 6:59 ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun 2014-07-29 6:59 ` Chen, Tiejun 2014-07-29 8:32 ` [Qemu-devel] [Intel-gfx] " Paolo Bonzini 2014-07-29 8:32 ` Paolo Bonzini 2014-07-29 9:14 ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun 2014-07-29 9:14 ` Chen, Tiejun 2014-07-04 6:28 ` [Qemu-devel] " Paolo Bonzini 2014-07-04 6:28 ` Paolo Bonzini 2014-07-06 6:08 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-06 6:08 ` Michael S. Tsirkin 2014-07-02 15:15 ` [Qemu-devel] " Ross Philipson 2014-07-02 15:15 ` Ross Philipson 2014-07-02 15:27 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 15:27 ` Michael S. Tsirkin 2014-07-02 16:29 ` [Qemu-devel] " Paolo Bonzini 2014-07-02 16:29 ` Paolo Bonzini 2014-07-02 16:45 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-02 16:45 ` Konrad Rzeszutek Wilk 2014-07-02 18:00 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 18:00 ` Michael S. Tsirkin 2014-07-03 5:57 ` [Qemu-devel] " Chen, Tiejun 2014-07-03 5:57 ` Chen, Tiejun 2014-07-03 6:40 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-03 6:40 ` Michael S. Tsirkin 2014-07-01 18:20 ` [Qemu-devel] " Stefano Stabellini 2014-07-01 18:20 ` Stefano Stabellini 2014-07-01 18:38 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 18:38 ` Michael S. Tsirkin 2014-07-02 1:37 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 1:37 ` Chen, Tiejun 2014-07-02 6:09 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 6:09 ` Michael S. Tsirkin 2014-07-02 7:51 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 7:51 ` Chen, Tiejun 2014-06-25 9:55 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:55 ` Michael S. Tsirkin 2014-06-25 9:59 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 9:59 ` Paolo Bonzini 2014-06-25 10:06 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 10:06 ` Chen, Tiejun 2014-06-25 10:21 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:21 ` Michael S. Tsirkin 2014-06-25 10:28 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 10:28 ` Chen, Tiejun 2014-06-25 10:32 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:32 ` Michael S. Tsirkin 2014-06-25 10:37 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 10:37 ` Chen, Tiejun 2014-06-25 10:55 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:55 ` Michael S. Tsirkin 2014-06-25 12:11 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 12:11 ` Paolo Bonzini 2014-06-25 13:47 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 13:47 ` Michael S. Tsirkin 2014-06-25 13:53 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 13:53 ` Paolo Bonzini 2014-06-25 14:10 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 14:10 ` Michael S. Tsirkin 2014-06-25 14:16 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 14:16 ` Paolo Bonzini 2014-06-25 14:26 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 14:26 ` Michael S. Tsirkin 2014-06-25 10:09 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:09 ` Michael S. Tsirkin 2014-06-25 10:14 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 10:14 ` Paolo Bonzini 2014-06-25 10:15 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 10:15 ` Chen, Tiejun 2014-06-25 10:28 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:28 ` Michael S. Tsirkin 2014-06-25 9:43 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:43 ` Michael S. Tsirkin 2014-07-08 10:45 ` [Qemu-devel] [Xen-devel] " Andrew Barnes 2014-07-08 10:45 ` Andrew Barnes
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1403662641-28526-2-git-send-email-tiejun.chen@intel.com \ --to=tiejun.chen@intel.com \ --cc=Kelly.Zytaruk@amd.com \ --cc=allen.m.kay@intel.com \ --cc=anthony.perard@citrix.com \ --cc=anthony@codemonkey.ws \ --cc=mst@redhat.com \ --cc=pbonzini@redhat.com \ --cc=peter.maydell@linaro.org \ --cc=qemu-devel@nongnu.org \ --cc=stefano.stabellini@eu.citrix.com \ --cc=xen-devel@lists.xensource.com \ --cc=yang.z.zhang@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.