From: "Michael S. Tsirkin" <mst@redhat.com> To: "Chen, Tiejun" <tiejun.chen@intel.com> Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, Kelly.Zytaruk@amd.com, qemu-devel@nongnu.org, anthony.perard@citrix.com, anthony@codemonkey.ws, yang.z.zhang@intel.com, Paolo Bonzini <pbonzini@redhat.com> Subject: Re: [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support Date: Wed, 25 Jun 2014 13:28:17 +0300 [thread overview] Message-ID: <20140625102817.GK6357@redhat.com> (raw) In-Reply-To: <53AAA141.1060509@intel.com> On Wed, Jun 25, 2014 at 06:15:29PM +0800, Chen, Tiejun wrote: > On 2014/6/25 18:09, Michael S. Tsirkin wrote: > >On Wed, Jun 25, 2014 at 11:59:21AM +0200, Paolo Bonzini wrote: > >>Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto: > >>>>You're saying we will reserve a free BAR to address those information to > >>>>expose to guest, but which device does this free BAR belong to? The video > >>>>device? Or PCH/MCH? > >>> > >>>If you just want to pass a couple of IDs, then don't, it's a waste. > >>>But I still don't know what problem you are trying to solve, > >>>looking at guest driver did not help. > >> > >>It's not just a couple of IDs, it's also random fields of the MCH > >>configuration space. Grep drivers/gpu/drm/i915 for bridge_dev. > >> > >>Paolo > > > >I did, it seems to look for device at 0,0: > > > > static int i915_get_bridge_dev(struct drm_device *dev) > > { > > struct drm_i915_private *dev_priv = dev->dev_private; > > > > dev_priv->bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); > > if (!dev_priv->bridge_dev) { > > DRM_ERROR("bridge device not found\n"); > > return -1; > > } > > return 0; > > } > > > >are you sure this is the ISA bridge device? these patches put it at 1f. > > > > :) The IGD is too complex to understand. > > The i915 driver needs to access that host bridge at 00:00.0, and this is > addressed in patch #3. You mean patch #4. > Also the i915 needs that ISA bridge at 00:1f.0, this is just what we're > discussing now. > > Thanks > Tiejun Yea. That vile thing seems to mostly be safe to ignore. -- MST
WARNING: multiple messages have this Message-ID (diff)
From: "Michael S. Tsirkin" <mst@redhat.com> To: "Chen, Tiejun" <tiejun.chen@intel.com> Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, Kelly.Zytaruk@amd.com, qemu-devel@nongnu.org, anthony.perard@citrix.com, anthony@codemonkey.ws, yang.z.zhang@intel.com, Paolo Bonzini <pbonzini@redhat.com> Subject: Re: [v5][PATCH 0/5] xen: add Intel IGD passthrough support Date: Wed, 25 Jun 2014 13:28:17 +0300 [thread overview] Message-ID: <20140625102817.GK6357@redhat.com> (raw) In-Reply-To: <53AAA141.1060509@intel.com> On Wed, Jun 25, 2014 at 06:15:29PM +0800, Chen, Tiejun wrote: > On 2014/6/25 18:09, Michael S. Tsirkin wrote: > >On Wed, Jun 25, 2014 at 11:59:21AM +0200, Paolo Bonzini wrote: > >>Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto: > >>>>You're saying we will reserve a free BAR to address those information to > >>>>expose to guest, but which device does this free BAR belong to? The video > >>>>device? Or PCH/MCH? > >>> > >>>If you just want to pass a couple of IDs, then don't, it's a waste. > >>>But I still don't know what problem you are trying to solve, > >>>looking at guest driver did not help. > >> > >>It's not just a couple of IDs, it's also random fields of the MCH > >>configuration space. Grep drivers/gpu/drm/i915 for bridge_dev. > >> > >>Paolo > > > >I did, it seems to look for device at 0,0: > > > > static int i915_get_bridge_dev(struct drm_device *dev) > > { > > struct drm_i915_private *dev_priv = dev->dev_private; > > > > dev_priv->bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); > > if (!dev_priv->bridge_dev) { > > DRM_ERROR("bridge device not found\n"); > > return -1; > > } > > return 0; > > } > > > >are you sure this is the ISA bridge device? these patches put it at 1f. > > > > :) The IGD is too complex to understand. > > The i915 driver needs to access that host bridge at 00:00.0, and this is > addressed in patch #3. You mean patch #4. > Also the i915 needs that ISA bridge at 00:1f.0, this is just what we're > discussing now. > > Thanks > Tiejun Yea. That vile thing seems to mostly be safe to ignore. -- MST
next prev parent reply other threads:[~2014-06-25 10:28 UTC|newest] Thread overview: 338+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-06-25 2:17 [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 1/5] xen, gfx passthrough: basic graphics " Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 6:21 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 6:21 ` Paolo Bonzini 2014-06-25 7:48 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 7:48 ` Chen, Tiejun 2014-06-25 6:35 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 6:35 ` Michael S. Tsirkin 2014-06-25 9:06 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:06 ` Chen, Tiejun 2014-06-25 9:16 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:16 ` Michael S. Tsirkin 2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 2/5] xen, gfx passthrough: create pseudo intel isa bridge Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 6:22 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 6:22 ` Paolo Bonzini 2014-06-25 7:51 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 7:51 ` Chen, Tiejun 2014-06-25 6:45 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 6:45 ` Michael S. Tsirkin 2014-06-25 8:10 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 8:10 ` Chen, Tiejun 2014-06-25 8:28 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 8:28 ` Michael S. Tsirkin 2014-06-25 8:39 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 8:39 ` Chen, Tiejun 2014-06-25 8:43 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 8:43 ` Michael S. Tsirkin 2014-06-25 8:48 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 8:48 ` Chen, Tiejun 2014-06-25 9:04 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:04 ` Michael S. Tsirkin 2014-06-25 9:14 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:14 ` Chen, Tiejun 2014-06-25 9:21 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:21 ` Michael S. Tsirkin 2014-06-25 9:28 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:28 ` Chen, Tiejun 2014-06-25 9:44 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:44 ` Michael S. Tsirkin 2014-06-25 9:58 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:58 ` Chen, Tiejun 2014-06-27 7:22 ` [Qemu-devel] " Chen, Tiejun 2014-06-27 7:22 ` Chen, Tiejun 2014-06-30 19:34 ` [Qemu-devel] " Stefano Stabellini 2014-06-30 19:34 ` Stefano Stabellini 2014-07-01 2:21 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 2:21 ` Chen, Tiejun 2014-07-01 5:47 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 5:47 ` Michael S. Tsirkin 2014-07-01 9:50 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 9:50 ` Chen, Tiejun 2014-07-01 12:34 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 12:34 ` Michael S. Tsirkin 2014-07-01 16:51 ` [Qemu-devel] " Stefano Stabellini 2014-07-01 16:51 ` Stefano Stabellini 2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 3/5] xen, gfx passthrough: support Intel IGD passthrough with VT-D Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 6:25 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 6:25 ` Paolo Bonzini 2014-06-25 7:54 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 7:54 ` Chen, Tiejun 2014-06-25 7:04 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 7:04 ` Michael S. Tsirkin 2014-06-27 9:16 ` [Qemu-devel] " Chen, Tiejun 2014-06-27 9:16 ` Chen, Tiejun 2014-06-25 14:05 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 14:05 ` Michael S. Tsirkin 2014-06-26 5:34 ` [Qemu-devel] " Chen, Tiejun 2014-06-26 5:34 ` Chen, Tiejun 2014-06-26 6:04 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-26 6:04 ` Michael S. Tsirkin 2014-06-26 8:26 ` [Qemu-devel] " Chen, Tiejun 2014-06-26 8:26 ` Chen, Tiejun 2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 4/5] xen, gfx passthrough: create host bridge to passthrough Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 6:24 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 6:24 ` Paolo Bonzini 2014-06-27 8:34 ` [Qemu-devel] " Chen, Tiejun 2014-06-27 8:34 ` Chen, Tiejun 2014-06-27 11:26 ` [Qemu-devel] " Paolo Bonzini 2014-06-27 11:26 ` Paolo Bonzini 2014-06-29 7:56 ` [Qemu-devel] " Chen, Tiejun 2014-06-29 7:56 ` Chen, Tiejun 2014-06-29 12:14 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-29 12:14 ` Michael S. Tsirkin 2014-06-30 2:52 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 2:52 ` Chen, Tiejun 2014-06-30 19:42 ` [Qemu-devel] " Stefano Stabellini 2014-06-30 19:42 ` Stefano Stabellini 2014-07-01 2:19 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 2:19 ` Chen, Tiejun 2014-07-01 16:49 ` [Qemu-devel] " Stefano Stabellini 2014-07-01 16:49 ` Stefano Stabellini 2014-07-01 18:34 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 18:34 ` Michael S. Tsirkin 2014-07-01 18:45 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 18:45 ` Michael S. Tsirkin 2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 5/5] xen, gfx passthrough: add opregion mapping Tiejun Chen 2014-06-25 2:17 ` Tiejun Chen 2014-06-25 7:13 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 7:13 ` Michael S. Tsirkin 2014-06-27 9:22 ` [Qemu-devel] " Chen, Tiejun 2014-06-27 9:22 ` Chen, Tiejun 2014-06-29 11:43 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-29 11:43 ` Michael S. Tsirkin 2014-06-30 0:57 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 0:57 ` Chen, Tiejun 2014-06-25 6:19 ` [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support Paolo Bonzini 2014-06-25 6:19 ` Paolo Bonzini 2014-06-25 7:15 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 7:15 ` Michael S. Tsirkin 2014-06-25 7:56 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 7:56 ` Paolo Bonzini 2014-06-25 7:35 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 7:35 ` Chen, Tiejun 2014-06-25 7:40 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 7:40 ` Michael S. Tsirkin 2014-06-25 7:44 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 7:44 ` Paolo Bonzini 2014-06-25 8:31 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 8:31 ` Michael S. Tsirkin 2014-06-25 8:39 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 8:39 ` Paolo Bonzini 2014-06-25 8:48 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 8:48 ` Michael S. Tsirkin 2014-06-25 8:55 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 8:55 ` Chen, Tiejun 2014-06-25 9:09 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:09 ` Michael S. Tsirkin 2014-06-25 9:21 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:21 ` Chen, Tiejun 2014-06-25 9:31 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 9:31 ` Paolo Bonzini 2014-06-25 9:50 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 9:50 ` Chen, Tiejun 2014-06-25 9:54 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 9:54 ` Paolo Bonzini 2014-06-25 10:00 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:00 ` Michael S. Tsirkin 2014-06-26 9:18 ` [Qemu-devel] " Chen, Tiejun 2014-06-26 9:18 ` Chen, Tiejun 2014-06-26 10:03 ` [Qemu-devel] " Paolo Bonzini 2014-06-26 10:03 ` Paolo Bonzini 2014-06-26 11:26 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-26 11:26 ` Michael S. Tsirkin 2014-06-26 11:30 ` [Qemu-devel] " Paolo Bonzini 2014-06-26 11:30 ` Paolo Bonzini 2014-06-26 11:36 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-26 11:36 ` Michael S. Tsirkin 2014-06-26 13:30 ` [Qemu-devel] " Paolo Bonzini 2014-06-26 13:30 ` Paolo Bonzini 2014-06-26 15:40 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-26 15:40 ` Michael S. Tsirkin 2014-06-30 2:51 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 2:51 ` Chen, Tiejun 2014-06-30 6:48 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 6:48 ` Michael S. Tsirkin 2014-06-30 7:24 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 7:24 ` Chen, Tiejun 2014-06-30 9:05 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 9:05 ` Michael S. Tsirkin 2014-06-30 9:38 ` [Qemu-devel] " Chen, Tiejun 2014-06-30 9:38 ` Chen, Tiejun 2014-06-30 9:55 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 9:55 ` Michael S. Tsirkin 2014-06-30 10:20 ` [Qemu-devel] [Xen-devel] " Chen, Tiejun 2014-06-30 10:20 ` Chen, Tiejun 2014-06-30 11:18 ` [Qemu-devel] " Paolo Bonzini 2014-06-30 11:18 ` Paolo Bonzini 2014-06-30 11:31 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 11:31 ` Michael S. Tsirkin 2014-06-30 11:28 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-30 11:28 ` Michael S. Tsirkin 2014-07-01 2:40 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 2:40 ` Chen, Tiejun 2014-07-01 9:12 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 9:12 ` Michael S. Tsirkin 2014-07-01 9:46 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 9:46 ` Chen, Tiejun 2014-07-01 12:33 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 12:33 ` Michael S. Tsirkin 2014-07-02 0:59 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 0:59 ` Chen, Tiejun 2014-07-02 6:22 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 6:22 ` Michael S. Tsirkin 2014-07-02 8:45 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 8:45 ` Chen, Tiejun 2014-06-30 19:22 ` [Qemu-devel] " Stefano Stabellini 2014-06-30 19:22 ` Stefano Stabellini 2014-06-30 19:31 ` [Qemu-devel] [Xen-devel] " Ross Philipson 2014-06-30 19:31 ` Ross Philipson 2014-07-01 2:24 ` [Qemu-devel] " Chen, Tiejun 2014-07-01 2:24 ` Chen, Tiejun 2014-07-01 5:39 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 5:39 ` Michael S. Tsirkin 2014-07-01 16:47 ` [Qemu-devel] " Stefano Stabellini 2014-07-01 16:47 ` Stefano Stabellini 2014-07-01 17:02 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 17:02 ` Michael S. Tsirkin 2014-07-01 17:39 ` [Qemu-devel] " Ross Philipson 2014-07-01 17:39 ` Ross Philipson 2014-07-01 18:06 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 18:06 ` Michael S. Tsirkin 2014-07-01 19:29 ` [Qemu-devel] " Ross Philipson 2014-07-01 19:29 ` Ross Philipson 2014-07-02 6:11 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 6:11 ` Michael S. Tsirkin 2014-07-02 7:56 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 7:56 ` Chen, Tiejun 2014-07-02 11:33 ` [Qemu-devel] " Paolo Bonzini 2014-07-02 11:33 ` Paolo Bonzini 2014-07-02 14:00 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-02 14:00 ` Konrad Rzeszutek Wilk 2014-07-02 14:07 ` [Qemu-devel] " Stefano Stabellini 2014-07-02 14:07 ` Stefano Stabellini 2014-07-03 3:00 ` [Qemu-devel] " Chen, Tiejun 2014-07-03 3:00 ` Chen, Tiejun 2014-07-03 18:25 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-03 18:25 ` Konrad Rzeszutek Wilk 2014-07-02 14:08 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 14:08 ` Michael S. Tsirkin 2014-07-02 16:05 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-02 16:05 ` Konrad Rzeszutek Wilk 2014-07-02 17:58 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 17:58 ` Michael S. Tsirkin 2014-07-02 14:50 ` [Qemu-devel] ResettRe: " Paolo Bonzini 2014-07-02 14:50 ` Paolo Bonzini 2014-07-02 15:12 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 15:12 ` Michael S. Tsirkin 2014-07-02 19:33 ` [Qemu-devel] " Alex Williamson 2014-07-02 19:33 ` Alex Williamson 2014-07-02 16:23 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-02 16:23 ` Konrad Rzeszutek Wilk 2014-07-02 16:27 ` [Qemu-devel] " Paolo Bonzini 2014-07-02 16:27 ` Paolo Bonzini 2014-07-02 16:53 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 16:53 ` Michael S. Tsirkin 2014-07-03 7:32 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-03 7:32 ` Michael S. Tsirkin 2014-07-03 18:26 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-03 18:26 ` Konrad Rzeszutek Wilk 2014-07-03 19:09 ` [Qemu-devel] [Intel-gfx] " Jesse Barnes 2014-07-03 19:09 ` Jesse Barnes 2014-07-03 20:27 ` [Qemu-devel] [Intel-gfx] " Michael S. Tsirkin 2014-07-03 20:27 ` Michael S. Tsirkin 2014-07-16 14:20 ` [Qemu-devel] [Intel-gfx] " Konrad Rzeszutek Wilk 2014-07-16 14:20 ` Konrad Rzeszutek Wilk 2014-07-17 9:42 ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun 2014-07-17 9:42 ` Chen, Tiejun 2014-07-17 17:37 ` [Qemu-devel] [Intel-gfx] " Kay, Allen M 2014-07-17 17:37 ` Kay, Allen M 2014-07-18 13:44 ` [Qemu-devel] [Intel-gfx] " Konrad Rzeszutek Wilk 2014-07-18 13:44 ` Konrad Rzeszutek Wilk 2014-07-19 0:27 ` [Qemu-devel] [Intel-gfx] " Kay, Allen M 2014-07-19 0:27 ` Kay, Allen M 2014-07-23 20:54 ` [Qemu-devel] [Intel-gfx] " Konrad Rzeszutek Wilk 2014-07-23 20:54 ` Konrad Rzeszutek Wilk 2014-07-24 1:44 ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun 2014-07-24 1:44 ` Chen, Tiejun 2014-07-25 17:01 ` [Qemu-devel] [Intel-gfx] " Konrad Rzeszutek Wilk 2014-07-25 17:01 ` Konrad Rzeszutek Wilk 2014-07-29 6:59 ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun 2014-07-29 6:59 ` Chen, Tiejun 2014-07-29 8:32 ` [Qemu-devel] [Intel-gfx] " Paolo Bonzini 2014-07-29 8:32 ` Paolo Bonzini 2014-07-29 9:14 ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun 2014-07-29 9:14 ` Chen, Tiejun 2014-07-04 6:28 ` [Qemu-devel] " Paolo Bonzini 2014-07-04 6:28 ` Paolo Bonzini 2014-07-06 6:08 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-06 6:08 ` Michael S. Tsirkin 2014-07-02 15:15 ` [Qemu-devel] " Ross Philipson 2014-07-02 15:15 ` Ross Philipson 2014-07-02 15:27 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 15:27 ` Michael S. Tsirkin 2014-07-02 16:29 ` [Qemu-devel] " Paolo Bonzini 2014-07-02 16:29 ` Paolo Bonzini 2014-07-02 16:45 ` [Qemu-devel] " Konrad Rzeszutek Wilk 2014-07-02 16:45 ` Konrad Rzeszutek Wilk 2014-07-02 18:00 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 18:00 ` Michael S. Tsirkin 2014-07-03 5:57 ` [Qemu-devel] " Chen, Tiejun 2014-07-03 5:57 ` Chen, Tiejun 2014-07-03 6:40 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-03 6:40 ` Michael S. Tsirkin 2014-07-01 18:20 ` [Qemu-devel] " Stefano Stabellini 2014-07-01 18:20 ` Stefano Stabellini 2014-07-01 18:38 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-01 18:38 ` Michael S. Tsirkin 2014-07-02 1:37 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 1:37 ` Chen, Tiejun 2014-07-02 6:09 ` [Qemu-devel] " Michael S. Tsirkin 2014-07-02 6:09 ` Michael S. Tsirkin 2014-07-02 7:51 ` [Qemu-devel] " Chen, Tiejun 2014-07-02 7:51 ` Chen, Tiejun 2014-06-25 9:55 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:55 ` Michael S. Tsirkin 2014-06-25 9:59 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 9:59 ` Paolo Bonzini 2014-06-25 10:06 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 10:06 ` Chen, Tiejun 2014-06-25 10:21 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:21 ` Michael S. Tsirkin 2014-06-25 10:28 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 10:28 ` Chen, Tiejun 2014-06-25 10:32 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:32 ` Michael S. Tsirkin 2014-06-25 10:37 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 10:37 ` Chen, Tiejun 2014-06-25 10:55 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:55 ` Michael S. Tsirkin 2014-06-25 12:11 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 12:11 ` Paolo Bonzini 2014-06-25 13:47 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 13:47 ` Michael S. Tsirkin 2014-06-25 13:53 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 13:53 ` Paolo Bonzini 2014-06-25 14:10 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 14:10 ` Michael S. Tsirkin 2014-06-25 14:16 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 14:16 ` Paolo Bonzini 2014-06-25 14:26 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 14:26 ` Michael S. Tsirkin 2014-06-25 10:09 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 10:09 ` Michael S. Tsirkin 2014-06-25 10:14 ` [Qemu-devel] " Paolo Bonzini 2014-06-25 10:14 ` Paolo Bonzini 2014-06-25 10:15 ` [Qemu-devel] " Chen, Tiejun 2014-06-25 10:15 ` Chen, Tiejun 2014-06-25 10:28 ` Michael S. Tsirkin [this message] 2014-06-25 10:28 ` Michael S. Tsirkin 2014-06-25 9:43 ` [Qemu-devel] " Michael S. Tsirkin 2014-06-25 9:43 ` Michael S. Tsirkin 2014-07-08 10:45 ` [Qemu-devel] [Xen-devel] " Andrew Barnes 2014-07-08 10:45 ` Andrew Barnes
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