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From: "Yan, Zheng" <zheng.z.yan@intel.com>
To: linux-kernel@vger.kernel.org
Cc: a.p.zijlstra@chello.nl, mingo@kernel.org, acme@infradead.org,
	eranian@google.com, andi@firstfloor.org, "Yan,
	Zheng" <zheng.z.yan@intel.com>
Subject: [PATCH V4 10/16] perf, core: simplify need branch stack check
Date: Mon, 30 Jun 2014 16:50:47 +0800	[thread overview]
Message-ID: <1404118253-19532-11-git-send-email-zheng.z.yan@intel.com> (raw)
In-Reply-To: <1404118253-19532-1-git-send-email-zheng.z.yan@intel.com>

event->attr.branch_sample_type is non-zero no matter branch stack
is enabled explicitly or is enabled implicitly. we can use it to
replace intel_pmu_needs_lbr_smpl(). This avoids duplicating code
that implicitly enables the LBR.

Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
---
 arch/x86/kernel/cpu/perf_event_intel.c | 20 +++-----------------
 include/linux/perf_event.h             |  5 +++++
 kernel/events/core.c                   |  3 +++
 3 files changed, 11 insertions(+), 17 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index af91bfd..a14489b 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1029,20 +1029,6 @@ static __initconst const u64 slm_hw_cache_event_ids
  },
 };
 
-static inline bool intel_pmu_needs_lbr_smpl(struct perf_event *event)
-{
-	/* user explicitly requested branch sampling */
-	if (has_branch_stack(event))
-		return true;
-
-	/* implicit branch sampling to correct PEBS skid */
-	if (x86_pmu.intel_cap.pebs_trap && event->attr.precise_ip > 1 &&
-	    x86_pmu.intel_cap.pebs_format < 2)
-		return true;
-
-	return false;
-}
-
 static void intel_pmu_disable_all(void)
 {
 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
@@ -1207,7 +1193,7 @@ static void intel_pmu_disable_event(struct perf_event *event)
 	 * must disable before any actual event
 	 * because any event may be combined with LBR
 	 */
-	if (intel_pmu_needs_lbr_smpl(event))
+	if (needs_branch_stack(event))
 		intel_pmu_lbr_disable(event);
 
 	if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) {
@@ -1268,7 +1254,7 @@ static void intel_pmu_enable_event(struct perf_event *event)
 	 * must enabled before any actual event
 	 * because any event may be combined with LBR
 	 */
-	if (intel_pmu_needs_lbr_smpl(event))
+	if (needs_branch_stack(event))
 		intel_pmu_lbr_enable(event);
 
 	if (event->attr.exclude_host)
@@ -1738,7 +1724,7 @@ static int intel_pmu_hw_config(struct perf_event *event)
 	if (event->attr.precise_ip && x86_pmu.pebs_aliases)
 		x86_pmu.pebs_aliases(event);
 
-	if (intel_pmu_needs_lbr_smpl(event)) {
+	if (needs_branch_stack(event)) {
 		ret = intel_pmu_setup_lbr_filter(event);
 		if (ret)
 			return ret;
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 7aa4794..2bf2cb2a 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -777,6 +777,11 @@ static inline bool has_branch_stack(struct perf_event *event)
 	return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK;
 }
 
+static inline bool needs_branch_stack(struct perf_event *event)
+{
+	return event->attr.branch_sample_type != 0;
+}
+
 extern int perf_output_begin(struct perf_output_handle *handle,
 			     struct perf_event *event, unsigned int size);
 extern void perf_output_end(struct perf_output_handle *handle);
diff --git a/kernel/events/core.c b/kernel/events/core.c
index a856813..73a6e77 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -6850,6 +6850,9 @@ perf_event_alloc(struct perf_event_attr *attr, int cpu,
 	if (attr->inherit && (attr->read_format & PERF_FORMAT_GROUP))
 		goto err_ns;
 
+	if (!has_branch_stack(event))
+		event->attr.branch_sample_type = 0;
+
 	pmu = perf_init_event(event);
 	if (!pmu)
 		goto err_ns;
-- 
1.9.0


  parent reply	other threads:[~2014-06-30  8:53 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-30  8:50 [PATCH V4 00/16] perf, x86: Haswell LBR call stack support Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 01/16] perf, x86: Reduce lbr_sel_map size Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 02/16] perf, core: introduce pmu context switch callback Yan, Zheng
2014-07-02  8:48   ` Peter Zijlstra
2014-07-02 10:12   ` Peter Zijlstra
2014-07-03  5:47     ` Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 03/16] perf, x86: use context switch callback to flush LBR stack Yan, Zheng
2014-07-02  9:06   ` Peter Zijlstra
2014-07-03  5:44     ` Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 04/16] perf, x86: Basic Haswell LBR call stack support Yan, Zheng
2014-07-02 10:14   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 05/16] perf, core: pmu specific data for perf task context Yan, Zheng
2014-07-02 10:18   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 06/16] perf, core: always switch pmu specific data during context switch Yan, Zheng
2014-07-02 10:19   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 07/16] perf, x86: track number of events that use LBR callstack Yan, Zheng
2014-07-02 10:21   ` Peter Zijlstra
2014-07-03  5:59     ` Yan, Zheng
2014-07-02 10:25   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 08/16] perf, x86: allocate space for storing LBR stack Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 09/16] perf, x86: Save/resotre LBR stack during context switch Yan, Zheng
2014-07-02 10:49   ` Peter Zijlstra
2014-06-30  8:50 ` Yan, Zheng [this message]
2014-07-02 10:57   ` [PATCH V4 10/16] perf, core: simplify need branch stack check Peter Zijlstra
2014-07-02 11:08     ` Stephane Eranian
2014-07-02 12:27       ` Peter Zijlstra
2014-07-02 13:00         ` Stephane Eranian
2014-07-02 13:28           ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 11/16] perf, core: Pass perf_sample_data to perf_callchain() Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 12/16] perf, x86: use LBR call stack to get user callchain Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 13/16] perf, x86: re-organize code that implicitly enables LBR/PEBS Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 14/16] perf, x86: enable LBR callstack when recording callchain Yan, Zheng
2014-06-30 14:45   ` Andi Kleen
2014-06-30  8:50 ` [PATCH V4 15/16] perf, x86: disable FREEZE_LBRS_ON_PMI when LBR operates in callstack mode Yan, Zheng
2014-07-02 11:13   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 16/16] perf, x86: Discard zero length call entries in LBR call stack Yan, Zheng
  -- strict thread matches above, loose matches on Subject: below --
2014-03-17  5:57 [PATCH v4 00/16] perf, x86: Haswell LBR call stack support Yan, Zheng
2014-03-17  5:57 ` [PATCH v4 10/16] perf, core: simplify need branch stack check Yan, Zheng

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