All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Yan, Zheng" <zheng.z.yan@intel.com>
To: linux-kernel@vger.kernel.org
Cc: a.p.zijlstra@chello.nl, mingo@kernel.org, acme@infradead.org,
	eranian@google.com, andi@firstfloor.org, "Yan,
	Zheng" <zheng.z.yan@intel.com>
Subject: [PATCH V4 12/16] perf, x86: use LBR call stack to get user callchain
Date: Mon, 30 Jun 2014 16:50:49 +0800	[thread overview]
Message-ID: <1404118253-19532-13-git-send-email-zheng.z.yan@intel.com> (raw)
In-Reply-To: <1404118253-19532-1-git-send-email-zheng.z.yan@intel.com>

Haswell has a new feature that utilizes the existing Last Branch Record
facility to record call chains. When the feature is enabled, function
call will be collected as normal, but as return instructions are executed
the last captured branch record is popped from the on-chip LBR registers.
The LBR call stack facility can help perf to get call chains of progam
without frame pointer.

This patch makes x86's perf_callchain_user() failback to use LBR call
stack data when there is no frame pointer in the user program. The 'from'
address of branch entry is used as 'return' address of function call.

Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
---
 arch/x86/kernel/cpu/perf_event.c           | 33 ++++++++++++++++++++++++++----
 arch/x86/kernel/cpu/perf_event_intel.c     |  2 +-
 arch/x86/kernel/cpu/perf_event_intel_lbr.c |  2 ++
 include/linux/perf_event.h                 |  1 +
 4 files changed, 33 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 3ed9c6a..41daa7b 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1999,12 +1999,28 @@ static unsigned long get_segment_base(unsigned int segment)
 	return get_desc_base(desc + idx);
 }
 
+static inline void
+perf_callchain_lbr_callstack(struct perf_callchain_entry *entry,
+			     struct perf_sample_data *data)
+{
+	struct perf_branch_stack *br_stack = data->br_stack;
+
+	if (br_stack && br_stack->user_callstack) {
+		int i = 0;
+		while (i < br_stack->nr && entry->nr < PERF_MAX_STACK_DEPTH) {
+			perf_callchain_store(entry, br_stack->entries[i].from);
+			i++;
+		}
+	}
+}
+
 #ifdef CONFIG_COMPAT
 
 #include <asm/compat.h>
 
 static inline int
-perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
+perf_callchain_user32(struct perf_callchain_entry *entry,
+		      struct pt_regs *regs, struct perf_sample_data *data)
 {
 	/* 32-bit process in 64-bit kernel. */
 	unsigned long ss_base, cs_base;
@@ -2033,11 +2049,16 @@ perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
 		perf_callchain_store(entry, cs_base + frame.return_address);
 		fp = compat_ptr(ss_base + frame.next_frame);
 	}
+
+	if (fp == compat_ptr(regs->bp))
+		perf_callchain_lbr_callstack(entry, data);
+
 	return 1;
 }
 #else
 static inline int
-perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
+perf_callchain_user32(struct perf_callchain_entry *entry,
+		      struct pt_regs *regs, struct perf_sample_data *data)
 {
     return 0;
 }
@@ -2067,12 +2088,12 @@ void perf_callchain_user(struct perf_callchain_entry *entry,
 	if (!current->mm)
 		return;
 
-	if (perf_callchain_user32(regs, entry))
+	if (perf_callchain_user32(entry, regs, data))
 		return;
 
 	while (entry->nr < PERF_MAX_STACK_DEPTH) {
 		unsigned long bytes;
-		frame.next_frame	     = NULL;
+		frame.next_frame = NULL;
 		frame.return_address = 0;
 
 		bytes = copy_from_user_nmi(&frame, fp, sizeof(frame));
@@ -2085,6 +2106,10 @@ void perf_callchain_user(struct perf_callchain_entry *entry,
 		perf_callchain_store(entry, frame.return_address);
 		fp = frame.next_frame;
 	}
+
+	/* try LBR callstack if there is no frame pointer */
+	if (fp == (void __user *)regs->bp)
+		perf_callchain_lbr_callstack(entry, data);
 }
 
 /*
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index a14489b..1082609 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1395,7 +1395,7 @@ again:
 
 		perf_sample_data_init(&data, 0, event->hw.last_period);
 
-		if (has_branch_stack(event))
+		if (needs_branch_stack(event))
 			data.br_stack = &cpuc->lbr_stack;
 
 		if (perf_event_overflow(event, &data, regs))
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index 639ab1d..f059b98 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -721,6 +721,8 @@ intel_pmu_lbr_filter(struct cpu_hw_events *cpuc)
 	int i, j, type;
 	bool compress = false;
 
+	cpuc->lbr_stack.user_callstack = branch_user_callstack(br_sel);
+
 	/* if sampling all branches, then nothing to filter */
 	if ((br_sel & X86_BR_ALL) == X86_BR_ALL)
 		return;
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index cc0b86e..b5515dc 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -74,6 +74,7 @@ struct perf_raw_record {
  * recent branch.
  */
 struct perf_branch_stack {
+	bool				user_callstack;
 	__u64				nr;
 	struct perf_branch_entry	entries[0];
 };
-- 
1.9.0


  parent reply	other threads:[~2014-06-30  8:51 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-30  8:50 [PATCH V4 00/16] perf, x86: Haswell LBR call stack support Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 01/16] perf, x86: Reduce lbr_sel_map size Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 02/16] perf, core: introduce pmu context switch callback Yan, Zheng
2014-07-02  8:48   ` Peter Zijlstra
2014-07-02 10:12   ` Peter Zijlstra
2014-07-03  5:47     ` Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 03/16] perf, x86: use context switch callback to flush LBR stack Yan, Zheng
2014-07-02  9:06   ` Peter Zijlstra
2014-07-03  5:44     ` Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 04/16] perf, x86: Basic Haswell LBR call stack support Yan, Zheng
2014-07-02 10:14   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 05/16] perf, core: pmu specific data for perf task context Yan, Zheng
2014-07-02 10:18   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 06/16] perf, core: always switch pmu specific data during context switch Yan, Zheng
2014-07-02 10:19   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 07/16] perf, x86: track number of events that use LBR callstack Yan, Zheng
2014-07-02 10:21   ` Peter Zijlstra
2014-07-03  5:59     ` Yan, Zheng
2014-07-02 10:25   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 08/16] perf, x86: allocate space for storing LBR stack Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 09/16] perf, x86: Save/resotre LBR stack during context switch Yan, Zheng
2014-07-02 10:49   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 10/16] perf, core: simplify need branch stack check Yan, Zheng
2014-07-02 10:57   ` Peter Zijlstra
2014-07-02 11:08     ` Stephane Eranian
2014-07-02 12:27       ` Peter Zijlstra
2014-07-02 13:00         ` Stephane Eranian
2014-07-02 13:28           ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 11/16] perf, core: Pass perf_sample_data to perf_callchain() Yan, Zheng
2014-06-30  8:50 ` Yan, Zheng [this message]
2014-06-30  8:50 ` [PATCH V4 13/16] perf, x86: re-organize code that implicitly enables LBR/PEBS Yan, Zheng
2014-06-30  8:50 ` [PATCH V4 14/16] perf, x86: enable LBR callstack when recording callchain Yan, Zheng
2014-06-30 14:45   ` Andi Kleen
2014-06-30  8:50 ` [PATCH V4 15/16] perf, x86: disable FREEZE_LBRS_ON_PMI when LBR operates in callstack mode Yan, Zheng
2014-07-02 11:13   ` Peter Zijlstra
2014-06-30  8:50 ` [PATCH V4 16/16] perf, x86: Discard zero length call entries in LBR call stack Yan, Zheng
  -- strict thread matches above, loose matches on Subject: below --
2014-03-17  5:57 [PATCH v4 00/16] perf, x86: Haswell LBR call stack support Yan, Zheng
2014-03-17  5:57 ` [PATCH v4 12/16] perf, x86: use LBR call stack to get user callchain Yan, Zheng

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1404118253-19532-13-git-send-email-zheng.z.yan@intel.com \
    --to=zheng.z.yan@intel.com \
    --cc=a.p.zijlstra@chello.nl \
    --cc=acme@infradead.org \
    --cc=andi@firstfloor.org \
    --cc=eranian@google.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.