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From: Liu Hua <sdu.liu@huawei.com>
To: <Marc.Zyngier@arm.com>, <will.deacon@arm.com>
Cc: <nicolas.pitre@linaro.org>, <linux@arm.linux.org.uk>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <peifeiyue@huawei.com>,
	<liusdu@126.com>, <wangnan0@huawei.com>, <ebiederm@xmission.com>,
	Liu Hua <sdu.liu@huawei.com>
Subject: [PATCH V2 0/1] irqchip: GIC: check and clear GIC interupt active state
Date: Mon, 4 Aug 2014 12:17:39 +0800	[thread overview]
Message-ID: <1407125860-37718-1-git-send-email-sdu.liu@huawei.com> (raw)

For this version of GIC codes, kernel assumes that all the interrupt
status of GIC is inactive. So the kernel does not check this when 
booting.

This is no problem on must sitations. But when kdump is deplayed.
And a panic occurs when an interrupt is being handled (may be PPI 
). We have no chance to write relative bit to GICC_EOIR. So this 
interrupt remains active. And GIC will not deliver this type 
interrupt to cpu interface. And the capture kernel may  fail to boot
becase of lacking of certain interrupt (such as timer interupt).

I have test this patch on arma9el(GIC v1), arma15el and arma15eb(GIC v2) 
platforms. And the tests passed.

changes from V1:

  - used for_each_set_bit instead of find_next_bit
  - removed the GIC version indentifying codes.
  - used one way to inactive GIC interupt states for all GIC version

Liu Hua (1):
  GIC: introduce method to deactive interupts

 drivers/irqchip/irq-gic.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

-- 
1.9.0


WARNING: multiple messages have this Message-ID (diff)
From: sdu.liu@huawei.com (Liu Hua)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 0/1] irqchip: GIC: check and clear GIC interupt active state
Date: Mon, 4 Aug 2014 12:17:39 +0800	[thread overview]
Message-ID: <1407125860-37718-1-git-send-email-sdu.liu@huawei.com> (raw)

For this version of GIC codes, kernel assumes that all the interrupt
status of GIC is inactive. So the kernel does not check this when 
booting.

This is no problem on must sitations. But when kdump is deplayed.
And a panic occurs when an interrupt is being handled (may be PPI 
). We have no chance to write relative bit to GICC_EOIR. So this 
interrupt remains active. And GIC will not deliver this type 
interrupt to cpu interface. And the capture kernel may  fail to boot
becase of lacking of certain interrupt (such as timer interupt).

I have test this patch on arma9el(GIC v1), arma15el and arma15eb(GIC v2) 
platforms. And the tests passed.

changes from V1:

  - used for_each_set_bit instead of find_next_bit
  - removed the GIC version indentifying codes.
  - used one way to inactive GIC interupt states for all GIC version

Liu Hua (1):
  GIC: introduce method to deactive interupts

 drivers/irqchip/irq-gic.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

-- 
1.9.0

             reply	other threads:[~2014-08-04  4:28 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-04  4:17 Liu Hua [this message]
2014-08-04  4:17 ` [PATCH V2 0/1] irqchip: GIC: check and clear GIC interupt active state Liu Hua
2014-08-04  4:17 ` [PATCH V2 1/1] GIC: introduce method to deactive interupts Liu Hua
2014-08-04  4:17   ` Liu Hua
2014-08-04  9:43   ` Marc Zyngier
2014-08-04  9:43     ` Marc Zyngier
2014-08-06  8:43     ` Liu hua
2014-08-06  8:43       ` Liu hua
2014-08-06  9:46       ` Marc Zyngier
2014-08-06  9:46         ` Marc Zyngier
2014-08-06 12:18         ` Liu hua
2014-08-06 12:18           ` Liu hua
2014-08-06 16:01           ` Marc Zyngier
2014-08-06 16:01             ` Marc Zyngier

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