All of lore.kernel.org
 help / color / mirror / Atom feed
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
To: David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	linux-mtd@lists.infradead.org,
	Huang Shijie <b32955@freescale.com>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Mike Voytovich <mvoytovich@paypal.com>,
	Roy Lee <roylee@paypal.com>,
	Boris BREZILLON <boris.brezillon@free-electrons.com>
Subject: [PATCH] mtd: nand: gpmi: add proper raw access support
Date: Wed, 10 Sep 2014 10:55:39 +0200	[thread overview]
Message-ID: <1410339339-25561-1-git-send-email-boris.brezillon@free-electrons.com> (raw)

Several MTD users (either in user or kernel space) expect a valid raw
access support to NAND chip devices.
This is particularly true for testing tools which are often touching the
data stored in a NAND chip in raw mode to artificially generate errors.

The GPMI drivers do not implemenent raw access functions, and thus rely on
default HW_ECC scheme implementation.
The default implementation consider the data and OOB area as properly
separated in their respective NAND section, which is not true for the GPMI
controller.
In this driver/controller some OOB data are stored at the beginning of the
NAND data area (these data are called metadata in the driver), then ECC
bytes are interleaved with data chunk (which is similar to the
HW_ECC_SYNDROME scheme), and eventually the remaining bytes are used as
OOB data.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
Hello,

This patch is providing raw access support to the GPMI driver which is
particularly useful to run some tests on the NAND (the one coming in
mind is the mtd_nandbiterrs testsuite).

I know this rework might break several user space tools which are relying
on the default raw access implementation (I already experienced an issue
with the kobs-ng tool provided by freescale), but many other tools will
now work as expected.

Huang, Brian, let me know what you think of this approach ?

Best Regards,

Boris

 drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 119 ++++++++++++++++++++++++++++++++-
 1 file changed, 118 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 959cb9b..b26e032 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -831,7 +831,13 @@ static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
 	 * power of two and is much larger than four, which guarantees the
 	 * auxiliary buffer will appear on a 32-bit boundary.
 	 */
-	this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
+	if (geo->payload_size + geo->auxiliary_size >
+	    mtd->writesize + mtd->oobsize)
+		this->page_buffer_size =
+				geo->payload_size + geo->auxiliary_size;
+	else
+		this->page_buffer_size = mtd->writesize + mtd->oobsize;
+
 	this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
 					&this->page_buffer_phys, GFP_DMA);
 	if (!this->page_buffer_virt)
@@ -1347,6 +1353,115 @@ gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
 	return status & NAND_STATUS_FAIL ? -EIO : 0;
 }
 
+static int gpmi_ecc_read_page_raw(struct mtd_info *mtd,
+				  struct nand_chip *chip, uint8_t *buf,
+				  int oob_required, int page)
+{
+	struct gpmi_nand_data *this = chip->priv;
+	struct bch_geometry *nfc_geo = &this->bch_geometry;
+	int eccsize = nfc_geo->ecc_chunk_size;
+	int eccbytes = DIV_ROUND_UP(nfc_geo->ecc_strength * nfc_geo->gf_len,
+				    8);
+	uint8_t *oob = chip->oob_poi;
+	int step;
+	int column = 0;
+	uint8_t *orig_buf = buf;
+
+	chip->read_buf(mtd, oob, nfc_geo->metadata_size);
+	oob += nfc_geo->metadata_size;
+
+	column += nfc_geo->metadata_size;
+	for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
+		chip->read_buf(mtd, buf, eccsize);
+		buf += eccsize;
+		column += eccsize;
+		chip->read_buf(mtd, oob, eccbytes);
+		oob += eccbytes;
+		column += eccbytes;
+	}
+
+	if (column < mtd->writesize + mtd->oobsize)
+		chip->read_buf(mtd, oob,
+			       mtd->writesize + mtd->oobsize - column);
+
+	block_mark_swapping(this, orig_buf, chip->oob_poi);
+
+	return 0;
+}
+
+static int gpmi_ecc_write_page_raw(struct mtd_info *mtd,
+				   struct nand_chip *chip,
+				   const uint8_t *buf,
+				   int oob_required)
+{
+	struct gpmi_nand_data *this = chip->priv;
+	struct bch_geometry *nfc_geo = &this->bch_geometry;
+	int eccsize = nfc_geo->ecc_chunk_size;
+	int eccbytes = DIV_ROUND_UP(nfc_geo->ecc_strength * nfc_geo->gf_len,
+				    8);
+	uint8_t *oob = chip->oob_poi;
+	int step;
+	int column = 0;
+
+	if (this->swap_block_mark) {
+		/*
+		 * If control arrives here, we're doing block mark swapping.
+		 * Since we can't modify the caller's buffers, we must copy them
+		 * into our own.
+		 */
+		memcpy(this->page_buffer_virt, buf, mtd->writesize);
+		if (oob_required)
+			memcpy(this->page_buffer_virt + mtd->writesize,
+			       chip->oob_poi, mtd->oobsize);
+		else
+			memset(this->page_buffer_virt + mtd->writesize,
+			       0xff, mtd->oobsize);
+
+		/* Handle block mark swapping. */
+		block_mark_swapping(this, this->page_buffer_virt,
+				    this->page_buffer_virt + mtd->writesize);
+
+		oob = this->page_buffer_virt + mtd->writesize;
+		buf = this->page_buffer_virt;
+	}
+
+	if (oob_required) {
+		chip->write_buf(mtd, oob, nfc_geo->metadata_size);
+		oob += nfc_geo->metadata_size;
+	} else {
+		/*
+		 * Write the data byte in the OOB area if BB marker swapping
+		 * is requested.
+		 */
+		if (this->swap_block_mark)
+			chip->write_buf(mtd, oob, 1);
+
+		chip->cmdfunc(mtd, NAND_CMD_SEQIN,
+			      column, -1);
+	}
+	column += nfc_geo->metadata_size;
+
+	for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
+		chip->write_buf(mtd, buf, eccsize);
+		buf += eccsize;
+		column += eccsize;
+		if (oob_required) {
+			chip->write_buf(mtd, oob, eccbytes);
+			oob += eccbytes;
+		} else {
+			chip->cmdfunc(mtd, NAND_CMD_SEQIN,
+				      column + eccbytes, -1);
+		}
+		column += eccbytes;
+	}
+
+	if (oob_required && column < mtd->writesize + mtd->oobsize)
+		chip->write_buf(mtd, oob,
+				mtd->writesize + mtd->oobsize - column);
+
+	return 0;
+}
+
 static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
 {
 	struct nand_chip *chip = mtd->priv;
@@ -1664,6 +1779,8 @@ static int gpmi_init_last(struct gpmi_nand_data *this)
 	ecc->write_page	= gpmi_ecc_write_page;
 	ecc->read_oob	= gpmi_ecc_read_oob;
 	ecc->write_oob	= gpmi_ecc_write_oob;
+	ecc->read_page_raw = gpmi_ecc_read_page_raw;
+	ecc->write_page_raw = gpmi_ecc_write_page_raw;
 	ecc->mode	= NAND_ECC_HW;
 	ecc->size	= bch_geo->ecc_chunk_size;
 	ecc->strength	= bch_geo->ecc_strength;
-- 
1.9.1


WARNING: multiple messages have this Message-ID (diff)
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
To: David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	linux-mtd@lists.infradead.org,
	Huang Shijie <b32955@freescale.com>
Cc: Mike Voytovich <mvoytovich@paypal.com>,
	Boris BREZILLON <boris.brezillon@free-electrons.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, Roy Lee <roylee@paypal.com>
Subject: [PATCH] mtd: nand: gpmi: add proper raw access support
Date: Wed, 10 Sep 2014 10:55:39 +0200	[thread overview]
Message-ID: <1410339339-25561-1-git-send-email-boris.brezillon@free-electrons.com> (raw)

Several MTD users (either in user or kernel space) expect a valid raw
access support to NAND chip devices.
This is particularly true for testing tools which are often touching the
data stored in a NAND chip in raw mode to artificially generate errors.

The GPMI drivers do not implemenent raw access functions, and thus rely on
default HW_ECC scheme implementation.
The default implementation consider the data and OOB area as properly
separated in their respective NAND section, which is not true for the GPMI
controller.
In this driver/controller some OOB data are stored at the beginning of the
NAND data area (these data are called metadata in the driver), then ECC
bytes are interleaved with data chunk (which is similar to the
HW_ECC_SYNDROME scheme), and eventually the remaining bytes are used as
OOB data.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
Hello,

This patch is providing raw access support to the GPMI driver which is
particularly useful to run some tests on the NAND (the one coming in
mind is the mtd_nandbiterrs testsuite).

I know this rework might break several user space tools which are relying
on the default raw access implementation (I already experienced an issue
with the kobs-ng tool provided by freescale), but many other tools will
now work as expected.

Huang, Brian, let me know what you think of this approach ?

Best Regards,

Boris

 drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 119 ++++++++++++++++++++++++++++++++-
 1 file changed, 118 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 959cb9b..b26e032 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -831,7 +831,13 @@ static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
 	 * power of two and is much larger than four, which guarantees the
 	 * auxiliary buffer will appear on a 32-bit boundary.
 	 */
-	this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
+	if (geo->payload_size + geo->auxiliary_size >
+	    mtd->writesize + mtd->oobsize)
+		this->page_buffer_size =
+				geo->payload_size + geo->auxiliary_size;
+	else
+		this->page_buffer_size = mtd->writesize + mtd->oobsize;
+
 	this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
 					&this->page_buffer_phys, GFP_DMA);
 	if (!this->page_buffer_virt)
@@ -1347,6 +1353,115 @@ gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
 	return status & NAND_STATUS_FAIL ? -EIO : 0;
 }
 
+static int gpmi_ecc_read_page_raw(struct mtd_info *mtd,
+				  struct nand_chip *chip, uint8_t *buf,
+				  int oob_required, int page)
+{
+	struct gpmi_nand_data *this = chip->priv;
+	struct bch_geometry *nfc_geo = &this->bch_geometry;
+	int eccsize = nfc_geo->ecc_chunk_size;
+	int eccbytes = DIV_ROUND_UP(nfc_geo->ecc_strength * nfc_geo->gf_len,
+				    8);
+	uint8_t *oob = chip->oob_poi;
+	int step;
+	int column = 0;
+	uint8_t *orig_buf = buf;
+
+	chip->read_buf(mtd, oob, nfc_geo->metadata_size);
+	oob += nfc_geo->metadata_size;
+
+	column += nfc_geo->metadata_size;
+	for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
+		chip->read_buf(mtd, buf, eccsize);
+		buf += eccsize;
+		column += eccsize;
+		chip->read_buf(mtd, oob, eccbytes);
+		oob += eccbytes;
+		column += eccbytes;
+	}
+
+	if (column < mtd->writesize + mtd->oobsize)
+		chip->read_buf(mtd, oob,
+			       mtd->writesize + mtd->oobsize - column);
+
+	block_mark_swapping(this, orig_buf, chip->oob_poi);
+
+	return 0;
+}
+
+static int gpmi_ecc_write_page_raw(struct mtd_info *mtd,
+				   struct nand_chip *chip,
+				   const uint8_t *buf,
+				   int oob_required)
+{
+	struct gpmi_nand_data *this = chip->priv;
+	struct bch_geometry *nfc_geo = &this->bch_geometry;
+	int eccsize = nfc_geo->ecc_chunk_size;
+	int eccbytes = DIV_ROUND_UP(nfc_geo->ecc_strength * nfc_geo->gf_len,
+				    8);
+	uint8_t *oob = chip->oob_poi;
+	int step;
+	int column = 0;
+
+	if (this->swap_block_mark) {
+		/*
+		 * If control arrives here, we're doing block mark swapping.
+		 * Since we can't modify the caller's buffers, we must copy them
+		 * into our own.
+		 */
+		memcpy(this->page_buffer_virt, buf, mtd->writesize);
+		if (oob_required)
+			memcpy(this->page_buffer_virt + mtd->writesize,
+			       chip->oob_poi, mtd->oobsize);
+		else
+			memset(this->page_buffer_virt + mtd->writesize,
+			       0xff, mtd->oobsize);
+
+		/* Handle block mark swapping. */
+		block_mark_swapping(this, this->page_buffer_virt,
+				    this->page_buffer_virt + mtd->writesize);
+
+		oob = this->page_buffer_virt + mtd->writesize;
+		buf = this->page_buffer_virt;
+	}
+
+	if (oob_required) {
+		chip->write_buf(mtd, oob, nfc_geo->metadata_size);
+		oob += nfc_geo->metadata_size;
+	} else {
+		/*
+		 * Write the data byte in the OOB area if BB marker swapping
+		 * is requested.
+		 */
+		if (this->swap_block_mark)
+			chip->write_buf(mtd, oob, 1);
+
+		chip->cmdfunc(mtd, NAND_CMD_SEQIN,
+			      column, -1);
+	}
+	column += nfc_geo->metadata_size;
+
+	for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
+		chip->write_buf(mtd, buf, eccsize);
+		buf += eccsize;
+		column += eccsize;
+		if (oob_required) {
+			chip->write_buf(mtd, oob, eccbytes);
+			oob += eccbytes;
+		} else {
+			chip->cmdfunc(mtd, NAND_CMD_SEQIN,
+				      column + eccbytes, -1);
+		}
+		column += eccbytes;
+	}
+
+	if (oob_required && column < mtd->writesize + mtd->oobsize)
+		chip->write_buf(mtd, oob,
+				mtd->writesize + mtd->oobsize - column);
+
+	return 0;
+}
+
 static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
 {
 	struct nand_chip *chip = mtd->priv;
@@ -1664,6 +1779,8 @@ static int gpmi_init_last(struct gpmi_nand_data *this)
 	ecc->write_page	= gpmi_ecc_write_page;
 	ecc->read_oob	= gpmi_ecc_read_oob;
 	ecc->write_oob	= gpmi_ecc_write_oob;
+	ecc->read_page_raw = gpmi_ecc_read_page_raw;
+	ecc->write_page_raw = gpmi_ecc_write_page_raw;
 	ecc->mode	= NAND_ECC_HW;
 	ecc->size	= bch_geo->ecc_chunk_size;
 	ecc->strength	= bch_geo->ecc_strength;
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: boris.brezillon@free-electrons.com (Boris BREZILLON)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] mtd: nand: gpmi: add proper raw access support
Date: Wed, 10 Sep 2014 10:55:39 +0200	[thread overview]
Message-ID: <1410339339-25561-1-git-send-email-boris.brezillon@free-electrons.com> (raw)

Several MTD users (either in user or kernel space) expect a valid raw
access support to NAND chip devices.
This is particularly true for testing tools which are often touching the
data stored in a NAND chip in raw mode to artificially generate errors.

The GPMI drivers do not implemenent raw access functions, and thus rely on
default HW_ECC scheme implementation.
The default implementation consider the data and OOB area as properly
separated in their respective NAND section, which is not true for the GPMI
controller.
In this driver/controller some OOB data are stored at the beginning of the
NAND data area (these data are called metadata in the driver), then ECC
bytes are interleaved with data chunk (which is similar to the
HW_ECC_SYNDROME scheme), and eventually the remaining bytes are used as
OOB data.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
Hello,

This patch is providing raw access support to the GPMI driver which is
particularly useful to run some tests on the NAND (the one coming in
mind is the mtd_nandbiterrs testsuite).

I know this rework might break several user space tools which are relying
on the default raw access implementation (I already experienced an issue
with the kobs-ng tool provided by freescale), but many other tools will
now work as expected.

Huang, Brian, let me know what you think of this approach ?

Best Regards,

Boris

 drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 119 ++++++++++++++++++++++++++++++++-
 1 file changed, 118 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 959cb9b..b26e032 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -831,7 +831,13 @@ static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
 	 * power of two and is much larger than four, which guarantees the
 	 * auxiliary buffer will appear on a 32-bit boundary.
 	 */
-	this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
+	if (geo->payload_size + geo->auxiliary_size >
+	    mtd->writesize + mtd->oobsize)
+		this->page_buffer_size =
+				geo->payload_size + geo->auxiliary_size;
+	else
+		this->page_buffer_size = mtd->writesize + mtd->oobsize;
+
 	this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
 					&this->page_buffer_phys, GFP_DMA);
 	if (!this->page_buffer_virt)
@@ -1347,6 +1353,115 @@ gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
 	return status & NAND_STATUS_FAIL ? -EIO : 0;
 }
 
+static int gpmi_ecc_read_page_raw(struct mtd_info *mtd,
+				  struct nand_chip *chip, uint8_t *buf,
+				  int oob_required, int page)
+{
+	struct gpmi_nand_data *this = chip->priv;
+	struct bch_geometry *nfc_geo = &this->bch_geometry;
+	int eccsize = nfc_geo->ecc_chunk_size;
+	int eccbytes = DIV_ROUND_UP(nfc_geo->ecc_strength * nfc_geo->gf_len,
+				    8);
+	uint8_t *oob = chip->oob_poi;
+	int step;
+	int column = 0;
+	uint8_t *orig_buf = buf;
+
+	chip->read_buf(mtd, oob, nfc_geo->metadata_size);
+	oob += nfc_geo->metadata_size;
+
+	column += nfc_geo->metadata_size;
+	for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
+		chip->read_buf(mtd, buf, eccsize);
+		buf += eccsize;
+		column += eccsize;
+		chip->read_buf(mtd, oob, eccbytes);
+		oob += eccbytes;
+		column += eccbytes;
+	}
+
+	if (column < mtd->writesize + mtd->oobsize)
+		chip->read_buf(mtd, oob,
+			       mtd->writesize + mtd->oobsize - column);
+
+	block_mark_swapping(this, orig_buf, chip->oob_poi);
+
+	return 0;
+}
+
+static int gpmi_ecc_write_page_raw(struct mtd_info *mtd,
+				   struct nand_chip *chip,
+				   const uint8_t *buf,
+				   int oob_required)
+{
+	struct gpmi_nand_data *this = chip->priv;
+	struct bch_geometry *nfc_geo = &this->bch_geometry;
+	int eccsize = nfc_geo->ecc_chunk_size;
+	int eccbytes = DIV_ROUND_UP(nfc_geo->ecc_strength * nfc_geo->gf_len,
+				    8);
+	uint8_t *oob = chip->oob_poi;
+	int step;
+	int column = 0;
+
+	if (this->swap_block_mark) {
+		/*
+		 * If control arrives here, we're doing block mark swapping.
+		 * Since we can't modify the caller's buffers, we must copy them
+		 * into our own.
+		 */
+		memcpy(this->page_buffer_virt, buf, mtd->writesize);
+		if (oob_required)
+			memcpy(this->page_buffer_virt + mtd->writesize,
+			       chip->oob_poi, mtd->oobsize);
+		else
+			memset(this->page_buffer_virt + mtd->writesize,
+			       0xff, mtd->oobsize);
+
+		/* Handle block mark swapping. */
+		block_mark_swapping(this, this->page_buffer_virt,
+				    this->page_buffer_virt + mtd->writesize);
+
+		oob = this->page_buffer_virt + mtd->writesize;
+		buf = this->page_buffer_virt;
+	}
+
+	if (oob_required) {
+		chip->write_buf(mtd, oob, nfc_geo->metadata_size);
+		oob += nfc_geo->metadata_size;
+	} else {
+		/*
+		 * Write the data byte in the OOB area if BB marker swapping
+		 * is requested.
+		 */
+		if (this->swap_block_mark)
+			chip->write_buf(mtd, oob, 1);
+
+		chip->cmdfunc(mtd, NAND_CMD_SEQIN,
+			      column, -1);
+	}
+	column += nfc_geo->metadata_size;
+
+	for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
+		chip->write_buf(mtd, buf, eccsize);
+		buf += eccsize;
+		column += eccsize;
+		if (oob_required) {
+			chip->write_buf(mtd, oob, eccbytes);
+			oob += eccbytes;
+		} else {
+			chip->cmdfunc(mtd, NAND_CMD_SEQIN,
+				      column + eccbytes, -1);
+		}
+		column += eccbytes;
+	}
+
+	if (oob_required && column < mtd->writesize + mtd->oobsize)
+		chip->write_buf(mtd, oob,
+				mtd->writesize + mtd->oobsize - column);
+
+	return 0;
+}
+
 static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
 {
 	struct nand_chip *chip = mtd->priv;
@@ -1664,6 +1779,8 @@ static int gpmi_init_last(struct gpmi_nand_data *this)
 	ecc->write_page	= gpmi_ecc_write_page;
 	ecc->read_oob	= gpmi_ecc_read_oob;
 	ecc->write_oob	= gpmi_ecc_write_oob;
+	ecc->read_page_raw = gpmi_ecc_read_page_raw;
+	ecc->write_page_raw = gpmi_ecc_write_page_raw;
 	ecc->mode	= NAND_ECC_HW;
 	ecc->size	= bch_geo->ecc_chunk_size;
 	ecc->strength	= bch_geo->ecc_strength;
-- 
1.9.1

             reply	other threads:[~2014-09-10  8:55 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-10  8:55 Boris BREZILLON [this message]
2014-09-10  8:55 ` [PATCH] mtd: nand: gpmi: add proper raw access support Boris BREZILLON
2014-09-10  8:55 ` Boris BREZILLON
2014-09-11 12:09 ` Huang Shijie
2014-09-11 12:09   ` Huang Shijie
2014-09-11 12:09   ` Huang Shijie
2014-09-11 12:36   ` Boris BREZILLON
2014-09-11 12:36     ` Boris BREZILLON
2014-09-11 12:36     ` Boris BREZILLON
2014-09-11 14:25     ` Huang Shijie
2014-09-11 14:25       ` Huang Shijie
2014-09-11 14:25       ` Huang Shijie
2014-09-11 14:38       ` Boris BREZILLON
2014-09-11 14:38         ` Boris BREZILLON
2014-09-11 14:38         ` Boris BREZILLON
2014-09-12  0:45         ` Huang Shijie
2014-09-12  0:45           ` Huang Shijie
2014-09-12  0:45           ` Huang Shijie
2014-09-12 12:30           ` Boris BREZILLON
2014-09-12 12:30             ` Boris BREZILLON
2014-09-12 12:30             ` Boris BREZILLON
2014-09-13 15:36             ` Huang Shijie
2014-09-13 15:36               ` Huang Shijie
2014-09-13 15:36               ` Huang Shijie
2014-09-13 17:38               ` Brian Norris
2014-09-13 17:38                 ` Brian Norris
2014-09-13 17:38                 ` Brian Norris
2014-09-14 14:07                 ` Boris BREZILLON
2014-09-14 14:07                   ` Boris BREZILLON
2014-09-14 14:07                   ` Boris BREZILLON
2014-09-15 14:43                 ` Huang Shijie
2014-09-15 14:43                   ` Huang Shijie
2014-09-15 14:43                   ` Huang Shijie
2014-09-15 20:12                   ` Boris BREZILLON
2014-09-15 20:12                     ` Boris BREZILLON
2014-09-15 20:12                     ` Boris BREZILLON
2014-09-17 15:26                     ` Huang Shijie
2014-09-17 15:26                       ` Huang Shijie
2014-09-17 15:26                       ` Huang Shijie
2014-09-17 18:16                       ` Boris BREZILLON
2014-09-17 18:16                         ` Boris BREZILLON
2014-09-17 18:16                         ` Boris BREZILLON
2014-09-29  1:22     ` Iwo Mergler
2014-09-29  1:22       ` Iwo Mergler
2014-09-29  1:22       ` Iwo Mergler
2014-09-30  8:04       ` Boris Brezillon
2014-09-30  8:04         ` Boris Brezillon
2014-09-30  8:04         ` Boris Brezillon
2014-10-02  6:52         ` Iwo Mergler
2014-10-02  6:52           ` Iwo Mergler
2014-10-02  6:52           ` Iwo Mergler
2014-09-11 14:29 ` Huang Shijie
2014-09-11 14:29   ` Huang Shijie
2014-09-11 14:29   ` Huang Shijie
2014-09-11 14:45   ` Boris BREZILLON
2014-09-11 14:45     ` Boris BREZILLON
2014-09-11 14:45     ` Boris BREZILLON
2014-09-12  0:40     ` Huang Shijie
2014-09-12  0:40       ` Huang Shijie
2014-09-12  0:40       ` Huang Shijie

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1410339339-25561-1-git-send-email-boris.brezillon@free-electrons.com \
    --to=boris.brezillon@free-electrons.com \
    --cc=b32955@freescale.com \
    --cc=computersforpeace@gmail.com \
    --cc=dwmw2@infradead.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=mvoytovich@paypal.com \
    --cc=roylee@paypal.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.