From: Michael Neuling <mikey@neuling.org> To: greg@kroah.com, arnd@arndb.de, mpe@ellerman.id.au, benh@kernel.crashing.org Cc: mikey@neuling.org, anton@samba.org, linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org, jk@ozlabs.org, imunsie@au.ibm.com, cbe-oss-dev@lists.ozlabs.org Subject: [PATCH 10/15] powerpc/mm: Add hooks for cxl Date: Thu, 18 Sep 2014 18:26:55 +1000 [thread overview] Message-ID: <1411028820-29933-11-git-send-email-mikey@neuling.org> (raw) In-Reply-To: <1411028820-29933-1-git-send-email-mikey@neuling.org> From: Ian Munsie <imunsie@au1.ibm.com> This add a hook into tlbie() so that we use global invalidations when there are cxl contexts active. Normally cxl snoops broadcast tlbie. cxl can have TLB entries invalidated via MMIO, but we aren't doing that yet. So for now we are just disabling local tlbies when cxl contexts are active. In future we can make tlbie() local mode smarter so that it invalidates cxl contexts explicitly when it needs to. This also adds a hooks for when SLBs are invalidated to ensure any corresponding SLBs in cxl are also invalidated at the same time. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org> --- arch/powerpc/mm/hash_native_64.c | 6 +++++- arch/powerpc/mm/hash_utils_64.c | 3 +++ arch/powerpc/mm/slice.c | 3 +++ 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index afc0a82..ae4962a 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c @@ -29,6 +29,8 @@ #include <asm/kexec.h> #include <asm/ppc-opcode.h> +#include <misc/cxl.h> + #ifdef DEBUG_LOW #define DBG_LOW(fmt...) udbg_printf(fmt) #else @@ -149,9 +151,11 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) static inline void tlbie(unsigned long vpn, int psize, int apsize, int ssize, int local) { - unsigned int use_local = local && mmu_has_feature(MMU_FTR_TLBIEL); + unsigned int use_local; int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE); + use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) && !cxl_ctx_in_use(); + if (use_local) use_local = mmu_psize_defs[psize].tlbiel; if (lock_tlbie && !use_local) diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 66071af..be40ff7 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -34,6 +34,7 @@ #include <linux/signal.h> #include <linux/memblock.h> #include <linux/context_tracking.h> +#include <misc/cxl.h> #include <asm/processor.h> #include <asm/pgtable.h> @@ -906,6 +907,7 @@ void demote_segment_4k(struct mm_struct *mm, unsigned long addr) #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif + cxl_slbia(mm); if (get_paca_psize(addr) != MMU_PAGE_4K) { get_paca()->context = mm->context; slb_flush_and_rebolt(); @@ -1145,6 +1147,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, u #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif + cxl_slbia(mm); } } diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c index b0c75cc..4d3a34b 100644 --- a/arch/powerpc/mm/slice.c +++ b/arch/powerpc/mm/slice.c @@ -30,6 +30,7 @@ #include <linux/err.h> #include <linux/spinlock.h> #include <linux/export.h> +#include <misc/cxl.h> #include <asm/mman.h> #include <asm/mmu.h> #include <asm/spu.h> @@ -235,6 +236,7 @@ static void slice_convert(struct mm_struct *mm, struct slice_mask mask, int psiz #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif + cxl_slbia(mm); } /* @@ -674,6 +676,7 @@ void slice_set_psize(struct mm_struct *mm, unsigned long address, #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif + cxl_slbia(mm); } void slice_set_range_psize(struct mm_struct *mm, unsigned long start, -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: Michael Neuling <mikey@neuling.org> To: greg@kroah.com, arnd@arndb.de, mpe@ellerman.id.au, benh@kernel.crashing.org Cc: cbe-oss-dev@lists.ozlabs.org, mikey@neuling.org, imunsie@au.ibm.com, linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org, jk@ozlabs.org, anton@samba.org Subject: [PATCH 10/15] powerpc/mm: Add hooks for cxl Date: Thu, 18 Sep 2014 18:26:55 +1000 [thread overview] Message-ID: <1411028820-29933-11-git-send-email-mikey@neuling.org> (raw) In-Reply-To: <1411028820-29933-1-git-send-email-mikey@neuling.org> From: Ian Munsie <imunsie@au1.ibm.com> This add a hook into tlbie() so that we use global invalidations when there are cxl contexts active. Normally cxl snoops broadcast tlbie. cxl can have TLB entries invalidated via MMIO, but we aren't doing that yet. So for now we are just disabling local tlbies when cxl contexts are active. In future we can make tlbie() local mode smarter so that it invalidates cxl contexts explicitly when it needs to. This also adds a hooks for when SLBs are invalidated to ensure any corresponding SLBs in cxl are also invalidated at the same time. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org> --- arch/powerpc/mm/hash_native_64.c | 6 +++++- arch/powerpc/mm/hash_utils_64.c | 3 +++ arch/powerpc/mm/slice.c | 3 +++ 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index afc0a82..ae4962a 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c @@ -29,6 +29,8 @@ #include <asm/kexec.h> #include <asm/ppc-opcode.h> +#include <misc/cxl.h> + #ifdef DEBUG_LOW #define DBG_LOW(fmt...) udbg_printf(fmt) #else @@ -149,9 +151,11 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) static inline void tlbie(unsigned long vpn, int psize, int apsize, int ssize, int local) { - unsigned int use_local = local && mmu_has_feature(MMU_FTR_TLBIEL); + unsigned int use_local; int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE); + use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) && !cxl_ctx_in_use(); + if (use_local) use_local = mmu_psize_defs[psize].tlbiel; if (lock_tlbie && !use_local) diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 66071af..be40ff7 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -34,6 +34,7 @@ #include <linux/signal.h> #include <linux/memblock.h> #include <linux/context_tracking.h> +#include <misc/cxl.h> #include <asm/processor.h> #include <asm/pgtable.h> @@ -906,6 +907,7 @@ void demote_segment_4k(struct mm_struct *mm, unsigned long addr) #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif + cxl_slbia(mm); if (get_paca_psize(addr) != MMU_PAGE_4K) { get_paca()->context = mm->context; slb_flush_and_rebolt(); @@ -1145,6 +1147,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, u #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif + cxl_slbia(mm); } } diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c index b0c75cc..4d3a34b 100644 --- a/arch/powerpc/mm/slice.c +++ b/arch/powerpc/mm/slice.c @@ -30,6 +30,7 @@ #include <linux/err.h> #include <linux/spinlock.h> #include <linux/export.h> +#include <misc/cxl.h> #include <asm/mman.h> #include <asm/mmu.h> #include <asm/spu.h> @@ -235,6 +236,7 @@ static void slice_convert(struct mm_struct *mm, struct slice_mask mask, int psiz #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif + cxl_slbia(mm); } /* @@ -674,6 +676,7 @@ void slice_set_psize(struct mm_struct *mm, unsigned long address, #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif + cxl_slbia(mm); } void slice_set_range_psize(struct mm_struct *mm, unsigned long start, -- 1.9.1
next prev parent reply other threads:[~2014-09-18 8:30 UTC|newest] Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-09-18 8:26 [PATCH 0/15] POWER8 Coherent Accelerator device driver Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 01/15] powerpc/cell: Move spu_handle_mm_fault() out of cell platform Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-18 10:00 ` Jeremy Kerr 2014-09-18 10:00 ` Jeremy Kerr 2014-09-18 23:26 ` Michael Neuling 2014-09-18 23:26 ` Michael Neuling 2014-09-26 3:57 ` Anton Blanchard 2014-09-26 3:57 ` Anton Blanchard 2014-09-18 8:26 ` [PATCH 02/15] powerpc/cell: Move data segment faulting code " Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-18 10:27 ` Jeremy Kerr 2014-09-18 10:27 ` Jeremy Kerr 2014-09-18 23:45 ` Michael Neuling 2014-09-18 23:45 ` Michael Neuling 2014-09-26 4:05 ` Anton Blanchard 2014-09-26 4:05 ` Anton Blanchard 2014-09-26 11:19 ` Michael Neuling 2014-09-26 11:19 ` Michael Neuling 2014-09-29 8:30 ` Aneesh Kumar K.V 2014-09-29 8:30 ` Aneesh Kumar K.V 2014-09-30 4:40 ` Michael Neuling 2014-09-30 4:40 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 03/15] powerpc/msi: Improve IRQ bitmap allocator Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-19 20:16 ` Scott Wood 2014-09-19 20:16 ` Scott Wood 2014-09-19 20:19 ` Scott Wood 2014-09-19 20:19 ` Scott Wood 2014-09-22 8:26 ` Laurentiu Tudor 2014-09-22 8:26 ` Laurentiu Tudor 2014-09-22 23:50 ` Scott Wood 2014-09-22 23:50 ` Scott Wood 2014-09-22 8:25 ` Laurentiu Tudor 2014-09-22 8:25 ` Laurentiu Tudor 2014-09-22 8:29 ` Laurentiu Tudor 2014-09-22 8:29 ` Laurentiu Tudor 2014-09-22 22:59 ` Michael Neuling 2014-09-22 22:59 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 04/15] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 05/15] powerpc/powernv: Split out set MSI IRQ chip code Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-19 6:54 ` Gavin Shan 2014-09-19 6:54 ` Gavin Shan 2014-09-22 4:31 ` Michael Neuling 2014-09-22 4:31 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 06/15] cxl: Add new header for call backs and structs Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 07/15] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-19 7:09 ` Gavin Shan 2014-09-19 7:09 ` Gavin Shan 2014-09-22 5:01 ` Michael Neuling 2014-09-22 5:01 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 08/15] powerpc/mm: Add new hash_page_mm() Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-29 8:50 ` Aneesh Kumar K.V 2014-09-29 8:50 ` Aneesh Kumar K.V [not found] ` <1412054407.1733.77.camel@ale.ozlabs.ibm.com> 2014-09-30 6:13 ` Michael Neuling 2014-09-30 6:13 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 09/15] powerpc/opal: Add PHB to cxl mode call Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-26 4:35 ` Anton Blanchard 2014-09-26 4:35 ` Anton Blanchard 2014-09-18 8:26 ` Michael Neuling [this message] 2014-09-18 8:26 ` [PATCH 10/15] powerpc/mm: Add hooks for cxl Michael Neuling 2014-09-26 4:33 ` Anton Blanchard 2014-09-26 4:33 ` Anton Blanchard 2014-09-26 11:33 ` Michael Neuling 2014-09-26 11:33 ` Michael Neuling 2014-09-26 13:24 ` Anton Blanchard 2014-09-26 13:24 ` Anton Blanchard 2014-09-29 9:10 ` Aneesh Kumar K.V 2014-09-29 9:10 ` Aneesh Kumar K.V 2014-09-18 8:26 ` [PATCH 11/15] cxl: Add base builtin support Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 12/15] cxl: Driver code for powernv PCIe based cards for userspace access Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 13/15] cxl: Userspace header file Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-18 8:26 ` [PATCH 14/15] cxl: Add driver to Kbuild and Makefiles Michael Neuling 2014-09-18 8:26 ` Michael Neuling 2014-09-18 8:27 ` [PATCH 15/15] cxl: Add documentation for userspace APIs Michael Neuling 2014-09-18 8:27 ` Michael Neuling
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