[PATCH 0/3] fix non-working eMMC on Marvell BG2Q DMP board

[PATCH 0/3] fix non-working eMMC on Marvell BG2Q DMP board

[Jisheng Zhang]

The eMMC on Marvell BG2Q DMP board doesn't work due to the following reasons:

 1. the sdhci2 host needs "core" clk to work.
 2. there's no card detection for the eMMC.
 3. the non-exist "smemc" clk occpuies the enable bit for nfc clock which is
    use for the sdhci2's "core" clk.

These pathes fix them.

Please consider for stable as well.

Jisheng Zhang (3):
  ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2
    host
  ARM: berlin: add broken-cd and set bus width for eMMC in Marvell DMP
    DT
  clk: berlin: bg2q: remove non-exist "smemc" gate clock

 arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 2 ++
 arch/arm/boot/dts/berlin2q.dtsi            | 3 ++-
 drivers/clk/berlin/bg2q.c                  | 1 -
 3 files changed, 4 insertions(+), 2 deletions(-)

-- 
2.1.4

[PATCH 0/3] fix non-working eMMC on Marvell BG2Q DMP board

[Jisheng Zhang]

The eMMC on Marvell BG2Q DMP board doesn't work due to the following reasons:

 1. the sdhci2 host needs "core" clk to work.
 2. there's no card detection for the eMMC.
 3. the non-exist "smemc" clk occpuies the enable bit for nfc clock which is
    use for the sdhci2's "core" clk.

These pathes fix them.

Please consider for stable as well.

Jisheng Zhang (3):
  ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2
    host
  ARM: berlin: add broken-cd and set bus width for eMMC in Marvell DMP
    DT
  clk: berlin: bg2q: remove non-exist "smemc" gate clock

 arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 2 ++
 arch/arm/boot/dts/berlin2q.dtsi            | 3 ++-
 drivers/clk/berlin/bg2q.c                  | 1 -
 3 files changed, 4 insertions(+), 2 deletions(-)

-- 
2.1.4

[PATCH 0/3] fix non-working eMMC on Marvell BG2Q DMP board

[Jisheng Zhang]

The eMMC on Marvell BG2Q DMP board doesn't work due to the following reasons:

 1. the sdhci2 host needs "core" clk to work.
 2. there's no card detection for the eMMC.
 3. the non-exist "smemc" clk occpuies the enable bit for nfc clock which is
    use for the sdhci2's "core" clk.

These pathes fix them.

Please consider for stable as well.

Jisheng Zhang (3):
  ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2
    host
  ARM: berlin: add broken-cd and set bus width for eMMC in Marvell DMP
    DT
  clk: berlin: bg2q: remove non-exist "smemc" gate clock

 arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 2 ++
 arch/arm/boot/dts/berlin2q.dtsi            | 3 ++-
 drivers/clk/berlin/bg2q.c                  | 1 -
 3 files changed, 4 insertions(+), 2 deletions(-)

-- 
2.1.4

[PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host

[Jisheng Zhang]

On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work Without this patch due to the "core" clk is gated.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: stable@vger.kernel.org # 3.16+
---
 arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 35253c9..903f3bb 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -83,7 +83,8 @@
 			compatible = "mrvl,pxav3-mmc";
 			reg = <0xab1000 0x200>;
 			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&chip CLKID_SDIO1XIN>;
+			clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
+			clock-names = "io", "core";
 			status = "disabled";
 		};
 
-- 
2.1.4

[PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host

[Jisheng Zhang]

On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work Without this patch due to the "core" clk is gated.

Signed-off-by: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org # 3.16+
---
 arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 35253c9..903f3bb 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -83,7 +83,8 @@
 			compatible = "mrvl,pxav3-mmc";
 			reg = <0xab1000 0x200>;
 			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&chip CLKID_SDIO1XIN>;
+			clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
+			clock-names = "io", "core";
 			status = "disabled";
 		};
 
-- 
2.1.4

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[PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host

[Jisheng Zhang]

On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work Without this patch due to the "core" clk is gated.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: stable at vger.kernel.org # 3.16+
---
 arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 35253c9..903f3bb 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -83,7 +83,8 @@
 			compatible = "mrvl,pxav3-mmc";
 			reg = <0xab1000 0x200>;
 			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&chip CLKID_SDIO1XIN>;
+			clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
+			clock-names = "io", "core";
 			status = "disabled";
 		};
 
-- 
2.1.4

[PATCH 2/3] ARM: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT

[Jisheng Zhang]

There's no card detection for the eMMC, so this patch adds the missing
broken-cd property. This patch also sets bus width as 8 to add
MMC_CAP_8_BIT_DATA in the Host capabilities.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: stable@vger.kernel.org # 3.16+
---
 arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index 28e7e20..a98ac1b 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -65,6 +65,8 @@
 };
 
 &sdhci2 {
+	broken-cd;
+	bus-width = <8>;
 	non-removable;
 	status = "okay";
 };
-- 
2.1.4

[PATCH 2/3] ARM: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT

[Jisheng Zhang]

There's no card detection for the eMMC, so this patch adds the missing
broken-cd property. This patch also sets bus width as 8 to add
MMC_CAP_8_BIT_DATA in the Host capabilities.

Signed-off-by: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org # 3.16+
---
 arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index 28e7e20..a98ac1b 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -65,6 +65,8 @@
 };
 
 &sdhci2 {
+	broken-cd;
+	bus-width = <8>;
 	non-removable;
 	status = "okay";
 };
-- 
2.1.4

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[PATCH 2/3] ARM: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT

[Jisheng Zhang]

There's no card detection for the eMMC, so this patch adds the missing
broken-cd property. This patch also sets bus width as 8 to add
MMC_CAP_8_BIT_DATA in the Host capabilities.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: stable at vger.kernel.org # 3.16+
---
 arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index 28e7e20..a98ac1b 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -65,6 +65,8 @@
 };
 
 &sdhci2 {
+	broken-cd;
+	bus-width = <8>;
 	non-removable;
 	status = "okay";
 };
-- 
2.1.4

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
register is for nfc. Current code use bit19 for non-exist "smemc"
incorrectly, this prevents eMMC from working due to the sdhci's
"core" clk is still gated.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: stable@vger.kernel.org # 3.16+
---
 drivers/clk/berlin/bg2q.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
index 21784e4..440ef81 100644
--- a/drivers/clk/berlin/bg2q.c
+++ b/drivers/clk/berlin/bg2q.c
@@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
 	{ "pbridge",	"perif",	15, CLK_IGNORE_UNUSED },
 	{ "sdio",	"perif",	16, CLK_IGNORE_UNUSED },
 	{ "nfc",	"perif",	18 },
-	{ "smemc",	"perif",	19 },
 	{ "pcie",	"perif",	22 },
 };
 
-- 
2.1.4

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
register is for nfc. Current code use bit19 for non-exist "smemc"
incorrectly, this prevents eMMC from working due to the sdhci's
"core" clk is still gated.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: stable@vger.kernel.org # 3.16+
---
 drivers/clk/berlin/bg2q.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
index 21784e4..440ef81 100644
--- a/drivers/clk/berlin/bg2q.c
+++ b/drivers/clk/berlin/bg2q.c
@@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
 	{ "pbridge",	"perif",	15, CLK_IGNORE_UNUSED },
 	{ "sdio",	"perif",	16, CLK_IGNORE_UNUSED },
 	{ "nfc",	"perif",	18 },
-	{ "smemc",	"perif",	19 },
 	{ "pcie",	"perif",	22 },
 };
 
-- 
2.1.4

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
register is for nfc. Current code use bit19 for non-exist "smemc"
incorrectly, this prevents eMMC from working due to the sdhci's
"core" clk is still gated.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: stable at vger.kernel.org # 3.16+
---
 drivers/clk/berlin/bg2q.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
index 21784e4..440ef81 100644
--- a/drivers/clk/berlin/bg2q.c
+++ b/drivers/clk/berlin/bg2q.c
@@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
 	{ "pbridge",	"perif",	15, CLK_IGNORE_UNUSED },
 	{ "sdio",	"perif",	16, CLK_IGNORE_UNUSED },
 	{ "nfc",	"perif",	18 },
-	{ "smemc",	"perif",	19 },
 	{ "pcie",	"perif",	22 },
 };
 
-- 
2.1.4

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 31.12.2014 09:57, Jisheng Zhang wrote:
> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> register is for nfc. Current code use bit19 for non-exist "smemc"
> incorrectly, this prevents eMMC from working due to the sdhci's
> "core" clk is still gated.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> Cc: stable@vger.kernel.org # 3.16+
> ---
>   drivers/clk/berlin/bg2q.c | 1 -
>   1 file changed, 1 deletion(-)
>
> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> index 21784e4..440ef81 100644
> --- a/drivers/clk/berlin/bg2q.c
> +++ b/drivers/clk/berlin/bg2q.c
> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
>   	{ "pbridge",	"perif",	15, CLK_IGNORE_UNUSED },
>   	{ "sdio",	"perif",	16, CLK_IGNORE_UNUSED },
>   	{ "nfc",	"perif",	18 },
> -	{ "smemc",	"perif",	19 },

Jisheng,

if bit 19 is for nfc, how does that work out with bit 18 which is
still assigned to nfc? Can you re-evaluate clkenable registers for
BG2Q and fix it up accordingly? I'd suggest to still disable as many
clocks as possible rather than removing the corresponding clk_gates.

Sebastian

>   	{ "pcie",	"perif",	22 },
>   };
>
>

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 31.12.2014 09:57, Jisheng Zhang wrote:
> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> register is for nfc. Current code use bit19 for non-exist "smemc"
> incorrectly, this prevents eMMC from working due to the sdhci's
> "core" clk is still gated.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> Cc: stable at vger.kernel.org # 3.16+
> ---
>   drivers/clk/berlin/bg2q.c | 1 -
>   1 file changed, 1 deletion(-)
>
> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> index 21784e4..440ef81 100644
> --- a/drivers/clk/berlin/bg2q.c
> +++ b/drivers/clk/berlin/bg2q.c
> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
>   	{ "pbridge",	"perif",	15, CLK_IGNORE_UNUSED },
>   	{ "sdio",	"perif",	16, CLK_IGNORE_UNUSED },
>   	{ "nfc",	"perif",	18 },
> -	{ "smemc",	"perif",	19 },

Jisheng,

if bit 19 is for nfc, how does that work out with bit 18 which is
still assigned to nfc? Can you re-evaluate clkenable registers for
BG2Q and fix it up accordingly? I'd suggest to still disable as many
clocks as possible rather than removing the corresponding clk_gates.

Sebastian

>   	{ "pcie",	"perif",	22 },
>   };
>
>

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

Dear Sebastian,

On Wed, 7 Jan 2015 06:11:58 -0800
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:

> On 31.12.2014 09:57, Jisheng Zhang wrote:
> > The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> > register is for nfc. Current code use bit19 for non-exist "smemc"
> > incorrectly, this prevents eMMC from working due to the sdhci's
> > "core" clk is still gated.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> > Cc: stable@vger.kernel.org # 3.16+
> > ---
> >   drivers/clk/berlin/bg2q.c | 1 -
> >   1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> > index 21784e4..440ef81 100644
> > --- a/drivers/clk/berlin/bg2q.c
> > +++ b/drivers/clk/berlin/bg2q.c
> > @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> > __initconst = { { "pbridge",	"perif",	15,
> > CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
> > CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },

The nfc here is really confusing, we call it as nfccore internally. Is it better
to rename it as nfccore?

> > -	{ "smemc",	"perif",	19 },
> 
> Jisheng,
> 
> if bit 19 is for nfc, how does that work out with bit 18 which is
> still assigned to nfc? Can you re-evaluate clkenable registers for

bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core" clock.


> BG2Q and fix it up accordingly? I'd suggest to still disable as many

I'll recheck the clk driver for BG2Q.

Thanks very much,
Jisheng

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

Dear Sebastian,

On Wed, 7 Jan 2015 06:11:58 -0800
Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:

> On 31.12.2014 09:57, Jisheng Zhang wrote:
> > The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> > register is for nfc. Current code use bit19 for non-exist "smemc"
> > incorrectly, this prevents eMMC from working due to the sdhci's
> > "core" clk is still gated.
> >
> > Signed-off-by: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> > Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org # 3.16+
> > ---
> >   drivers/clk/berlin/bg2q.c | 1 -
> >   1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> > index 21784e4..440ef81 100644
> > --- a/drivers/clk/berlin/bg2q.c
> > +++ b/drivers/clk/berlin/bg2q.c
> > @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> > __initconst = { { "pbridge",	"perif",	15,
> > CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
> > CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },

The nfc here is really confusing, we call it as nfccore internally. Is it better
to rename it as nfccore?

> > -	{ "smemc",	"perif",	19 },
> 
> Jisheng,
> 
> if bit 19 is for nfc, how does that work out with bit 18 which is
> still assigned to nfc? Can you re-evaluate clkenable registers for

bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core" clock.


> BG2Q and fix it up accordingly? I'd suggest to still disable as many

I'll recheck the clk driver for BG2Q.

Thanks very much,
Jisheng

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Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

Dear Sebastian,

On Wed, 7 Jan 2015 06:11:58 -0800
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:

> On 31.12.2014 09:57, Jisheng Zhang wrote:
> > The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> > register is for nfc. Current code use bit19 for non-exist "smemc"
> > incorrectly, this prevents eMMC from working due to the sdhci's
> > "core" clk is still gated.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> > Cc: stable@vger.kernel.org # 3.16+
> > ---
> >   drivers/clk/berlin/bg2q.c | 1 -
> >   1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> > index 21784e4..440ef81 100644
> > --- a/drivers/clk/berlin/bg2q.c
> > +++ b/drivers/clk/berlin/bg2q.c
> > @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> > __initconst = { { "pbridge",	"perif",	15,
> > CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
> > CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },

The nfc here is really confusing, we call it as nfccore internally. Is it better
to rename it as nfccore?

> > -	{ "smemc",	"perif",	19 },
> 
> Jisheng,
> 
> if bit 19 is for nfc, how does that work out with bit 18 which is
> still assigned to nfc? Can you re-evaluate clkenable registers for

bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core" clock.


> BG2Q and fix it up accordingly? I'd suggest to still disable as many

I'll recheck the clk driver for BG2Q.

Thanks very much,
Jisheng

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

Dear Sebastian,

On Wed, 7 Jan 2015 06:11:58 -0800
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:

> On 31.12.2014 09:57, Jisheng Zhang wrote:
> > The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> > register is for nfc. Current code use bit19 for non-exist "smemc"
> > incorrectly, this prevents eMMC from working due to the sdhci's
> > "core" clk is still gated.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> > Cc: stable at vger.kernel.org # 3.16+
> > ---
> >   drivers/clk/berlin/bg2q.c | 1 -
> >   1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> > index 21784e4..440ef81 100644
> > --- a/drivers/clk/berlin/bg2q.c
> > +++ b/drivers/clk/berlin/bg2q.c
> > @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> > __initconst = { { "pbridge",	"perif",	15,
> > CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
> > CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },

The nfc here is really confusing, we call it as nfccore internally. Is it better
to rename it as nfccore?

> > -	{ "smemc",	"perif",	19 },
> 
> Jisheng,
> 
> if bit 19 is for nfc, how does that work out with bit 18 which is
> still assigned to nfc? Can you re-evaluate clkenable registers for

bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core" clock.


> BG2Q and fix it up accordingly? I'd suggest to still disable as many

I'll recheck the clk driver for BG2Q.

Thanks very much,
Jisheng

Re: [PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host

[Sebastian Hesselbarth]

On 31.12.2014 09:57, Jisheng Zhang wrote:
> On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
> The shdci2 can't work Without this patch due to the "core" clk is gated.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> Cc: stable@vger.kernel.org # 3.16+

Applied to berlin/fixes.

Thanks!

> ---
>   arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> index 35253c9..903f3bb 100644
> --- a/arch/arm/boot/dts/berlin2q.dtsi
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
> @@ -83,7 +83,8 @@
>   			compatible = "mrvl,pxav3-mmc";
>   			reg = <0xab1000 0x200>;
>   			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&chip CLKID_SDIO1XIN>;
> +			clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
> +			clock-names = "io", "core";
>   			status = "disabled";
>   		};
>
>

Re: [PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host

[Sebastian Hesselbarth]

On 31.12.2014 09:57, Jisheng Zhang wrote:
> On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
> The shdci2 can't work Without this patch due to the "core" clk is gated.
>
> Signed-off-by: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org # 3.16+

Applied to berlin/fixes.

Thanks!

> ---
>   arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> index 35253c9..903f3bb 100644
> --- a/arch/arm/boot/dts/berlin2q.dtsi
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
> @@ -83,7 +83,8 @@
>   			compatible = "mrvl,pxav3-mmc";
>   			reg = <0xab1000 0x200>;
>   			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&chip CLKID_SDIO1XIN>;
> +			clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
> +			clock-names = "io", "core";
>   			status = "disabled";
>   		};
>
>

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[PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host

[Sebastian Hesselbarth]

On 31.12.2014 09:57, Jisheng Zhang wrote:
> On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
> The shdci2 can't work Without this patch due to the "core" clk is gated.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> Cc: stable at vger.kernel.org # 3.16+

Applied to berlin/fixes.

Thanks!

> ---
>   arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> index 35253c9..903f3bb 100644
> --- a/arch/arm/boot/dts/berlin2q.dtsi
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
> @@ -83,7 +83,8 @@
>   			compatible = "mrvl,pxav3-mmc";
>   			reg = <0xab1000 0x200>;
>   			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&chip CLKID_SDIO1XIN>;
> +			clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
> +			clock-names = "io", "core";
>   			status = "disabled";
>   		};
>
>

Re: [PATCH 2/3] ARM: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT

[Sebastian Hesselbarth]

On 31.12.2014 09:57, Jisheng Zhang wrote:
> There's no card detection for the eMMC, so this patch adds the missing
> broken-cd property. This patch also sets bus width as 8 to add
> MMC_CAP_8_BIT_DATA in the Host capabilities.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> Cc: stable@vger.kernel.org # 3.16+

Applied to berlin/fixes.

Thanks!

> ---
>   arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> index 28e7e20..a98ac1b 100644
> --- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> +++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> @@ -65,6 +65,8 @@
>   };
>
>   &sdhci2 {
> +	broken-cd;
> +	bus-width = <8>;
>   	non-removable;
>   	status = "okay";
>   };
>

[PATCH 2/3] ARM: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT

[Sebastian Hesselbarth]

On 31.12.2014 09:57, Jisheng Zhang wrote:
> There's no card detection for the eMMC, so this patch adds the missing
> broken-cd property. This patch also sets bus width as 8 to add
> MMC_CAP_8_BIT_DATA in the Host capabilities.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> Cc: stable at vger.kernel.org # 3.16+

Applied to berlin/fixes.

Thanks!

> ---
>   arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> index 28e7e20..a98ac1b 100644
> --- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> +++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> @@ -65,6 +65,8 @@
>   };
>
>   &sdhci2 {
> +	broken-cd;
> +	bus-width = <8>;
>   	non-removable;
>   	status = "okay";
>   };
>

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 07.01.2015 15:22, Jisheng Zhang wrote:
> Dear Sebastian,
>
> On Wed, 7 Jan 2015 06:11:58 -0800
> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>
>> On 31.12.2014 09:57, Jisheng Zhang wrote:
>>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
>>> register is for nfc. Current code use bit19 for non-exist "smemc"
>>> incorrectly, this prevents eMMC from working due to the sdhci's
>>> "core" clk is still gated.
>>>
>>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
>>> Cc: stable@vger.kernel.org # 3.16+
>>> ---
>>>    drivers/clk/berlin/bg2q.c | 1 -
>>>    1 file changed, 1 deletion(-)
>>>
>>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
>>> index 21784e4..440ef81 100644
>>> --- a/drivers/clk/berlin/bg2q.c
>>> +++ b/drivers/clk/berlin/bg2q.c
>>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
>>> __initconst = { { "pbridge",	"perif",	15,
>>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
>>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
>
> The nfc here is really confusing, we call it as nfccore internally. Is it better
> to rename it as nfccore?

I guess it comes from some early Marvell BSP code, if there is no
issues with the name, e.g. something already depends on "nfc", feel
free to rename it to something more meaningful.

>>> -	{ "smemc",	"perif",	19 },
>>
>> Jisheng,
>>
>> if bit 19 is for nfc, how does that work out with bit 18 which is
>> still assigned to nfc? Can you re-evaluate clkenable registers for
>
> bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core" clock.

Ok, then both bits should be dealt with accordingly, i.e. rename
"smemc" to "nfcecc" and use it in the corresponding dts node.

If this clk_gate just disables a clock that is fed into another
gateable clock module, I can live with removing it - although I
still think it is best to leave the clk_gate in place and pick
another name that does not collide with any other clock name.

>> BG2Q and fix it up accordingly? I'd suggest to still disable as many
>
> I'll recheck the clk driver for BG2Q.

Ok, thanks a lot!

Sebastian

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 07.01.2015 15:22, Jisheng Zhang wrote:
> Dear Sebastian,
>
> On Wed, 7 Jan 2015 06:11:58 -0800
> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>
>> On 31.12.2014 09:57, Jisheng Zhang wrote:
>>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
>>> register is for nfc. Current code use bit19 for non-exist "smemc"
>>> incorrectly, this prevents eMMC from working due to the sdhci's
>>> "core" clk is still gated.
>>>
>>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
>>> Cc: stable@vger.kernel.org # 3.16+
>>> ---
>>>    drivers/clk/berlin/bg2q.c | 1 -
>>>    1 file changed, 1 deletion(-)
>>>
>>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
>>> index 21784e4..440ef81 100644
>>> --- a/drivers/clk/berlin/bg2q.c
>>> +++ b/drivers/clk/berlin/bg2q.c
>>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
>>> __initconst = { { "pbridge",	"perif",	15,
>>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
>>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
>
> The nfc here is really confusing, we call it as nfccore internally. Is it better
> to rename it as nfccore?

I guess it comes from some early Marvell BSP code, if there is no
issues with the name, e.g. something already depends on "nfc", feel
free to rename it to something more meaningful.

>>> -	{ "smemc",	"perif",	19 },
>>
>> Jisheng,
>>
>> if bit 19 is for nfc, how does that work out with bit 18 which is
>> still assigned to nfc? Can you re-evaluate clkenable registers for
>
> bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core" clock.

Ok, then both bits should be dealt with accordingly, i.e. rename
"smemc" to "nfcecc" and use it in the corresponding dts node.

If this clk_gate just disables a clock that is fed into another
gateable clock module, I can live with removing it - although I
still think it is best to leave the clk_gate in place and pick
another name that does not collide with any other clock name.

>> BG2Q and fix it up accordingly? I'd suggest to still disable as many
>
> I'll recheck the clk driver for BG2Q.

Ok, thanks a lot!

Sebastian

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 07.01.2015 15:22, Jisheng Zhang wrote:
> Dear Sebastian,
>
> On Wed, 7 Jan 2015 06:11:58 -0800
> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>
>> On 31.12.2014 09:57, Jisheng Zhang wrote:
>>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
>>> register is for nfc. Current code use bit19 for non-exist "smemc"
>>> incorrectly, this prevents eMMC from working due to the sdhci's
>>> "core" clk is still gated.
>>>
>>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
>>> Cc: stable at vger.kernel.org # 3.16+
>>> ---
>>>    drivers/clk/berlin/bg2q.c | 1 -
>>>    1 file changed, 1 deletion(-)
>>>
>>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
>>> index 21784e4..440ef81 100644
>>> --- a/drivers/clk/berlin/bg2q.c
>>> +++ b/drivers/clk/berlin/bg2q.c
>>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
>>> __initconst = { { "pbridge",	"perif",	15,
>>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
>>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
>
> The nfc here is really confusing, we call it as nfccore internally. Is it better
> to rename it as nfccore?

I guess it comes from some early Marvell BSP code, if there is no
issues with the name, e.g. something already depends on "nfc", feel
free to rename it to something more meaningful.

>>> -	{ "smemc",	"perif",	19 },
>>
>> Jisheng,
>>
>> if bit 19 is for nfc, how does that work out with bit 18 which is
>> still assigned to nfc? Can you re-evaluate clkenable registers for
>
> bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core" clock.

Ok, then both bits should be dealt with accordingly, i.e. rename
"smemc" to "nfcecc" and use it in the corresponding dts node.

If this clk_gate just disables a clock that is fed into another
gateable clock module, I can live with removing it - although I
still think it is best to leave the clk_gate in place and pick
another name that does not collide with any other clock name.

>> BG2Q and fix it up accordingly? I'd suggest to still disable as many
>
> I'll recheck the clk driver for BG2Q.

Ok, thanks a lot!

Sebastian

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

Dear Sebastian,

On Wed, 7 Jan 2015 06:30:55 -0800
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:

> On 07.01.2015 15:22, Jisheng Zhang wrote:
> > Dear Sebastian,
> >
> > On Wed, 7 Jan 2015 06:11:58 -0800
> > Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> >
> >> On 31.12.2014 09:57, Jisheng Zhang wrote:
> >>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> >>> register is for nfc. Current code use bit19 for non-exist "smemc"
> >>> incorrectly, this prevents eMMC from working due to the sdhci's
> >>> "core" clk is still gated.
> >>>
> >>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> >>> Cc: stable@vger.kernel.org # 3.16+
> >>> ---
> >>>    drivers/clk/berlin/bg2q.c | 1 -
> >>>    1 file changed, 1 deletion(-)
> >>>
> >>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> >>> index 21784e4..440ef81 100644
> >>> --- a/drivers/clk/berlin/bg2q.c
> >>> +++ b/drivers/clk/berlin/bg2q.c
> >>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> >>> __initconst = { { "pbridge",	"perif",	15,
> >>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
> >>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
> >
> > The nfc here is really confusing, we call it as nfccore internally. Is it
> > better to rename it as nfccore?
> 
> I guess it comes from some early Marvell BSP code, if there is no
> issues with the name, e.g. something already depends on "nfc", feel
> free to rename it to something more meaningful.

In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
The situation is similar for usbcore, satacore etc. So keep the name here,
what do you think?

> 
> >>> -	{ "smemc",	"perif",	19 },
> >>
> >> Jisheng,
> >>
> >> if bit 19 is for nfc, how does that work out with bit 18 which is
> >> still assigned to nfc? Can you re-evaluate clkenable registers for
> >
> > bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
> > clock.
> 
> Ok, then both bits should be dealt with accordingly, i.e. rename
> "smemc" to "nfcecc" and use it in the corresponding dts node.
> 
> If this clk_gate just disables a clock that is fed into another
> gateable clock module, I can live with removing it - although I
> still think it is best to leave the clk_gate in place and pick
> another name that does not collide with any other clock name.

The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.

> 
> >> BG2Q and fix it up accordingly? I'd suggest to still disable as many
> >
> > I'll recheck the clk driver for BG2Q.
> 

I checked the clk driver for BG2Q one by one. The only problem is the "smemc"
issue. Removing it is the only thing we need to do. So I think we can use the
patch I sent.

Thanks,
Jisheng

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

Dear Sebastian,

On Wed, 7 Jan 2015 06:30:55 -0800
Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:

> On 07.01.2015 15:22, Jisheng Zhang wrote:
> > Dear Sebastian,
> >
> > On Wed, 7 Jan 2015 06:11:58 -0800
> > Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> >
> >> On 31.12.2014 09:57, Jisheng Zhang wrote:
> >>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> >>> register is for nfc. Current code use bit19 for non-exist "smemc"
> >>> incorrectly, this prevents eMMC from working due to the sdhci's
> >>> "core" clk is still gated.
> >>>
> >>> Signed-off-by: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> >>> Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org # 3.16+
> >>> ---
> >>>    drivers/clk/berlin/bg2q.c | 1 -
> >>>    1 file changed, 1 deletion(-)
> >>>
> >>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> >>> index 21784e4..440ef81 100644
> >>> --- a/drivers/clk/berlin/bg2q.c
> >>> +++ b/drivers/clk/berlin/bg2q.c
> >>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> >>> __initconst = { { "pbridge",	"perif",	15,
> >>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
> >>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
> >
> > The nfc here is really confusing, we call it as nfccore internally. Is it
> > better to rename it as nfccore?
> 
> I guess it comes from some early Marvell BSP code, if there is no
> issues with the name, e.g. something already depends on "nfc", feel
> free to rename it to something more meaningful.

In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
The situation is similar for usbcore, satacore etc. So keep the name here,
what do you think?

> 
> >>> -	{ "smemc",	"perif",	19 },
> >>
> >> Jisheng,
> >>
> >> if bit 19 is for nfc, how does that work out with bit 18 which is
> >> still assigned to nfc? Can you re-evaluate clkenable registers for
> >
> > bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
> > clock.
> 
> Ok, then both bits should be dealt with accordingly, i.e. rename
> "smemc" to "nfcecc" and use it in the corresponding dts node.
> 
> If this clk_gate just disables a clock that is fed into another
> gateable clock module, I can live with removing it - although I
> still think it is best to leave the clk_gate in place and pick
> another name that does not collide with any other clock name.

The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.

> 
> >> BG2Q and fix it up accordingly? I'd suggest to still disable as many
> >
> > I'll recheck the clk driver for BG2Q.
> 

I checked the clk driver for BG2Q one by one. The only problem is the "smemc"
issue. Removing it is the only thing we need to do. So I think we can use the
patch I sent.

Thanks,
Jisheng
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Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

Dear Sebastian,

On Wed, 7 Jan 2015 06:30:55 -0800
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:

> On 07.01.2015 15:22, Jisheng Zhang wrote:
> > Dear Sebastian,
> >
> > On Wed, 7 Jan 2015 06:11:58 -0800
> > Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> >
> >> On 31.12.2014 09:57, Jisheng Zhang wrote:
> >>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> >>> register is for nfc. Current code use bit19 for non-exist "smemc"
> >>> incorrectly, this prevents eMMC from working due to the sdhci's
> >>> "core" clk is still gated.
> >>>
> >>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> >>> Cc: stable@vger.kernel.org # 3.16+
> >>> ---
> >>>    drivers/clk/berlin/bg2q.c | 1 -
> >>>    1 file changed, 1 deletion(-)
> >>>
> >>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> >>> index 21784e4..440ef81 100644
> >>> --- a/drivers/clk/berlin/bg2q.c
> >>> +++ b/drivers/clk/berlin/bg2q.c
> >>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> >>> __initconst = { { "pbridge",	"perif",	15,
> >>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
> >>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
> >
> > The nfc here is really confusing, we call it as nfccore internally. Is it
> > better to rename it as nfccore?
> 
> I guess it comes from some early Marvell BSP code, if there is no
> issues with the name, e.g. something already depends on "nfc", feel
> free to rename it to something more meaningful.

In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
The situation is similar for usbcore, satacore etc. So keep the name here,
what do you think?

> 
> >>> -	{ "smemc",	"perif",	19 },
> >>
> >> Jisheng,
> >>
> >> if bit 19 is for nfc, how does that work out with bit 18 which is
> >> still assigned to nfc? Can you re-evaluate clkenable registers for
> >
> > bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
> > clock.
> 
> Ok, then both bits should be dealt with accordingly, i.e. rename
> "smemc" to "nfcecc" and use it in the corresponding dts node.
> 
> If this clk_gate just disables a clock that is fed into another
> gateable clock module, I can live with removing it - although I
> still think it is best to leave the clk_gate in place and pick
> another name that does not collide with any other clock name.

The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.

> 
> >> BG2Q and fix it up accordingly? I'd suggest to still disable as many
> >
> > I'll recheck the clk driver for BG2Q.
> 

I checked the clk driver for BG2Q one by one. The only problem is the "smemc"
issue. Removing it is the only thing we need to do. So I think we can use the
patch I sent.

Thanks,
Jisheng

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Jisheng Zhang]

Dear Sebastian,

On Wed, 7 Jan 2015 06:30:55 -0800
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:

> On 07.01.2015 15:22, Jisheng Zhang wrote:
> > Dear Sebastian,
> >
> > On Wed, 7 Jan 2015 06:11:58 -0800
> > Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> >
> >> On 31.12.2014 09:57, Jisheng Zhang wrote:
> >>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> >>> register is for nfc. Current code use bit19 for non-exist "smemc"
> >>> incorrectly, this prevents eMMC from working due to the sdhci's
> >>> "core" clk is still gated.
> >>>
> >>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> >>> Cc: stable at vger.kernel.org # 3.16+
> >>> ---
> >>>    drivers/clk/berlin/bg2q.c | 1 -
> >>>    1 file changed, 1 deletion(-)
> >>>
> >>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> >>> index 21784e4..440ef81 100644
> >>> --- a/drivers/clk/berlin/bg2q.c
> >>> +++ b/drivers/clk/berlin/bg2q.c
> >>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> >>> __initconst = { { "pbridge",	"perif",	15,
> >>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
> >>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
> >
> > The nfc here is really confusing, we call it as nfccore internally. Is it
> > better to rename it as nfccore?
> 
> I guess it comes from some early Marvell BSP code, if there is no
> issues with the name, e.g. something already depends on "nfc", feel
> free to rename it to something more meaningful.

In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
The situation is similar for usbcore, satacore etc. So keep the name here,
what do you think?

> 
> >>> -	{ "smemc",	"perif",	19 },
> >>
> >> Jisheng,
> >>
> >> if bit 19 is for nfc, how does that work out with bit 18 which is
> >> still assigned to nfc? Can you re-evaluate clkenable registers for
> >
> > bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
> > clock.
> 
> Ok, then both bits should be dealt with accordingly, i.e. rename
> "smemc" to "nfcecc" and use it in the corresponding dts node.
> 
> If this clk_gate just disables a clock that is fed into another
> gateable clock module, I can live with removing it - although I
> still think it is best to leave the clk_gate in place and pick
> another name that does not collide with any other clock name.

The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.

> 
> >> BG2Q and fix it up accordingly? I'd suggest to still disable as many
> >
> > I'll recheck the clk driver for BG2Q.
> 

I checked the clk driver for BG2Q one by one. The only problem is the "smemc"
issue. Removing it is the only thing we need to do. So I think we can use the
patch I sent.

Thanks,
Jisheng

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 09.01.2015 13:13, Jisheng Zhang wrote:
> On Wed, 7 Jan 2015 06:30:55 -0800
> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>> On 07.01.2015 15:22, Jisheng Zhang wrote:
>>> On Wed, 7 Jan 2015 06:11:58 -0800
>>> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>>>> On 31.12.2014 09:57, Jisheng Zhang wrote:
>>>>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
>>>>> register is for nfc. Current code use bit19 for non-exist "smemc"
>>>>> incorrectly, this prevents eMMC from working due to the sdhci's
>>>>> "core" clk is still gated.
>>>>>
>>>>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
>>>>> Cc: stable@vger.kernel.org # 3.16+
>>>>> ---
>>>>>     drivers/clk/berlin/bg2q.c | 1 -
>>>>>     1 file changed, 1 deletion(-)
>>>>>
>>>>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
>>>>> index 21784e4..440ef81 100644
>>>>> --- a/drivers/clk/berlin/bg2q.c
>>>>> +++ b/drivers/clk/berlin/bg2q.c
>>>>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
>>>>> __initconst = { { "pbridge",	"perif",	15,
>>>>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
>>>>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
>>>
>>> The nfc here is really confusing, we call it as nfccore internally. Is it
>>> better to rename it as nfccore?
>>
>> I guess it comes from some early Marvell BSP code, if there is no
>> issues with the name, e.g. something already depends on "nfc", feel
>> free to rename it to something more meaningful.
>
> In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
> The situation is similar for usbcore, satacore etc. So keep the name here,
> what do you think?

Yes, I am fine with keeping the name as is.

>>>>> -	{ "smemc",	"perif",	19 },
>>>>
>>>> if bit 19 is for nfc, how does that work out with bit 18 which is
>>>> still assigned to nfc? Can you re-evaluate clkenable registers for
>>>
>>> bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
>>> clock.
>>
>> Ok, then both bits should be dealt with accordingly, i.e. rename
>> "smemc" to "nfcecc" and use it in the corresponding dts node.
>>
>> If this clk_gate just disables a clock that is fed into another
>> gateable clock module, I can live with removing it - although I
>> still think it is best to leave the clk_gate in place and pick
>> another name that does not collide with any other clock name.
>
> The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.

Ok, I had a look in the actual code and agree that the same bit 19
is used twice. The patch is fine and we can take it as is.

This is clk subsystem, so either Mike takes it through his fixes branch
including my

Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

or decides to agree that I take it instead with his Ack. I am fine
with both.

Sebastian

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 09.01.2015 13:13, Jisheng Zhang wrote:
> On Wed, 7 Jan 2015 06:30:55 -0800
> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>> On 07.01.2015 15:22, Jisheng Zhang wrote:
>>> On Wed, 7 Jan 2015 06:11:58 -0800
>>> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>>>> On 31.12.2014 09:57, Jisheng Zhang wrote:
>>>>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
>>>>> register is for nfc. Current code use bit19 for non-exist "smemc"
>>>>> incorrectly, this prevents eMMC from working due to the sdhci's
>>>>> "core" clk is still gated.
>>>>>
>>>>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
>>>>> Cc: stable@vger.kernel.org # 3.16+
>>>>> ---
>>>>>     drivers/clk/berlin/bg2q.c | 1 -
>>>>>     1 file changed, 1 deletion(-)
>>>>>
>>>>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
>>>>> index 21784e4..440ef81 100644
>>>>> --- a/drivers/clk/berlin/bg2q.c
>>>>> +++ b/drivers/clk/berlin/bg2q.c
>>>>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
>>>>> __initconst = { { "pbridge",	"perif",	15,
>>>>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
>>>>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
>>>
>>> The nfc here is really confusing, we call it as nfccore internally. Is it
>>> better to rename it as nfccore?
>>
>> I guess it comes from some early Marvell BSP code, if there is no
>> issues with the name, e.g. something already depends on "nfc", feel
>> free to rename it to something more meaningful.
>
> In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
> The situation is similar for usbcore, satacore etc. So keep the name here,
> what do you think?

Yes, I am fine with keeping the name as is.

>>>>> -	{ "smemc",	"perif",	19 },
>>>>
>>>> if bit 19 is for nfc, how does that work out with bit 18 which is
>>>> still assigned to nfc? Can you re-evaluate clkenable registers for
>>>
>>> bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
>>> clock.
>>
>> Ok, then both bits should be dealt with accordingly, i.e. rename
>> "smemc" to "nfcecc" and use it in the corresponding dts node.
>>
>> If this clk_gate just disables a clock that is fed into another
>> gateable clock module, I can live with removing it - although I
>> still think it is best to leave the clk_gate in place and pick
>> another name that does not collide with any other clock name.
>
> The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.

Ok, I had a look in the actual code and agree that the same bit 19
is used twice. The patch is fine and we can take it as is.

This is clk subsystem, so either Mike takes it through his fixes branch
including my

Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

or decides to agree that I take it instead with his Ack. I am fine
with both.

Sebastian

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 09.01.2015 13:13, Jisheng Zhang wrote:
> On Wed, 7 Jan 2015 06:30:55 -0800
> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>> On 07.01.2015 15:22, Jisheng Zhang wrote:
>>> On Wed, 7 Jan 2015 06:11:58 -0800
>>> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
>>>> On 31.12.2014 09:57, Jisheng Zhang wrote:
>>>>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
>>>>> register is for nfc. Current code use bit19 for non-exist "smemc"
>>>>> incorrectly, this prevents eMMC from working due to the sdhci's
>>>>> "core" clk is still gated.
>>>>>
>>>>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
>>>>> Cc: stable at vger.kernel.org # 3.16+
>>>>> ---
>>>>>     drivers/clk/berlin/bg2q.c | 1 -
>>>>>     1 file changed, 1 deletion(-)
>>>>>
>>>>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
>>>>> index 21784e4..440ef81 100644
>>>>> --- a/drivers/clk/berlin/bg2q.c
>>>>> +++ b/drivers/clk/berlin/bg2q.c
>>>>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
>>>>> __initconst = { { "pbridge",	"perif",	15,
>>>>> CLK_IGNORE_UNUSED }, { "sdio",	"perif",	16,
>>>>> CLK_IGNORE_UNUSED }, { "nfc",	"perif",	18 },
>>>
>>> The nfc here is really confusing, we call it as nfccore internally. Is it
>>> better to rename it as nfccore?
>>
>> I guess it comes from some early Marvell BSP code, if there is no
>> issues with the name, e.g. something already depends on "nfc", feel
>> free to rename it to something more meaningful.
>
> In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
> The situation is similar for usbcore, satacore etc. So keep the name here,
> what do you think?

Yes, I am fine with keeping the name as is.

>>>>> -	{ "smemc",	"perif",	19 },
>>>>
>>>> if bit 19 is for nfc, how does that work out with bit 18 which is
>>>> still assigned to nfc? Can you re-evaluate clkenable registers for
>>>
>>> bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
>>> clock.
>>
>> Ok, then both bits should be dealt with accordingly, i.e. rename
>> "smemc" to "nfcecc" and use it in the corresponding dts node.
>>
>> If this clk_gate just disables a clock that is fed into another
>> gateable clock module, I can live with removing it - although I
>> still think it is best to leave the clk_gate in place and pick
>> another name that does not collide with any other clock name.
>
> The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.

Ok, I had a look in the actual code and agree that the same bit 19
is used twice. The patch is fine and we can take it as is.

This is clk subsystem, so either Mike takes it through his fixes branch
including my

Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

or decides to agree that I take it instead with his Ack. I am fine
with both.

Sebastian

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Mike Turquette]

Quoting Sebastian Hesselbarth (2015-01-10 05:08:22)
> On 09.01.2015 13:13, Jisheng Zhang wrote:
> > On Wed, 7 Jan 2015 06:30:55 -0800
> > Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> >> On 07.01.2015 15:22, Jisheng Zhang wrote:
> >>> On Wed, 7 Jan 2015 06:11:58 -0800
> >>> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> >>>> On 31.12.2014 09:57, Jisheng Zhang wrote:
> >>>>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> >>>>> register is for nfc. Current code use bit19 for non-exist "smemc"
> >>>>> incorrectly, this prevents eMMC from working due to the sdhci's
> >>>>> "core" clk is still gated.
> >>>>>
> >>>>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> >>>>> Cc: stable@vger.kernel.org # 3.16+
> >>>>> ---
> >>>>>     drivers/clk/berlin/bg2q.c | 1 -
> >>>>>     1 file changed, 1 deletion(-)
> >>>>>
> >>>>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> >>>>> index 21784e4..440ef81 100644
> >>>>> --- a/drivers/clk/berlin/bg2q.c
> >>>>> +++ b/drivers/clk/berlin/bg2q.c
> >>>>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> >>>>> __initconst = { { "pbridge",      "perif",        15,
> >>>>> CLK_IGNORE_UNUSED }, { "sdio",    "perif",        16,
> >>>>> CLK_IGNORE_UNUSED }, { "nfc",     "perif",        18 },
> >>>
> >>> The nfc here is really confusing, we call it as nfccore internally. Is it
> >>> better to rename it as nfccore?
> >>
> >> I guess it comes from some early Marvell BSP code, if there is no
> >> issues with the name, e.g. something already depends on "nfc", feel
> >> free to rename it to something more meaningful.
> >
> > In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
> > The situation is similar for usbcore, satacore etc. So keep the name here,
> > what do you think?
> 
> Yes, I am fine with keeping the name as is.
> 
> >>>>> - { "smemc",      "perif",        19 },
> >>>>
> >>>> if bit 19 is for nfc, how does that work out with bit 18 which is
> >>>> still assigned to nfc? Can you re-evaluate clkenable registers for
> >>>
> >>> bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
> >>> clock.
> >>
> >> Ok, then both bits should be dealt with accordingly, i.e. rename
> >> "smemc" to "nfcecc" and use it in the corresponding dts node.
> >>
> >> If this clk_gate just disables a clock that is fed into another
> >> gateable clock module, I can live with removing it - although I
> >> still think it is best to leave the clk_gate in place and pick
> >> another name that does not collide with any other clock name.
> >
> > The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.
> 
> Ok, I had a look in the actual code and agree that the same bit 19
> is used twice. The patch is fine and we can take it as is.
> 
> This is clk subsystem, so either Mike takes it through his fixes branch
> including my
> 
> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> 
> or decides to agree that I take it instead with his Ack. I am fine
> with both.

Acked-by: Michael Turquette <mturquette@linaro.org>

Now the three fixes can stay together and live happily ever after.

Regards,
Mike

> 
> Sebastian
> 

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Mike Turquette]

Quoting Sebastian Hesselbarth (2015-01-10 05:08:22)
> On 09.01.2015 13:13, Jisheng Zhang wrote:
> > On Wed, 7 Jan 2015 06:30:55 -0800
> > Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> >> On 07.01.2015 15:22, Jisheng Zhang wrote:
> >>> On Wed, 7 Jan 2015 06:11:58 -0800
> >>> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> >>>> On 31.12.2014 09:57, Jisheng Zhang wrote:
> >>>>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> >>>>> register is for nfc. Current code use bit19 for non-exist "smemc"
> >>>>> incorrectly, this prevents eMMC from working due to the sdhci's
> >>>>> "core" clk is still gated.
> >>>>>
> >>>>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> >>>>> Cc: stable@vger.kernel.org # 3.16+
> >>>>> ---
> >>>>>     drivers/clk/berlin/bg2q.c | 1 -
> >>>>>     1 file changed, 1 deletion(-)
> >>>>>
> >>>>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> >>>>> index 21784e4..440ef81 100644
> >>>>> --- a/drivers/clk/berlin/bg2q.c
> >>>>> +++ b/drivers/clk/berlin/bg2q.c
> >>>>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> >>>>> __initconst = { { "pbridge",      "perif",        15,
> >>>>> CLK_IGNORE_UNUSED }, { "sdio",    "perif",        16,
> >>>>> CLK_IGNORE_UNUSED }, { "nfc",     "perif",        18 },
> >>>
> >>> The nfc here is really confusing, we call it as nfccore internally. Is it
> >>> better to rename it as nfccore?
> >>
> >> I guess it comes from some early Marvell BSP code, if there is no
> >> issues with the name, e.g. something already depends on "nfc", feel
> >> free to rename it to something more meaningful.
> >
> > In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
> > The situation is similar for usbcore, satacore etc. So keep the name here,
> > what do you think?
> 
> Yes, I am fine with keeping the name as is.
> 
> >>>>> - { "smemc",      "perif",        19 },
> >>>>
> >>>> if bit 19 is for nfc, how does that work out with bit 18 which is
> >>>> still assigned to nfc? Can you re-evaluate clkenable registers for
> >>>
> >>> bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
> >>> clock.
> >>
> >> Ok, then both bits should be dealt with accordingly, i.e. rename
> >> "smemc" to "nfcecc" and use it in the corresponding dts node.
> >>
> >> If this clk_gate just disables a clock that is fed into another
> >> gateable clock module, I can live with removing it - although I
> >> still think it is best to leave the clk_gate in place and pick
> >> another name that does not collide with any other clock name.
> >
> > The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.
> 
> Ok, I had a look in the actual code and agree that the same bit 19
> is used twice. The patch is fine and we can take it as is.
> 
> This is clk subsystem, so either Mike takes it through his fixes branch
> including my
> 
> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> 
> or decides to agree that I take it instead with his Ack. I am fine
> with both.

Acked-by: Michael Turquette <mturquette@linaro.org>

Now the three fixes can stay together and live happily ever after.

Regards,
Mike

> 
> Sebastian
> 

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Mike Turquette]

Quoting Sebastian Hesselbarth (2015-01-10 05:08:22)
> On 09.01.2015 13:13, Jisheng Zhang wrote:
> > On Wed, 7 Jan 2015 06:30:55 -0800
> > Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> >> On 07.01.2015 15:22, Jisheng Zhang wrote:
> >>> On Wed, 7 Jan 2015 06:11:58 -0800
> >>> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> >>>> On 31.12.2014 09:57, Jisheng Zhang wrote:
> >>>>> The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable
> >>>>> register is for nfc. Current code use bit19 for non-exist "smemc"
> >>>>> incorrectly, this prevents eMMC from working due to the sdhci's
> >>>>> "core" clk is still gated.
> >>>>>
> >>>>> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> >>>>> Cc: stable at vger.kernel.org # 3.16+
> >>>>> ---
> >>>>>     drivers/clk/berlin/bg2q.c | 1 -
> >>>>>     1 file changed, 1 deletion(-)
> >>>>>
> >>>>> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> >>>>> index 21784e4..440ef81 100644
> >>>>> --- a/drivers/clk/berlin/bg2q.c
> >>>>> +++ b/drivers/clk/berlin/bg2q.c
> >>>>> @@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[]
> >>>>> __initconst = { { "pbridge",      "perif",        15,
> >>>>> CLK_IGNORE_UNUSED }, { "sdio",    "perif",        16,
> >>>>> CLK_IGNORE_UNUSED }, { "nfc",     "perif",        18 },
> >>>
> >>> The nfc here is really confusing, we call it as nfccore internally. Is it
> >>> better to rename it as nfccore?
> >>
> >> I guess it comes from some early Marvell BSP code, if there is no
> >> issues with the name, e.g. something already depends on "nfc", feel
> >> free to rename it to something more meaningful.
> >
> > In BG2, mrvl call the clock as nfccore. The code use "nfc" for it.
> > The situation is similar for usbcore, satacore etc. So keep the name here,
> > what do you think?
> 
> Yes, I am fine with keeping the name as is.
> 
> >>>>> - { "smemc",      "perif",        19 },
> >>>>
> >>>> if bit 19 is for nfc, how does that work out with bit 18 which is
> >>>> still assigned to nfc? Can you re-evaluate clkenable registers for
> >>>
> >>> bit 19 is for nfcEcc, the "io" clock; bit 18 is for nfcCore, the "core"
> >>> clock.
> >>
> >> Ok, then both bits should be dealt with accordingly, i.e. rename
> >> "smemc" to "nfcecc" and use it in the corresponding dts node.
> >>
> >> If this clk_gate just disables a clock that is fed into another
> >> gateable clock module, I can live with removing it - although I
> >> still think it is best to leave the clk_gate in place and pick
> >> another name that does not collide with any other clock name.
> >
> > The nfcecc is already defined in the bg2q_divs, the gate bit is correct there.
> 
> Ok, I had a look in the actual code and agree that the same bit 19
> is used twice. The patch is fine and we can take it as is.
> 
> This is clk subsystem, so either Mike takes it through his fixes branch
> including my
> 
> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> 
> or decides to agree that I take it instead with his Ack. I am fine
> with both.

Acked-by: Michael Turquette <mturquette@linaro.org>

Now the three fixes can stay together and live happily ever after.

Regards,
Mike

> 
> Sebastian
> 

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 01/13/2015 01:28 AM, Mike Turquette wrote:
> Quoting Sebastian Hesselbarth (2015-01-10 05:08:22)
>> This is clk subsystem, so either Mike takes it through his fixes branch
>> including my
>>
>> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
>>
>> or decides to agree that I take it instead with his Ack. I am fine
>> with both.
>
> Acked-by: Michael Turquette <mturquette@linaro.org>
>
> Now the three fixes can stay together and live happily ever after.

Mike,

I already had the two others pulled by Olof some days ago.
If you plan for a fixes branch for v3.19, please take this in too.

If you have no other fixes, I can take it and do a 2nd round of
fixes for Berlin.

Sebastian

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 01/13/2015 01:28 AM, Mike Turquette wrote:
> Quoting Sebastian Hesselbarth (2015-01-10 05:08:22)
>> This is clk subsystem, so either Mike takes it through his fixes branch
>> including my
>>
>> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
>>
>> or decides to agree that I take it instead with his Ack. I am fine
>> with both.
>
> Acked-by: Michael Turquette <mturquette@linaro.org>
>
> Now the three fixes can stay together and live happily ever after.

Mike,

I already had the two others pulled by Olof some days ago.
If you plan for a fixes branch for v3.19, please take this in too.

If you have no other fixes, I can take it and do a 2nd round of
fixes for Berlin.

Sebastian

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Sebastian Hesselbarth]

On 01/13/2015 01:28 AM, Mike Turquette wrote:
> Quoting Sebastian Hesselbarth (2015-01-10 05:08:22)
>> This is clk subsystem, so either Mike takes it through his fixes branch
>> including my
>>
>> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
>>
>> or decides to agree that I take it instead with his Ack. I am fine
>> with both.
>
> Acked-by: Michael Turquette <mturquette@linaro.org>
>
> Now the three fixes can stay together and live happily ever after.

Mike,

I already had the two others pulled by Olof some days ago.
If you plan for a fixes branch for v3.19, please take this in too.

If you have no other fixes, I can take it and do a 2nd round of
fixes for Berlin.

Sebastian

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Mike Turquette]

Quoting Sebastian Hesselbarth (2015-01-13 04:17:30)
> On 01/13/2015 01:28 AM, Mike Turquette wrote:
> > Quoting Sebastian Hesselbarth (2015-01-10 05:08:22)
> >> This is clk subsystem, so either Mike takes it through his fixes branch
> >> including my
> >>
> >> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> >>
> >> or decides to agree that I take it instead with his Ack. I am fine
> >> with both.
> >
> > Acked-by: Michael Turquette <mturquette@linaro.org>
> >
> > Now the three fixes can stay together and live happily ever after.
> 
> Mike,
> 
> I already had the two others pulled by Olof some days ago.
> If you plan for a fixes branch for v3.19, please take this in too.
> 
> If you have no other fixes, I can take it and do a 2nd round of
> fixes for Berlin.

The fixes family has been broken up. How sad.

Applied to clk-fixes for the next -rc.

Regards,
Mike

> 
> Sebastian
> 

Re: [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Mike Turquette]

Quoting Sebastian Hesselbarth (2015-01-13 04:17:30)
> On 01/13/2015 01:28 AM, Mike Turquette wrote:
> > Quoting Sebastian Hesselbarth (2015-01-10 05:08:22)
> >> This is clk subsystem, so either Mike takes it through his fixes branch
> >> including my
> >>
> >> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> >>
> >> or decides to agree that I take it instead with his Ack. I am fine
> >> with both.
> >
> > Acked-by: Michael Turquette <mturquette@linaro.org>
> >
> > Now the three fixes can stay together and live happily ever after.
> 
> Mike,
> 
> I already had the two others pulled by Olof some days ago.
> If you plan for a fixes branch for v3.19, please take this in too.
> 
> If you have no other fixes, I can take it and do a 2nd round of
> fixes for Berlin.

The fixes family has been broken up. How sad.

Applied to clk-fixes for the next -rc.

Regards,
Mike

> 
> Sebastian
> 

[PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock

[Mike Turquette]

Quoting Sebastian Hesselbarth (2015-01-13 04:17:30)
> On 01/13/2015 01:28 AM, Mike Turquette wrote:
> > Quoting Sebastian Hesselbarth (2015-01-10 05:08:22)
> >> This is clk subsystem, so either Mike takes it through his fixes branch
> >> including my
> >>
> >> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> >>
> >> or decides to agree that I take it instead with his Ack. I am fine
> >> with both.
> >
> > Acked-by: Michael Turquette <mturquette@linaro.org>
> >
> > Now the three fixes can stay together and live happily ever after.
> 
> Mike,
> 
> I already had the two others pulled by Olof some days ago.
> If you plan for a fixes branch for v3.19, please take this in too.
> 
> If you have no other fixes, I can take it and do a 2nd round of
> fixes for Berlin.

The fixes family has been broken up. How sad.

Applied to clk-fixes for the next -rc.

Regards,
Mike

> 
> Sebastian
>