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From: Markos Chandras <markos.chandras@imgtec.com>
To: <linux-mips@linux-mips.org>
Cc: Markos Chandras <markos.chandras@imgtec.com>,
	Matthew Fortune <Matthew.Fortune@imgtec.com>,
	Paul Burton <paul.burton@imgtec.com>
Subject: [PATCH RFC v2 68/70] MIPS: kernel: elf: Improve the overall ABI and FPU mode checks
Date: Fri, 16 Jan 2015 10:49:47 +0000	[thread overview]
Message-ID: <1421405389-15512-69-git-send-email-markos.chandras@imgtec.com> (raw)
In-Reply-To: <1421405389-15512-1-git-send-email-markos.chandras@imgtec.com>

The previous implementation did not cover all possible FPU combinations
and it silently allowed ABI incompatible objects to be loaded with the
wrong ABI. For example, the previous logic would set the FP_64 ABI as
the matching ABI for an FP_XX object combined with an FP_64A object.
This was wrong, and the matching ABI should have been FP_64A.
The previous logic is now replaced with a new one which determines
the appropriate FPU mode to be used rather than the FP ABI. This has
the advantage that the entire logic is much simpler since it is the FPU
mode we are interested in rather than the FP ABI resulting to code
simplifications.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
---
 arch/mips/include/asm/elf.h |  10 +-
 arch/mips/kernel/elf.c      | 284 ++++++++++++++++++++++++++------------------
 2 files changed, 177 insertions(+), 117 deletions(-)

diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index eb4d95de619c..ee5e6d250487 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -192,6 +192,8 @@ struct mips_elf_abiflags_v0 {
 	uint32_t flags2;
 };
 
+#define MIPS_ABI_FP_UNKNOWN	(-1)	/* Unknown FP ABI (kernel internal) */
+
 #define MIPS_ABI_FP_ANY		0	/* FP ABI doesn't matter */
 #define MIPS_ABI_FP_DOUBLE	1	/* -mdouble-float */
 #define MIPS_ABI_FP_SINGLE	2	/* -msingle-float */
@@ -417,13 +419,13 @@ extern unsigned long arch_randomize_brk(struct mm_struct *mm);
 struct arch_elf_state {
 	int fp_abi;
 	int interp_fp_abi;
-	int overall_abi;
+	int overall_fp_mode;
 };
 
 #define INIT_ARCH_ELF_STATE {			\
-	.fp_abi = -1,				\
-	.interp_fp_abi = -1,			\
-	.overall_abi = -1,			\
+	.fp_abi = MIPS_ABI_FP_UNKNOWN,		\
+	.interp_fp_abi = MIPS_ABI_FP_UNKNOWN,	\
+	.overall_fp_mode = -1,			\
 }
 
 extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c
index c92b15df6893..2ac33d2375ca 100644
--- a/arch/mips/kernel/elf.c
+++ b/arch/mips/kernel/elf.c
@@ -11,29 +11,102 @@
 #include <linux/elf.h>
 #include <linux/sched.h>
 
+/* FPU modes */
 enum {
-	FP_ERROR = -1,
-	FP_DOUBLE_64A = -2,
+	FP_FRE,
+	FP_FR0,
+	FP_FR1,
 };
 
+/**
+ * struct mode_req - ABI FPU mode requirements
+ * @single:	The program being loaded needs an FPU but it will only issue
+ *		single precision instructions meaning that it can execute in
+ *		either FR0 or FR1.
+ * @soft:	The soft(-float) requirement means that the program being
+ *		loaded needs has no FPU dependency at all (i.e. it has no
+ *		FPU instructions).
+ * @fr1:	The program being loaded depends on FPU being in FR=1 mode.
+ * @frdefault:	The program being loaded depends on the default FPU mode.
+ *		That is FR0 for O32 and FR1 for N32/N64.
+ * @fre:	The program being loaded depends on FPU with FRE=1. This mode is
+ *		a bridge which uses FR=1 whilst still being able to maintain
+ *		full compatibility with pre-existing code using the O32 FP32
+ *		ABI.
+ *
+ * More information about the FP ABIs can be found here:
+ *
+ * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up
+ *
+ */
+
+struct mode_req {
+	bool single;
+	bool soft;
+	bool fr1;
+	bool frdefault;
+	bool fre;
+};
+
+static const struct mode_req fpu_reqs[] = {
+	[MIPS_ABI_FP_ANY]    = { true,  true,  true,  true,  true  },
+	[MIPS_ABI_FP_DOUBLE] = { false, false, false, true,  true  },
+	[MIPS_ABI_FP_SINGLE] = { true,  false, false, false, false },
+	[MIPS_ABI_FP_SOFT]   = { false, true,  false, false, false },
+	[MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
+	[MIPS_ABI_FP_XX]     = { false, false, true,  true,  true  },
+	[MIPS_ABI_FP_64]     = { false, false, true,  false, false },
+	[MIPS_ABI_FP_64A]    = { false, false, true,  false, true  }
+};
+
+/*
+ * Mode requirements when .MIPS.abiflags is not present in the ELF.
+ * Not present means that everything is acceptable except FR1.
+ */
+static struct mode_req none_req = { true, true, false, true, true };
+
 int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
 		     bool is_interp, struct arch_elf_state *state)
 {
-	struct elfhdr *ehdr = _ehdr;
-	struct elf_phdr *phdr = _phdr;
+	struct elf32_hdr *ehdr32 = _ehdr;
+	struct elf32_phdr *phdr32 = _phdr;
+	struct elf64_phdr *phdr64 = _phdr;
 	struct mips_elf_abiflags_v0 abiflags;
 	int ret;
 
-	if (config_enabled(CONFIG_64BIT) &&
-	    (ehdr->e_ident[EI_CLASS] != ELFCLASS32))
-		return 0;
-	if (phdr->p_type != PT_MIPS_ABIFLAGS)
-		return 0;
-	if (phdr->p_filesz < sizeof(abiflags))
-		return -EINVAL;
+	/* Lets see if this is an O32 ELF */
+	if (ehdr32->e_ident[EI_CLASS] == ELFCLASS32) {
+		/* FR = 1 for N32 */
+		if (ehdr32->e_flags & EF_MIPS_ABI2)
+			state->overall_fp_mode = FP_FR1;
+		else
+			/* Set a good default FPU mode for O32*/
+			state->overall_fp_mode = cpu_has_mips_r6 ?
+				FP_FRE : FP_FR0;
+
+		if (phdr32->p_type != PT_MIPS_ABIFLAGS)
+			return 0;
+
+		if (phdr32->p_filesz < sizeof(abiflags))
+			return -EINVAL;
+
+		ret = kernel_read(elf, phdr32->p_offset,
+				  (char *)&abiflags,
+				  sizeof(abiflags));
+	} else {
+		/* FR=1 is really the only option for 64-bit */
+		state->overall_fp_mode = FP_FR1;
+
+		if (phdr64->p_type != PT_MIPS_ABIFLAGS)
+			return 0;
+		if (phdr64->p_filesz < sizeof(abiflags))
+			return -EINVAL;
+
+		ret = kernel_read(elf, phdr64->p_offset,
+				  (char *)&abiflags,
+				  sizeof(abiflags));
+	}
 
-	ret = kernel_read(elf, phdr->p_offset, (char *)&abiflags,
-			  sizeof(abiflags));
 	if (ret < 0)
 		return ret;
 	if (ret != sizeof(abiflags))
@@ -48,30 +121,26 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
 	return 0;
 }
 
-static inline unsigned get_fp_abi(struct elfhdr *ehdr, int in_abi)
+static inline unsigned get_fp_abi(struct elf32_hdr *ehdr, int in_abi)
 {
 	/* If the ABI requirement is provided, simply return that */
-	if (in_abi != -1)
+	if (in_abi != MIPS_ABI_FP_UNKNOWN)
 		return in_abi;
 
 	/* If the EF_MIPS_FP64 flag was set, return MIPS_ABI_FP_64 */
 	if (ehdr->e_flags & EF_MIPS_FP64)
-		return MIPS_ABI_FP_64;
+		return MIPS_ABI_FP_OLD_64;
 
-	/* Default to MIPS_ABI_FP_DOUBLE */
-	return MIPS_ABI_FP_DOUBLE;
+	/* Unknown ABI */
+	return MIPS_ABI_FP_UNKNOWN;
 }
 
 int arch_check_elf(void *_ehdr, bool has_interpreter,
 		   struct arch_elf_state *state)
 {
-	struct elfhdr *ehdr = _ehdr;
-	unsigned fp_abi, interp_fp_abi, abi0, abi1;
-
-	/* Ignore non-O32 binaries */
-	if (config_enabled(CONFIG_64BIT) &&
-	    (ehdr->e_ident[EI_CLASS] != ELFCLASS32))
-		return 0;
+	struct elf32_hdr *ehdr = _ehdr;
+	struct mode_req prog_req, interp_req;
+	unsigned fp_abi, interp_fp_abi, abi0, abi1, max_abi;
 
 	fp_abi = get_fp_abi(ehdr, state->fp_abi);
 
@@ -84,108 +153,97 @@ int arch_check_elf(void *_ehdr, bool has_interpreter,
 		abi0 = abi1 = fp_abi;
 	}
 
-	state->overall_abi = FP_ERROR;
-
-	if (abi0 == abi1) {
-		state->overall_abi = abi0;
-	} else if (abi0 == MIPS_ABI_FP_ANY) {
-		state->overall_abi = abi1;
-	} else if (abi0 == MIPS_ABI_FP_DOUBLE) {
-		switch (abi1) {
-		case MIPS_ABI_FP_XX:
-			state->overall_abi = MIPS_ABI_FP_DOUBLE;
-			break;
-
-		case MIPS_ABI_FP_64A:
-			state->overall_abi = FP_DOUBLE_64A;
-			break;
-		}
-	} else if (abi0 == MIPS_ABI_FP_SINGLE ||
-		   abi0 == MIPS_ABI_FP_SOFT) {
-		/* Cannot link with other ABIs */
-	} else if (abi0 == MIPS_ABI_FP_OLD_64) {
-		switch (abi1) {
-		case MIPS_ABI_FP_XX:
-		case MIPS_ABI_FP_64:
-		case MIPS_ABI_FP_64A:
-			state->overall_abi = MIPS_ABI_FP_64;
-			break;
-		}
-	} else if (abi0 == MIPS_ABI_FP_XX ||
-		   abi0 == MIPS_ABI_FP_64 ||
-		   abi0 == MIPS_ABI_FP_64A) {
-		state->overall_abi = MIPS_ABI_FP_64;
-	}
+	/* ABI limits. O32 = FP_64A, N32/N64 = FP_SOFT */
+	max_abi = ((ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
+		   (!(ehdr->e_flags & EF_MIPS_ABI2))) ?
+		MIPS_ABI_FP_64A : MIPS_ABI_FP_SOFT;
 
-	switch (state->overall_abi) {
-	case MIPS_ABI_FP_64:
-	case MIPS_ABI_FP_64A:
-	case FP_DOUBLE_64A:
-		if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
-			return -ELIBBAD;
-		break;
+	if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
+	    (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
+		return -ELIBBAD;
 
-	case FP_ERROR:
+	/* It's time to determine the FPU mode requirements */
+	prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0];
+	interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1];
+
+	/*
+	 * Check whether the program's and interp's ABIs have a matching FPU
+	 * mode requirement.
+	 */
+	prog_req.single = interp_req.single && prog_req.single;
+	prog_req.soft = interp_req.soft && prog_req.soft;
+	prog_req.fr1 = interp_req.fr1 && prog_req.fr1;
+	prog_req.frdefault = interp_req.frdefault && prog_req.frdefault;
+	prog_req.fre = interp_req.fre && prog_req.fre;
+
+	/*
+	 * Determine the desired FPU mode
+	 *
+	 * Decision making:
+	 *
+	 * - We want FR_FRE if FR=1 and FR=0 are both false. This means
+	 *   that we don't have a single matching FR mode to satisfy
+	 *   the requirements so our only solution is to use the emulated
+	 *   mode
+	 * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or
+	 *   fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU
+	 *   instructions so we don't care about the mode. We will simply use
+	 *   the one preferred by the hardware. In fpxx case, that ABI can
+	 *   handle both FR=1 and FR=0, so, again, we simply choose the one
+	 *   preferred by the hardware. Next, if we only use single-precision
+	 *   FPU instructions, and the default ABI FPU mode is not good
+	 *   (ie single + any ABI combination), we set again the FPU mode to the
+	 *   one is preferred by the hardware.
+	 * - We want FP_FR1 if that's the only matching mode and the default one
+	 *   is not good.
+	 * - Return with -ELIBADD if we can't find a matching FPU mode.
+	 */
+	if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1)
+		state->overall_fp_mode = FP_FRE;
+	else if ((prog_req.fr1 && prog_req.frdefault) ||
+		 (prog_req.single && !prog_req.frdefault))
+		/* Make sure 64-bit MIPS III/IV will not pick FR1 */
+		state->overall_fp_mode = ((current_cpu_data.fpu_id & MIPS_FPIR_F64) &&
+					  (cpu_has_mips_r2 || cpu_has_mips_r6)) ?
+					  FP_FR1 : FP_FR0;
+	else if (prog_req.fr1)
+		state->overall_fp_mode = FP_FR1;
+	else  if (!prog_req.fre && !prog_req.frdefault &&
+		  !prog_req.fr1 && !prog_req.single && !prog_req.soft)
 		return -ELIBBAD;
-	}
 
 	return 0;
 }
 
-void mips_set_personality_fp(struct arch_elf_state *state)
+static inline void set_thread_fp_mode(int hybrid, int regs32)
 {
-	if (config_enabled(CONFIG_FP32XX_HYBRID_FPRS)) {
-		/*
-		 * Use hybrid FPRs for all code which can correctly execute
-		 * with that mode.
-		 */
-		switch (state->overall_abi) {
-		case MIPS_ABI_FP_DOUBLE:
-		case MIPS_ABI_FP_SINGLE:
-		case MIPS_ABI_FP_SOFT:
-		case MIPS_ABI_FP_XX:
-		case MIPS_ABI_FP_ANY:
-			/* FR=1, FRE=1 */
-			clear_thread_flag(TIF_32BIT_FPREGS);
-			set_thread_flag(TIF_HYBRID_FPREGS);
-			return;
-		}
-	}
-
-	switch (state->overall_abi) {
-	case MIPS_ABI_FP_DOUBLE:
-	case MIPS_ABI_FP_SINGLE:
-	case MIPS_ABI_FP_SOFT:
-		/* FR=0 */
-		set_thread_flag(TIF_32BIT_FPREGS);
+	if (hybrid)
+		set_thread_flag(TIF_HYBRID_FPREGS);
+	else
 		clear_thread_flag(TIF_HYBRID_FPREGS);
-		break;
-
-	case FP_DOUBLE_64A:
-		/* FR=1, FRE=1 */
+	if (regs32)
+		set_thread_flag(TIF_32BIT_FPREGS);
+	else
 		clear_thread_flag(TIF_32BIT_FPREGS);
-		set_thread_flag(TIF_HYBRID_FPREGS);
-		break;
+}
 
-	case MIPS_ABI_FP_64:
-	case MIPS_ABI_FP_64A:
-		/* FR=1, FRE=0 */
-		clear_thread_flag(TIF_32BIT_FPREGS);
-		clear_thread_flag(TIF_HYBRID_FPREGS);
+void mips_set_personality_fp(struct arch_elf_state *state)
+{
+	/*
+	 * This function is only ever called for O32 ELFs so we should
+	 * not be worried about N32/N64 binaries.
+	 */
+	switch (state->overall_fp_mode) {
+	case FP_FRE:
+		set_thread_fp_mode(1, 0);
 		break;
-
-	case MIPS_ABI_FP_XX:
-	case MIPS_ABI_FP_ANY:
-		if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
-			set_thread_flag(TIF_32BIT_FPREGS);
-		else
-			clear_thread_flag(TIF_32BIT_FPREGS);
-
-		clear_thread_flag(TIF_HYBRID_FPREGS);
+	case FP_FR0:
+		set_thread_fp_mode(0, 1);
+		break;
+	case FP_FR1:
+		set_thread_fp_mode(0, 0);
 		break;
-
 	default:
-	case FP_ERROR:
 		BUG();
 	}
 }
-- 
2.2.1

WARNING: multiple messages have this Message-ID (diff)
From: Markos Chandras <markos.chandras@imgtec.com>
To: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>,
	Matthew Fortune <Matthew.Fortune@imgtec.com>,
	Paul Burton <paul.burton@imgtec.com>
Subject: [PATCH RFC v2 68/70] MIPS: kernel: elf: Improve the overall ABI and FPU mode checks
Date: Fri, 16 Jan 2015 10:49:47 +0000	[thread overview]
Message-ID: <1421405389-15512-69-git-send-email-markos.chandras@imgtec.com> (raw)
Message-ID: <20150116104947.HD-BBmDCjQSVChrqNEfZqfqL-nyZ6nGoAJI9P1CsbZE@z> (raw)
In-Reply-To: <1421405389-15512-1-git-send-email-markos.chandras@imgtec.com>

The previous implementation did not cover all possible FPU combinations
and it silently allowed ABI incompatible objects to be loaded with the
wrong ABI. For example, the previous logic would set the FP_64 ABI as
the matching ABI for an FP_XX object combined with an FP_64A object.
This was wrong, and the matching ABI should have been FP_64A.
The previous logic is now replaced with a new one which determines
the appropriate FPU mode to be used rather than the FP ABI. This has
the advantage that the entire logic is much simpler since it is the FPU
mode we are interested in rather than the FP ABI resulting to code
simplifications.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
---
 arch/mips/include/asm/elf.h |  10 +-
 arch/mips/kernel/elf.c      | 284 ++++++++++++++++++++++++++------------------
 2 files changed, 177 insertions(+), 117 deletions(-)

diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index eb4d95de619c..ee5e6d250487 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -192,6 +192,8 @@ struct mips_elf_abiflags_v0 {
 	uint32_t flags2;
 };
 
+#define MIPS_ABI_FP_UNKNOWN	(-1)	/* Unknown FP ABI (kernel internal) */
+
 #define MIPS_ABI_FP_ANY		0	/* FP ABI doesn't matter */
 #define MIPS_ABI_FP_DOUBLE	1	/* -mdouble-float */
 #define MIPS_ABI_FP_SINGLE	2	/* -msingle-float */
@@ -417,13 +419,13 @@ extern unsigned long arch_randomize_brk(struct mm_struct *mm);
 struct arch_elf_state {
 	int fp_abi;
 	int interp_fp_abi;
-	int overall_abi;
+	int overall_fp_mode;
 };
 
 #define INIT_ARCH_ELF_STATE {			\
-	.fp_abi = -1,				\
-	.interp_fp_abi = -1,			\
-	.overall_abi = -1,			\
+	.fp_abi = MIPS_ABI_FP_UNKNOWN,		\
+	.interp_fp_abi = MIPS_ABI_FP_UNKNOWN,	\
+	.overall_fp_mode = -1,			\
 }
 
 extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c
index c92b15df6893..2ac33d2375ca 100644
--- a/arch/mips/kernel/elf.c
+++ b/arch/mips/kernel/elf.c
@@ -11,29 +11,102 @@
 #include <linux/elf.h>
 #include <linux/sched.h>
 
+/* FPU modes */
 enum {
-	FP_ERROR = -1,
-	FP_DOUBLE_64A = -2,
+	FP_FRE,
+	FP_FR0,
+	FP_FR1,
 };
 
+/**
+ * struct mode_req - ABI FPU mode requirements
+ * @single:	The program being loaded needs an FPU but it will only issue
+ *		single precision instructions meaning that it can execute in
+ *		either FR0 or FR1.
+ * @soft:	The soft(-float) requirement means that the program being
+ *		loaded needs has no FPU dependency at all (i.e. it has no
+ *		FPU instructions).
+ * @fr1:	The program being loaded depends on FPU being in FR=1 mode.
+ * @frdefault:	The program being loaded depends on the default FPU mode.
+ *		That is FR0 for O32 and FR1 for N32/N64.
+ * @fre:	The program being loaded depends on FPU with FRE=1. This mode is
+ *		a bridge which uses FR=1 whilst still being able to maintain
+ *		full compatibility with pre-existing code using the O32 FP32
+ *		ABI.
+ *
+ * More information about the FP ABIs can be found here:
+ *
+ * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up
+ *
+ */
+
+struct mode_req {
+	bool single;
+	bool soft;
+	bool fr1;
+	bool frdefault;
+	bool fre;
+};
+
+static const struct mode_req fpu_reqs[] = {
+	[MIPS_ABI_FP_ANY]    = { true,  true,  true,  true,  true  },
+	[MIPS_ABI_FP_DOUBLE] = { false, false, false, true,  true  },
+	[MIPS_ABI_FP_SINGLE] = { true,  false, false, false, false },
+	[MIPS_ABI_FP_SOFT]   = { false, true,  false, false, false },
+	[MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
+	[MIPS_ABI_FP_XX]     = { false, false, true,  true,  true  },
+	[MIPS_ABI_FP_64]     = { false, false, true,  false, false },
+	[MIPS_ABI_FP_64A]    = { false, false, true,  false, true  }
+};
+
+/*
+ * Mode requirements when .MIPS.abiflags is not present in the ELF.
+ * Not present means that everything is acceptable except FR1.
+ */
+static struct mode_req none_req = { true, true, false, true, true };
+
 int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
 		     bool is_interp, struct arch_elf_state *state)
 {
-	struct elfhdr *ehdr = _ehdr;
-	struct elf_phdr *phdr = _phdr;
+	struct elf32_hdr *ehdr32 = _ehdr;
+	struct elf32_phdr *phdr32 = _phdr;
+	struct elf64_phdr *phdr64 = _phdr;
 	struct mips_elf_abiflags_v0 abiflags;
 	int ret;
 
-	if (config_enabled(CONFIG_64BIT) &&
-	    (ehdr->e_ident[EI_CLASS] != ELFCLASS32))
-		return 0;
-	if (phdr->p_type != PT_MIPS_ABIFLAGS)
-		return 0;
-	if (phdr->p_filesz < sizeof(abiflags))
-		return -EINVAL;
+	/* Lets see if this is an O32 ELF */
+	if (ehdr32->e_ident[EI_CLASS] == ELFCLASS32) {
+		/* FR = 1 for N32 */
+		if (ehdr32->e_flags & EF_MIPS_ABI2)
+			state->overall_fp_mode = FP_FR1;
+		else
+			/* Set a good default FPU mode for O32*/
+			state->overall_fp_mode = cpu_has_mips_r6 ?
+				FP_FRE : FP_FR0;
+
+		if (phdr32->p_type != PT_MIPS_ABIFLAGS)
+			return 0;
+
+		if (phdr32->p_filesz < sizeof(abiflags))
+			return -EINVAL;
+
+		ret = kernel_read(elf, phdr32->p_offset,
+				  (char *)&abiflags,
+				  sizeof(abiflags));
+	} else {
+		/* FR=1 is really the only option for 64-bit */
+		state->overall_fp_mode = FP_FR1;
+
+		if (phdr64->p_type != PT_MIPS_ABIFLAGS)
+			return 0;
+		if (phdr64->p_filesz < sizeof(abiflags))
+			return -EINVAL;
+
+		ret = kernel_read(elf, phdr64->p_offset,
+				  (char *)&abiflags,
+				  sizeof(abiflags));
+	}
 
-	ret = kernel_read(elf, phdr->p_offset, (char *)&abiflags,
-			  sizeof(abiflags));
 	if (ret < 0)
 		return ret;
 	if (ret != sizeof(abiflags))
@@ -48,30 +121,26 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
 	return 0;
 }
 
-static inline unsigned get_fp_abi(struct elfhdr *ehdr, int in_abi)
+static inline unsigned get_fp_abi(struct elf32_hdr *ehdr, int in_abi)
 {
 	/* If the ABI requirement is provided, simply return that */
-	if (in_abi != -1)
+	if (in_abi != MIPS_ABI_FP_UNKNOWN)
 		return in_abi;
 
 	/* If the EF_MIPS_FP64 flag was set, return MIPS_ABI_FP_64 */
 	if (ehdr->e_flags & EF_MIPS_FP64)
-		return MIPS_ABI_FP_64;
+		return MIPS_ABI_FP_OLD_64;
 
-	/* Default to MIPS_ABI_FP_DOUBLE */
-	return MIPS_ABI_FP_DOUBLE;
+	/* Unknown ABI */
+	return MIPS_ABI_FP_UNKNOWN;
 }
 
 int arch_check_elf(void *_ehdr, bool has_interpreter,
 		   struct arch_elf_state *state)
 {
-	struct elfhdr *ehdr = _ehdr;
-	unsigned fp_abi, interp_fp_abi, abi0, abi1;
-
-	/* Ignore non-O32 binaries */
-	if (config_enabled(CONFIG_64BIT) &&
-	    (ehdr->e_ident[EI_CLASS] != ELFCLASS32))
-		return 0;
+	struct elf32_hdr *ehdr = _ehdr;
+	struct mode_req prog_req, interp_req;
+	unsigned fp_abi, interp_fp_abi, abi0, abi1, max_abi;
 
 	fp_abi = get_fp_abi(ehdr, state->fp_abi);
 
@@ -84,108 +153,97 @@ int arch_check_elf(void *_ehdr, bool has_interpreter,
 		abi0 = abi1 = fp_abi;
 	}
 
-	state->overall_abi = FP_ERROR;
-
-	if (abi0 == abi1) {
-		state->overall_abi = abi0;
-	} else if (abi0 == MIPS_ABI_FP_ANY) {
-		state->overall_abi = abi1;
-	} else if (abi0 == MIPS_ABI_FP_DOUBLE) {
-		switch (abi1) {
-		case MIPS_ABI_FP_XX:
-			state->overall_abi = MIPS_ABI_FP_DOUBLE;
-			break;
-
-		case MIPS_ABI_FP_64A:
-			state->overall_abi = FP_DOUBLE_64A;
-			break;
-		}
-	} else if (abi0 == MIPS_ABI_FP_SINGLE ||
-		   abi0 == MIPS_ABI_FP_SOFT) {
-		/* Cannot link with other ABIs */
-	} else if (abi0 == MIPS_ABI_FP_OLD_64) {
-		switch (abi1) {
-		case MIPS_ABI_FP_XX:
-		case MIPS_ABI_FP_64:
-		case MIPS_ABI_FP_64A:
-			state->overall_abi = MIPS_ABI_FP_64;
-			break;
-		}
-	} else if (abi0 == MIPS_ABI_FP_XX ||
-		   abi0 == MIPS_ABI_FP_64 ||
-		   abi0 == MIPS_ABI_FP_64A) {
-		state->overall_abi = MIPS_ABI_FP_64;
-	}
+	/* ABI limits. O32 = FP_64A, N32/N64 = FP_SOFT */
+	max_abi = ((ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
+		   (!(ehdr->e_flags & EF_MIPS_ABI2))) ?
+		MIPS_ABI_FP_64A : MIPS_ABI_FP_SOFT;
 
-	switch (state->overall_abi) {
-	case MIPS_ABI_FP_64:
-	case MIPS_ABI_FP_64A:
-	case FP_DOUBLE_64A:
-		if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
-			return -ELIBBAD;
-		break;
+	if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
+	    (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
+		return -ELIBBAD;
 
-	case FP_ERROR:
+	/* It's time to determine the FPU mode requirements */
+	prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0];
+	interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1];
+
+	/*
+	 * Check whether the program's and interp's ABIs have a matching FPU
+	 * mode requirement.
+	 */
+	prog_req.single = interp_req.single && prog_req.single;
+	prog_req.soft = interp_req.soft && prog_req.soft;
+	prog_req.fr1 = interp_req.fr1 && prog_req.fr1;
+	prog_req.frdefault = interp_req.frdefault && prog_req.frdefault;
+	prog_req.fre = interp_req.fre && prog_req.fre;
+
+	/*
+	 * Determine the desired FPU mode
+	 *
+	 * Decision making:
+	 *
+	 * - We want FR_FRE if FR=1 and FR=0 are both false. This means
+	 *   that we don't have a single matching FR mode to satisfy
+	 *   the requirements so our only solution is to use the emulated
+	 *   mode
+	 * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or
+	 *   fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU
+	 *   instructions so we don't care about the mode. We will simply use
+	 *   the one preferred by the hardware. In fpxx case, that ABI can
+	 *   handle both FR=1 and FR=0, so, again, we simply choose the one
+	 *   preferred by the hardware. Next, if we only use single-precision
+	 *   FPU instructions, and the default ABI FPU mode is not good
+	 *   (ie single + any ABI combination), we set again the FPU mode to the
+	 *   one is preferred by the hardware.
+	 * - We want FP_FR1 if that's the only matching mode and the default one
+	 *   is not good.
+	 * - Return with -ELIBADD if we can't find a matching FPU mode.
+	 */
+	if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1)
+		state->overall_fp_mode = FP_FRE;
+	else if ((prog_req.fr1 && prog_req.frdefault) ||
+		 (prog_req.single && !prog_req.frdefault))
+		/* Make sure 64-bit MIPS III/IV will not pick FR1 */
+		state->overall_fp_mode = ((current_cpu_data.fpu_id & MIPS_FPIR_F64) &&
+					  (cpu_has_mips_r2 || cpu_has_mips_r6)) ?
+					  FP_FR1 : FP_FR0;
+	else if (prog_req.fr1)
+		state->overall_fp_mode = FP_FR1;
+	else  if (!prog_req.fre && !prog_req.frdefault &&
+		  !prog_req.fr1 && !prog_req.single && !prog_req.soft)
 		return -ELIBBAD;
-	}
 
 	return 0;
 }
 
-void mips_set_personality_fp(struct arch_elf_state *state)
+static inline void set_thread_fp_mode(int hybrid, int regs32)
 {
-	if (config_enabled(CONFIG_FP32XX_HYBRID_FPRS)) {
-		/*
-		 * Use hybrid FPRs for all code which can correctly execute
-		 * with that mode.
-		 */
-		switch (state->overall_abi) {
-		case MIPS_ABI_FP_DOUBLE:
-		case MIPS_ABI_FP_SINGLE:
-		case MIPS_ABI_FP_SOFT:
-		case MIPS_ABI_FP_XX:
-		case MIPS_ABI_FP_ANY:
-			/* FR=1, FRE=1 */
-			clear_thread_flag(TIF_32BIT_FPREGS);
-			set_thread_flag(TIF_HYBRID_FPREGS);
-			return;
-		}
-	}
-
-	switch (state->overall_abi) {
-	case MIPS_ABI_FP_DOUBLE:
-	case MIPS_ABI_FP_SINGLE:
-	case MIPS_ABI_FP_SOFT:
-		/* FR=0 */
-		set_thread_flag(TIF_32BIT_FPREGS);
+	if (hybrid)
+		set_thread_flag(TIF_HYBRID_FPREGS);
+	else
 		clear_thread_flag(TIF_HYBRID_FPREGS);
-		break;
-
-	case FP_DOUBLE_64A:
-		/* FR=1, FRE=1 */
+	if (regs32)
+		set_thread_flag(TIF_32BIT_FPREGS);
+	else
 		clear_thread_flag(TIF_32BIT_FPREGS);
-		set_thread_flag(TIF_HYBRID_FPREGS);
-		break;
+}
 
-	case MIPS_ABI_FP_64:
-	case MIPS_ABI_FP_64A:
-		/* FR=1, FRE=0 */
-		clear_thread_flag(TIF_32BIT_FPREGS);
-		clear_thread_flag(TIF_HYBRID_FPREGS);
+void mips_set_personality_fp(struct arch_elf_state *state)
+{
+	/*
+	 * This function is only ever called for O32 ELFs so we should
+	 * not be worried about N32/N64 binaries.
+	 */
+	switch (state->overall_fp_mode) {
+	case FP_FRE:
+		set_thread_fp_mode(1, 0);
 		break;
-
-	case MIPS_ABI_FP_XX:
-	case MIPS_ABI_FP_ANY:
-		if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
-			set_thread_flag(TIF_32BIT_FPREGS);
-		else
-			clear_thread_flag(TIF_32BIT_FPREGS);
-
-		clear_thread_flag(TIF_HYBRID_FPREGS);
+	case FP_FR0:
+		set_thread_fp_mode(0, 1);
+		break;
+	case FP_FR1:
+		set_thread_fp_mode(0, 0);
 		break;
-
 	default:
-	case FP_ERROR:
 		BUG();
 	}
 }
-- 
2.2.1

  parent reply	other threads:[~2015-01-16 11:11 UTC|newest]

Thread overview: 262+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-16 10:48 [PATCH RFC v2 00/70] Add MIPS R6 support Markos Chandras
2015-01-16 10:48 ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 01/70] MIPS: Add generic QEMU PRid and cpu type identifiers Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 02/70] MIPS: Add cases for CPU_QEMU_GENERIC Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 03/70] MIPS: Add MIPS generic QEMU probe support Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 04/70] MIPS: Add build support for the MIPS R6 ISA Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-19 23:56   ` Maciej W. Rozycki
2015-01-16 10:48 ` [PATCH RFC v2 05/70] MIPS: mm: uasm: Add signed 9-bit immediate related macros Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 11:29   ` Sergei Shtylyov
2015-01-19 12:35     ` Markos Chandras
2015-01-19 12:35       ` Markos Chandras
2015-01-19 12:45       ` Markos Chandras
2015-01-19 12:45         ` Markos Chandras
2015-01-19 12:50       ` Sergei Shtylyov
2015-01-16 10:48 ` [PATCH RFC v2 06/70] MIPS: mm: Add MIPS R6 instruction encodings Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 19:15   ` David Daney
2015-01-16 10:48 ` [PATCH RFC v2 07/70] MIPS: asm: asm: Add new macros to set ISA and arch asm annotations Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 08/70] MIPS: asm: module: define MODULE_PROC_FAMILY for MIPS R6 Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 09/70] MIPS: asm: stackframe: Do not preserve the HI/LO registers on " Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 10/70] MIPS: asm: asmmacro: Drop unused 'reg' argument on MIPSR2 Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-20  0:04   ` Maciej W. Rozycki
2015-01-20  9:49     ` Markos Chandras
2015-01-20  9:49       ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 11/70] MIPS: asm: asmmacro: Add MIPS R6 support to the simple EI/DI variants Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 12/70] MIPS: asm: asmmacro: Replace add instructions with "addui" Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-19 15:59   ` Maciej W. Rozycki
2015-01-19 16:39     ` Markos Chandras
2015-01-19 16:39       ` Markos Chandras
2015-01-19 19:07       ` Maciej W. Rozycki
2015-01-19 19:25         ` Maciej W. Rozycki
2015-01-20  9:52           ` Markos Chandras
2015-01-20  9:52             ` Markos Chandras
2015-01-20 14:33             ` Matthew Fortune
2015-01-16 10:48 ` [PATCH RFC v2 13/70] MIPS: Use generic checksum functions for MIPS R6 Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 14/70] MIPS: asm: cpu: Add MIPSR6 ISA definitions Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 15/70] MIPS: asm: hazards: Add MIPSR6 definitions Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 16/70] MIPS: asm: irqflags: Add MIPS R6 related definitions Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 17/70] MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 18/70] MIPS: asm: spram: Add MIPS R6 related definitions Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-20  0:13   ` Maciej W. Rozycki
2015-01-21 12:16     ` Markos Chandras
2015-01-21 12:16       ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 19/70] MIPS: Use the new "ZC" constraint for MIPS R6 Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-20  0:27   ` Maciej W. Rozycki
2015-01-20  9:11     ` Matthew Fortune
2015-01-20  9:35       ` Markos Chandras
2015-01-20 10:08         ` Matthew Fortune
2015-01-20 10:08           ` Matthew Fortune
2015-01-20 10:12           ` Markos Chandras
2015-01-20 14:37             ` Maciej W. Rozycki
2015-01-20 14:46               ` Maciej W. Rozycki
2015-01-21  9:06               ` Markos Chandras
2015-01-26 13:39   ` [PATCH] MIPS: asm: Rename GCC_OFF12_ASM to GCC_OFF_SMALL_ASM Markos Chandras
2015-01-26 13:39     ` Markos Chandras
2015-01-16 10:48 ` [PATCH RFC v2 20/70] MIPS: asm: cmpxchg: Update ISA constraints for MIPS R6 support Markos Chandras
2015-01-16 10:48   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 21/70] MIPS: asm: atomic: " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 22/70] MIPS: asm: bitops: " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 23/70] MIPS: asm: futex: Set the appropriate ISA level for MIPS R6 Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 24/70] MIPS: asm: spinlock: Replace sub instruction with addiu Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-20  1:04   ` Maciej W. Rozycki
2015-01-20 11:29     ` Markos Chandras
2015-01-20 11:29       ` Markos Chandras
2015-01-20 11:47       ` Matthew Fortune
2015-02-10 16:17         ` Maciej W. Rozycki
2015-01-20 17:17       ` David Daney
2015-01-20 22:20         ` Ralf Baechle
2015-01-21  0:58           ` Maciej W. Rozycki
2015-01-16 10:49 ` [PATCH RFC v2 25/70] MIPS: asm: local: Set the appropriate ISA level for MIPS R6 Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 26/70] MIPS: kernel: cpu-bugs64: Do not check R6 cores for existing 64-bit bugs Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-20  1:07   ` Maciej W. Rozycki
2015-01-16 10:49 ` [PATCH RFC v2 27/70] MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-20  1:22   ` Maciej W. Rozycki
2015-01-20  9:14     ` James Hogan
2015-01-20  9:14       ` James Hogan
2015-01-20 14:33       ` Maciej W. Rozycki
2015-01-21  9:34         ` Markos Chandras
2015-01-21  9:34           ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 28/70] MIPS: kernel: cpu-probe.c: Add support for MIPS R6 Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-20 23:32   ` Maciej W. Rozycki
2015-01-21 11:22     ` Markos Chandras
2015-01-21 11:22       ` Markos Chandras
2015-01-21 11:40     ` James Hogan
2015-01-21 11:40       ` James Hogan
2015-01-16 10:49 ` [PATCH RFC v2 29/70] MIPS: kernel: entry.S: Add MIPS R6 related definitions Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 30/70] MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-20 23:42   ` Maciej W. Rozycki
2015-01-21  9:25     ` Markos Chandras
2015-01-21  9:25       ` Markos Chandras
2015-01-22 14:08       ` Maciej W. Rozycki
2015-01-22 14:43         ` Markos Chandras
2015-01-22 14:43           ` Markos Chandras
2015-01-22 15:03           ` Markos Chandras
2015-01-22 15:03             ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 31/70] MIPS: kernel: traps: Add MIPS R6 related definitions Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-20 23:49   ` Maciej W. Rozycki
2015-01-16 10:49 ` [PATCH RFC v2 32/70] MIPS: kernel: r4k_switch: Add support for MIPS R6 Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 33/70] MIPS: kernel: r4k_fpu: " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 34/70] MIPS: kernel: genex: Set correct ISA level Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 35/70] MIPS: kernel: cps-vec: Replace addi with addiu Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-21  0:02   ` Maciej W. Rozycki
2015-01-16 10:49 ` [PATCH RFC v2 36/70] MIPS: kernel: unaligned: Add support for the MIPS R6 Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 37/70] MIPS: kernel: syscall: Set the appropriate ISA level for " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 38/70] MIPS: lib: memcpy: Add MIPS R6 support Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 39/70] MIPS: lib: memset: " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 40/70] MIPS: mm: page: " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-17 11:58   ` Sergei Shtylyov
2015-01-19 12:33     ` [PATCH RFC v3 " Markos Chandras
2015-01-19 12:33       ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 41/70] MIPS: mm: tlbex: Use cpu_has_mips_r2_exec_hazard for the EHB instruction Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-02-23 22:03   ` David Daney
2015-02-23 22:07     ` David Daney
2015-02-24  0:33     ` Maciej W. Rozycki
2015-02-24  0:53       ` David Daney
2015-01-16 10:49 ` [PATCH RFC v2 42/70] MIPS: mm: c-r4k: Set the correct ISA level Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 43/70] MIPS: mm: scache: Add secondary cache support for MIPS R6 cores Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 44/70] MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6 Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 45/70] MIPS: kernel: branch: Prevent BLTZL emulation for " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-21  1:59   ` Maciej W. Rozycki
2015-01-21  1:59     ` Maciej W. Rozycki
2015-01-21 10:43     ` Markos Chandras
2015-01-21 10:43       ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 46/70] MIPS: kernel: branch: Prevent BGEZL " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-02-03 11:57   ` Maciej W. Rozycki
2015-01-16 10:49 ` [PATCH RFC v2 47/70] MIPS: kernel: branch: Prevent BLTZAL " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 48/70] MIPS: kernel: branch: Prevent BGEZAL " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 49/70] MIPS: kernel: branch: Prevent BEQL " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 50/70] MIPS: kernel: branch: Prevent BNEL " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 51/70] MIPS: kernel: branch: Prevent BLEZL " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 52/70] MIPS: kernel: branch: Prevent BGTZL " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 53/70] MIPS: Emulate the BC1{EQ,NE}Z FPU instructions Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 54/70] MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 55/70] MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 56/70] MIPS: Emulate the new MIPS R6 branch compact (BC) instruction Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 57/70] MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-17 13:24   ` Sergei Shtylyov
2015-01-19  9:48     ` Markos Chandras
2015-01-19  9:48       ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 58/70] MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 59/70] MIPS: Emulate the new MIPS R6 BALC instruction Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 60/70] MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 61/70] MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 62/70] MIPS: Add LLB bit and related feature for the Config 5 CP0 register Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 63/70] MIPS: asm: mipsregs: Add support for the LLADDR register Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 64/70] MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6 Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 65/70] MIPS: Make use of the ERETNC instruction on " Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 66/70] MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as well Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 67/70] MIPS: kernel: process: Do not allow FR=0 on MIPS R6 Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 11:54   ` Matthew Fortune
2015-01-16 15:33     ` Markos Chandras
2015-01-29 23:13   ` Paul Burton
2015-01-29 23:13     ` Paul Burton
2015-01-30 10:18     ` Markos Chandras
2015-01-30 10:18       ` Markos Chandras
2015-01-16 10:49 ` Markos Chandras [this message]
2015-01-16 10:49   ` [PATCH RFC v2 68/70] MIPS: kernel: elf: Improve the overall ABI and FPU mode checks Markos Chandras
2015-01-16 12:28   ` Matthew Fortune
2015-01-19  9:29   ` Matthew Fortune
2015-01-19 12:17     ` Markos Chandras
2015-01-29 23:22       ` Paul Burton
2015-01-30 10:23         ` Markos Chandras
2015-02-03 12:41     ` Maciej W. Rozycki
2015-01-29 21:51   ` Matthew Fortune
2015-02-02 16:13     ` [PATCH v3] " Markos Chandras
2015-02-02 16:13       ` Markos Chandras
2015-02-24 13:17       ` Måns Rullgård
2015-02-24 13:17         ` Måns Rullgård
2015-02-24 13:52         ` Markos Chandras
2015-02-24 13:52           ` Markos Chandras
2015-02-24 14:06           ` Måns Rullgård
2015-02-24 14:06             ` Måns Rullgård
2015-02-24 14:26             ` Matthew Fortune
2015-02-26  8:59               ` Markos Chandras
2015-02-26  9:14                 ` Måns Rullgård
2015-02-26  9:14                   ` Måns Rullgård
2015-02-26  9:24                   ` Markos Chandras
2015-02-26  9:31                     ` Matthew Fortune
2015-02-26  9:44                       ` Markos Chandras
2015-02-26 10:31                         ` Måns Rullgård
2015-02-26 10:31                           ` Måns Rullgård
2015-02-26 11:11     ` [PATCH] MIPS: asm: elf: Set O32 default FPU flags Markos Chandras
2015-02-26 11:11       ` Markos Chandras
2015-02-26 11:21       ` Måns Rullgård
2015-02-26 11:21         ` Måns Rullgård
2015-02-27  1:28       ` Aaro Koskinen
2015-02-27  1:46         ` Måns Rullgård
2015-04-07 16:36       ` Maciej W. Rozycki
2015-04-12 23:21         ` Aaro Koskinen
2015-04-20 11:55           ` Maciej W. Rozycki
2015-02-03 12:40   ` [PATCH RFC v2 68/70] MIPS: kernel: elf: Improve the overall ABI and FPU mode checks Maciej W. Rozycki
2015-01-16 10:49 ` [PATCH RFC v2 69/70] MIPS: Malta: Add support for building MIPS R6 kernel Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-01-16 10:49 ` [PATCH RFC v2 70/70] MIPS: Add Malta QEMU 32R6 defconfig Markos Chandras
2015-01-16 10:49   ` Markos Chandras
2015-02-12 23:12 ` [PATCH RFC v2 00/70] Add MIPS R6 support David Daney
2015-02-12 23:12   ` David Daney

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