[PATCH 00/51] Remove the outstanding_lazy_request

[PATCH 00/51] Remove the outstanding_lazy_request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The driver tracks GPU work using request structures. Unfortunately, this
tracking is not currently explicit but is done by means of a catch-all request
that floats around in the background hoovering up work until it gets submitted.
This background request (ring->outstanding_lazy_request or OLR) is created at
the point of actually writing to the ring rather than when a particular piece of
GPU work is started. This scheme sort of hangs together but causes a number of
issues. It can mean that multiple pieces of independent work are lumped together
in the same request or that work is not officially submitted until much later
than it was created.

This patch series completely removes the OLR and explicitly tracks each piece of
work with it's own personal request structure from start to submission.

The patch set seems to fix the "'gem_ringfill --r render' + ctrl-c straight
after boot" issue logged as BZ:40112. I haven't done any analysis of that
particular issue but the descriptions I've seen appear to blame an inconsistent
or mangled OLR.

Note also that by the end of this series, a number of differences between the
legacy and execlist code paths have been removed. For example add_request() and
emit_request() now have the same signature thus could be merged back to a single
function pointer. Merging some of these together would also allow the removal of
a bunch of 'if(execlists)' tests where the difference is simply to call the
legacy function or the execlist one.

[Patches against drm-intel-nightly tree fetched 03/02/2015]

John Harrison (51):
  drm/i915: Rename 'flags' to 'dispatch_flags' for better code reading
  drm/i915: Add missing trace point to LRC execbuff code path
  drm/i915: Cache ringbuf pointer in request structure
  drm/i915: Merged the many do_execbuf() parameters into a structure
  drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()
  drm/i915: Wrap request allocation with a function pointer
  drm/i915: Early alloc request in execbuff
  drm/i915: Update alloc_request to return the allocated request
  drm/i915: Add request to execbuf params and add explicit cleanup
  drm/i915: Update the dispatch tracepoint to use params->request
  drm/i915: Update move_to_gpu() to take a request structure
  drm/i915: Update execbuffer_move_to_active() to take a request structure
  drm/i915: Add flag to i915_add_request() to skip the cache flush
  drm/i915: Update pin_to_display_plane() to do explicit request management
  drm/i915: Update i915_gem_object_sync() to take a request structure
  drm/i915: Update i915_gpu_idle() to manage its own request
  drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring
  drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()
  drm/i915: Add explicit request management to i915_gem_init_hw()
  drm/i915: Update ppgtt_init_ring() & context_enable() to take requests
  drm/i915: Set context in request from creation even in legacy mode
  drm/i915: Update i915_switch_context() to take a request structure
  drm/i915: Update do_switch() to take a request structure
  drm/i915: Update deferred context creation to do explicit request management
  drm/i915: Update init_context() to take a request structure
  drm/i915: Update render_state_init() to take a request structure
  drm/i915: Update overlay code to do explicit request management
  drm/i915: Update queue_flip() to do explicit request management
  drm/i915: Update add_request() to take a request structure
  drm/i915: Update [vma|object]_move_to_active() to take request structures
  drm/i915: Update l3_remap to take a request structure
  drm/i915: Update mi_set_context() to take a request structure
  drm/i915: Update a bunch of execbuffer heplers to take request structures
  drm/i915: Update workarounds_emit() to take request structures
  drm/i915: Update flush_all_caches() to take request structures
  drm/i915: Update switch_mm() to take a request structure
  drm/i915: Update ring->flush() to take a requests structure
  drm/i915: Update some flush helpers to take request structures
  drm/i915: Update ring->emit_flush() to take a request structure
  drm/i915: Update ring->add_request() to take a request structure
  drm/i915: Update ring->emit_request() to take a request structure
  drm/i915: Update ring->dispatch_execbuffer() to take a request structure
  drm/i915: Update ring->emit_bb_start() to take a request structure
  drm/i915: Update ring->sync_to() to take a request structure
  drm/i915: Update ring->signal() to take a request structure
  drm/i915: Update cacheline_align() to take a request structure
  drm/i915: Update ironlake_enable_rc6() to do explicit request management
  drm/i915: Update intel_ring_begin() to take a request structure
  drm/i915: Update intel_logical_ring_begin() to take a request structure
  drm/i915: Remove the now obsolete intel_ring_get_request()
  drm/i915: Remove the now obsolete 'outstanding_lazy_request'

 drivers/gpu/drm/i915/i915_drv.h              |   68 +++---
 drivers/gpu/drm/i915/i915_gem.c              |  207 +++++++++++--------
 drivers/gpu/drm/i915/i915_gem_context.c      |   76 +++----
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |  138 ++++++++-----
 drivers/gpu/drm/i915/i915_gem_gtt.c          |   55 ++---
 drivers/gpu/drm/i915/i915_gem_gtt.h          |    3 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |   16 +-
 drivers/gpu/drm/i915/i915_gem_render_state.h |    2 +-
 drivers/gpu/drm/i915/intel_display.c         |   61 +++---
 drivers/gpu/drm/i915/intel_lrc.c             |  186 +++++++++--------
 drivers/gpu/drm/i915/intel_lrc.h             |   20 +-
 drivers/gpu/drm/i915/intel_overlay.c         |   64 ++++--
 drivers/gpu/drm/i915/intel_pm.c              |   33 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.c      |  287 ++++++++++++++------------
 drivers/gpu/drm/i915/intel_ringbuffer.h      |   51 ++---
 15 files changed, 697 insertions(+), 570 deletions(-)

-- 
1.7.9.5

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[PATCH 01/51] drm/i915: Rename 'flags' to 'dispatch_flags' for better code reading

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

There is a flags word that is passed through the execbuffer code path all the
way from initial decoding of the user parameters down to the very final dispatch
buffer call. It is simply called 'flags'. Unfortuantely, there are many other
flags words floating around in the same blocks of code. Even more once the GPU
scheduler arrives.

This patch makes it more obvious exactly which flags word is which by renaming
'flags' to 'dispatch_flags'. Note that the bit definitions for this flags word
already have an 'I915_DISPATCH_' prefix on them and so are not quite so
ambiguous.

For: VIZ-1587
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   25 ++++++++++----------
 drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++----
 drivers/gpu/drm/i915/intel_lrc.h           |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   35 ++++++++++++++++------------
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ++--
 5 files changed, 41 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index b773368..ec9ea45 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1138,7 +1138,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 			       struct drm_i915_gem_execbuffer2 *args,
 			       struct list_head *vmas,
 			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 flags)
+			       u64 exec_start, u32 dispatch_flags)
 {
 	struct drm_clip_rect *cliprects = NULL;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1266,19 +1266,19 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 
 			ret = ring->dispatch_execbuffer(ring,
 							exec_start, exec_len,
-							flags);
+							dispatch_flags);
 			if (ret)
 				goto error;
 		}
 	} else {
 		ret = ring->dispatch_execbuffer(ring,
 						exec_start, exec_len,
-						flags);
+						dispatch_flags);
 		if (ret)
 			return ret;
 	}
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
@@ -1353,7 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct i915_address_space *vm;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u64 exec_start = args->batch_start_offset;
-	u32 flags;
+	u32 dispatch_flags;
 	int ret;
 	bool need_relocs;
 
@@ -1364,15 +1364,15 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	if (ret)
 		return ret;
 
-	flags = 0;
+	dispatch_flags = 0;
 	if (args->flags & I915_EXEC_SECURE) {
 		if (!file->is_master || !capable(CAP_SYS_ADMIN))
 		    return -EPERM;
 
-		flags |= I915_DISPATCH_SECURE;
+		dispatch_flags |= I915_DISPATCH_SECURE;
 	}
 	if (args->flags & I915_EXEC_IS_PINNED)
-		flags |= I915_DISPATCH_PINNED;
+		dispatch_flags |= I915_DISPATCH_PINNED;
 
 	if ((args->flags & I915_EXEC_RING_MASK) > LAST_USER_RING) {
 		DRM_DEBUG("execbuf with unknown ring: %d\n",
@@ -1495,7 +1495,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 						      args->batch_start_offset,
 						      args->batch_len,
 						      file->is_master,
-						      &flags);
+						      &dispatch_flags);
 		if (IS_ERR(batch_obj)) {
 			ret = PTR_ERR(batch_obj);
 			goto err;
@@ -1507,7 +1507,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
 	 * batch" bit. Hence we need to pin secure batches into the global gtt.
 	 * hsw should have this fixed, but bdw mucks it up again. */
-	if (flags & I915_DISPATCH_SECURE) {
+	if (dispatch_flags & I915_DISPATCH_SECURE) {
 		/*
 		 * So on first glance it looks freaky that we pin the batch here
 		 * outside of the reservation loop. But:
@@ -1527,7 +1527,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		exec_start += i915_gem_obj_offset(batch_obj, vm);
 
 	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
-				      &eb->vmas, batch_obj, exec_start, flags);
+				      &eb->vmas, batch_obj, exec_start,
+				      dispatch_flags);
 
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
@@ -1535,7 +1536,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	 * needs to be adjusted to also track the ggtt batch vma properly as
 	 * active.
 	 */
-	if (flags & I915_DISPATCH_SECURE)
+	if (dispatch_flags & I915_DISPATCH_SECURE)
 		i915_gem_object_ggtt_unpin(batch_obj);
 err:
 	/* the request owns the ref now */
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index a94346f..0376285 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -611,7 +611,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
  * @vmas: list of vmas.
  * @batch_obj: the batchbuffer to submit.
  * @exec_start: batchbuffer start virtual address pointer.
- * @flags: translated execbuffer call flags.
+ * @dispatch_flags: translated execbuffer call flags.
  *
  * This is the evil twin version of i915_gem_ringbuffer_submission. It abstracts
  * away the submission details of the execbuffer ioctl call.
@@ -624,7 +624,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 			       struct drm_i915_gem_execbuffer2 *args,
 			       struct list_head *vmas,
 			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 flags)
+			       u64 exec_start, u32 dispatch_flags)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
@@ -697,7 +697,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		dev_priv->relative_constants_mode = instp_mode;
 	}
 
-	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags);
+	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
 	if (ret)
 		return ret;
 
@@ -1142,9 +1142,9 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring)
 
 static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
 			      struct intel_context *ctx,
-			      u64 offset, unsigned flags)
+			      u64 offset, unsigned dispatch_flags)
 {
-	bool ppgtt = !(flags & I915_DISPATCH_SECURE);
+	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
 	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 6f2d7da..3093836 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -86,7 +86,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 			       struct drm_i915_gem_execbuffer2 *args,
 			       struct list_head *vmas,
 			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 flags);
+			       u64 exec_start, u32 dispatch_flags);
 u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
 
 void intel_lrc_irq_handler(struct intel_engine_cs *ring);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0bd3976..d611608 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1611,7 +1611,7 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
 static int
 i965_dispatch_execbuffer(struct intel_engine_cs *ring,
 			 u64 offset, u32 length,
-			 unsigned flags)
+			 unsigned dispatch_flags)
 {
 	int ret;
 
@@ -1622,7 +1622,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
 	intel_ring_emit(ring,
 			MI_BATCH_BUFFER_START |
 			MI_BATCH_GTT |
-			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
+			(dispatch_flags & I915_DISPATCH_SECURE ?
+			 0 : MI_BATCH_NON_SECURE_I965));
 	intel_ring_emit(ring, offset);
 	intel_ring_advance(ring);
 
@@ -1635,8 +1636,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
 #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
 static int
 i830_dispatch_execbuffer(struct intel_engine_cs *ring,
-				u64 offset, u32 len,
-				unsigned flags)
+			 u64 offset, u32 len,
+			 unsigned dispatch_flags)
 {
 	u32 cs_offset = ring->scratch.gtt_offset;
 	int ret;
@@ -1654,7 +1655,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
 
-	if ((flags & I915_DISPATCH_PINNED) == 0) {
+	if ((dispatch_flags & I915_DISPATCH_PINNED) == 0) {
 		if (len > I830_BATCH_LIMIT)
 			return -ENOSPC;
 
@@ -1686,7 +1687,8 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
 		return ret;
 
 	intel_ring_emit(ring, MI_BATCH_BUFFER);
-	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
+	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
+					0 : MI_BATCH_NON_SECURE));
 	intel_ring_emit(ring, offset + len - 8);
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
@@ -1697,7 +1699,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
 static int
 i915_dispatch_execbuffer(struct intel_engine_cs *ring,
 			 u64 offset, u32 len,
-			 unsigned flags)
+			 unsigned dispatch_flags)
 {
 	int ret;
 
@@ -1706,7 +1708,8 @@ i915_dispatch_execbuffer(struct intel_engine_cs *ring,
 		return ret;
 
 	intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT);
-	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
+	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
+					0 : MI_BATCH_NON_SECURE));
 	intel_ring_advance(ring);
 
 	return 0;
@@ -2265,9 +2268,10 @@ static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
 static int
 gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 			      u64 offset, u32 len,
-			      unsigned flags)
+			      unsigned dispatch_flags)
 {
-	bool ppgtt = USES_PPGTT(ring->dev) && !(flags & I915_DISPATCH_SECURE);
+	bool ppgtt = USES_PPGTT(ring->dev) &&
+			!(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
 	ret = intel_ring_begin(ring, 4);
@@ -2286,8 +2290,8 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 
 static int
 hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
-			      u64 offset, u32 len,
-			      unsigned flags)
+			     u64 offset, u32 len,
+			     unsigned dispatch_flags)
 {
 	int ret;
 
@@ -2297,7 +2301,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 
 	intel_ring_emit(ring,
 			MI_BATCH_BUFFER_START |
-			(flags & I915_DISPATCH_SECURE ?
+			(dispatch_flags & I915_DISPATCH_SECURE ?
 			 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW));
 	/* bit0-7 is the length on GEN6+ */
 	intel_ring_emit(ring, offset);
@@ -2309,7 +2313,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 static int
 gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 			      u64 offset, u32 len,
-			      unsigned flags)
+			      unsigned dispatch_flags)
 {
 	int ret;
 
@@ -2319,7 +2323,8 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 
 	intel_ring_emit(ring,
 			MI_BATCH_BUFFER_START |
-			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
+			(dispatch_flags & I915_DISPATCH_SECURE ?
+			 0 : MI_BATCH_NON_SECURE_I965));
 	/* bit0-7 is the length on GEN6+ */
 	intel_ring_emit(ring, offset);
 	intel_ring_advance(ring);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 714f3fd..26e5774 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -164,7 +164,7 @@ struct  intel_engine_cs {
 				     u32 seqno);
 	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
 					       u64 offset, u32 length,
-					       unsigned flags);
+					       unsigned dispatch_flags);
 #define I915_DISPATCH_SECURE 0x1
 #define I915_DISPATCH_PINNED 0x2
 	void		(*cleanup)(struct intel_engine_cs *ring);
@@ -242,7 +242,7 @@ struct  intel_engine_cs {
 				      u32 flush_domains);
 	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
 					 struct intel_context *ctx,
-					 u64 offset, unsigned flags);
+					 u64 offset, unsigned dispatch_flags);
 
 	/**
 	 * List of objects currently involved in rendering from the
-- 
1.7.9.5

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[PATCH 02/51] drm/i915: Add missing trace point to LRC execbuff code path

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

There is a trace point in the legacy execbuffer execution path that is missing
from the execlist path. Trace points are extremely useful for debugging and are
used by various automated validation tests. Hence, this patch adds the missing
trace point back in.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0376285..73c1861 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -701,6 +701,8 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 	if (ret)
 		return ret;
 
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
 
-- 
1.7.9.5

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[PATCH 03/51] drm/i915: Cache ringbuf pointer in request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In execlist mode, the ringbuf is a function of the ring and context whereas in
legacy mode, it is derived from the ring alone. Thus the calculation required to
determine the ringbuf pointer from the ring (and context) also needs to test
execlist mode or not. This is messy.

Further, the request structure holds a pointer to both the ring and the context
for which it was created. Thus, given a request, it is possible to derive the
ringbuf in either legacy or execlist mode. Hence it is necessary to pass just
the request in to all the low level functions rather than some combination of
request, ring, context and ringbuf. However, rather than recalculating it each
time, it is much simpler to just cache the ringbuf pointer in the request
structure itself.

Caching the pointer means the calculation is done one at request creation time
and all further code and simply read it directly from the request structure.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    3 ++-
 drivers/gpu/drm/i915/i915_gem.c         |   14 +-------------
 drivers/gpu/drm/i915/intel_lrc.c        |    6 ++++--
 drivers/gpu/drm/i915/intel_ringbuffer.c |    1 +
 4 files changed, 8 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f2a825e..e90b786 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2137,8 +2137,9 @@ struct drm_i915_gem_request {
 	/** Position in the ringbuffer of the end of the whole request */
 	u32 tail;
 
-	/** Context related to this request */
+	/** Context and ring buffer related to this request */
 	struct intel_context *ctx;
+	struct intel_ringbuffer *ringbuf;
 
 	/** Batch buffer related to this request if any */
 	struct drm_i915_gem_object *batch_obj;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c26d36c..2ebe914 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2758,7 +2758,6 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
 
 	while (!list_empty(&ring->request_list)) {
 		struct drm_i915_gem_request *request;
-		struct intel_ringbuffer *ringbuf;
 
 		request = list_first_entry(&ring->request_list,
 					   struct drm_i915_gem_request,
@@ -2769,23 +2768,12 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
 
 		trace_i915_gem_request_retire(request);
 
-		/* This is one of the few common intersection points
-		 * between legacy ringbuffer submission and execlists:
-		 * we need to tell them apart in order to find the correct
-		 * ringbuffer to which the request belongs to.
-		 */
-		if (i915.enable_execlists) {
-			struct intel_context *ctx = request->ctx;
-			ringbuf = ctx->engine[ring->id].ringbuf;
-		} else
-			ringbuf = ring->buffer;
-
 		/* We know the GPU must have read the request to have
 		 * sent us the seqno + interrupt, so use the position
 		 * of tail of the request to update the last known position
 		 * of the GPU head.
 		 */
-		ringbuf->last_retired_head = request->postfix;
+		request->ringbuf->last_retired_head = request->postfix;
 
 		i915_gem_free_request(request);
 	}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 73c1861..762136b 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -878,12 +878,14 @@ static int logical_ring_alloc_request(struct intel_engine_cs *ring,
 		return ret;
 	}
 
-	/* Hold a reference to the context this request belongs to
+	/*
+	 * Hold a reference to the context this request belongs to
 	 * (we will need it when the time comes to emit/retire the
-	 * request).
+	 * request). Likewise, the ringbuff is useful to keep track of.
 	 */
 	request->ctx = ctx;
 	i915_gem_context_reference(request->ctx);
+	request->ringbuf = ctx->engine[ring->id].ringbuf;
 
 	ring->outstanding_lazy_request = request;
 	return 0;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index d611608..ca9e7e6 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2100,6 +2100,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring)
 
 	kref_init(&request->ref);
 	request->ring = ring;
+	request->ringbuf = ring->buffer;
 	request->uniq = dev_private->request_uniq++;
 
 	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
-- 
1.7.9.5

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[PATCH 04/51] drm/i915: Merged the many do_execbuf() parameters into a structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The do_execbuf() function takes quite a few parameters. The actual set of
parameters is going to change with the conversion to passing requests around.
Further, it is due to grow massively with the arrival of the GPU scheduler.

This patch simplies the prototype by passing a parameter structure instead.
Changing the parameter set in the future is then simply a matter of
adding/removing items to the structure.

Note that the structure does not contain absolutely everything that is passed
in. This is because the intention is to use this structure more extensively
later in this patch series and more especially in the GPU scheduler that is
coming soon. The latter requires hanging on to the structure as the final
hardware submission can be delayed until long after the execbuf IOCTL has
returned to user land. Thus it is unsafe to put anything in the structure that
is local to the IOCTL call itself - such as the 'args' parameter. All entries
must be copies of data or pointers to structures that are reference counted in
someway and guaranteed to exist for the duration of the batch buffer's life.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |   27 +++++++-------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   56 ++++++++++++++++++----------
 drivers/gpu/drm/i915/intel_lrc.c           |   26 +++++++------
 drivers/gpu/drm/i915/intel_lrc.h           |    9 ++---
 4 files changed, 67 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e90b786..e6d616b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1640,6 +1640,16 @@ struct i915_workarounds {
 	u32 count;
 };
 
+struct i915_execbuffer_params {
+	struct drm_device               *dev;
+	struct drm_file                 *file;
+	uint32_t                        dispatch_flags;
+	uint32_t                        batch_obj_vm_offset;
+	struct intel_engine_cs          *ring;
+	struct drm_i915_gem_object      *batch_obj;
+	struct intel_context            *ctx;
+};
+
 struct drm_i915_private {
 	struct drm_device *dev;
 	struct kmem_cache *slab;
@@ -1891,13 +1901,9 @@ struct drm_i915_private {
 
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
-		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
-				  struct intel_engine_cs *ring,
-				  struct intel_context *ctx,
+		int (*do_execbuf)(struct i915_execbuffer_params *params,
 				  struct drm_i915_gem_execbuffer2 *args,
-				  struct list_head *vmas,
-				  struct drm_i915_gem_object *batch_obj,
-				  u64 exec_start, u32 flags);
+				  struct list_head *vmas);
 		int (*init_rings)(struct drm_device *dev);
 		void (*cleanup_ring)(struct intel_engine_cs *ring);
 		void (*stop_ring)(struct intel_engine_cs *ring);
@@ -2622,14 +2628,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 					 struct drm_file *file,
 					 struct intel_engine_cs *ring,
 					 struct drm_i915_gem_object *obj);
-int i915_gem_ringbuffer_submission(struct drm_device *dev,
-				   struct drm_file *file,
-				   struct intel_engine_cs *ring,
-				   struct intel_context *ctx,
+int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
-				   struct list_head *vmas,
-				   struct drm_i915_gem_object *batch_obj,
-				   u64 exec_start, u32 flags);
+				   struct list_head *vmas);
 int i915_gem_execbuffer(struct drm_device *dev, void *data,
 			struct drm_file *file_priv);
 int i915_gem_execbuffer2(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index ec9ea45..93b0ef0 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1132,17 +1132,15 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *ring,
 }
 
 int
-i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags)
+			       struct list_head *vmas)
 {
 	struct drm_clip_rect *cliprects = NULL;
+	struct drm_device *dev = params->dev;
+	struct intel_engine_cs *ring = params->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u64 exec_len;
+	u64 exec_start, exec_len;
 	int instp_mode;
 	u32 instp_mask;
 	int i, ret = 0;
@@ -1194,7 +1192,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 	if (ret)
 		goto error;
 
-	ret = i915_switch_context(ring, ctx);
+	ret = i915_switch_context(ring, params->ctx);
 	if (ret)
 		goto error;
 
@@ -1251,12 +1249,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 	}
 
 	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
-		ret = i915_reset_gen7_sol_offsets(dev, ring);
+		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
 		if (ret)
 			goto error;
 	}
 
-	exec_len = args->batch_len;
+	exec_len   = args->batch_len;
+	exec_start = params->batch_obj_vm_offset +
+		     args->batch_start_offset;
+
 	if (cliprects) {
 		for (i = 0; i < args->num_cliprects; i++) {
 			ret = i915_emit_box(ring, &cliprects[i],
@@ -1266,22 +1267,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 
 			ret = ring->dispatch_execbuffer(ring,
 							exec_start, exec_len,
-							dispatch_flags);
+							params->dispatch_flags);
 			if (ret)
 				goto error;
 		}
 	} else {
 		ret = ring->dispatch_execbuffer(ring,
 						exec_start, exec_len,
-						dispatch_flags);
+						params->dispatch_flags);
 		if (ret)
 			return ret;
 	}
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
+					    params->batch_obj);
 
 error:
 	kfree(cliprects);
@@ -1351,8 +1353,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct intel_engine_cs *ring;
 	struct intel_context *ctx;
 	struct i915_address_space *vm;
+	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
+	struct i915_execbuffer_params *params = &params_master;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
-	u64 exec_start = args->batch_start_offset;
 	u32 dispatch_flags;
 	int ret;
 	bool need_relocs;
@@ -1445,6 +1448,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	else
 		vm = &dev_priv->gtt.base;
 
+	memset(&params_master, 0x00, sizeof(params_master));
+
 	eb = eb_create(args);
 	if (eb == NULL) {
 		i915_gem_context_unreference(ctx);
@@ -1522,13 +1527,24 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		if (ret)
 			goto err;
 
-		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
+		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
 	} else
-		exec_start += i915_gem_obj_offset(batch_obj, vm);
+		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
-	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
-				      &eb->vmas, batch_obj, exec_start,
-				      dispatch_flags);
+	/*
+	 * Save assorted stuff away to pass through to *_submission().
+	 * NB: This data should be 'persistent' and not local as it will
+	 * kept around beyond the duration of the IOCTL once the GPU
+	 * scheduler arrives.
+	 */
+	params->dev                     = dev;
+	params->file                    = file;
+	params->ring                    = ring;
+	params->dispatch_flags          = dispatch_flags;
+	params->batch_obj               = batch_obj;
+	params->ctx                     = ctx;
+
+	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
 
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 762136b..ca29290 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -618,16 +618,15 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
  *
  * Return: non-zero if the submission fails.
  */
-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+int intel_execlists_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags)
+			       struct list_head *vmas)
 {
+	struct drm_device       *dev = params->dev;
+	struct intel_engine_cs  *ring = params->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
+	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
+	u64 exec_start;
 	int instp_mode;
 	u32 instp_mask;
 	int ret;
@@ -678,13 +677,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		return -EINVAL;
 	}
 
-	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
+	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
 	if (ret)
 		return ret;
 
 	if (ring == &dev_priv->ring[RCS] &&
 	    instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
 		if (ret)
 			return ret;
 
@@ -697,14 +696,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		dev_priv->relative_constants_mode = instp_mode;
 	}
 
-	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
+	exec_start = params->batch_obj_vm_offset +
+		     args->batch_start_offset;
+
+	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 3093836..ae2f3ed 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -80,13 +80,10 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
 
 /* Execlists */
 int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+struct i915_execbuffer_params;
+int intel_execlists_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags);
+			       struct list_head *vmas);
 u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
 
 void intel_lrc_irq_handler(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

For some reason, the i915_add_request() call in
i915_gem_execbuffer_retire_commands() was explicitly having its return code
ignored. The _retire_commands() function itself was 'void'. Given that
_add_request() can fail without dispatching the batch buffer, this seems odd.

Also shrunk the parameter list to a single structure as everything it requires
is available in the execbuff_params object.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    5 +----
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   16 +++++++---------
 drivers/gpu/drm/i915/intel_lrc.c           |    3 +--
 3 files changed, 9 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e6d616b..143bc63 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2624,10 +2624,7 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
 			     struct drm_file *file_priv);
 void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 					struct intel_engine_cs *ring);
-void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
-					 struct drm_file *file,
-					 struct intel_engine_cs *ring,
-					 struct drm_i915_gem_object *obj);
+int i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
 int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
 				   struct list_head *vmas);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 93b0ef0..ca85803 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -989,17 +989,15 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 	}
 }
 
-void
-i915_gem_execbuffer_retire_commands(struct drm_device *dev,
-				    struct drm_file *file,
-				    struct intel_engine_cs *ring,
-				    struct drm_i915_gem_object *obj)
+int
+i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 {
 	/* Unconditionally force add_request to emit a full flush. */
-	ring->gpu_caches_dirty = true;
+	params->ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	(void)__i915_add_request(ring, file, obj);
+	return __i915_add_request(params->ring, params->file,
+				  params->batch_obj);
 }
 
 static int
@@ -1282,8 +1280,8 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
-					    params->batch_obj);
+
+	ret = i915_gem_execbuffer_retire_commands(params);
 
 error:
 	kfree(cliprects);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ca29290..90400d0d 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -706,9 +706,8 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
 
-	return 0;
+	return i915_gem_execbuffer_retire_commands(params);
 }
 
 void intel_execlists_retire_requests(struct intel_engine_cs *ring)
-- 
1.7.9.5

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[PATCH 06/51] drm/i915: Wrap request allocation with a function pointer

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In order to explicitly manage requests from creation to submission, it is
necessary to be able to explicitly create them in the first place. This patch
adds an indirection wrapper to the request creation function so that it can be
called from generic code without having to worry about execlist vs legacy mode.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 ++
 drivers/gpu/drm/i915/i915_gem.c         |    2 ++
 drivers/gpu/drm/i915/intel_lrc.c        |    6 +++---
 drivers/gpu/drm/i915/intel_lrc.h        |    2 ++
 drivers/gpu/drm/i915/intel_ringbuffer.c |    6 +++---
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 ++
 6 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 143bc63..7959dfa 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1901,6 +1901,8 @@ struct drm_i915_private {
 
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
+		int (*alloc_request)(struct intel_engine_cs *ring,
+				     struct intel_context *ctx);
 		int (*do_execbuf)(struct i915_execbuffer_params *params,
 				  struct drm_i915_gem_execbuffer2 *args,
 				  struct list_head *vmas);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 2ebe914..9546992 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4855,11 +4855,13 @@ int i915_gem_init(struct drm_device *dev)
 	}
 
 	if (!i915.enable_execlists) {
+		dev_priv->gt.alloc_request = intel_ring_alloc_request;
 		dev_priv->gt.do_execbuf = i915_gem_ringbuffer_submission;
 		dev_priv->gt.init_rings = i915_gem_init_rings;
 		dev_priv->gt.cleanup_ring = intel_cleanup_ring_buffer;
 		dev_priv->gt.stop_ring = intel_stop_ring_buffer;
 	} else {
+		dev_priv->gt.alloc_request = intel_logical_ring_alloc_request;
 		dev_priv->gt.do_execbuf = intel_execlists_submission;
 		dev_priv->gt.init_rings = intel_logical_rings_init;
 		dev_priv->gt.cleanup_ring = intel_logical_ring_cleanup;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 90400d0d..2f906a2 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -846,8 +846,8 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
 	}
 }
 
-static int logical_ring_alloc_request(struct intel_engine_cs *ring,
-				      struct intel_context *ctx)
+int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
+				     struct intel_context *ctx)
 {
 	struct drm_i915_gem_request *request;
 	struct drm_i915_private *dev_private = ring->dev->dev_private;
@@ -1056,7 +1056,7 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = logical_ring_alloc_request(ring, ctx);
+	ret = intel_logical_ring_alloc_request(ring, ctx);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index ae2f3ed..2b1bf83 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -34,6 +34,8 @@
 #define RING_CONTEXT_STATUS_PTR(ring)	((ring)->mmio_base+0x3a0)
 
 /* Logical Rings */
+int __must_check intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
+						  struct intel_context *ctx);
 void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index ca9e7e6..c80e20d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2084,8 +2084,8 @@ int intel_ring_idle(struct intel_engine_cs *ring)
 	return i915_wait_request(req);
 }
 
-static int
-intel_ring_alloc_request(struct intel_engine_cs *ring)
+int
+intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx)
 {
 	int ret;
 	struct drm_i915_gem_request *request;
@@ -2150,7 +2150,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = intel_ring_alloc_request(ring);
+	ret = intel_ring_alloc_request(ring, NULL);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 26e5774..74df0fc 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -392,6 +392,8 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
 int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
+int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
+					  struct intel_context *ctx);
 static inline void intel_ring_emit(struct intel_engine_cs *ring,
 				   u32 data)
 {
-- 
1.7.9.5

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[PATCH 07/51] drm/i915: Early alloc request in execbuff

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Start of explicit request management in the execbuffer code path. This patch
adds a call to allocate a request structure before all the actual hardware work
is done. Thus guaranteeing that all that work is tagged by a known request. At
present, nothing further is done with the request, the rest comes later in the
series.

The only noticable change is that failure to get a request (e.g. due to lack of
memory) will be caught earlier in the sequence. It now occurs right at the start
before any un-undoable work has been done.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index ca85803..61471e9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1356,7 +1356,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u32 dispatch_flags;
 	int ret;
-	bool need_relocs;
+	bool need_relocs, batch_pinned = false;
 
 	if (!i915_gem_check_execbuffer(args))
 		return -EINVAL;
@@ -1525,10 +1525,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		if (ret)
 			goto err;
 
+		batch_pinned = true;
 		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
 	} else
 		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
+	/* Allocate a request for this batch buffer nice and early. */
+	ret = dev_priv->gt.alloc_request(ring, ctx);
+	if (ret)
+		goto err;
+
 	/*
 	 * Save assorted stuff away to pass through to *_submission().
 	 * NB: This data should be 'persistent' and not local as it will
@@ -1544,15 +1550,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 
 	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
 
+err:
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
 	 * batch vma for correctness. For less ugly and less fragility this
 	 * needs to be adjusted to also track the ggtt batch vma properly as
 	 * active.
 	 */
-	if (dispatch_flags & I915_DISPATCH_SECURE)
+	if (batch_pinned)
 		i915_gem_object_ggtt_unpin(batch_obj);
-err:
+
 	/* the request owns the ref now */
 	i915_gem_context_unreference(ctx);
 	eb_destroy(eb);
-- 
1.7.9.5

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[PATCH 08/51] drm/i915: Update alloc_request to return the allocated request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The alloc_request() function does not actually return the newly allocated
request. Instead, it must be pulled from ring->outstanding_lazy_request. This
patch fixes this so that code can create a request and start using it knowing
exactly which request it actually owns.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
 drivers/gpu/drm/i915/intel_lrc.c           |   13 +++++++++----
 drivers/gpu/drm/i915/intel_lrc.h           |    3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   14 ++++++++++----
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    3 ++-
 6 files changed, 27 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7959dfa..92c183f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1902,7 +1902,8 @@ struct drm_i915_private {
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
 		int (*alloc_request)(struct intel_engine_cs *ring,
-				     struct intel_context *ctx);
+				     struct intel_context *ctx,
+				     struct drm_i915_gem_request **req_out);
 		int (*do_execbuf)(struct i915_execbuffer_params *params,
 				  struct drm_i915_gem_execbuffer2 *args,
 				  struct list_head *vmas);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 61471e9..37dcc6f 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1353,6 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct i915_address_space *vm;
 	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
 	struct i915_execbuffer_params *params = &params_master;
+	struct drm_i915_gem_request *request;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u32 dispatch_flags;
 	int ret;
@@ -1531,7 +1532,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
 	/* Allocate a request for this batch buffer nice and early. */
-	ret = dev_priv->gt.alloc_request(ring, ctx);
+	ret = dev_priv->gt.alloc_request(ring, ctx, &request);
 	if (ret)
 		goto err;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 2f906a2..325ef2c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -847,13 +847,17 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
 }
 
 int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
-				     struct intel_context *ctx)
+				     struct intel_context *ctx,
+				     struct drm_i915_gem_request **req_out)
 {
 	struct drm_i915_gem_request *request;
 	struct drm_i915_private *dev_private = ring->dev->dev_private;
 	int ret;
 
-	if (ring->outstanding_lazy_request)
+	if (!req_out)
+		return -EINVAL;
+
+	if ((*req_out = ring->outstanding_lazy_request) != NULL)
 		return 0;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
@@ -888,7 +892,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
 	i915_gem_context_reference(request->ctx);
 	request->ringbuf = ctx->engine[ring->id].ringbuf;
 
-	ring->outstanding_lazy_request = request;
+	*req_out = ring->outstanding_lazy_request = request;
 	return 0;
 }
 
@@ -1041,6 +1045,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
 int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 			     struct intel_context *ctx, int num_dwords)
 {
+	struct drm_i915_gem_request *req;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1056,7 +1061,7 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = intel_logical_ring_alloc_request(ring, ctx);
+	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 2b1bf83..b4620b9 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -35,7 +35,8 @@
 
 /* Logical Rings */
 int __must_check intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
-						  struct intel_context *ctx);
+						  struct intel_context *ctx,
+						  struct drm_i915_gem_request **req_out);
 void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index c80e20d..40b5d83 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2085,13 +2085,18 @@ int intel_ring_idle(struct intel_engine_cs *ring)
 }
 
 int
-intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx)
+intel_ring_alloc_request(struct intel_engine_cs *ring,
+			 struct intel_context *ctx,
+			 struct drm_i915_gem_request **req_out)
 {
 	int ret;
 	struct drm_i915_gem_request *request;
 	struct drm_i915_private *dev_private = ring->dev->dev_private;
 
-	if (ring->outstanding_lazy_request)
+	if (!req_out)
+		return -EINVAL;
+
+	if ((*req_out = ring->outstanding_lazy_request) != NULL)
 		return 0;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
@@ -2109,7 +2114,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx
 		return ret;
 	}
 
-	ring->outstanding_lazy_request = request;
+	*req_out = ring->outstanding_lazy_request = request;
 	return 0;
 }
 
@@ -2137,6 +2142,7 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring,
 int intel_ring_begin(struct intel_engine_cs *ring,
 		     int num_dwords)
 {
+	struct drm_i915_gem_request *req;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	int ret;
 
@@ -2150,7 +2156,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = intel_ring_alloc_request(ring, NULL);
+	ret = intel_ring_alloc_request(ring, NULL, &req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 74df0fc..fdeaa66 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -393,7 +393,8 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
 int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
 int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
-					  struct intel_context *ctx);
+					  struct intel_context *ctx,
+					  struct drm_i915_gem_request **req_out);
 static inline void intel_ring_emit(struct intel_engine_cs *ring,
 				   u32 data)
 {
-- 
1.7.9.5

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[PATCH 09/51] drm/i915: Add request to execbuf params and add explicit cleanup

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Rather than just having a local request variable in the execbuff code, the
request pointer is now stored in the execbuff params structure. Also added
explicit cleanup of the request (plus wiping the OLR to match) in the error
case. This means that the execbuff code is no longer dependent upon the OLR
keeping track of the request so as to not leak it when things do go wrong. Note
that in the success case, the i915_add_request() at the end of the submission
function will tidy up the request and clear the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    1 +
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 +++++++++++--
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 92c183f..df9b5d7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1648,6 +1648,7 @@ struct i915_execbuffer_params {
 	struct intel_engine_cs          *ring;
 	struct drm_i915_gem_object      *batch_obj;
 	struct intel_context            *ctx;
+	struct drm_i915_gem_request     *request;
 };
 
 struct drm_i915_private {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 37dcc6f..10462f6 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1353,7 +1353,6 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct i915_address_space *vm;
 	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
 	struct i915_execbuffer_params *params = &params_master;
-	struct drm_i915_gem_request *request;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u32 dispatch_flags;
 	int ret;
@@ -1532,7 +1531,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
 	/* Allocate a request for this batch buffer nice and early. */
-	ret = dev_priv->gt.alloc_request(ring, ctx, &request);
+	ret = dev_priv->gt.alloc_request(ring, ctx, &params->request);
 	if (ret)
 		goto err;
 
@@ -1565,6 +1564,16 @@ err:
 	i915_gem_context_unreference(ctx);
 	eb_destroy(eb);
 
+	/*
+	 * If the request was created but not successfully submitted then it
+	 * must be freed again. If it was submitted then it is being tracked
+	 * on the active request list and no clean up is required here.
+	 */
+	if (ret && params->request) {
+		i915_gem_request_unreference(params->request);
+		ring->outstanding_lazy_request = NULL;
+	}
+
 	mutex_unlock(&dev->struct_mutex);
 
 pre_mutex_err:
-- 
1.7.9.5

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[PATCH 10/51] drm/i915: Update the dispatch tracepoint to use params->request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated a couple of trace points to use the now cached request pointer rather
than extracting it from the ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 10462f6..883cabd 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1277,7 +1277,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			return ret;
 	}
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
+	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 325ef2c..2ab6922 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -703,7 +703,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
+	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 
-- 
1.7.9.5

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[PATCH 11/51] drm/i915: Update move_to_gpu() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the move_to_gpu() code paths.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   10 +++++-----
 drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++------
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 883cabd..da1e232 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -828,7 +828,7 @@ err:
 }
 
 static int
-i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
+i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
 				struct list_head *vmas)
 {
 	struct i915_vma *vma;
@@ -838,7 +838,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
 
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
-		ret = i915_gem_object_sync(obj, ring);
+		ret = i915_gem_object_sync(obj, req->ring);
 		if (ret)
 			return ret;
 
@@ -849,7 +849,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
 	}
 
 	if (flush_chipset)
-		i915_gem_chipset_flush(ring->dev);
+		i915_gem_chipset_flush(req->ring->dev);
 
 	if (flush_domains & I915_GEM_DOMAIN_GTT)
 		wmb();
@@ -857,7 +857,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return intel_ring_invalidate_all_caches(ring);
+	return intel_ring_invalidate_all_caches(req->ring);
 }
 
 static bool
@@ -1186,7 +1186,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 		}
 	}
 
-	ret = i915_gem_execbuffer_move_to_gpu(ring, vmas);
+	ret = i915_gem_execbuffer_move_to_gpu(params->request, vmas);
 	if (ret)
 		goto error;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 2ab6922..1dbf4b1 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -569,11 +569,9 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
-				 struct intel_context *ctx,
+static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 				 struct list_head *vmas)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
 	struct i915_vma *vma;
 	uint32_t flush_domains = 0;
 	bool flush_chipset = false;
@@ -582,7 +580,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
 
-		ret = i915_gem_object_sync(obj, ring);
+		ret = i915_gem_object_sync(obj, req->ring);
 		if (ret)
 			return ret;
 
@@ -598,7 +596,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return logical_ring_invalidate_all_caches(ringbuf, ctx);
+	return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx);
 }
 
 /**
@@ -677,7 +675,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 		return -EINVAL;
 	}
 
-	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
+	ret = execlists_move_to_gpu(params->request, vmas);
 	if (ret)
 		return ret;
 
-- 
1.7.9.5

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[PATCH 12/51] drm/i915: Update execbuffer_move_to_active() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the
execbuffer_move_to_active() code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    6 +++---
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index df9b5d7..21a2b35 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2627,7 +2627,7 @@ int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
 int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
 			     struct drm_file *file_priv);
 void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
-					struct intel_engine_cs *ring);
+					struct drm_i915_gem_request *req);
 int i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
 int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index da1e232..f7c19bc 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -950,9 +950,9 @@ i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
 
 void
 i915_gem_execbuffer_move_to_active(struct list_head *vmas,
-				   struct intel_engine_cs *ring)
+				   struct drm_i915_gem_request *req)
 {
-	struct drm_i915_gem_request *req = intel_ring_get_request(ring);
+	struct intel_engine_cs *ring = i915_gem_request_get_ring(req);
 	struct i915_vma *vma;
 
 	list_for_each_entry(vma, vmas, exec_list) {
@@ -1279,7 +1279,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
-	i915_gem_execbuffer_move_to_active(vmas, ring);
+	i915_gem_execbuffer_move_to_active(vmas, params->request);
 
 	ret = i915_gem_execbuffer_retire_commands(params);
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 1dbf4b1..450eed4 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -703,7 +703,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 
 	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
-	i915_gem_execbuffer_move_to_active(vmas, ring);
+	i915_gem_execbuffer_move_to_active(vmas, params->request);
 
 	return i915_gem_execbuffer_retire_commands(params);
 }
-- 
1.7.9.5

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[PATCH 13/51] drm/i915: Add flag to i915_add_request() to skip the cache flush

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In order to explcitly track all GPU work (and completely remove the outstanding
lazy request), it is necessary to add extra i915_add_request() calls to various
places. Some of these do not need the implicit cache flush done as part of the
standard batch buffer submission process.

This patch adds a flag to _add_request() to specify whether the flush is
required or not.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    7 +++++--
 drivers/gpu/drm/i915/i915_gem.c              |   25 +++++++++++--------------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    2 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
 5 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 21a2b35..5c87876 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2815,9 +2815,12 @@ int __must_check i915_gpu_idle(struct drm_device *dev);
 int __must_check i915_gem_suspend(struct drm_device *dev);
 int __i915_add_request(struct intel_engine_cs *ring,
 		       struct drm_file *file,
-		       struct drm_i915_gem_object *batch_obj);
+		       struct drm_i915_gem_object *batch_obj,
+		       bool flush_caches);
 #define i915_add_request(ring) \
-	__i915_add_request(ring, NULL, NULL)
+	__i915_add_request(ring, NULL, NULL, true)
+#define i915_add_request_no_flush(ring) \
+	__i915_add_request(ring, NULL, NULL, false)
 int __i915_wait_request(struct drm_i915_gem_request *req,
 			unsigned reset_counter,
 			bool interruptible,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9546992..96f9155 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2408,7 +2408,8 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
 
 int __i915_add_request(struct intel_engine_cs *ring,
 		       struct drm_file *file,
-		       struct drm_i915_gem_object *obj)
+		       struct drm_i915_gem_object *obj,
+		       bool flush_caches)
 {
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	struct drm_i915_gem_request *request;
@@ -2433,12 +2434,11 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	 * is that the flush _must_ happen before the next request, no matter
 	 * what.
 	 */
-	if (i915.enable_execlists) {
-		ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
-		if (ret)
-			return ret;
-	} else {
-		ret = intel_ring_flush_all_caches(ring);
+	if (flush_caches) {
+		if (i915.enable_execlists)
+			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
+		else
+			ret = intel_ring_flush_all_caches(ring);
 		if (ret)
 			return ret;
 	}
@@ -2450,15 +2450,12 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	 */
 	request->postfix = intel_ring_get_tail(ringbuf);
 
-	if (i915.enable_execlists) {
+	if (i915.enable_execlists)
 		ret = ring->emit_request(ringbuf, request);
-		if (ret)
-			return ret;
-	} else {
+	else
 		ret = ring->add_request(ring);
-		if (ret)
-			return ret;
-	}
+	if (ret)
+		return ret;
 
 	request->head = request_start;
 	request->tail = intel_ring_get_tail(ringbuf);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index f7c19bc..76f6dcf 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -997,7 +997,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 
 	/* Add a breadcrumb for the completion of the batch buffer */
 	return __i915_add_request(params->ring, params->file,
-				  params->batch_obj);
+				  params->batch_obj, true);
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 521548a..aba39c3 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -173,7 +173,7 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, NULL, so.obj);
+	ret = __i915_add_request(ring, NULL, so.obj, true);
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 450eed4..318500c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1612,7 +1612,7 @@ int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, file, so.obj);
+	ret = __i915_add_request(ring, file, so.obj, true);
 	/* intel_logical_ring_add_request moves object to inactive if it
 	 * fails */
 out:
-- 
1.7.9.5

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[PATCH 14/51] drm/i915: Update pin_to_display_plane() to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Added explicit creation creation and submission of the request structure to the
display object pinning code. This removes any reliance on the OLR keeping track
of the request and the unknown randomness that can ensue with other work
becoming part of the same request.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c |   21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 96f9155..ef561e5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3938,9 +3938,24 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
 	int ret;
 
 	if (pipelined != i915_gem_request_get_ring(obj->last_read_req)) {
-		ret = i915_gem_object_sync(obj, pipelined);
-		if (ret)
-			return ret;
+		if (!pipelined) {
+			ret = i915_gem_object_wait_rendering(obj, false);
+		} else {
+			struct drm_i915_private *dev_priv = pipelined->dev->dev_private;
+			struct drm_i915_gem_request *req;
+
+			ret = dev_priv->gt.alloc_request(pipelined, pipelined->default_context, &req);
+			if (ret)
+				return ret;
+
+			ret = i915_gem_object_sync(obj, req->ring);
+			if (ret)
+				return ret;
+
+			ret = i915_add_request_no_flush(req->ring);
+			if (ret)
+				return ret;
+		}
 	}
 
 	/* Mark the pin_display early so that we account for the
-- 
1.7.9.5

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[PATCH 15/51] drm/i915: Update i915_gem_object_sync() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the i915_gem_object_sync()
code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    2 +-
 drivers/gpu/drm/i915/i915_gem.c            |    7 ++++---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 4 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5c87876..1bfb8d3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2728,7 +2728,7 @@ static inline void i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
 
 int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
 int i915_gem_object_sync(struct drm_i915_gem_object *obj,
-			 struct intel_engine_cs *to);
+			 struct drm_i915_gem_request *to_req);
 void i915_vma_move_to_active(struct i915_vma *vma,
 			     struct intel_engine_cs *ring);
 int i915_gem_dumb_create(struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ef561e5..00a031b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2951,7 +2951,7 @@ out:
  * i915_gem_object_sync - sync an object to a ring.
  *
  * @obj: object which may be in use on another ring.
- * @to: ring we wish to use the object on. May be NULL.
+ * @to_req: request we wish to use the object for. May be NULL.
  *
  * This code is meant to abstract object synchronization with the GPU.
  * Calling with NULL implies synchronizing the object with the CPU
@@ -2961,8 +2961,9 @@ out:
  */
 int
 i915_gem_object_sync(struct drm_i915_gem_object *obj,
-		     struct intel_engine_cs *to)
+		     struct drm_i915_gem_request *to_req)
 {
+	struct intel_engine_cs *to = to_req ? to_req->ring : NULL;
 	struct intel_engine_cs *from;
 	u32 seqno;
 	int ret, idx;
@@ -3948,7 +3949,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
 			if (ret)
 				return ret;
 
-			ret = i915_gem_object_sync(obj, req->ring);
+			ret = i915_gem_object_sync(obj, req);
 			if (ret)
 				return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 76f6dcf..2cd0579 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -838,7 +838,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
 
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
-		ret = i915_gem_object_sync(obj, req->ring);
+		ret = i915_gem_object_sync(obj, req);
 		if (ret)
 			return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 318500c..cb12eea 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -580,7 +580,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
 
-		ret = i915_gem_object_sync(obj, req->ring);
+		ret = i915_gem_object_sync(obj, req);
 		if (ret)
 			return ret;
 
-- 
1.7.9.5

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[PATCH 16/51] drm/i915: Update i915_gpu_idle() to manage its own request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Added explicit request creation and submission to the GPU idle code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c |   18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 00a031b..8923ecd 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3109,11 +3109,27 @@ int i915_gpu_idle(struct drm_device *dev)
 	/* Flush everything onto the inactive list. */
 	for_each_ring(ring, dev_priv, i) {
 		if (!i915.enable_execlists) {
-			ret = i915_switch_context(ring, ring->default_context);
+			struct drm_i915_gem_request *req;
+
+			ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 			if (ret)
 				return ret;
+
+			ret = i915_switch_context(req->ring, ring->default_context);
+			if (ret) {
+				i915_gem_request_unreference(req);
+				return ret;
+			}
+
+			ret = i915_add_request_no_flush(req->ring);
+			if (ret) {
+				i915_gem_request_unreference(req);
+				return ret;
+			}
 		}
 
+		WARN_ON(ring->outstanding_lazy_request);
+
 		ret = intel_ring_idle(ring);
 		if (ret)
 			return ret;
-- 
1.7.9.5

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[PATCH 17/51] drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The i915_gem_init_hw() function calls a bunch of smaller initialisation
functions. Multiple of which have generic sections and per ring sections. This
means multiple passes are done over the rings. Each pass writes data to the ring
which floats around in that ring's OLR until some random point in the future
when an add_request() is done by some random other piece of code.

This patch breaks i915_ppgtt_init_hw() in two with the per ring initialisation
now being done in i915_ppgtt_init_ring(). The ring looping is now done at the
top level in i915_gem_init_hw().

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c     |   25 +++++++++++++++++++------
 drivers/gpu/drm/i915/i915_gem_gtt.c |   28 ++++++++++++++++------------
 drivers/gpu/drm/i915/i915_gem_gtt.h |    1 +
 3 files changed, 36 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8923ecd..e298119 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4839,19 +4839,32 @@ i915_gem_init_hw(struct drm_device *dev)
 	 */
 	init_unused_rings(dev);
 
+	ret = i915_ppgtt_init_hw(dev);
+	if (ret) {
+		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
+		return ret;
+	}
+
+	/* Need to do basic initialisation of all rings first: */
 	for_each_ring(ring, dev_priv, i) {
 		ret = ring->init_hw(ring);
 		if (ret)
 			return ret;
 	}
 
-	for (i = 0; i < NUM_L3_SLICES(dev); i++)
-		i915_gem_l3_remap(&dev_priv->ring[RCS], i);
+	/* Now it is safe to go back round and do everything else: */
+	for_each_ring(ring, dev_priv, i) {
+		if (ring->id == RCS) {
+			for (i = 0; i < NUM_L3_SLICES(dev); i++)
+				i915_gem_l3_remap(ring, i);
+		}
 
-	ret = i915_ppgtt_init_hw(dev);
-	if (ret && ret != -EIO) {
-		DRM_ERROR("PPGTT enable failed %d\n", ret);
-		i915_gem_cleanup_ringbuffer(dev);
+		ret = i915_ppgtt_init_ring(ring);
+		if (ret && ret != -EIO) {
+			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
+			i915_gem_cleanup_ringbuffer(dev);
+			return ret;
+		}
 	}
 
 	ret = i915_gem_context_enable(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 746f77f..1528e77 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1186,11 +1186,6 @@ int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
 
 int i915_ppgtt_init_hw(struct drm_device *dev)
 {
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_engine_cs *ring;
-	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
-	int i, ret = 0;
-
 	/* In the case of execlists, PPGTT is enabled by the context descriptor
 	 * and the PDPs are contained within the context itself.  We don't
 	 * need to do anything here. */
@@ -1209,16 +1204,25 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
 	else
 		MISSING_CASE(INTEL_INFO(dev)->gen);
 
-	if (ppgtt) {
-		for_each_ring(ring, dev_priv, i) {
-			ret = ppgtt->switch_mm(ppgtt, ring);
-			if (ret != 0)
-				return ret;
-		}
-	}
+	return 0;
+}
+
+int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
+{
+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
+	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
+	int ret = 0;
+
+	if (!ppgtt)
+		return 0;
+
+	ret = ppgtt->switch_mm(ppgtt, ring);
+	if (ret != 0)
+		return ret;
 
 	return ret;
 }
+
 struct i915_hw_ppgtt *
 i915_ppgtt_create(struct drm_device *dev, struct drm_i915_file_private *fpriv)
 {
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index e377c7d..78a107e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -300,6 +300,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
 
 int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
 int i915_ppgtt_init_hw(struct drm_device *dev);
+int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
 void i915_ppgtt_release(struct kref *kref);
 struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
 					struct drm_i915_file_private *fpriv);
-- 
1.7.9.5

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[PATCH 18/51] drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The start of day context initialisation code in i915_gem_context_enable() loops
over each ring and calls the legacy switch context or the execlist init context
code as appropriate.

This patch moves the ring looping out of that function in to the top level
caller i915_gem_init_hw(). This means the a single pass can be made over all
rings doing the PPGTT, L3 remap and context initialisation of each ring
altogether.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/i915_gem.c         |   18 ++++++++++-------
 drivers/gpu/drm/i915/i915_gem_context.c |   32 +++++++++++--------------------
 3 files changed, 23 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1bfb8d3..099a3ee 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2973,7 +2973,7 @@ int __must_check i915_gem_context_init(struct drm_device *dev);
 void i915_gem_context_fini(struct drm_device *dev);
 void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
-int i915_gem_context_enable(struct drm_i915_private *dev_priv);
+int i915_gem_context_enable(struct intel_engine_cs *ring);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
 int i915_switch_context(struct intel_engine_cs *ring,
 			struct intel_context *to);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e298119..1c711c0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4839,6 +4839,8 @@ i915_gem_init_hw(struct drm_device *dev)
 	 */
 	init_unused_rings(dev);
 
+	BUG_ON(!dev_priv->ring[RCS].default_context);
+
 	ret = i915_ppgtt_init_hw(dev);
 	if (ret) {
 		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
@@ -4854,6 +4856,8 @@ i915_gem_init_hw(struct drm_device *dev)
 
 	/* Now it is safe to go back round and do everything else: */
 	for_each_ring(ring, dev_priv, i) {
+		WARN_ON(!ring->default_context);
+
 		if (ring->id == RCS) {
 			for (i = 0; i < NUM_L3_SLICES(dev); i++)
 				i915_gem_l3_remap(ring, i);
@@ -4865,17 +4869,17 @@ i915_gem_init_hw(struct drm_device *dev)
 			i915_gem_cleanup_ringbuffer(dev);
 			return ret;
 		}
-	}
 
-	ret = i915_gem_context_enable(dev_priv);
-	if (ret && ret != -EIO) {
-		DRM_ERROR("Context enable failed %d\n", ret);
-		i915_gem_cleanup_ringbuffer(dev);
+		ret = i915_gem_context_enable(ring);
+		if (ret && ret != -EIO) {
+			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
+			i915_gem_cleanup_ringbuffer(dev);
 
-		return ret;
+			return ret;
+		}
 	}
 
-	return ret;
+	return 0;
 }
 
 int i915_gem_init(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 8603bf4..dd83d61 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -403,32 +403,22 @@ void i915_gem_context_fini(struct drm_device *dev)
 	i915_gem_context_unreference(dctx);
 }
 
-int i915_gem_context_enable(struct drm_i915_private *dev_priv)
+int i915_gem_context_enable(struct intel_engine_cs *ring)
 {
-	struct intel_engine_cs *ring;
-	int ret, i;
-
-	BUG_ON(!dev_priv->ring[RCS].default_context);
+	int ret;
 
 	if (i915.enable_execlists) {
-		for_each_ring(ring, dev_priv, i) {
-			if (ring->init_context) {
-				ret = ring->init_context(ring,
-						ring->default_context);
-				if (ret) {
-					DRM_ERROR("ring init context: %d\n",
-							ret);
-					return ret;
-				}
-			}
-		}
+		if (ring->init_context == NULL)
+			return 0;
 
+		ret = ring->init_context(ring, ring->default_context);
 	} else
-		for_each_ring(ring, dev_priv, i) {
-			ret = i915_switch_context(ring, ring->default_context);
-			if (ret)
-				return ret;
-		}
+		ret = i915_switch_context(ring, ring->default_context);
+
+	if (ret) {
+		DRM_ERROR("ring init context: %d\n", ret);
+		return ret;
+	}
 
 	return 0;
 }
-- 
1.7.9.5

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[PATCH 19/51] drm/i915: Add explicit request management to i915_gem_init_hw()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that a single per ring loop is being done for all the different
intialisation steps in i915_gem_init_hw(), it is possible to add proper request
management as well. The last remaining issue is that the context enable call
eventually ends up within *_render_state_init() and this does it's own private
_i915_add_request() call.

This patch adds explicit request creation and submission to the top level loop
and removes the add_request() from deep within the sub-functions. Note that the
old add_request() call was being passed a batch object. This is now explicitly
written to the request object instead. A warning has also been added to
i915_add_request() to ensure that there is never an attempt to add two batch
objects to a single request - e.g. because render_state_init() was called during
execbuffer processing.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    3 ++-
 drivers/gpu/drm/i915/i915_gem.c              |   18 ++++++++++++++++++
 drivers/gpu/drm/i915/i915_gem_gtt.c          |    7 +------
 drivers/gpu/drm/i915/i915_gem_render_state.c |    3 ++-
 drivers/gpu/drm/i915/intel_lrc.c             |    8 +++-----
 5 files changed, 26 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 099a3ee..2229238 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2151,7 +2151,8 @@ struct drm_i915_gem_request {
 	struct intel_context *ctx;
 	struct intel_ringbuffer *ringbuf;
 
-	/** Batch buffer related to this request if any */
+	/** Batch buffer related to this request if any (used for
+	    error state dump only) */
 	struct drm_i915_gem_object *batch_obj;
 
 	/** Time at which this request was emitted, in jiffies. */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 1c711c0..5f24ce1 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2466,6 +2466,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	 * inactive_list and lose its active reference. Hence we do not need
 	 * to explicitly hold another reference here.
 	 */
+	WARN_ON(request->batch_obj && obj);
 	request->batch_obj = obj;
 
 	if (!i915.enable_execlists) {
@@ -4856,8 +4857,16 @@ i915_gem_init_hw(struct drm_device *dev)
 
 	/* Now it is safe to go back round and do everything else: */
 	for_each_ring(ring, dev_priv, i) {
+		struct drm_i915_gem_request *req;
+
 		WARN_ON(!ring->default_context);
 
+		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
+		if (ret) {
+			i915_gem_cleanup_ringbuffer(dev);
+			return ret;
+		}
+
 		if (ring->id == RCS) {
 			for (i = 0; i < NUM_L3_SLICES(dev); i++)
 				i915_gem_l3_remap(ring, i);
@@ -4866,6 +4875,7 @@ i915_gem_init_hw(struct drm_device *dev)
 		ret = i915_ppgtt_init_ring(ring);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
+			i915_gem_request_unreference(req);
 			i915_gem_cleanup_ringbuffer(dev);
 			return ret;
 		}
@@ -4873,8 +4883,16 @@ i915_gem_init_hw(struct drm_device *dev)
 		ret = i915_gem_context_enable(ring);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
+			i915_gem_request_unreference(req);
 			i915_gem_cleanup_ringbuffer(dev);
+			return ret;
+		}
 
+		ret = i915_add_request_no_flush(ring);
+		if (ret) {
+			DRM_ERROR("Add request ring #%d failed: %d\n", i, ret);
+			i915_gem_request_unreference(req);
+			i915_gem_cleanup_ringbuffer(dev);
 			return ret;
 		}
 	}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 1528e77..6048ed9 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1211,16 +1211,11 @@ int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
 {
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
-	int ret = 0;
 
 	if (!ppgtt)
 		return 0;
 
-	ret = ppgtt->switch_mm(ppgtt, ring);
-	if (ret != 0)
-		return ret;
-
-	return ret;
+	return ppgtt->switch_mm(ppgtt, ring);
 }
 
 struct i915_hw_ppgtt *
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index aba39c3..989476e 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -173,7 +173,8 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, NULL, so.obj, true);
+	WARN_ON(ring->outstanding_lazy_request->batch_obj);
+	ring->outstanding_lazy_request->batch_obj = so.obj;
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index cb12eea..de01cae 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1592,8 +1592,6 @@ int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 {
 	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
 	struct render_state so;
-	struct drm_i915_file_private *file_priv = ctx->file_priv;
-	struct drm_file *file = file_priv ? file_priv->file : NULL;
 	int ret;
 
 	ret = i915_gem_render_state_prepare(ring, &so);
@@ -1612,9 +1610,9 @@ int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, file, so.obj, true);
-	/* intel_logical_ring_add_request moves object to inactive if it
-	 * fails */
+	WARN_ON(ring->outstanding_lazy_request->batch_obj);
+	ring->outstanding_lazy_request->batch_obj = so.obj;
+	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
 	return ret;
-- 
1.7.9.5

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[PATCH 20/51] drm/i915: Update ppgtt_init_ring() & context_enable() to take requests

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The final step in removing the OLR from i915_gem_init_hw() is to pass the newly
allocated request structure in to each step rather than passing a ring
structure. This patch updates both i915_ppgtt_init_ring() and
i915_gem_context_enable() to take request pointers.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
 drivers/gpu/drm/i915/i915_gem_context.c |    7 ++++---
 drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
 drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
 5 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2229238..2eab9f4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2974,7 +2974,7 @@ int __must_check i915_gem_context_init(struct drm_device *dev);
 void i915_gem_context_fini(struct drm_device *dev);
 void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
-int i915_gem_context_enable(struct intel_engine_cs *ring);
+int i915_gem_context_enable(struct drm_i915_gem_request *req);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
 int i915_switch_context(struct intel_engine_cs *ring,
 			struct intel_context *to);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5f24ce1..e34672e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4872,7 +4872,7 @@ i915_gem_init_hw(struct drm_device *dev)
 				i915_gem_l3_remap(ring, i);
 		}
 
-		ret = i915_ppgtt_init_ring(ring);
+		ret = i915_ppgtt_init_ring(req);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
 			i915_gem_request_unreference(req);
@@ -4880,7 +4880,7 @@ i915_gem_init_hw(struct drm_device *dev)
 			return ret;
 		}
 
-		ret = i915_gem_context_enable(ring);
+		ret = i915_gem_context_enable(req);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
 			i915_gem_request_unreference(req);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index dd83d61..04d2a20 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -403,17 +403,18 @@ void i915_gem_context_fini(struct drm_device *dev)
 	i915_gem_context_unreference(dctx);
 }
 
-int i915_gem_context_enable(struct intel_engine_cs *ring)
+int i915_gem_context_enable(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (i915.enable_execlists) {
 		if (ring->init_context == NULL)
 			return 0;
 
-		ret = ring->init_context(ring, ring->default_context);
+		ret = ring->init_context(req->ring, ring->default_context);
 	} else
-		ret = i915_switch_context(ring, ring->default_context);
+		ret = i915_switch_context(req->ring, ring->default_context);
 
 	if (ret) {
 		DRM_ERROR("ring init context: %d\n", ret);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 6048ed9..e7c9137 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1207,15 +1207,15 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
 	return 0;
 }
 
-int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
+int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
 {
-	struct drm_i915_private *dev_priv = ring->dev->dev_private;
+	struct drm_i915_private *dev_priv = req->ring->dev->dev_private;
 	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
 
 	if (!ppgtt)
 		return 0;
 
-	return ppgtt->switch_mm(ppgtt, ring);
+	return ppgtt->switch_mm(ppgtt, req->ring);
 }
 
 struct i915_hw_ppgtt *
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 78a107e..0804bbc 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -300,7 +300,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
 
 int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
 int i915_ppgtt_init_hw(struct drm_device *dev);
-int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
+int i915_ppgtt_init_ring(struct drm_i915_gem_request *req);
 void i915_ppgtt_release(struct kref *kref);
 struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
 					struct drm_i915_file_private *fpriv);
-- 
1.7.9.5

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[PATCH 21/51] drm/i915: Set context in request from creation even in legacy mode

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In execlist mode, the context object pointer is written in to the request
structure (and reference counted) at the point of request creation. In legacy
mode, this only happens inside i915_add_request().

This patch updates the legacy code path to match the execlist version. This
allows all the intermediate code between request creation and request submission
to get at the context object given only a request structure. Thus negating the
need to pass context pointers here, there and everywhere.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    9 +--------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    2 ++
 2 files changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e34672e..02b921b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2469,14 +2469,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	WARN_ON(request->batch_obj && obj);
 	request->batch_obj = obj;
 
-	if (!i915.enable_execlists) {
-		/* Hold a reference to the current context so that we can inspect
-		 * it later in case a hangcheck error event fires.
-		 */
-		request->ctx = ring->last_context;
-		if (request->ctx)
-			i915_gem_context_reference(request->ctx);
-	}
+	WARN_ON(request->ctx != ring->last_context);
 
 	request->emitted_jiffies = jiffies;
 	list_add_tail(&request->list, &ring->request_list);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 40b5d83..84a1e22 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2107,6 +2107,8 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
 	request->ring = ring;
 	request->ringbuf = ring->buffer;
 	request->uniq = dev_private->request_uniq++;
+	request->ctx = ctx;
+	i915_gem_context_reference(request->ctx);
 
 	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
 	if (ret) {
-- 
1.7.9.5

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[PATCH 22/51] drm/i915: Update i915_switch_context() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that the request is guaranteed to specify the context, it is possible to
update the context switch code to use requests rather than ring and context
pairs. This patch updates i915_switch_context() accordingly.

Also removed the warning that the request's context must match the last context
switch's context. As the context switch now gets the context object from the
request structure, there is no longer any scope for the two to become out of
step.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    3 +--
 drivers/gpu/drm/i915/i915_gem.c            |    4 +---
 drivers/gpu/drm/i915/i915_gem_context.c    |   19 +++++++++----------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 4 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2eab9f4..e5132d3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2976,8 +2976,7 @@ void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
 int i915_gem_context_enable(struct drm_i915_gem_request *req);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
-int i915_switch_context(struct intel_engine_cs *ring,
-			struct intel_context *to);
+int i915_switch_context(struct drm_i915_gem_request *req);
 struct intel_context *
 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
 void i915_gem_context_free(struct kref *ctx_ref);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 02b921b..5f17ade 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2469,8 +2469,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	WARN_ON(request->batch_obj && obj);
 	request->batch_obj = obj;
 
-	WARN_ON(request->ctx != ring->last_context);
-
 	request->emitted_jiffies = jiffies;
 	list_add_tail(&request->list, &ring->request_list);
 	request->file_priv = NULL;
@@ -3109,7 +3107,7 @@ int i915_gpu_idle(struct drm_device *dev)
 			if (ret)
 				return ret;
 
-			ret = i915_switch_context(req->ring, ring->default_context);
+			ret = i915_switch_context(req);
 			if (ret) {
 				i915_gem_request_unreference(req);
 				return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 04d2a20..b326f8d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -414,7 +414,7 @@ int i915_gem_context_enable(struct drm_i915_gem_request *req)
 
 		ret = ring->init_context(req->ring, ring->default_context);
 	} else
-		ret = i915_switch_context(req->ring, ring->default_context);
+		ret = i915_switch_context(req);
 
 	if (ret) {
 		DRM_ERROR("ring init context: %d\n", ret);
@@ -693,8 +693,7 @@ unpin_out:
 
 /**
  * i915_switch_context() - perform a GPU context switch.
- * @ring: ring for which we'll execute the context switch
- * @to: the context to switch to
+ * @req: request for which we'll execute the context switch
  *
  * The context life cycle is simple. The context refcount is incremented and
  * decremented by 1 and create and destroy. If the context is in use by the GPU,
@@ -705,25 +704,25 @@ unpin_out:
  * switched by writing to the ELSP and requests keep a reference to their
  * context.
  */
-int i915_switch_context(struct intel_engine_cs *ring,
-			struct intel_context *to)
+int i915_switch_context(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 
 	WARN_ON(i915.enable_execlists);
 	WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
-	if (to->legacy_hw_ctx.rcs_state == NULL) { /* We have the fake context */
-		if (to != ring->last_context) {
-			i915_gem_context_reference(to);
+	if (req->ctx->legacy_hw_ctx.rcs_state == NULL) { /* We have the fake context */
+		if (req->ctx != ring->last_context) {
+			i915_gem_context_reference(req->ctx);
 			if (ring->last_context)
 				i915_gem_context_unreference(ring->last_context);
-			ring->last_context = to;
+			ring->last_context = req->ctx;
 		}
 		return 0;
 	}
 
-	return do_switch(ring, to);
+	return do_switch(req->ring, req->ctx);
 }
 
 static bool contexts_enabled(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 2cd0579..1e2fc80 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1190,7 +1190,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 	if (ret)
 		goto error;
 
-	ret = i915_switch_context(ring, params->ctx);
+	ret = i915_switch_context(params->request);
 	if (ret)
 		goto error;
 
-- 
1.7.9.5

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[PATCH 23/51] drm/i915: Update do_switch() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated do_switch() to take a request pointer instead of a ring/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |   17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index b326f8d..eedb994 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -556,9 +556,10 @@ mi_set_context(struct intel_engine_cs *ring,
 	return ret;
 }
 
-static int do_switch(struct intel_engine_cs *ring,
-		     struct intel_context *to)
+static int do_switch(struct drm_i915_gem_request *req)
 {
+	struct intel_context *to = req->ctx;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	struct intel_context *from = ring->last_context;
 	u32 hw_flags = 0;
@@ -591,7 +592,7 @@ static int do_switch(struct intel_engine_cs *ring,
 
 	if (to->ppgtt) {
 		trace_switch_mm(ring, to);
-		ret = to->ppgtt->switch_mm(to->ppgtt, ring);
+		ret = to->ppgtt->switch_mm(to->ppgtt, req->ring);
 		if (ret)
 			goto unpin_out;
 	}
@@ -627,7 +628,7 @@ static int do_switch(struct intel_engine_cs *ring,
 	if (!to->legacy_hw_ctx.initialized || i915_gem_context_is_default(to))
 		hw_flags |= MI_RESTORE_INHIBIT;
 
-	ret = mi_set_context(ring, to, hw_flags);
+	ret = mi_set_context(req->ring, to, hw_flags);
 	if (ret)
 		goto unpin_out;
 
@@ -635,7 +636,7 @@ static int do_switch(struct intel_engine_cs *ring,
 		if (!(to->remap_slice & (1<<i)))
 			continue;
 
-		ret = i915_gem_l3_remap(ring, i);
+		ret = i915_gem_l3_remap(req->ring, i);
 		/* If it failed, try again next round */
 		if (ret)
 			DRM_DEBUG_DRIVER("L3 remapping failed\n");
@@ -651,7 +652,7 @@ static int do_switch(struct intel_engine_cs *ring,
 	 */
 	if (from != NULL) {
 		from->legacy_hw_ctx.rcs_state->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
-		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), ring);
+		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req->ring);
 		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
 		 * whole damn pipeline, we don't need to explicitly mark the
 		 * object dirty. The only exception is that the context must be
@@ -677,7 +678,7 @@ done:
 
 	if (uninitialized) {
 		if (ring->init_context) {
-			ret = ring->init_context(ring, to);
+			ret = ring->init_context(req->ring, to);
 			if (ret)
 				DRM_ERROR("ring init context: %d\n", ret);
 		}
@@ -722,7 +723,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
 		return 0;
 	}
 
-	return do_switch(req->ring, req->ctx);
+	return do_switch(req);
 }
 
 static bool contexts_enabled(struct drm_device *dev)
-- 
1.7.9.5

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[PATCH 24/51] drm/i915: Update deferred context creation to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In execlist mode, context initialisation is deferred until first use of the
given context. This is because execlist mode has many more contexts than legacy
mode and many are never actually used. Previously, the initialisation commands
were written to the ring and tagged with some random request structure via the
OLR. This seemed to be causing a null pointer deference bug under certain
circumstances (BZ:40112).

This patch adds explicit request creation and submission to the deferred
initialisation code path. Thus removing any reliance on or randomness caused by
the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index de01cae..2882d3f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1822,6 +1822,7 @@ static void lrc_setup_hardware_status_page(struct intel_engine_cs *ring,
 int intel_lr_context_deferred_create(struct intel_context *ctx,
 				     struct intel_engine_cs *ring)
 {
+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	const bool is_global_default_ctx = (ctx == ring->default_context);
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_gem_object *ctx_obj;
@@ -1902,13 +1903,27 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
 		lrc_setup_hardware_status_page(ring, ctx_obj);
 	else if (ring->id == RCS && !ctx->rcs_initialized) {
 		if (ring->init_context) {
-			ret = ring->init_context(ring, ctx);
+			struct drm_i915_gem_request *req;
+
+			ret = dev_priv->gt.alloc_request(ring, ctx, &req);
+			if (ret)
+				return ret;
+
+			ret = ring->init_context(req->ring, ctx);
 			if (ret) {
 				DRM_ERROR("ring init context: %d\n", ret);
+				i915_gem_request_unreference(req);
 				ctx->engine[ring->id].ringbuf = NULL;
 				ctx->engine[ring->id].state = NULL;
 				goto error;
 			}
+
+			ret = i915_add_request_no_flush(req->ring);
+			if (ret) {
+				DRM_ERROR("ring init context: %d\n", ret);
+				i915_gem_request_unreference(req);
+				goto error;
+			}
 		}
 
 		ctx->rcs_initialized = true;
-- 
1.7.9.5

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[PATCH 25/51] drm/i915: Update init_context() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use requests, it is possible to
update init_context() to take a request pointer instead of a ring/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    4 ++--
 drivers/gpu/drm/i915/intel_lrc.c        |    9 ++++-----
 drivers/gpu/drm/i915/intel_ringbuffer.c |    7 +++----
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 4 files changed, 10 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index eedb994..938cd26 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -412,7 +412,7 @@ int i915_gem_context_enable(struct drm_i915_gem_request *req)
 		if (ring->init_context == NULL)
 			return 0;
 
-		ret = ring->init_context(req->ring, ring->default_context);
+		ret = ring->init_context(req);
 	} else
 		ret = i915_switch_context(req);
 
@@ -678,7 +678,7 @@ done:
 
 	if (uninitialized) {
 		if (ring->init_context) {
-			ret = ring->init_context(req->ring, to);
+			ret = ring->init_context(req);
 			if (ret)
 				DRM_ERROR("ring init context: %d\n", ret);
 		}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 2882d3f..4689853 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1322,16 +1322,15 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int gen8_init_rcs_context(struct intel_engine_cs *ring,
-		       struct intel_context *ctx)
+static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_logical_ring_workarounds_emit(ring, ctx);
+	ret = intel_logical_ring_workarounds_emit(req->ring, req->ctx);
 	if (ret)
 		return ret;
 
-	return intel_lr_context_render_state_init(ring, ctx);
+	return intel_lr_context_render_state_init(req->ring, req->ctx);
 }
 
 /**
@@ -1909,7 +1908,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
 			if (ret)
 				return ret;
 
-			ret = ring->init_context(req->ring, ctx);
+			ret = ring->init_context(req);
 			if (ret) {
 				DRM_ERROR("ring init context: %d\n", ret);
 				i915_gem_request_unreference(req);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 84a1e22..a0a9d71 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -713,16 +713,15 @@ static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
 	return 0;
 }
 
-static int intel_rcs_ctx_init(struct intel_engine_cs *ring,
-			      struct intel_context *ctx)
+static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_ring_workarounds_emit(ring, ctx);
+	ret = intel_ring_workarounds_emit(req->ring, req->ctx);
 	if (ret != 0)
 		return ret;
 
-	ret = i915_gem_render_state_init(ring);
+	ret = i915_gem_render_state_init(req->ring);
 	if (ret)
 		DRM_ERROR("init render state: %d\n", ret);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index fdeaa66..36631e2 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -143,8 +143,7 @@ struct  intel_engine_cs {
 
 	int		(*init_hw)(struct intel_engine_cs *ring);
 
-	int		(*init_context)(struct intel_engine_cs *ring,
-					struct intel_context *ctx);
+	int		(*init_context)(struct drm_i915_gem_request *req);
 
 	void		(*write_tail)(struct intel_engine_cs *ring,
 				      u32 value);
-- 
1.7.9.5

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[PATCH 26/51] drm/i915: Update render_state_init() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the two render_state_init() functions to take a request pointer instead
of a ring. This removes their reliance on the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_render_state.c |   18 +++++++++---------
 drivers/gpu/drm/i915/i915_gem_render_state.h |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |   23 +++++++++++------------
 drivers/gpu/drm/i915/intel_lrc.h             |    2 --
 drivers/gpu/drm/i915/intel_ringbuffer.c      |    2 +-
 5 files changed, 22 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 989476e..85cc746 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -152,29 +152,29 @@ int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
 	return 0;
 }
 
-int i915_gem_render_state_init(struct intel_engine_cs *ring)
+int i915_gem_render_state_init(struct drm_i915_gem_request *req)
 {
 	struct render_state so;
 	int ret;
 
-	ret = i915_gem_render_state_prepare(ring, &so);
+	ret = i915_gem_render_state_prepare(req->ring, &so);
 	if (ret)
 		return ret;
 
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = ring->dispatch_execbuffer(ring,
-					so.ggtt_offset,
-					so.rodata->batch_items * 4,
-					I915_DISPATCH_SECURE);
+	ret = req->ring->dispatch_execbuffer(req->ring,
+					     so.ggtt_offset,
+					     so.rodata->batch_items * 4,
+					     I915_DISPATCH_SECURE);
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
 
-	WARN_ON(ring->outstanding_lazy_request->batch_obj);
-	ring->outstanding_lazy_request->batch_obj = so.obj;
+	WARN_ON(req->batch_obj);
+	req->batch_obj = so.obj;
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.h b/drivers/gpu/drm/i915/i915_gem_render_state.h
index c44961e..7aa7372 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.h
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.h
@@ -39,7 +39,7 @@ struct render_state {
 	int gen;
 };
 
-int i915_gem_render_state_init(struct intel_engine_cs *ring);
+int i915_gem_render_state_init(struct drm_i915_gem_request *req);
 void i915_gem_render_state_fini(struct render_state *so);
 int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
 				  struct render_state *so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4689853..ad13cc7 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -203,6 +203,7 @@ enum {
 };
 #define GEN8_CTX_ID_SHIFT 32
 
+static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req);
 static int intel_lr_context_pin(struct intel_engine_cs *ring,
 		struct intel_context *ctx);
 
@@ -1330,7 +1331,7 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	return intel_lr_context_render_state_init(req->ring, req->ctx);
+	return intel_lr_context_render_state_init(req);
 }
 
 /**
@@ -1586,31 +1587,29 @@ cleanup_render_ring:
 	return ret;
 }
 
-int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
-				       struct intel_context *ctx)
+static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
 {
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
 	struct render_state so;
 	int ret;
 
-	ret = i915_gem_render_state_prepare(ring, &so);
+	ret = i915_gem_render_state_prepare(req->ring, &so);
 	if (ret)
 		return ret;
 
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = ring->emit_bb_start(ringbuf,
-			ctx,
-			so.ggtt_offset,
-			I915_DISPATCH_SECURE);
+	ret = req->ring->emit_bb_start(req->ringbuf,
+				       req->ctx,
+				       so.ggtt_offset,
+				       I915_DISPATCH_SECURE);
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
 
-	WARN_ON(ring->outstanding_lazy_request->batch_obj);
-	ring->outstanding_lazy_request->batch_obj = so.obj;
+	WARN_ON(req->batch_obj);
+	req->batch_obj = so.obj;
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index b4620b9..975effb 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -73,8 +73,6 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 			     int num_dwords);
 
 /* Logical Ring Contexts */
-int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
-				       struct intel_context *ctx);
 void intel_lr_context_free(struct intel_context *ctx);
 int intel_lr_context_deferred_create(struct intel_context *ctx,
 				     struct intel_engine_cs *ring);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index a0a9d71..c7a9192 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -721,7 +721,7 @@ static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
 	if (ret != 0)
 		return ret;
 
-	ret = i915_gem_render_state_init(req->ring);
+	ret = i915_gem_render_state_init(req);
 	if (ret)
 		DRM_ERROR("init render state: %d\n", ret);
 
-- 
1.7.9.5

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[PATCH 27/51] drm/i915: Update overlay code to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The overlay update code path to do explicit request creation and submission
rather than relying on the OLR to do the right thing.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_overlay.c |   64 +++++++++++++++++++++++++---------
 1 file changed, 48 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index f93dfc1..dc209bf 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -209,19 +209,19 @@ static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
 }
 
 static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
+					 struct drm_i915_gem_request *req,
 					 void (*tail)(struct intel_overlay *))
 {
 	struct drm_device *dev = overlay->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
 	int ret;
 
 	BUG_ON(overlay->last_flip_req);
-	i915_gem_request_assign(&overlay->last_flip_req,
-					     ring->outstanding_lazy_request);
-	ret = i915_add_request(ring);
-	if (ret)
+	i915_gem_request_assign(&overlay->last_flip_req, req);
+	ret = i915_add_request(req->ring);
+	if (ret) {
+		i915_gem_request_unreference(req);
 		return ret;
+	}
 
 	overlay->flip_tail = tail;
 	ret = i915_wait_request(overlay->last_flip_req);
@@ -239,6 +239,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 	struct drm_device *dev = overlay->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req;
 	int ret;
 
 	BUG_ON(overlay->active);
@@ -246,17 +247,23 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 
 	WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
 
-	ret = intel_ring_begin(ring, 4);
+	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
+	ret = intel_ring_begin(ring, 4);
+	if (ret) {
+		i915_gem_request_unreference(req);
+		return ret;
+	}
+
 	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_ON);
 	intel_ring_emit(ring, overlay->flip_addr | OFC_UPDATE);
 	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
 
-	return intel_overlay_do_wait_request(overlay, NULL);
+	return intel_overlay_do_wait_request(overlay, req, NULL);
 }
 
 /* overlay needs to be enabled in OCMD reg */
@@ -266,6 +273,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	struct drm_device *dev = overlay->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req;
 	u32 flip_addr = overlay->flip_addr;
 	u32 tmp;
 	int ret;
@@ -280,18 +288,27 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	if (tmp & (1 << 17))
 		DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp);
 
-	ret = intel_ring_begin(ring, 2);
+	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
+	ret = intel_ring_begin(ring, 2);
+	if (ret) {
+		i915_gem_request_unreference(req);
+		return ret;
+	}
+
 	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
 	intel_ring_emit(ring, flip_addr);
 	intel_ring_advance(ring);
 
 	WARN_ON(overlay->last_flip_req);
-	i915_gem_request_assign(&overlay->last_flip_req,
-					     ring->outstanding_lazy_request);
-	return i915_add_request(ring);
+	i915_gem_request_assign(&overlay->last_flip_req, req);
+	ret = i915_add_request(req->ring);
+	if (ret)
+		i915_gem_request_unreference(req);
+
+	return ret;
 }
 
 static void intel_overlay_release_old_vid_tail(struct intel_overlay *overlay)
@@ -326,6 +343,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	struct drm_device *dev = overlay->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req;
 	u32 flip_addr = overlay->flip_addr;
 	int ret;
 
@@ -337,10 +355,16 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	 * of the hw. Do it in both cases */
 	flip_addr |= OFC_UPDATE;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
+	ret = intel_ring_begin(ring, 6);
+	if (ret) {
+		i915_gem_request_unreference(req);
+		return ret;
+	}
+
 	/* wait for overlay to go idle */
 	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
 	intel_ring_emit(ring, flip_addr);
@@ -359,7 +383,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	}
 	intel_ring_advance(ring);
 
-	return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail);
+	return intel_overlay_do_wait_request(overlay, req, intel_overlay_off_tail);
 }
 
 /* recover from an interruption due to a signal
@@ -404,15 +428,23 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
 
 	if (I915_READ(ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT) {
 		/* synchronous slowpath */
-		ret = intel_ring_begin(ring, 2);
+		struct drm_i915_gem_request *req;
+
+		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 		if (ret)
 			return ret;
 
+		ret = intel_ring_begin(ring, 2);
+		if (ret) {
+			i915_gem_request_unreference(req);
+			return ret;
+		}
+
 		intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 		intel_ring_emit(ring, MI_NOOP);
 		intel_ring_advance(ring);
 
-		ret = intel_overlay_do_wait_request(overlay,
+		ret = intel_overlay_do_wait_request(overlay, req,
 						    intel_overlay_release_old_vid_tail);
 		if (ret)
 			return ret;
-- 
1.7.9.5

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[PATCH 28/51] drm/i915: Update queue_flip() to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the display page flip code to do explicit request creation and
submission rather than relying on the OLR and just hoping that the request
actually gets submitted at some random point.

The sequence is now to create a request, queue the work to the ring, assign the
known request to the flip queue work item then actually submit the work and post
the request.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/intel_display.c    |   47 ++++++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.h |    1 -
 4 files changed, 32 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e5132d3..4b82b2e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -559,7 +559,7 @@ struct drm_i915_display_funcs {
 	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
 			  struct drm_framebuffer *fb,
 			  struct drm_i915_gem_object *obj,
-			  struct intel_engine_cs *ring,
+			  struct drm_i915_gem_request *req,
 			  uint32_t flags);
 	void (*update_primary_plane)(struct drm_crtc *crtc,
 				     struct drm_framebuffer *fb,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ebf973c..f23f28e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9201,9 +9201,10 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	u32 flip_mask;
 	int ret;
@@ -9228,7 +9229,6 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, 0); /* aux display base address, unused */
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9236,9 +9236,10 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	u32 flip_mask;
 	int ret;
@@ -9260,7 +9261,6 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, MI_NOOP);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9268,9 +9268,10 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t pf, pipesrc;
@@ -9299,7 +9300,6 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, pf | pipesrc);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9307,9 +9307,10 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t pf, pipesrc;
@@ -9335,7 +9336,6 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, pf | pipesrc);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9343,9 +9343,10 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t plane_bit = 0;
 	int len, ret;
@@ -9430,7 +9431,6 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, (MI_NOOP));
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9586,9 +9586,10 @@ static int intel_gen9_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t plane = 0, stride;
 	int ret;
@@ -9640,7 +9641,6 @@ static int intel_gen9_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 
 	return 0;
 }
@@ -9649,7 +9649,7 @@ static int intel_default_queue_flip(struct drm_device *dev,
 				    struct drm_crtc *crtc,
 				    struct drm_framebuffer *fb,
 				    struct drm_i915_gem_object *obj,
-				    struct intel_engine_cs *ring,
+				    struct drm_i915_gem_request *req,
 				    uint32_t flags)
 {
 	return -ENODEV;
@@ -9728,6 +9728,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 	enum pipe pipe = intel_crtc->pipe;
 	struct intel_unpin_work *work;
 	struct intel_engine_cs *ring;
+	struct drm_i915_gem_request *request;
 	int ret;
 
 	/*
@@ -9847,13 +9848,20 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 		i915_gem_request_assign(&work->flip_queued_req,
 					obj->last_write_req);
 	} else {
-		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, ring,
-						   page_flip_flags);
+		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &request);
 		if (ret)
 			goto cleanup_unpin;
 
-		i915_gem_request_assign(&work->flip_queued_req,
-					intel_ring_get_request(ring));
+		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, request,
+						   page_flip_flags);
+		if (ret)
+			goto cleanup_request;
+
+		i915_gem_request_assign(&work->flip_queued_req, request);
+
+		ret = i915_add_request_no_flush(request->ring);
+		if (ret)
+			goto cleanup_request_assign;
 	}
 
 	work->flip_queued_vblank = drm_vblank_count(dev, intel_crtc->pipe);
@@ -9870,6 +9878,11 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 
 	return 0;
 
+cleanup_request_assign:
+	i915_gem_request_assign(&work->flip_queued_req, NULL);
+cleanup_request:
+	i915_gem_request_unreference(request);
+
 cleanup_unpin:
 	intel_unpin_fb_obj(obj);
 cleanup_pending:
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index c7a9192..9a0e944 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -81,7 +81,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring)
 	return dev_priv->gpu_error.stop_rings & intel_ring_flag(ring);
 }
 
-void __intel_ring_advance(struct intel_engine_cs *ring)
+static void __intel_ring_advance(struct intel_engine_cs *ring)
 {
 	struct intel_ringbuffer *ringbuf = ring->buffer;
 	ringbuf->tail &= ringbuf->size - 1;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 36631e2..582b0ec 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -410,7 +410,6 @@ int __intel_ring_space(int head, int tail, int size);
 void intel_ring_update_space(struct intel_ringbuffer *ringbuf);
 int intel_ring_space(struct intel_ringbuffer *ringbuf);
 bool intel_ring_stopped(struct intel_engine_cs *ring);
-void __intel_ring_advance(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_idle(struct intel_engine_cs *ring);
 void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
-- 
1.7.9.5

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[PATCH 29/51] drm/i915: Update add_request() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that all callers of i915_add_request() have a request pointer to hand, it is
possible to update the add request function to take a request pointer rather
than pulling it out of the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |   10 +++++-----
 drivers/gpu/drm/i915/i915_gem.c            |   24 ++++++++++++------------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_display.c       |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 drivers/gpu/drm/i915/intel_overlay.c       |    4 ++--
 drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
 7 files changed, 24 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4b82b2e..b7c01e2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2814,14 +2814,14 @@ void i915_gem_init_swizzling(struct drm_device *dev);
 void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
 int __must_check i915_gem_suspend(struct drm_device *dev);
-int __i915_add_request(struct intel_engine_cs *ring,
+int __i915_add_request(struct drm_i915_gem_request *req,
 		       struct drm_file *file,
 		       struct drm_i915_gem_object *batch_obj,
 		       bool flush_caches);
-#define i915_add_request(ring) \
-	__i915_add_request(ring, NULL, NULL, true)
-#define i915_add_request_no_flush(ring) \
-	__i915_add_request(ring, NULL, NULL, false)
+#define i915_add_request(req) \
+	__i915_add_request(req, NULL, NULL, true)
+#define i915_add_request_no_flush(req) \
+	__i915_add_request(req, NULL, NULL, false)
 int __i915_wait_request(struct drm_i915_gem_request *req,
 			unsigned reset_counter,
 			bool interruptible,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5f17ade..8b0bfbd 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1161,7 +1161,7 @@ i915_gem_check_olr(struct drm_i915_gem_request *req)
 
 	ret = 0;
 	if (req == req->ring->outstanding_lazy_request)
-		ret = i915_add_request(req->ring);
+		ret = i915_add_request(req);
 
 	return ret;
 }
@@ -2406,25 +2406,25 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
 	return 0;
 }
 
-int __i915_add_request(struct intel_engine_cs *ring,
+int __i915_add_request(struct drm_i915_gem_request *request,
 		       struct drm_file *file,
 		       struct drm_i915_gem_object *obj,
 		       bool flush_caches)
 {
-	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-	struct drm_i915_gem_request *request;
+	struct intel_engine_cs *ring;
+	struct drm_i915_private *dev_priv;
 	struct intel_ringbuffer *ringbuf;
 	u32 request_start;
 	int ret;
 
-	request = ring->outstanding_lazy_request;
 	if (WARN_ON(request == NULL))
 		return -ENOMEM;
 
-	if (i915.enable_execlists) {
-		ringbuf = request->ctx->engine[ring->id].ringbuf;
-	} else
-		ringbuf = ring->buffer;
+	ring = request->ring;
+	dev_priv = ring->dev->dev_private;
+	ringbuf = request->ringbuf;
+
+	WARN_ON(request != ring->outstanding_lazy_request);
 
 	request_start = intel_ring_get_tail(ringbuf);
 	/*
@@ -3113,7 +3113,7 @@ int i915_gpu_idle(struct drm_device *dev)
 				return ret;
 			}
 
-			ret = i915_add_request_no_flush(req->ring);
+			ret = i915_add_request_no_flush(req);
 			if (ret) {
 				i915_gem_request_unreference(req);
 				return ret;
@@ -3961,7 +3961,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
 			if (ret)
 				return ret;
 
-			ret = i915_add_request_no_flush(req->ring);
+			ret = i915_add_request_no_flush(req);
 			if (ret)
 				return ret;
 		}
@@ -4879,7 +4879,7 @@ i915_gem_init_hw(struct drm_device *dev)
 			return ret;
 		}
 
-		ret = i915_add_request_no_flush(ring);
+		ret = i915_add_request_no_flush(req);
 		if (ret) {
 			DRM_ERROR("Add request ring #%d failed: %d\n", i, ret);
 			i915_gem_request_unreference(req);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1e2fc80..15e33a9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -996,7 +996,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 	params->ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	return __i915_add_request(params->ring, params->file,
+	return __i915_add_request(params->request, params->file,
 				  params->batch_obj, true);
 }
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f23f28e..4aaa190 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9859,7 +9859,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 
 		i915_gem_request_assign(&work->flip_queued_req, request);
 
-		ret = i915_add_request_no_flush(request->ring);
+		ret = i915_add_request_no_flush(request);
 		if (ret)
 			goto cleanup_request_assign;
 	}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ad13cc7..56151c3 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1916,7 +1916,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
 				goto error;
 			}
 
-			ret = i915_add_request_no_flush(req->ring);
+			ret = i915_add_request_no_flush(req);
 			if (ret) {
 				DRM_ERROR("ring init context: %d\n", ret);
 				i915_gem_request_unreference(req);
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index dc209bf..228c9d1 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -217,7 +217,7 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
 
 	BUG_ON(overlay->last_flip_req);
 	i915_gem_request_assign(&overlay->last_flip_req, req);
-	ret = i915_add_request(req->ring);
+	ret = i915_add_request(req);
 	if (ret) {
 		i915_gem_request_unreference(req);
 		return ret;
@@ -304,7 +304,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 
 	WARN_ON(overlay->last_flip_req);
 	i915_gem_request_assign(&overlay->last_flip_req, req);
-	ret = i915_add_request(req->ring);
+	ret = i915_add_request(req);
 	if (ret)
 		i915_gem_request_unreference(req);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 9a0e944..178bf49 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2066,8 +2066,9 @@ int intel_ring_idle(struct intel_engine_cs *ring)
 	int ret;
 
 	/* We need to add any requests required to flush the objects and ring */
+	WARN_ON(ring->outstanding_lazy_request);
 	if (ring->outstanding_lazy_request) {
-		ret = i915_add_request(ring);
+		ret = i915_add_request(ring->outstanding_lazy_request);
 		if (ret)
 			return ret;
 	}
-- 
1.7.9.5

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[PATCH 30/51] drm/i915: Update [vma|object]_move_to_active() to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use request structures, it is
possible to update the lower level move_to_active() functions to be request
based as well.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    2 +-
 drivers/gpu/drm/i915/i915_gem.c              |   17 ++++++++---------
 drivers/gpu/drm/i915/i915_gem_context.c      |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    2 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
 6 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b7c01e2..be1e143 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2731,7 +2731,7 @@ int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
 int i915_gem_object_sync(struct drm_i915_gem_object *obj,
 			 struct drm_i915_gem_request *to_req);
 void i915_vma_move_to_active(struct i915_vma *vma,
-			     struct intel_engine_cs *ring);
+			     struct drm_i915_gem_request *req);
 int i915_gem_dumb_create(struct drm_file *file_priv,
 			 struct drm_device *dev,
 			 struct drm_mode_create_dumb *args);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8b0bfbd..e8257dd 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2264,17 +2264,16 @@ i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
 
 static void
 i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
-			       struct intel_engine_cs *ring)
+			       struct drm_i915_gem_request *req)
 {
-	struct drm_i915_gem_request *req;
-	struct intel_engine_cs *old_ring;
+	struct intel_engine_cs *new_ring, *old_ring;
 
-	BUG_ON(ring == NULL);
+	BUG_ON(req == NULL);
 
-	req = intel_ring_get_request(ring);
+	new_ring = i915_gem_request_get_ring(req);
 	old_ring = i915_gem_request_get_ring(obj->last_read_req);
 
-	if (old_ring != ring && obj->last_write_req) {
+	if (old_ring != new_ring && obj->last_write_req) {
 		/* Keep the request relative to the current ring */
 		i915_gem_request_assign(&obj->last_write_req, req);
 	}
@@ -2285,16 +2284,16 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
 		obj->active = 1;
 	}
 
-	list_move_tail(&obj->ring_list, &ring->active_list);
+	list_move_tail(&obj->ring_list, &new_ring->active_list);
 
 	i915_gem_request_assign(&obj->last_read_req, req);
 }
 
 void i915_vma_move_to_active(struct i915_vma *vma,
-			     struct intel_engine_cs *ring)
+			     struct drm_i915_gem_request *req)
 {
 	list_move_tail(&vma->mm_list, &vma->vm->active_list);
-	return i915_gem_object_move_to_active(vma->obj, ring);
+	return i915_gem_object_move_to_active(vma->obj, req);
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 938cd26..e4d75be 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -652,7 +652,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 	 */
 	if (from != NULL) {
 		from->legacy_hw_ctx.rcs_state->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
-		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req->ring);
+		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req);
 		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
 		 * whole damn pipeline, we don't need to explicitly mark the
 		 * object dirty. The only exception is that the context must be
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 15e33a9..dc13751 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -966,7 +966,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 			obj->base.pending_read_domains |= obj->base.read_domains;
 		obj->base.read_domains = obj->base.pending_read_domains;
 
-		i915_vma_move_to_active(vma, ring);
+		i915_vma_move_to_active(vma, req);
 		if (obj->base.write_domain) {
 			obj->dirty = 1;
 			i915_gem_request_assign(&obj->last_write_req, req);
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 85cc746..866274c 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -171,7 +171,7 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
 
 	WARN_ON(req->batch_obj);
 	req->batch_obj = so.obj;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 56151c3..245a5da 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1606,7 +1606,7 @@ static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
 
 	WARN_ON(req->batch_obj);
 	req->batch_obj = so.obj;
-- 
1.7.9.5

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[PATCH 31/51] drm/i915: Update l3_remap to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Converted i915_gem_l3_remap() to take a request structure instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/i915_gem.c         |    5 +++--
 drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index be1e143..8f20c37 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2809,7 +2809,7 @@ int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
 int __must_check i915_gem_init(struct drm_device *dev);
 int i915_gem_init_rings(struct drm_device *dev);
 int __must_check i915_gem_init_hw(struct drm_device *dev);
-int i915_gem_l3_remap(struct intel_engine_cs *ring, int slice);
+int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice);
 void i915_gem_init_swizzling(struct drm_device *dev);
 void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e8257dd..ab31cb0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4639,8 +4639,9 @@ err:
 	return ret;
 }
 
-int i915_gem_l3_remap(struct intel_engine_cs *ring, int slice)
+int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 reg_base = GEN7_L3LOG_BASE + (slice * 0x200);
@@ -4859,7 +4860,7 @@ i915_gem_init_hw(struct drm_device *dev)
 
 		if (ring->id == RCS) {
 			for (i = 0; i < NUM_L3_SLICES(dev); i++)
-				i915_gem_l3_remap(ring, i);
+				i915_gem_l3_remap(req, i);
 		}
 
 		ret = i915_ppgtt_init_ring(req);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index e4d75be..475d1fd 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -636,7 +636,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 		if (!(to->remap_slice & (1<<i)))
 			continue;
 
-		ret = i915_gem_l3_remap(req->ring, i);
+		ret = i915_gem_l3_remap(req, i);
 		/* If it failed, try again next round */
 		if (ret)
 			DRM_DEBUG_DRIVER("L3 remapping failed\n");
-- 
1.7.9.5

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[PATCH 32/51] drm/i915: Update mi_set_context() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated mi_set_context() to take a request structure instead of a ring and
context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 475d1fd..9e66fac 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -472,10 +472,9 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
 }
 
 static inline int
-mi_set_context(struct intel_engine_cs *ring,
-	       struct intel_context *new_context,
-	       u32 hw_flags)
+mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = hw_flags | MI_MM_SPACE_GTT;
 	const int num_rings =
 		/* Use an extended w/a on ivb+ if signalling from other rings */
@@ -527,7 +526,7 @@ mi_set_context(struct intel_engine_cs *ring,
 
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_emit(ring, MI_SET_CONTEXT);
-	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->legacy_hw_ctx.rcs_state) |
+	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(req->ctx->legacy_hw_ctx.rcs_state) |
 			flags);
 	/*
 	 * w/a: MI_SET_CONTEXT must always be followed by MI_NOOP
@@ -628,7 +627,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 	if (!to->legacy_hw_ctx.initialized || i915_gem_context_is_default(to))
 		hw_flags |= MI_RESTORE_INHIBIT;
 
-	ret = mi_set_context(req->ring, to, hw_flags);
+	ret = mi_set_context(req, hw_flags);
 	if (ret)
 		goto unpin_out;
 
-- 
1.7.9.5

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[PATCH 33/51] drm/i915: Update a bunch of execbuffer heplers to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated *_ring_invalidate_all_caches(), i915_reset_gen7_sol_offsets() and
i915_emit_box() to take request structures instead of ring or ringbuf/context
pairs.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   12 +++++++-----
 drivers/gpu/drm/i915/intel_lrc.c           |    9 ++++-----
 drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
 4 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index dc13751..a79c893 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -857,7 +857,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return intel_ring_invalidate_all_caches(req->ring);
+	return intel_ring_invalidate_all_caches(req);
 }
 
 static bool
@@ -1002,8 +1002,9 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 
 static int
 i915_reset_gen7_sol_offsets(struct drm_device *dev,
-			    struct intel_engine_cs *ring)
+			    struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret, i;
 
@@ -1028,10 +1029,11 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
 }
 
 static int
-i915_emit_box(struct intel_engine_cs *ring,
+i915_emit_box(struct drm_i915_gem_request *req,
 	      struct drm_clip_rect *box,
 	      int DR1, int DR4)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (box->y2 <= box->y1 || box->x2 <= box->x1 ||
@@ -1247,7 +1249,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 	}
 
 	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
-		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
+		ret = i915_reset_gen7_sol_offsets(params->dev, params->request);
 		if (ret)
 			goto error;
 	}
@@ -1258,7 +1260,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	if (cliprects) {
 		for (i = 0; i < args->num_cliprects; i++) {
-			ret = i915_emit_box(ring, &cliprects[i],
+			ret = i915_emit_box(params->request, &cliprects[i],
 					    args->DR1, args->DR4);
 			if (ret)
 				goto error;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 245a5da..0c1a8e5 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -550,10 +550,9 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
 	return 0;
 }
 
-static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
-					      struct intel_context *ctx)
+static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = req->ring;
 	uint32_t flush_domains;
 	int ret;
 
@@ -561,7 +560,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
 	if (ring->gpu_caches_dirty)
 		flush_domains = I915_GEM_GPU_DOMAINS;
 
-	ret = ring->emit_flush(ringbuf, ctx,
+	ret = ring->emit_flush(req->ringbuf, req->ctx,
 			       I915_GEM_GPU_DOMAINS, flush_domains);
 	if (ret)
 		return ret;
@@ -597,7 +596,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx);
+	return logical_ring_invalidate_all_caches(req);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 178bf49..fc5bc48 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2776,8 +2776,9 @@ intel_ring_flush_all_caches(struct intel_engine_cs *ring)
 }
 
 int
-intel_ring_invalidate_all_caches(struct intel_engine_cs *ring)
+intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	uint32_t flush_domains;
 	int ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 582b0ec..411cd76 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -414,7 +414,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring);
 int __must_check intel_ring_idle(struct intel_engine_cs *ring);
 void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
 int intel_ring_flush_all_caches(struct intel_engine_cs *ring);
-int intel_ring_invalidate_all_caches(struct intel_engine_cs *ring);
+int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);
 
 void intel_fini_pipe_control(struct intel_engine_cs *ring);
 int intel_init_pipe_control(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 34/51] drm/i915: Update workarounds_emit() to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the *_ring_workarounds_emit() functions to take requests instead of
ring/context pairs.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   14 +++++++-------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    6 +++---
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0c1a8e5..ee1f062 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1067,11 +1067,11 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
-					       struct intel_context *ctx)
+static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 {
 	int ret, i;
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
+	struct intel_engine_cs *ring = req->ring;
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct i915_workarounds *w = &dev_priv->workarounds;
@@ -1080,11 +1080,11 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
 		return 0;
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, ctx);
+	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
 	if (ret)
 		return ret;
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, w->count * 2 + 2);
+	ret = intel_logical_ring_begin(ringbuf, req->ctx, w->count * 2 + 2);
 	if (ret)
 		return ret;
 
@@ -1098,7 +1098,7 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
 	intel_logical_ring_advance(ringbuf);
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, ctx);
+	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
 	if (ret)
 		return ret;
 
@@ -1326,7 +1326,7 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_logical_ring_workarounds_emit(req->ring, req->ctx);
+	ret = intel_logical_ring_workarounds_emit(req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index fc5bc48..32cae54 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -674,10 +674,10 @@ err:
 	return ret;
 }
 
-static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
-				       struct intel_context *ctx)
+static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 {
 	int ret, i;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct i915_workarounds *w = &dev_priv->workarounds;
@@ -717,7 +717,7 @@ static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_ring_workarounds_emit(req->ring, req->ctx);
+	ret = intel_ring_workarounds_emit(req);
 	if (ret != 0)
 		return ret;
 
-- 
1.7.9.5

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[PATCH 35/51] drm/i915: Update flush_all_caches() to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the *_ring_flush_all_caches() functions to take requests instead of
rings or ringbuf/context pairs.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
 drivers/gpu/drm/i915/intel_lrc.c        |   11 +++++------
 drivers/gpu/drm/i915/intel_lrc.h        |    3 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c |    7 ++++---
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 5 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ab31cb0..a728f91 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2435,9 +2435,9 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	 */
 	if (flush_caches) {
 		if (i915.enable_execlists)
-			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
+			ret = logical_ring_flush_all_caches(request);
 		else
-			ret = intel_ring_flush_all_caches(ring);
+			ret = intel_ring_flush_all_caches(request);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ee1f062..a31cc33 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -760,16 +760,15 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring)
 	I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));
 }
 
-int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
-				  struct intel_context *ctx)
+int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (!ring->gpu_caches_dirty)
 		return 0;
 
-	ret = ring->emit_flush(ringbuf, ctx, 0, I915_GEM_GPU_DOMAINS);
+	ret = ring->emit_flush(req->ringbuf, req->ctx, 0, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -1080,7 +1079,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 		return 0;
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
+	ret = logical_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
@@ -1098,7 +1097,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	intel_logical_ring_advance(ringbuf);
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
+	ret = logical_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 975effb..474597e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -41,8 +41,7 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
 
-int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
-				  struct intel_context *ctx);
+int logical_ring_flush_all_caches(struct drm_i915_gem_request *req);
 void intel_logical_ring_advance_and_submit(
 				struct intel_ringbuffer *ringbuf,
 				struct intel_context *ctx,
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 32cae54..6a53bfc 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -686,7 +686,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 		return 0;
 
 	ring->gpu_caches_dirty = true;
-	ret = intel_ring_flush_all_caches(ring);
+	ret = intel_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
@@ -704,7 +704,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	intel_ring_advance(ring);
 
 	ring->gpu_caches_dirty = true;
-	ret = intel_ring_flush_all_caches(ring);
+	ret = intel_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
@@ -2758,8 +2758,9 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
 }
 
 int
-intel_ring_flush_all_caches(struct intel_engine_cs *ring)
+intel_ring_flush_all_caches(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (!ring->gpu_caches_dirty)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 411cd76..8a672b1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -413,7 +413,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_idle(struct intel_engine_cs *ring);
 void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
-int intel_ring_flush_all_caches(struct intel_engine_cs *ring);
+int intel_ring_flush_all_caches(struct drm_i915_gem_request *req);
 int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);
 
 void intel_fini_pipe_control(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 36/51] drm/i915: Update switch_mm() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the switch_mm() code paths to take a request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c     |   20 ++++++++++++--------
 drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
 3 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 9e66fac..816a442 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -591,7 +591,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 
 	if (to->ppgtt) {
 		trace_switch_mm(ring, to);
-		ret = to->ppgtt->switch_mm(to->ppgtt, req->ring);
+		ret = to->ppgtt->switch_mm(to->ppgtt, req);
 		if (ret)
 			goto unpin_out;
 	}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e7c9137..89bbc2c 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -276,9 +276,10 @@ static gen6_gtt_pte_t iris_pte_encode(dma_addr_t addr,
 }
 
 /* Broadwell Page Directory Pointer Descriptors */
-static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
-			   uint64_t val)
+static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
+			  uint64_t val)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	BUG_ON(entry >= 4);
@@ -299,7 +300,7 @@ static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
 }
 
 static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
 	int i, ret;
 
@@ -308,7 +309,7 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
 
 	for (i = used_pd - 1; i >= 0; i--) {
 		dma_addr_t addr = ppgtt->pd_dma_addr[i];
-		ret = gen8_write_pdp(ring, i, addr);
+		ret = gen8_write_pdp(req, i, addr);
 		if (ret)
 			return ret;
 	}
@@ -773,8 +774,9 @@ static uint32_t get_pd_offset(struct i915_hw_ppgtt *ppgtt)
 }
 
 static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			 struct intel_engine_cs *ring)
+			 struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
@@ -798,8 +800,9 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 }
 
 static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
@@ -830,8 +833,9 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 }
 
 static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ppgtt->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
@@ -1215,7 +1219,7 @@ int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
 	if (!ppgtt)
 		return 0;
 
-	return ppgtt->switch_mm(ppgtt, req->ring);
+	return ppgtt->switch_mm(ppgtt, req);
 }
 
 struct i915_hw_ppgtt *
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 0804bbc..96a58d4 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -289,7 +289,7 @@ struct i915_hw_ppgtt {
 
 	int (*enable)(struct i915_hw_ppgtt *ppgtt);
 	int (*switch_mm)(struct i915_hw_ppgtt *ppgtt,
-			 struct intel_engine_cs *ring);
+			 struct drm_i915_gem_request *req);
 	void (*debug_dump)(struct i915_hw_ppgtt *ppgtt, struct seq_file *m);
 };
 
-- 
1.7.9.5

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[PATCH 37/51] drm/i915: Update ring->flush() to take a requests structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Udpated the various ring->flush() functions to take a request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
 drivers/gpu/drm/i915/intel_ringbuffer.c |   30 +++++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 4 files changed, 24 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 816a442..384f481 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -489,7 +489,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 	 * itlb_before_ctx_switch.
 	 */
 	if (IS_GEN6(ring->dev)) {
-		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
+		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, 0);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 89bbc2c..e3a65c3 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -780,7 +780,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
-	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -806,7 +806,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
-	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -824,7 +824,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 
 	/* XXX: RCS is the only one to auto invalidate the TLBs? */
 	if (ring->id != RCS) {
-		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 6a53bfc..bc3c0e6 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -91,10 +91,11 @@ static void __intel_ring_advance(struct intel_engine_cs *ring)
 }
 
 static int
-gen2_render_ring_flush(struct intel_engine_cs *ring,
+gen2_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32	invalidate_domains,
 		       u32	flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 cmd;
 	int ret;
 
@@ -117,10 +118,11 @@ gen2_render_ring_flush(struct intel_engine_cs *ring,
 }
 
 static int
-gen4_render_ring_flush(struct intel_engine_cs *ring,
+gen4_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32	invalidate_domains,
 		       u32	flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	u32 cmd;
 	int ret;
@@ -247,9 +249,10 @@ intel_emit_post_sync_nonzero_flush(struct intel_engine_cs *ring)
 }
 
 static int
-gen6_render_ring_flush(struct intel_engine_cs *ring,
-                         u32 invalidate_domains, u32 flush_domains)
+gen6_render_ring_flush(struct drm_i915_gem_request *req,
+		       u32 invalidate_domains, u32 flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
@@ -341,9 +344,10 @@ static int gen7_ring_fbc_flush(struct intel_engine_cs *ring, u32 value)
 }
 
 static int
-gen7_render_ring_flush(struct intel_engine_cs *ring,
+gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32 invalidate_domains, u32 flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
@@ -426,9 +430,10 @@ gen8_emit_pipe_control(struct intel_engine_cs *ring,
 }
 
 static int
-gen8_render_ring_flush(struct intel_engine_cs *ring,
+gen8_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32 invalidate_domains, u32 flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
@@ -1448,10 +1453,11 @@ void intel_ring_setup_status_page(struct intel_engine_cs *ring)
 }
 
 static int
-bsd_ring_flush(struct intel_engine_cs *ring,
+bsd_ring_flush(struct drm_i915_gem_request *req,
 	       u32     invalidate_domains,
 	       u32     flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -2239,9 +2245,10 @@ static void gen6_bsd_ring_write_tail(struct intel_engine_cs *ring,
 		   _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
 }
 
-static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
+static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 			       u32 invalidate, u32 flush)
 {
+	struct intel_engine_cs *ring = req->ring;
 	uint32_t cmd;
 	int ret;
 
@@ -2343,9 +2350,10 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 
 /* Blitter support (SandyBridge+) */
 
-static int gen6_ring_flush(struct intel_engine_cs *ring,
+static int gen6_ring_flush(struct drm_i915_gem_request *req,
 			   u32 invalidate, u32 flush)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	uint32_t cmd;
@@ -2766,7 +2774,7 @@ intel_ring_flush_all_caches(struct drm_i915_gem_request *req)
 	if (!ring->gpu_caches_dirty)
 		return 0;
 
-	ret = ring->flush(ring, 0, I915_GEM_GPU_DOMAINS);
+	ret = ring->flush(req, 0, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -2787,7 +2795,7 @@ intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 	if (ring->gpu_caches_dirty)
 		flush_domains = I915_GEM_GPU_DOMAINS;
 
-	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, flush_domains);
+	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 8a672b1..824c71b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -147,7 +147,7 @@ struct  intel_engine_cs {
 
 	void		(*write_tail)(struct intel_engine_cs *ring,
 				      u32 value);
-	int __must_check (*flush)(struct intel_engine_cs *ring,
+	int __must_check (*flush)(struct drm_i915_gem_request *req,
 				  u32	invalidate_domains,
 				  u32	flush_domains);
 	int		(*add_request)(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 38/51] drm/i915: Update some flush helpers to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated intel_emit_post_sync_nonzero_flush(), gen7_render_ring_cs_stall_wa(),
gen7_ring_fbc_flush() and gen8_emit_pipe_control() to take requests instead of
rings.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c |   29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index bc3c0e6..2f9ba79 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -214,8 +214,9 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
  * really our business.  That leaves only stall at scoreboard.
  */
 static int
-intel_emit_post_sync_nonzero_flush(struct intel_engine_cs *ring)
+intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
@@ -258,7 +259,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
 	int ret;
 
 	/* Force SNB workarounds for PIPE_CONTROL flushes */
-	ret = intel_emit_post_sync_nonzero_flush(ring);
+	ret = intel_emit_post_sync_nonzero_flush(req);
 	if (ret)
 		return ret;
 
@@ -302,8 +303,9 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-gen7_render_ring_cs_stall_wa(struct intel_engine_cs *ring)
+gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 4);
@@ -320,8 +322,9 @@ gen7_render_ring_cs_stall_wa(struct intel_engine_cs *ring)
 	return 0;
 }
 
-static int gen7_ring_fbc_flush(struct intel_engine_cs *ring, u32 value)
+static int gen7_ring_fbc_flush(struct drm_i915_gem_request *req, u32 value)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (!ring->fbc_dirty)
@@ -389,7 +392,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		/* Workaround: we must issue a pipe_control with CS-stall bit
 		 * set before a pipe_control command that has the state cache
 		 * invalidate bit set. */
-		gen7_render_ring_cs_stall_wa(ring);
+		gen7_render_ring_cs_stall_wa(req);
 	}
 
 	ret = intel_ring_begin(ring, 4);
@@ -403,15 +406,16 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
 	intel_ring_advance(ring);
 
 	if (!invalidate_domains && flush_domains)
-		return gen7_ring_fbc_flush(ring, FBC_REND_NUKE);
+		return gen7_ring_fbc_flush(req, FBC_REND_NUKE);
 
 	return 0;
 }
 
 static int
-gen8_emit_pipe_control(struct intel_engine_cs *ring,
+gen8_emit_pipe_control(struct drm_i915_gem_request *req,
 		       u32 flags, u32 scratch_addr)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 6);
@@ -433,9 +437,8 @@ static int
 gen8_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32 invalidate_domains, u32 flush_domains)
 {
-	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
-	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
+	u32 scratch_addr = req->ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
 	flags |= PIPE_CONTROL_CS_STALL;
@@ -455,7 +458,7 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req,
 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
 
 		/* WaCsStallBeforeStateCacheInvalidate:bdw,chv */
-		ret = gen8_emit_pipe_control(ring,
+		ret = gen8_emit_pipe_control(req,
 					     PIPE_CONTROL_CS_STALL |
 					     PIPE_CONTROL_STALL_AT_SCOREBOARD,
 					     0);
@@ -463,12 +466,12 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req,
 			return ret;
 	}
 
-	ret = gen8_emit_pipe_control(ring, flags, scratch_addr);
+	ret = gen8_emit_pipe_control(req, flags, scratch_addr);
 	if (ret)
 		return ret;
 
 	if (!invalidate_domains && flush_domains)
-		return gen7_ring_fbc_flush(ring, FBC_REND_NUKE);
+		return gen7_ring_fbc_flush(req, FBC_REND_NUKE);
 
 	return 0;
 }
@@ -2388,7 +2391,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req,
 
 	if (!invalidate && flush) {
 		if (IS_GEN7(dev))
-			return gen7_ring_fbc_flush(ring, FBC_REND_CACHE_CLEAN);
+			return gen7_ring_fbc_flush(req, FBC_REND_CACHE_CLEAN);
 		else if (IS_BROADWELL(dev))
 			dev_priv->fbc.need_sw_cache_clean = true;
 	}
-- 
1.7.9.5

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[PATCH 39/51] drm/i915: Update ring->emit_flush() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->emit_flush() implementations to take a request instead
of a ringbuf/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   17 ++++++++---------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index a31cc33..21bda2d 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -560,8 +560,7 @@ static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 	if (ring->gpu_caches_dirty)
 		flush_domains = I915_GEM_GPU_DOMAINS;
 
-	ret = ring->emit_flush(req->ringbuf, req->ctx,
-			       I915_GEM_GPU_DOMAINS, flush_domains);
+	ret = ring->emit_flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
 	if (ret)
 		return ret;
 
@@ -768,7 +767,7 @@ int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
 	if (!ring->gpu_caches_dirty)
 		return 0;
 
-	ret = ring->emit_flush(req->ringbuf, req->ctx, 0, I915_GEM_GPU_DOMAINS);
+	ret = ring->emit_flush(req, 0, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -1201,18 +1200,18 @@ static void gen8_logical_ring_put_irq(struct intel_engine_cs *ring)
 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
 }
 
-static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
-			   struct intel_context *ctx,
+static int gen8_emit_flush(struct drm_i915_gem_request *request,
 			   u32 invalidate_domains,
 			   u32 unused)
 {
+	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+	ret = intel_logical_ring_begin(ringbuf, request->ctx, 4);
 	if (ret)
 		return ret;
 
@@ -1240,11 +1239,11 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
-				  struct intel_context *ctx,
+static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
 				  u32 invalidate_domains,
 				  u32 flush_domains)
 {
+	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	u32 flags = 0;
@@ -1268,7 +1267,7 @@ static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
 	}
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, 6);
+	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 824c71b..373ebf3 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -235,8 +235,7 @@ struct  intel_engine_cs {
 	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
 	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
 					struct drm_i915_gem_request *request);
-	int		(*emit_flush)(struct intel_ringbuffer *ringbuf,
-				      struct intel_context *ctx,
+	int		(*emit_flush)(struct drm_i915_gem_request *request,
 				      u32 invalidate_domains,
 				      u32 flush_domains);
 	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
-- 
1.7.9.5

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[PATCH 40/51] drm/i915: Update ring->add_request() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->add_request() implementations to take a request
instead of a ring. This removes their reliance on the OLR to obtain the seqno
value that the request should be tagged with.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |   26 ++++++++++++--------------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 3 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a728f91..616b34a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2452,7 +2452,7 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	if (i915.enable_execlists)
 		ret = ring->emit_request(ringbuf, request);
 	else
-		ret = ring->add_request(ring);
+		ret = ring->add_request(request);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2f9ba79..ce1dab4 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1081,16 +1081,16 @@ static int gen6_signal(struct intel_engine_cs *signaller,
 
 /**
  * gen6_add_request - Update the semaphore mailbox registers
- * 
- * @ring - ring that is adding a request
- * @seqno - return seqno stuck into the ring
+ *
+ * @request - request to write to the ring
  *
  * Update the mailbox registers in the *other* rings with the current seqno.
  * This acts like a signal in the canonical semaphore.
  */
 static int
-gen6_add_request(struct intel_engine_cs *ring)
+gen6_add_request(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (ring->semaphore.signal)
@@ -1103,8 +1103,7 @@ gen6_add_request(struct intel_engine_cs *ring)
 
 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, MI_USER_INTERRUPT);
 	__intel_ring_advance(ring);
 
@@ -1201,8 +1200,9 @@ do {									\
 } while (0)
 
 static int
-pc_render_add_request(struct intel_engine_cs *ring)
+pc_render_add_request(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
@@ -1222,8 +1222,7 @@ pc_render_add_request(struct intel_engine_cs *ring)
 			PIPE_CONTROL_WRITE_FLUSH |
 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, 0);
 	PIPE_CONTROL_FLUSH(ring, scratch_addr);
 	scratch_addr += 2 * CACHELINE_BYTES; /* write to separate cachelines */
@@ -1242,8 +1241,7 @@ pc_render_add_request(struct intel_engine_cs *ring)
 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
 			PIPE_CONTROL_NOTIFY);
 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, 0);
 	__intel_ring_advance(ring);
 
@@ -1474,8 +1472,9 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-i9xx_add_request(struct intel_engine_cs *ring)
+i9xx_add_request(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 4);
@@ -1484,8 +1483,7 @@ i9xx_add_request(struct intel_engine_cs *ring)
 
 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, MI_USER_INTERRUPT);
 	__intel_ring_advance(ring);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 373ebf3..e33e010 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -150,7 +150,7 @@ struct  intel_engine_cs {
 	int __must_check (*flush)(struct drm_i915_gem_request *req,
 				  u32	invalidate_domains,
 				  u32	flush_domains);
-	int		(*add_request)(struct intel_engine_cs *ring);
+	int		(*add_request)(struct drm_i915_gem_request *req);
 	/* Some chipsets are not quite as coherent as advertised and need
 	 * an expensive kick to force a true read of the up-to-date seqno.
 	 * However, the up-to-date seqno is not always required and the last
-- 
1.7.9.5

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[PATCH 41/51] drm/i915: Update ring->emit_request() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the ring->emit_request() implementation to take a request instead of a
ringbuf/request pair. Also removed it's use of the OLR for obtaining the
request's seqno.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c        |    7 +++----
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 616b34a..38f8a3b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2450,7 +2450,7 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	request->postfix = intel_ring_get_tail(ringbuf);
 
 	if (i915.enable_execlists)
-		ret = ring->emit_request(ringbuf, request);
+		ret = ring->emit_request(request);
 	else
 		ret = ring->add_request(request);
 	if (ret)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 21bda2d..02769f8 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1292,9 +1292,9 @@ static void gen8_set_seqno(struct intel_engine_cs *ring, u32 seqno)
 	intel_write_status_page(ring, I915_GEM_HWS_INDEX, seqno);
 }
 
-static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
-			     struct drm_i915_gem_request *request)
+static int gen8_emit_request(struct drm_i915_gem_request *request)
 {
+	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	u32 cmd;
 	int ret;
@@ -1311,8 +1311,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
 				(ring->status_page.gfx_addr +
 				(I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT)));
 	intel_logical_ring_emit(ringbuf, 0);
-	intel_logical_ring_emit(ringbuf,
-		i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request));
 	intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
 	intel_logical_ring_emit(ringbuf, MI_NOOP);
 	intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index e33e010..ef20c49 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -233,8 +233,7 @@ struct  intel_engine_cs {
 	struct list_head execlist_retired_req_list;
 	u8 next_context_status_buffer;
 	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
-	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
-					struct drm_i915_gem_request *request);
+	int		(*emit_request)(struct drm_i915_gem_request *request);
 	int		(*emit_flush)(struct drm_i915_gem_request *request,
 				      u32 invalidate_domains,
 				      u32 flush_domains);
-- 
1.7.9.5

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[PATCH 42/51] drm/i915: Update ring->dispatch_execbuffer() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->dispatch_execbuffer() implementations to take a
request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    4 ++--
 drivers/gpu/drm/i915/i915_gem_render_state.c |    3 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c      |   18 ++++++++++++------
 drivers/gpu/drm/i915/intel_ringbuffer.h      |    2 +-
 4 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index a79c893..8b4f8a9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1265,14 +1265,14 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			if (ret)
 				goto error;
 
-			ret = ring->dispatch_execbuffer(ring,
+			ret = ring->dispatch_execbuffer(params->request,
 							exec_start, exec_len,
 							params->dispatch_flags);
 			if (ret)
 				goto error;
 		}
 	} else {
-		ret = ring->dispatch_execbuffer(ring,
+		ret = ring->dispatch_execbuffer(params->request,
 						exec_start, exec_len,
 						params->dispatch_flags);
 		if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 866274c..cdf2fee 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -164,8 +164,7 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = req->ring->dispatch_execbuffer(req->ring,
-					     so.ggtt_offset,
+	ret = req->ring->dispatch_execbuffer(req, so.ggtt_offset,
 					     so.rodata->batch_items * 4,
 					     I915_DISPATCH_SECURE);
 	if (ret)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index ce1dab4..cf23767 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1615,10 +1615,11 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
 }
 
 static int
-i965_dispatch_execbuffer(struct intel_engine_cs *ring,
+i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			 u64 offset, u32 length,
 			 unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -1641,10 +1642,11 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
 #define I830_TLB_ENTRIES (2)
 #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
 static int
-i830_dispatch_execbuffer(struct intel_engine_cs *ring,
+i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			 u64 offset, u32 len,
 			 unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 cs_offset = ring->scratch.gtt_offset;
 	int ret;
 
@@ -1703,10 +1705,11 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
 }
 
 static int
-i915_dispatch_execbuffer(struct intel_engine_cs *ring,
+i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			 u64 offset, u32 len,
 			 unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -2283,10 +2286,11 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
+gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			      u64 offset, u32 len,
 			      unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	bool ppgtt = USES_PPGTT(ring->dev) &&
 			!(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
@@ -2306,10 +2310,11 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 }
 
 static int
-hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
+hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			     u64 offset, u32 len,
 			     unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -2328,10 +2333,11 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 }
 
 static int
-gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
+gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			      u64 offset, u32 len,
 			      unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index ef20c49..545b867 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -161,7 +161,7 @@ struct  intel_engine_cs {
 				     bool lazy_coherency);
 	void		(*set_seqno)(struct intel_engine_cs *ring,
 				     u32 seqno);
-	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
+	int		(*dispatch_execbuffer)(struct drm_i915_gem_request *req,
 					       u64 offset, u32 length,
 					       unsigned dispatch_flags);
 #define I915_DISPATCH_SECURE 0x1
-- 
1.7.9.5

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[PATCH 43/51] drm/i915: Update ring->emit_bb_start() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the ring->emit_bb_start() implementation to take a request instead of a
ringbuf/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   12 +++++-------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 02769f8..54e6a25 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -696,7 +696,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 	exec_start = params->batch_obj_vm_offset +
 		     args->batch_start_offset;
 
-	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
+	ret = ring->emit_bb_start(params->request, exec_start, params->dispatch_flags);
 	if (ret)
 		return ret;
 
@@ -1146,14 +1146,14 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring)
 	return init_workarounds_ring(ring);
 }
 
-static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
-			      struct intel_context *ctx,
+static int gen8_emit_bb_start(struct drm_i915_gem_request *req,
 			      u64 offset, unsigned dispatch_flags)
 {
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+	ret = intel_logical_ring_begin(ringbuf, req->ctx, 4);
 	if (ret)
 		return ret;
 
@@ -1595,9 +1595,7 @@ static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = req->ring->emit_bb_start(req->ringbuf,
-				       req->ctx,
-				       so.ggtt_offset,
+	ret = req->ring->emit_bb_start(req, so.ggtt_offset,
 				       I915_DISPATCH_SECURE);
 	if (ret)
 		goto out;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 545b867..514ddcb 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -237,8 +237,7 @@ struct  intel_engine_cs {
 	int		(*emit_flush)(struct drm_i915_gem_request *request,
 				      u32 invalidate_domains,
 				      u32 flush_domains);
-	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
-					 struct intel_context *ctx,
+	int		(*emit_bb_start)(struct drm_i915_gem_request *req,
 					 u64 offset, unsigned dispatch_flags);
 
 	/**
-- 
1.7.9.5

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[PATCH 44/51] drm/i915: Update ring->sync_to() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the ring->sync_to() implementations to take a request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |    6 ++++--
 drivers/gpu/drm/i915/intel_ringbuffer.h |    4 ++--
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 38f8a3b..e60ea05 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2980,7 +2980,7 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
 		return ret;
 
 	trace_i915_gem_ring_sync_to(from, to, obj->last_read_req);
-	ret = to->semaphore.sync_to(to, from, seqno);
+	ret = to->semaphore.sync_to(to_req, from, seqno);
 	if (!ret)
 		/* We use last_read_req because sync_to()
 		 * might have just caused seqno wrap under
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index cf23767..aa521c7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1126,10 +1126,11 @@ static inline bool i915_gem_has_seqno_wrapped(struct drm_device *dev,
  */
 
 static int
-gen8_ring_sync(struct intel_engine_cs *waiter,
+gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
 	       struct intel_engine_cs *signaller,
 	       u32 seqno)
 {
+	struct intel_engine_cs *waiter = waiter_req->ring;
 	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
 	int ret;
 
@@ -1151,10 +1152,11 @@ gen8_ring_sync(struct intel_engine_cs *waiter,
 }
 
 static int
-gen6_ring_sync(struct intel_engine_cs *waiter,
+gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
 	       struct intel_engine_cs *signaller,
 	       u32 seqno)
 {
+	struct intel_engine_cs *waiter = waiter_req->ring;
 	u32 dw1 = MI_SEMAPHORE_MBOX |
 		  MI_SEMAPHORE_COMPARE |
 		  MI_SEMAPHORE_REGISTER;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 514ddcb..4b4fd2d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -219,8 +219,8 @@ struct  intel_engine_cs {
 		};
 
 		/* AKA wait() */
-		int	(*sync_to)(struct intel_engine_cs *ring,
-				   struct intel_engine_cs *to,
+		int	(*sync_to)(struct drm_i915_gem_request *to_req,
+				   struct intel_engine_cs *from,
 				   u32 seqno);
 		int	(*signal)(struct intel_engine_cs *signaller,
 				  /* num_dwords needed by caller */
-- 
1.7.9.5

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[PATCH 45/51] drm/i915: Update ring->signal() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->signal() implementations to take a request instead of
a ring. This removes their reliance on the OLR to obtain the seqno value that
should be used for the signal.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c |   20 ++++++++++----------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index aa521c7..e04e881 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -964,10 +964,11 @@ static void render_ring_cleanup(struct intel_engine_cs *ring)
 	intel_fini_pipe_control(ring);
 }
 
-static int gen8_rcs_signal(struct intel_engine_cs *signaller,
+static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
 			   unsigned int num_dwords)
 {
 #define MBOX_UPDATE_DWORDS 8
+	struct intel_engine_cs *signaller = signaller_req->ring;
 	struct drm_device *dev = signaller->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *waiter;
@@ -987,8 +988,7 @@ static int gen8_rcs_signal(struct intel_engine_cs *signaller,
 		if (gtt_offset == MI_SEMAPHORE_SYNC_INVALID)
 			continue;
 
-		seqno = i915_gem_request_get_seqno(
-					   signaller->outstanding_lazy_request);
+		seqno = i915_gem_request_get_seqno(signaller_req);
 		intel_ring_emit(signaller, GFX_OP_PIPE_CONTROL(6));
 		intel_ring_emit(signaller, PIPE_CONTROL_GLOBAL_GTT_IVB |
 					   PIPE_CONTROL_QW_WRITE |
@@ -1005,10 +1005,11 @@ static int gen8_rcs_signal(struct intel_engine_cs *signaller,
 	return 0;
 }
 
-static int gen8_xcs_signal(struct intel_engine_cs *signaller,
+static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
 			   unsigned int num_dwords)
 {
 #define MBOX_UPDATE_DWORDS 6
+	struct intel_engine_cs *signaller = signaller_req->ring;
 	struct drm_device *dev = signaller->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *waiter;
@@ -1028,8 +1029,7 @@ static int gen8_xcs_signal(struct intel_engine_cs *signaller,
 		if (gtt_offset == MI_SEMAPHORE_SYNC_INVALID)
 			continue;
 
-		seqno = i915_gem_request_get_seqno(
-					   signaller->outstanding_lazy_request);
+		seqno = i915_gem_request_get_seqno(signaller_req);
 		intel_ring_emit(signaller, (MI_FLUSH_DW + 1) |
 					   MI_FLUSH_DW_OP_STOREDW);
 		intel_ring_emit(signaller, lower_32_bits(gtt_offset) |
@@ -1044,9 +1044,10 @@ static int gen8_xcs_signal(struct intel_engine_cs *signaller,
 	return 0;
 }
 
-static int gen6_signal(struct intel_engine_cs *signaller,
+static int gen6_signal(struct drm_i915_gem_request *signaller_req,
 		       unsigned int num_dwords)
 {
+	struct intel_engine_cs *signaller = signaller_req->ring;
 	struct drm_device *dev = signaller->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *useless;
@@ -1064,8 +1065,7 @@ static int gen6_signal(struct intel_engine_cs *signaller,
 	for_each_ring(useless, dev_priv, i) {
 		u32 mbox_reg = signaller->semaphore.mbox.signal[i];
 		if (mbox_reg != GEN6_NOSYNC) {
-			u32 seqno = i915_gem_request_get_seqno(
-					   signaller->outstanding_lazy_request);
+			u32 seqno = i915_gem_request_get_seqno(signaller_req);
 			intel_ring_emit(signaller, MI_LOAD_REGISTER_IMM(1));
 			intel_ring_emit(signaller, mbox_reg);
 			intel_ring_emit(signaller, seqno);
@@ -1094,7 +1094,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
 	int ret;
 
 	if (ring->semaphore.signal)
-		ret = ring->semaphore.signal(ring, 4);
+		ret = ring->semaphore.signal(req, 4);
 	else
 		ret = intel_ring_begin(ring, 4);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 4b4fd2d..70f3f5d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -222,7 +222,7 @@ struct  intel_engine_cs {
 		int	(*sync_to)(struct drm_i915_gem_request *to_req,
 				   struct intel_engine_cs *from,
 				   u32 seqno);
-		int	(*signal)(struct intel_engine_cs *signaller,
+		int	(*signal)(struct drm_i915_gem_request *signaller_req,
 				  /* num_dwords needed by caller */
 				  unsigned int num_dwords);
 	} semaphore;
-- 
1.7.9.5

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[PATCH 46/51] drm/i915: Update cacheline_align() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated intel_ring_cacheline_align() to take a request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_display.c    |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |    3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4aaa190..30fa5e1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9388,7 +9388,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 	 * then do the cacheline alignment, and finally emit the
 	 * MI_DISPLAY_FLIP.
 	 */
-	ret = intel_ring_cacheline_align(ring);
+	ret = intel_ring_cacheline_align(req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index e04e881..b3aca4a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2179,8 +2179,9 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 }
 
 /* Align the ring tail to a cacheline boundary */
-int intel_ring_cacheline_align(struct intel_engine_cs *ring)
+int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int num_dwords = (ring->buffer->tail & (CACHELINE_BYTES - 1)) / sizeof(uint32_t);
 	int ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 70f3f5d..ba7213f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -387,7 +387,7 @@ void intel_stop_ring_buffer(struct intel_engine_cs *ring);
 void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
-int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
+int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
 int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
 					  struct intel_context *ctx,
 					  struct drm_i915_gem_request **req_out);
-- 
1.7.9.5

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[PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated ironlake_enable_rc6() to do explicit request creation and submission.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c |   31 +++++++++++++++++++++----------
 1 file changed, 21 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6ece663..0844166 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4959,6 +4959,7 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req = NULL;
 	bool was_interruptible;
 	int ret;
 
@@ -4977,16 +4978,17 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 	was_interruptible = dev_priv->mm.interruptible;
 	dev_priv->mm.interruptible = false;
 
+	ret = dev_priv->gt.alloc_request(ring, NULL, &req);
+	if (ret)
+		goto err;
+
 	/*
 	 * GPU can automatically power down the render unit if given a page
 	 * to save state.
 	 */
 	ret = intel_ring_begin(ring, 6);
-	if (ret) {
-		ironlake_teardown_rc6(dev);
-		dev_priv->mm.interruptible = was_interruptible;
-		return;
-	}
+	if (ret)
+		goto err;
 
 	intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);
 	intel_ring_emit(ring, MI_SET_CONTEXT);
@@ -5000,6 +5002,11 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 	intel_ring_emit(ring, MI_FLUSH);
 	intel_ring_advance(ring);
 
+	ret = i915_add_request_no_flush(req);
+	if (ret)
+		goto err;
+	req = NULL;
+
 	/*
 	 * Wait for the command parser to advance past MI_SET_CONTEXT. The HW
 	 * does an implicit flush, combined with MI_FLUSH above, it should be
@@ -5007,16 +5014,20 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 	 */
 	ret = intel_ring_idle(ring);
 	dev_priv->mm.interruptible = was_interruptible;
-	if (ret) {
-		DRM_ERROR("failed to enable ironlake power savings\n");
-		ironlake_teardown_rc6(dev);
-		return;
-	}
+	if (ret)
+		goto err;
 
 	I915_WRITE(PWRCTXA, i915_gem_obj_ggtt_offset(dev_priv->ips.pwrctx) | PWRCTX_EN);
 	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
 
 	intel_print_rc6_info(dev, GEN6_RC_CTL_RC6_ENABLE);
+
+err:
+	DRM_ERROR("failed to enable ironlake power savings\n");
+	ironlake_teardown_rc6(dev);
+	dev_priv->mm.interruptible = was_interruptible;
+	if (req)
+		i915_gem_request_unreference(req);
 }
 
 static unsigned long intel_pxfreq(u32 vidfreq)
-- 
1.7.9.5

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[PATCH 48/51] drm/i915: Update intel_ring_begin() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use requests, intel_ring_begin()
can be updated to take a request instead of a ring. This also means that it no
longer needs to lazily allocate a request if no-one happens to have done it
earlier.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c            |    2 +-
 drivers/gpu/drm/i915/i915_gem_context.c    |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    8 ++--
 drivers/gpu/drm/i915/i915_gem_gtt.c        |    6 +--
 drivers/gpu/drm/i915/intel_display.c       |   12 ++---
 drivers/gpu/drm/i915/intel_overlay.c       |    8 ++--
 drivers/gpu/drm/i915/intel_pm.c            |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   72 +++++++++++++---------------
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
 9 files changed, 55 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e60ea05..4777eb2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4651,7 +4651,7 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 	if (!HAS_L3_DPF(dev) || !remap_info)
 		return 0;
 
-	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
+	ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 384f481..e348424 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -503,7 +503,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 	if (INTEL_INFO(ring->dev)->gen >= 7)
 		len += 2 + (num_rings ? 4*num_rings + 2 : 0);
 
-	ret = intel_ring_begin(ring, len);
+	ret = intel_ring_begin(req, len);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 8b4f8a9..6a703e6 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1013,7 +1013,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
 		return -EINVAL;
 	}
 
-	ret = intel_ring_begin(ring, 4 * 3);
+	ret = intel_ring_begin(req, 4 * 3);
 	if (ret)
 		return ret;
 
@@ -1044,7 +1044,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
 	}
 
 	if (INTEL_INFO(ring->dev)->gen >= 4) {
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(req, 4);
 		if (ret)
 			return ret;
 
@@ -1053,7 +1053,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
 		intel_ring_emit(ring, ((box->x2 - 1) & 0xffff) | (box->y2 - 1) << 16);
 		intel_ring_emit(ring, DR4);
 	} else {
-		ret = intel_ring_begin(ring, 6);
+		ret = intel_ring_begin(req, 6);
 		if (ret)
 			return ret;
 
@@ -1235,7 +1235,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	if (ring == &dev_priv->ring[RCS] &&
 			instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(params->request, 4);
 		if (ret)
 			goto error;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e3a65c3..417a89e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -284,7 +284,7 @@ static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
 
 	BUG_ON(entry >= 4);
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -784,7 +784,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -810,7 +810,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 30fa5e1..ef53839 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9209,7 +9209,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
 	u32 flip_mask;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -9244,7 +9244,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
 	u32 flip_mask;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -9277,7 +9277,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
 	uint32_t pf, pipesrc;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -9316,7 +9316,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 	uint32_t pf, pipesrc;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -9392,7 +9392,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, len);
+	ret = intel_ring_begin(req, len);
 	if (ret)
 		return ret;
 
@@ -9621,7 +9621,7 @@ static int intel_gen9_queue_flip(struct drm_device *dev,
 		return -ENODEV;
 	}
 
-	ret = intel_ring_begin(ring, 10);
+	ret = intel_ring_begin(req, 10);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 228c9d1..1fb7653 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -251,7 +251,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret) {
 		i915_gem_request_unreference(req);
 		return ret;
@@ -292,7 +292,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret) {
 		i915_gem_request_unreference(req);
 		return ret;
@@ -359,7 +359,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret) {
 		i915_gem_request_unreference(req);
 		return ret;
@@ -434,7 +434,7 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
 		if (ret)
 			return ret;
 
-		ret = intel_ring_begin(ring, 2);
+		ret = intel_ring_begin(req, 2);
 		if (ret) {
 			i915_gem_request_unreference(req);
 			return ret;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0844166..4ac7206 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4986,7 +4986,7 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 	 * GPU can automatically power down the render unit if given a page
 	 * to save state.
 	 */
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		goto err;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index b3aca4a..9b4cf99 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -106,7 +106,7 @@ gen2_render_ring_flush(struct drm_i915_gem_request *req,
 	if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER)
 		cmd |= MI_READ_FLUSH;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -165,7 +165,7 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
 	    (IS_G4X(dev) || IS_GEN5(dev)))
 		cmd |= MI_INVALIDATE_ISP;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -220,8 +220,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
-
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -234,7 +233,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -289,7 +288,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
 		flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL;
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -308,7 +307,7 @@ gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -330,7 +329,7 @@ static int gen7_ring_fbc_flush(struct drm_i915_gem_request *req, u32 value)
 	if (!ring->fbc_dirty)
 		return 0;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 	/* WaFbcNukeOn3DBlt:ivb/hsw */
@@ -395,7 +394,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		gen7_render_ring_cs_stall_wa(req);
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -418,7 +417,7 @@ gen8_emit_pipe_control(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -698,7 +697,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, (w->count * 2 + 2));
+	ret = intel_ring_begin(req, (w->count * 2 + 2));
 	if (ret)
 		return ret;
 
@@ -978,7 +977,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1019,7 +1018,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1058,7 +1057,7 @@ static int gen6_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2);
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1096,7 +1095,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
 	if (ring->semaphore.signal)
 		ret = ring->semaphore.signal(req, 4);
 	else
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(req, 4);
 
 	if (ret)
 		return ret;
@@ -1134,7 +1133,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
 	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
 	int ret;
 
-	ret = intel_ring_begin(waiter, 4);
+	ret = intel_ring_begin(waiter_req, 4);
 	if (ret)
 		return ret;
 
@@ -1171,7 +1170,7 @@ gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
 
 	WARN_ON(wait_mbox == MI_SEMAPHORE_SYNC_INVALID);
 
-	ret = intel_ring_begin(waiter, 4);
+	ret = intel_ring_begin(waiter_req, 4);
 	if (ret)
 		return ret;
 
@@ -1216,7 +1215,7 @@ pc_render_add_request(struct drm_i915_gem_request *req)
 	 * incoherence by flushing the 6 PIPE_NOTIFY buffers out to
 	 * memory before requesting an interrupt.
 	 */
-	ret = intel_ring_begin(ring, 32);
+	ret = intel_ring_begin(req, 32);
 	if (ret)
 		return ret;
 
@@ -1463,7 +1462,7 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -1479,7 +1478,7 @@ i9xx_add_request(struct drm_i915_gem_request *req)
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1624,7 +1623,7 @@ i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -1652,7 +1651,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	u32 cs_offset = ring->scratch.gtt_offset;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -1669,7 +1668,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 		if (len > I830_BATCH_LIMIT)
 			return -ENOSPC;
 
-		ret = intel_ring_begin(ring, 6 + 2);
+		ret = intel_ring_begin(req, 6 + 2);
 		if (ret)
 			return ret;
 
@@ -1692,7 +1691,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 		offset = cs_offset;
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1714,7 +1713,7 @@ i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2153,13 +2152,15 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring,
 	return 0;
 }
 
-int intel_ring_begin(struct intel_engine_cs *ring,
+int intel_ring_begin(struct drm_i915_gem_request *req,
 		     int num_dwords)
 {
-	struct drm_i915_gem_request *req;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	int ret;
 
+	WARN_ON(req == NULL);
+
 	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
 				   dev_priv->mm.interruptible);
 	if (ret)
@@ -2169,11 +2170,6 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 	if (ret)
 		return ret;
 
-	/* Preallocate the olr before touching the ring */
-	ret = intel_ring_alloc_request(ring, NULL, &req);
-	if (ret)
-		return ret;
-
 	ring->buffer->space -= num_dwords * sizeof(uint32_t);
 	return 0;
 }
@@ -2189,7 +2185,7 @@ int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
 		return 0;
 
 	num_dwords = CACHELINE_BYTES / sizeof(uint32_t) - num_dwords;
-	ret = intel_ring_begin(ring, num_dwords);
+	ret = intel_ring_begin(req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -2259,7 +2255,7 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -2298,7 +2294,7 @@ gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			!(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -2320,7 +2316,7 @@ hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2343,7 +2339,7 @@ gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2369,7 +2365,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index ba7213f..35799dc 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -386,7 +386,7 @@ int intel_alloc_ringbuffer_obj(struct drm_device *dev,
 void intel_stop_ring_buffer(struct intel_engine_cs *ring);
 void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 
-int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
+int __must_check intel_ring_begin(struct drm_i915_gem_request *req, int n);
 int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
 int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
 					  struct intel_context *ctx,
-- 
1.7.9.5

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[PATCH 49/51] drm/i915: Update intel_logical_ring_begin() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use requests,
intel_logical_ring_begin() can be updated to take a request instead of a
ringbuf/context pair. This also means that it no longer needs to lazily allocate
a request if no-one happens to have done it earlier.

Note that this change makes the execlist signature the same as the legacy
version. Thus the two functions could be merged into a ring->begin() wrapper if
required.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   35 +++++++++++++++++------------------
 drivers/gpu/drm/i915/intel_lrc.h |    3 ---
 2 files changed, 17 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 54e6a25..c5408bc 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -203,6 +203,8 @@ enum {
 };
 #define GEN8_CTX_ID_SHIFT 32
 
+static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
+				    int num_dwords);
 static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req);
 static int intel_lr_context_pin(struct intel_engine_cs *ring,
 		struct intel_context *ctx);
@@ -680,7 +682,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 
 	if (ring == &dev_priv->ring[RCS] &&
 	    instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
+		ret = intel_logical_ring_begin(params->request, 4);
 		if (ret)
 			return ret;
 
@@ -1028,7 +1030,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
 /**
  * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
  *
- * @ringbuf: Logical ringbuffer.
+ * @request: The request to start some new work for
  * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
  *
  * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
@@ -1038,30 +1040,27 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
  *
  * Return: non-zero if the ringbuffer is not ready to be written to.
  */
-int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
-			     struct intel_context *ctx, int num_dwords)
+static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
+				    int num_dwords)
 {
-	struct drm_i915_gem_request *req;
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret;
 
+	WARN_ON(req == NULL);
+
 	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
 				   dev_priv->mm.interruptible);
 	if (ret)
 		return ret;
 
-	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
-	if (ret)
-		return ret;
-
-	/* Preallocate the olr before touching the ring */
-	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
+	ret = logical_ring_prepare(req->ringbuf, req->ctx,
+				   num_dwords * sizeof(uint32_t));
 	if (ret)
 		return ret;
 
-	ringbuf->space -= num_dwords * sizeof(uint32_t);
+	req->ringbuf->space -= num_dwords * sizeof(uint32_t);
 	return 0;
 }
 
@@ -1082,7 +1081,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	ret = intel_logical_ring_begin(ringbuf, req->ctx, w->count * 2 + 2);
+	ret = intel_logical_ring_begin(req, w->count * 2 + 2);
 	if (ret)
 		return ret;
 
@@ -1153,7 +1152,7 @@ static int gen8_emit_bb_start(struct drm_i915_gem_request *req,
 	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, req->ctx, 4);
+	ret = intel_logical_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1211,7 +1210,7 @@ static int gen8_emit_flush(struct drm_i915_gem_request *request,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, request->ctx, 4);
+	ret = intel_logical_ring_begin(request, 4);
 	if (ret)
 		return ret;
 
@@ -1267,7 +1266,7 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
 	}
 
-	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
+	ret = intel_logical_ring_begin(request, 6);
 	if (ret)
 		return ret;
 
@@ -1299,7 +1298,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
 	u32 cmd;
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
+	ret = intel_logical_ring_begin(request, 6);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 474597e..42088c1 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -67,9 +67,6 @@ static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
 	iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
 	ringbuf->tail += 4;
 }
-int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
-			     struct intel_context *ctx,
-			     int num_dwords);
 
 /* Logical Ring Contexts */
 void intel_lr_context_free(struct intel_context *ctx);
-- 
1.7.9.5

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[PATCH 50/51] drm/i915: Remove the now obsolete intel_ring_get_request()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Much of the driver has now been converted to passing requests around instead of
rings/ringbufs/contexts. Thus the function for retreiving the request from a
ring (i.e. the OLR) is no longer used and can be removed.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.h |    7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 35799dc..e20ba9e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -432,11 +432,4 @@ static inline u32 intel_ring_get_tail(struct intel_ringbuffer *ringbuf)
 	return ringbuf->tail;
 }
 
-static inline struct drm_i915_gem_request *
-intel_ring_get_request(struct intel_engine_cs *ring)
-{
-	BUG_ON(ring->outstanding_lazy_request == NULL);
-	return ring->outstanding_lazy_request;
-}
-
 #endif /* _INTEL_RINGBUFFER_H_ */
-- 
1.7.9.5

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[PATCH 51/51] drm/i915: Remove the now obsolete 'outstanding_lazy_request'

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The outstanding_lazy_request is no longer used anywhere in the driver.
Everything that was looking at it now has a request explicitly passed in from on
high. Everything that was relying upon behind the scenes is now explicitly
creating/passing/submitting it's own private request. Thus the OLR can be
removed.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c            |   16 +---------------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    4 +---
 drivers/gpu/drm/i915/intel_lrc.c           |    6 ++----
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   17 ++---------------
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ----
 5 files changed, 6 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4777eb2..8febd58 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1155,15 +1155,9 @@ i915_gem_check_wedge(struct i915_gpu_error *error,
 int
 i915_gem_check_olr(struct drm_i915_gem_request *req)
 {
-	int ret;
-
 	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
 
-	ret = 0;
-	if (req == req->ring->outstanding_lazy_request)
-		ret = i915_add_request(req);
-
-	return ret;
+	return 0;
 }
 
 static void fake_irq(unsigned long data)
@@ -2423,8 +2417,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	dev_priv = ring->dev->dev_private;
 	ringbuf = request->ringbuf;
 
-	WARN_ON(request != ring->outstanding_lazy_request);
-
 	request_start = intel_ring_get_tail(ringbuf);
 	/*
 	 * Emit any outstanding flushes - execbuf can fail to emit the flush
@@ -2483,7 +2475,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	}
 
 	trace_i915_gem_request_add(request);
-	ring->outstanding_lazy_request = NULL;
 
 	i915_queue_hangcheck(ring->dev);
 
@@ -2667,9 +2658,6 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
 
 		i915_gem_free_request(request);
 	}
-
-	/* This may not have been flushed before the reset, so clean it now */
-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
 }
 
 void i915_gem_restore_fences(struct drm_device *dev)
@@ -3119,8 +3107,6 @@ int i915_gpu_idle(struct drm_device *dev)
 			}
 		}
 
-		WARN_ON(ring->outstanding_lazy_request);
-
 		ret = intel_ring_idle(ring);
 		if (ret)
 			return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 6a703e6..0eae592 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1571,10 +1571,8 @@ err:
 	 * must be freed again. If it was submitted then it is being tracked
 	 * on the active request list and no clean up is required here.
 	 */
-	if (ret && params->request) {
+	if (ret && params->request)
 		i915_gem_request_unreference(params->request);
-		ring->outstanding_lazy_request = NULL;
-	}
 
 	mutex_unlock(&dev->struct_mutex);
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c5408bc..1e23702 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -855,8 +855,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
 	if (!req_out)
 		return -EINVAL;
 
-	if ((*req_out = ring->outstanding_lazy_request) != NULL)
-		return 0;
+	*req_out = NULL;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
 	if (request == NULL)
@@ -890,7 +889,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
 	i915_gem_context_reference(request->ctx);
 	request->ringbuf = ctx->engine[ring->id].ringbuf;
 
-	*req_out = ring->outstanding_lazy_request = request;
+	*req_out = request;
 	return 0;
 }
 
@@ -1346,7 +1345,6 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
 
 	intel_logical_ring_stop(ring);
 	WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0);
-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
 
 	if (ring->cleanup)
 		ring->cleanup(ring);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 9b4cf99..1cbde62 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1955,7 +1955,6 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
 
 	intel_unpin_ringbuffer_obj(ringbuf);
 	intel_destroy_ringbuffer_obj(ringbuf);
-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
 
 	if (ring->cleanup)
 		ring->cleanup(ring);
@@ -2074,15 +2073,6 @@ static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
 int intel_ring_idle(struct intel_engine_cs *ring)
 {
 	struct drm_i915_gem_request *req;
-	int ret;
-
-	/* We need to add any requests required to flush the objects and ring */
-	WARN_ON(ring->outstanding_lazy_request);
-	if (ring->outstanding_lazy_request) {
-		ret = i915_add_request(ring->outstanding_lazy_request);
-		if (ret)
-			return ret;
-	}
 
 	/* Wait upon the last request to be completed */
 	if (list_empty(&ring->request_list))
@@ -2107,8 +2097,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
 	if (!req_out)
 		return -EINVAL;
 
-	if ((*req_out = ring->outstanding_lazy_request) != NULL)
-		return 0;
+	*req_out = NULL;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
 	if (request == NULL)
@@ -2127,7 +2116,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
 		return ret;
 	}
 
-	*req_out = ring->outstanding_lazy_request = request;
+	*req_out = request;
 	return 0;
 }
 
@@ -2202,8 +2191,6 @@ void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	BUG_ON(ring->outstanding_lazy_request);
-
 	if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {
 		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
 		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index e20ba9e..6af5e5e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -258,10 +258,6 @@ struct  intel_engine_cs {
 	 */
 	struct list_head request_list;
 
-	/**
-	 * Do we have some not yet emitted requests outstanding?
-	 */
-	struct drm_i915_gem_request *outstanding_lazy_request;
 	bool gpu_caches_dirty;
 	bool fbc_dirty;
 
-- 
1.7.9.5

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Re: [PATCH 24/51] drm/i915: Update deferred context creation to do explicit request management

[Chris Wilson]

On Fri, Feb 13, 2015 at 11:48:33AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> In execlist mode, context initialisation is deferred until first use of the
> given context. This is because execlist mode has many more contexts than legacy
> mode and many are never actually used.

That's not correct. There are no more contexts in execlists than legacy.
There are more ringbuffers, or rather the contexts have an extra state
object associated with them.

> Previously, the initialisation commands
> were written to the ring and tagged with some random request structure via the
> OLR. This seemed to be causing a null pointer deference bug under certain
> circumstances (BZ:40112).
> 
> This patch adds explicit request creation and submission to the deferred
> initialisation code path. Thus removing any reliance on or randomness caused by
> the OLR.

This is upside down though. The request should be referencing the
context (thus instantiating it on demand) and nothing in the context
allocation requires the request. The initialisation here should be during
i915_request_switch_context(), since it can be entirely shared with
legacy.
-Chris

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Re: [PATCH 49/51] drm/i915: Update intel_logical_ring_begin() to take a request structure

[Chris Wilson]

On Fri, Feb 13, 2015 at 11:48:58AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> Now that everything above has been converted to use requests,
> intel_logical_ring_begin() can be updated to take a request instead of a
> ringbuf/context pair. This also means that it no longer needs to lazily allocate
> a request if no-one happens to have done it earlier.
> 
> Note that this change makes the execlist signature the same as the legacy
> version. Thus the two functions could be merged into a ring->begin() wrapper if
> required.

It should be noted that you don't even need to virtualise the
function... Please kill all the duplicated code.
-Chris

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Re: [PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[Chris Wilson]

On Fri, Feb 13, 2015 at 11:48:56AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> Updated ironlake_enable_rc6() to do explicit request creation and submission.

If you merged the context here with the common context switching code,
we don't even need to touch the ring here.
-Chris

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Re: [PATCH 48/51] drm/i915: Update intel_ring_begin() to take a request structure

[Chris Wilson]

On Fri, Feb 13, 2015 at 11:48:57AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> Now that everything above has been converted to use requests, intel_ring_begin()
> can be updated to take a request instead of a ring. This also means that it no
> longer needs to lazily allocate a request if no-one happens to have done it
> earlier.

Hmm, you missed out on returning @ring@ from intel_ring_begin() to make it
explicit that accessing @ring@ through any other means is verboten.
-Chris

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Re: [PATCH 08/51] drm/i915: Update alloc_request to return the allocated request

[Chris Wilson]

On Fri, Feb 13, 2015 at 11:48:17AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> The alloc_request() function does not actually return the newly allocated
> request. Instead, it must be pulled from ring->outstanding_lazy_request. This
> patch fixes this so that code can create a request and start using it knowing
> exactly which request it actually owns.

Why do we have different functions in the first place?
-Chris

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Re: [PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[John Harrison]

On 13/02/2015 12:19, Chris Wilson wrote:
> On Fri, Feb 13, 2015 at 11:48:56AM +0000, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> Updated ironlake_enable_rc6() to do explicit request creation and submission.
> If you merged the context here with the common context switching code,
> we don't even need to touch the ring here.
> -Chris
>
It would certainly be preferable to not have any ring commands written 
from deep within the power management code. However, I didn't want to 
change anything I didn't really need to, especially in code that I'm not 
at all sure about. Plus I don't have an ironlake to test any significant 
change on.

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Re: [PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[Chris Wilson]

On Fri, Feb 13, 2015 at 04:58:24PM +0000, John Harrison wrote:
> On 13/02/2015 12:19, Chris Wilson wrote:
> >On Fri, Feb 13, 2015 at 11:48:56AM +0000, John.C.Harrison@Intel.com wrote:
> >>From: John Harrison <John.C.Harrison@Intel.com>
> >>
> >>Updated ironlake_enable_rc6() to do explicit request creation and submission.
> >If you merged the context here with the common context switching code,
> >we don't even need to touch the ring here.
> >-Chris
> >
> It would certainly be preferable to not have any ring commands
> written from deep within the power management code. However, I
> didn't want to change anything I didn't really need to, especially
> in code that I'm not at all sure about. Plus I don't have an
> ironlake to test any significant change on.

I did and tested extensively.
-Chris

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Re: [PATCH 49/51] drm/i915: Update intel_logical_ring_begin() to take a request structure

[John Harrison]

[-- Attachment #1.1: Type: text/plain, Size: 1069 bytes --]

On 13/02/2015 12:17, Chris Wilson wrote:
> On Fri, Feb 13, 2015 at 11:48:58AM +0000, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> Now that everything above has been converted to use requests,
>> intel_logical_ring_begin() can be updated to take a request instead of a
>> ringbuf/context pair. This also means that it no longer needs to lazily allocate
>> a request if no-one happens to have done it earlier.
>>
>> Note that this change makes the execlist signature the same as the legacy
>> version. Thus the two functions could be merged into a ring->begin() wrapper if
>> required.
> It should be noted that you don't even need to virtualise the
> function... Please kill all the duplicated code.
> -Chris
>
As noted in the cover letter, quite a lot of the execlist vs legacy 
duplication could be resolved back to a single code path. However, that 
was quite a large war discussion first time around. So I would rather 
leave that for another patch series once people actually decide what the 
best direction really is.


[-- Attachment #1.2: Type: text/html, Size: 1672 bytes --]

[-- Attachment #2: Type: text/plain, Size: 159 bytes --]

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Re: [PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[John Harrison]

On 13/02/2015 17:03, Chris Wilson wrote:
> On Fri, Feb 13, 2015 at 04:58:24PM +0000, John Harrison wrote:
>> On 13/02/2015 12:19, Chris Wilson wrote:
>>> On Fri, Feb 13, 2015 at 11:48:56AM +0000, John.C.Harrison@Intel.com wrote:
>>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>>
>>>> Updated ironlake_enable_rc6() to do explicit request creation and submission.
>>> If you merged the context here with the common context switching code,
>>> we don't even need to touch the ring here.
>>> -Chris
>>>
>> It would certainly be preferable to not have any ring commands
>> written from deep within the power management code. However, I
>> didn't want to change anything I didn't really need to, especially
>> in code that I'm not at all sure about. Plus I don't have an
>> ironlake to test any significant change on.
> I did and tested extensively.
> -Chris

Do you have a patch that just does the move of this from PM code to 
context switch code? Something that I can drop into this series would be 
great. If not, exactly where about in the context switch code should it 
go? Should it be in the start of day initialisation, in the per context 
intialisation, every context switch, only the first switch after a 
resume, ...?

Tracing back to where/when this code is currently executed seems to be 
quite complicated. The _enable_rc6() function is called during ring 
reset but only for Gen6+ because Ironlake is broken according to the 
comment. It is also called by a system power management callback but it 
is unclear when that would occur. Finally, it is also called from the 
display code in intel_modeset_init_hw().

Thanks,
John.

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Re: [PATCH 24/51] drm/i915: Update deferred context creation to do explicit request management

[John Harrison]

On 13/02/2015 12:15, Chris Wilson wrote:
> On Fri, Feb 13, 2015 at 11:48:33AM +0000, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> In execlist mode, context initialisation is deferred until first use of the
>> given context. This is because execlist mode has many more contexts than legacy
>> mode and many are never actually used.
> That's not correct. There are no more contexts in execlists than legacy.
> There are more ringbuffers, or rather the contexts have an extra state
> object associated with them.
Okay, I should have said sub-contexts. Or context state objects. Or 
something.


>> Previously, the initialisation commands
>> were written to the ring and tagged with some random request structure via the
>> OLR. This seemed to be causing a null pointer deference bug under certain
>> circumstances (BZ:40112).
>>
>> This patch adds explicit request creation and submission to the deferred
>> initialisation code path. Thus removing any reliance on or randomness caused by
>> the OLR.
> This is upside down though. The request should be referencing the
> context (thus instantiating it on demand) and nothing in the context
> allocation requires the request. The initialisation here should be during
> i915_request_switch_context(), since it can be entirely shared with
> legacy.
> -Chris

The request does reference the context - the alloc_reques() function 
takes a context object as a parameter. Thus it is impossible for the 
request to be used/supplied/required during context creation. The issue 
here is the lazy initialisation of the per ring context state which 
requires sending commands to the ring on first usage of the given 
context object on the given ring.

One problem is that the initialisation request and the batch buffer 
request cannot be merged at the moment. They both use request->batch_obj 
for tracking the command object. Thus this patch only works due to the 
deferred intialisation occurring during the i915_gem_validate_context() 
call very early on in execbuffer() rather than as part of the context 
switch within the batch buffer execution which is much later.

I'm not sure what you mean by i915_request_switch_context(). The 
existing i915_switch_context() does now take just a request structure 
rather than a ring/ringbuf/context mixture. However, it is not really a 
good idea to do the context switch automatically as part of creating the 
request. The request creation and request execution could be quite 
separated in time, especially with a scheduler.

It should be possible to move the deferred initialisation within the 
context switch if the object tracking can be resolved. Thus they could 
share the same request and there would not be effectively two separate 
execution calls at the hardware level. Again, that's potentially work 
that could be done as a follow up task of improving the context 
management independent of the current task of removing the OLR.

John.

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Re: [PATCH 48/51] drm/i915: Update intel_ring_begin() to take a request structure

[John Harrison]

On 13/02/2015 12:20, Chris Wilson wrote:
> On Fri, Feb 13, 2015 at 11:48:57AM +0000, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> Now that everything above has been converted to use requests, intel_ring_begin()
>> can be updated to take a request instead of a ring. This also means that it no
>> longer needs to lazily allocate a request if no-one happens to have done it
>> earlier.
> Hmm, you missed out on returning @ring@ from intel_ring_begin() to make it
> explicit that accessing @ring@ through any other means is verboten.
> -Chris

Not sure what you mean here. The ring is used and necessary (at the 
moment) in quite a lot of places. The ringbuf object could maybe be 
returned by intel_ring_begin(). Although there places like 
_add_request() and _retire_requests() do access the ringbuf to do tail 
tracking. So some alternative access method or tracking scheme would be 
required for those uses.

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[PATCH 00/53] Remove the outstanding_lazy_request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The driver tracks GPU work using request structures. Unfortunately, this
tracking is not currently explicit but is done by means of a catch-all request
that floats around in the background hoovering up work until it gets submitted.
This background request (ring->outstanding_lazy_request or OLR) is created at
the point of actually writing to the ring rather than when a particular piece of
GPU work is started. This scheme sort of hangs together but causes a number of
issues. It can mean that multiple pieces of independent work are lumped together
in the same request or that work is not officially submitted until much later
than it was created.

This patch series completely removes the OLR and explicitly tracks each piece of
work with it's own personal request structure from start to submission.

The patch set seems to fix the "'gem_ringfill --r render' + ctrl-c straight
after boot" issue logged as BZ:40112. I haven't done any analysis of that
particular issue but the descriptions I've seen appear to blame an inconsistent
or mangled OLR.

Note also that by the end of this series, a number of differences between the
legacy and execlist code paths have been removed. For example add_request() and
emit_request() now have the same signature thus could be merged back to a single
function pointer. Merging some of these together would also allow the removal of
a bunch of 'if(execlists)' tests where the difference is simply to call the
legacy function or the execlist one.

v2: Rebased to newer nightly tree, fixed up a few minor issues, added two extra
patches - one to move the LRC ring begin around in the vein of other recent
reshuffles, the other to clean up some issues with i915_add_request().

[Patches against drm-intel-nightly tree fetched 13/02/2015]

John Harrison (53):
  drm/i915: Rename 'flags' to 'dispatch_flags' for better code reading
  drm/i915: Add missing trace point to LRC execbuff code path
  drm/i915: Cache ringbuf pointer in request structure
  drm/i915: Merged the many do_execbuf() parameters into a structure
  drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()
  drm/i915: Wrap request allocation with a function pointer
  drm/i915: Early alloc request in execbuff
  drm/i915: Update alloc_request to return the allocated request
  drm/i915: Add request to execbuf params and add explicit cleanup
  drm/i915: Update the dispatch tracepoint to use params->request
  drm/i915: Update move_to_gpu() to take a request structure
  drm/i915: Update execbuffer_move_to_active() to take a request structure
  drm/i915: Add flag to i915_add_request() to skip the cache flush
  drm/i915: Update pin_to_display_plane() to do explicit request management
  drm/i915: Update i915_gem_object_sync() to take a request structure
  drm/i915: Update i915_gpu_idle() to manage its own request
  drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring
  drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()
  drm/i915: Add explicit request management to i915_gem_init_hw()
  drm/i915: Update ppgtt_init_ring() & context_enable() to take requests
  drm/i915: Set context in request from creation even in legacy mode
  drm/i915: Update i915_switch_context() to take a request structure
  drm/i915: Update do_switch() to take a request structure
  drm/i915: Update deferred context creation to do explicit request management
  drm/i915: Update init_context() to take a request structure
  drm/i915: Update render_state_init() to take a request structure
  drm/i915: Update overlay code to do explicit request management
  drm/i915: Update queue_flip() to do explicit request management
  drm/i915: Update add_request() to take a request structure
  drm/i915: Update [vma|object]_move_to_active() to take request structures
  drm/i915: Update l3_remap to take a request structure
  drm/i915: Update mi_set_context() to take a request structure
  drm/i915: Update a bunch of execbuffer heplers to take request structures
  drm/i915: Update workarounds_emit() to take request structures
  drm/i915: Update flush_all_caches() to take request structures
  drm/i915: Update switch_mm() to take a request structure
  drm/i915: Update ring->flush() to take a requests structure
  drm/i915: Update some flush helpers to take request structures
  drm/i915: Update ring->emit_flush() to take a request structure
  drm/i915: Update ring->add_request() to take a request structure
  drm/i915: Update ring->emit_request() to take a request structure
  drm/i915: Update ring->dispatch_execbuffer() to take a request structure
  drm/i915: Update ring->emit_bb_start() to take a request structure
  drm/i915: Update ring->sync_to() to take a request structure
  drm/i915: Update ring->signal() to take a request structure
  drm/i915: Update cacheline_align() to take a request structure
  drm/i915: Update ironlake_enable_rc6() to do explicit request management
  drm/i915: Update intel_ring_begin() to take a request structure
  drm/i915: Make intel_logical_ring_begin() static
  drm/i915: Update intel_logical_ring_begin() to take a request structure
  drm/i915: Remove the now obsolete intel_ring_get_request()
  drm/i915: Remove the now obsolete 'outstanding_lazy_request'
  drm/i915: Move the request/file and request/pid association to creation time

 drivers/gpu/drm/i915/i915_drv.h              |   72 ++--
 drivers/gpu/drm/i915/i915_gem.c              |  256 +++++++-----
 drivers/gpu/drm/i915/i915_gem_context.c      |   76 ++--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |  141 ++++---
 drivers/gpu/drm/i915/i915_gem_gtt.c          |   58 +--
 drivers/gpu/drm/i915/i915_gem_gtt.h          |    3 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |   16 +-
 drivers/gpu/drm/i915/i915_gem_render_state.h |    2 +-
 drivers/gpu/drm/i915/intel_display.c         |   55 ++-
 drivers/gpu/drm/i915/intel_lrc.c             |  553 +++++++++++++-------------
 drivers/gpu/drm/i915/intel_lrc.h             |   18 +-
 drivers/gpu/drm/i915/intel_overlay.c         |   64 ++-
 drivers/gpu/drm/i915/intel_pm.c              |   33 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c      |  287 ++++++-------
 drivers/gpu/drm/i915/intel_ringbuffer.h      |   51 +--
 15 files changed, 918 insertions(+), 767 deletions(-)

-- 
1.7.9.5

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[PATCH 01/53] drm/i915: Rename 'flags' to 'dispatch_flags' for better code reading

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

There is a flags word that is passed through the execbuffer code path all the
way from initial decoding of the user parameters down to the very final dispatch
buffer call. It is simply called 'flags'. Unfortuantely, there are many other
flags words floating around in the same blocks of code. Even more once the GPU
scheduler arrives.

This patch makes it more obvious exactly which flags word is which by renaming
'flags' to 'dispatch_flags'. Note that the bit definitions for this flags word
already have an 'I915_DISPATCH_' prefix on them and so are not quite so
ambiguous.

For: VIZ-1587
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   25 ++++++++++----------
 drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++----
 drivers/gpu/drm/i915/intel_lrc.h           |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   35 ++++++++++++++++------------
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ++--
 5 files changed, 41 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index b773368..ec9ea45 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1138,7 +1138,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 			       struct drm_i915_gem_execbuffer2 *args,
 			       struct list_head *vmas,
 			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 flags)
+			       u64 exec_start, u32 dispatch_flags)
 {
 	struct drm_clip_rect *cliprects = NULL;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1266,19 +1266,19 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 
 			ret = ring->dispatch_execbuffer(ring,
 							exec_start, exec_len,
-							flags);
+							dispatch_flags);
 			if (ret)
 				goto error;
 		}
 	} else {
 		ret = ring->dispatch_execbuffer(ring,
 						exec_start, exec_len,
-						flags);
+						dispatch_flags);
 		if (ret)
 			return ret;
 	}
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
@@ -1353,7 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct i915_address_space *vm;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u64 exec_start = args->batch_start_offset;
-	u32 flags;
+	u32 dispatch_flags;
 	int ret;
 	bool need_relocs;
 
@@ -1364,15 +1364,15 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	if (ret)
 		return ret;
 
-	flags = 0;
+	dispatch_flags = 0;
 	if (args->flags & I915_EXEC_SECURE) {
 		if (!file->is_master || !capable(CAP_SYS_ADMIN))
 		    return -EPERM;
 
-		flags |= I915_DISPATCH_SECURE;
+		dispatch_flags |= I915_DISPATCH_SECURE;
 	}
 	if (args->flags & I915_EXEC_IS_PINNED)
-		flags |= I915_DISPATCH_PINNED;
+		dispatch_flags |= I915_DISPATCH_PINNED;
 
 	if ((args->flags & I915_EXEC_RING_MASK) > LAST_USER_RING) {
 		DRM_DEBUG("execbuf with unknown ring: %d\n",
@@ -1495,7 +1495,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 						      args->batch_start_offset,
 						      args->batch_len,
 						      file->is_master,
-						      &flags);
+						      &dispatch_flags);
 		if (IS_ERR(batch_obj)) {
 			ret = PTR_ERR(batch_obj);
 			goto err;
@@ -1507,7 +1507,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
 	 * batch" bit. Hence we need to pin secure batches into the global gtt.
 	 * hsw should have this fixed, but bdw mucks it up again. */
-	if (flags & I915_DISPATCH_SECURE) {
+	if (dispatch_flags & I915_DISPATCH_SECURE) {
 		/*
 		 * So on first glance it looks freaky that we pin the batch here
 		 * outside of the reservation loop. But:
@@ -1527,7 +1527,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		exec_start += i915_gem_obj_offset(batch_obj, vm);
 
 	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
-				      &eb->vmas, batch_obj, exec_start, flags);
+				      &eb->vmas, batch_obj, exec_start,
+				      dispatch_flags);
 
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
@@ -1535,7 +1536,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	 * needs to be adjusted to also track the ggtt batch vma properly as
 	 * active.
 	 */
-	if (flags & I915_DISPATCH_SECURE)
+	if (dispatch_flags & I915_DISPATCH_SECURE)
 		i915_gem_object_ggtt_unpin(batch_obj);
 err:
 	/* the request owns the ref now */
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index aafcef3..f30a8e3 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -620,7 +620,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
  * @vmas: list of vmas.
  * @batch_obj: the batchbuffer to submit.
  * @exec_start: batchbuffer start virtual address pointer.
- * @flags: translated execbuffer call flags.
+ * @dispatch_flags: translated execbuffer call flags.
  *
  * This is the evil twin version of i915_gem_ringbuffer_submission. It abstracts
  * away the submission details of the execbuffer ioctl call.
@@ -633,7 +633,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 			       struct drm_i915_gem_execbuffer2 *args,
 			       struct list_head *vmas,
 			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 flags)
+			       u64 exec_start, u32 dispatch_flags)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
@@ -706,7 +706,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		dev_priv->relative_constants_mode = instp_mode;
 	}
 
-	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags);
+	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
 	if (ret)
 		return ret;
 
@@ -1163,9 +1163,9 @@ static int gen9_init_render_ring(struct intel_engine_cs *ring)
 
 static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
 			      struct intel_context *ctx,
-			      u64 offset, unsigned flags)
+			      u64 offset, unsigned dispatch_flags)
 {
-	bool ppgtt = !(flags & I915_DISPATCH_SECURE);
+	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
 	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index f635735..b66fc4d 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -82,7 +82,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 			       struct drm_i915_gem_execbuffer2 *args,
 			       struct list_head *vmas,
 			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 flags);
+			       u64 exec_start, u32 dispatch_flags);
 u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
 
 void intel_lrc_irq_handler(struct intel_engine_cs *ring);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index d17e76d..ca7de3d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1690,7 +1690,7 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
 static int
 i965_dispatch_execbuffer(struct intel_engine_cs *ring,
 			 u64 offset, u32 length,
-			 unsigned flags)
+			 unsigned dispatch_flags)
 {
 	int ret;
 
@@ -1701,7 +1701,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
 	intel_ring_emit(ring,
 			MI_BATCH_BUFFER_START |
 			MI_BATCH_GTT |
-			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
+			(dispatch_flags & I915_DISPATCH_SECURE ?
+			 0 : MI_BATCH_NON_SECURE_I965));
 	intel_ring_emit(ring, offset);
 	intel_ring_advance(ring);
 
@@ -1714,8 +1715,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
 #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
 static int
 i830_dispatch_execbuffer(struct intel_engine_cs *ring,
-				u64 offset, u32 len,
-				unsigned flags)
+			 u64 offset, u32 len,
+			 unsigned dispatch_flags)
 {
 	u32 cs_offset = ring->scratch.gtt_offset;
 	int ret;
@@ -1733,7 +1734,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
 
-	if ((flags & I915_DISPATCH_PINNED) == 0) {
+	if ((dispatch_flags & I915_DISPATCH_PINNED) == 0) {
 		if (len > I830_BATCH_LIMIT)
 			return -ENOSPC;
 
@@ -1765,7 +1766,8 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
 		return ret;
 
 	intel_ring_emit(ring, MI_BATCH_BUFFER);
-	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
+	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
+					0 : MI_BATCH_NON_SECURE));
 	intel_ring_emit(ring, offset + len - 8);
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
@@ -1776,7 +1778,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
 static int
 i915_dispatch_execbuffer(struct intel_engine_cs *ring,
 			 u64 offset, u32 len,
-			 unsigned flags)
+			 unsigned dispatch_flags)
 {
 	int ret;
 
@@ -1785,7 +1787,8 @@ i915_dispatch_execbuffer(struct intel_engine_cs *ring,
 		return ret;
 
 	intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT);
-	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
+	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
+					0 : MI_BATCH_NON_SECURE));
 	intel_ring_advance(ring);
 
 	return 0;
@@ -2352,9 +2355,10 @@ static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
 static int
 gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 			      u64 offset, u32 len,
-			      unsigned flags)
+			      unsigned dispatch_flags)
 {
-	bool ppgtt = USES_PPGTT(ring->dev) && !(flags & I915_DISPATCH_SECURE);
+	bool ppgtt = USES_PPGTT(ring->dev) &&
+			!(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
 	ret = intel_ring_begin(ring, 4);
@@ -2373,8 +2377,8 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 
 static int
 hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
-			      u64 offset, u32 len,
-			      unsigned flags)
+			     u64 offset, u32 len,
+			     unsigned dispatch_flags)
 {
 	int ret;
 
@@ -2384,7 +2388,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 
 	intel_ring_emit(ring,
 			MI_BATCH_BUFFER_START |
-			(flags & I915_DISPATCH_SECURE ?
+			(dispatch_flags & I915_DISPATCH_SECURE ?
 			 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW));
 	/* bit0-7 is the length on GEN6+ */
 	intel_ring_emit(ring, offset);
@@ -2396,7 +2400,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 static int
 gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 			      u64 offset, u32 len,
-			      unsigned flags)
+			      unsigned dispatch_flags)
 {
 	int ret;
 
@@ -2406,7 +2410,8 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 
 	intel_ring_emit(ring,
 			MI_BATCH_BUFFER_START |
-			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
+			(dispatch_flags & I915_DISPATCH_SECURE ?
+			 0 : MI_BATCH_NON_SECURE_I965));
 	/* bit0-7 is the length on GEN6+ */
 	intel_ring_emit(ring, offset);
 	intel_ring_advance(ring);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index b6c484f..ffa3724 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -164,7 +164,7 @@ struct  intel_engine_cs {
 				     u32 seqno);
 	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
 					       u64 offset, u32 length,
-					       unsigned flags);
+					       unsigned dispatch_flags);
 #define I915_DISPATCH_SECURE 0x1
 #define I915_DISPATCH_PINNED 0x2
 	void		(*cleanup)(struct intel_engine_cs *ring);
@@ -242,7 +242,7 @@ struct  intel_engine_cs {
 				      u32 flush_domains);
 	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
 					 struct intel_context *ctx,
-					 u64 offset, unsigned flags);
+					 u64 offset, unsigned dispatch_flags);
 
 	/**
 	 * List of objects currently involved in rendering from the
-- 
1.7.9.5

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[PATCH 02/53] drm/i915: Add missing trace point to LRC execbuff code path

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

There is a trace point in the legacy execbuffer execution path that is missing
from the execlist path. Trace points are extremely useful for debugging and are
used by various automated validation tests. Hence, this patch adds the missing
trace point back in.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f30a8e3..637cbb7 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -710,6 +710,8 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 	if (ret)
 		return ret;
 
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
 
-- 
1.7.9.5

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[PATCH 03/53] drm/i915: Cache ringbuf pointer in request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In execlist mode, the ringbuf is a function of the ring and context whereas in
legacy mode, it is derived from the ring alone. Thus the calculation required to
determine the ringbuf pointer from the ring (and context) also needs to test
execlist mode or not. This is messy.

Further, the request structure holds a pointer to both the ring and the context
for which it was created. Thus, given a request, it is possible to derive the
ringbuf in either legacy or execlist mode. Hence it is necessary to pass just
the request in to all the low level functions rather than some combination of
request, ring, context and ringbuf. However, rather than recalculating it each
time, it is much simpler to just cache the ringbuf pointer in the request
structure itself.

Caching the pointer means the calculation is done one at request creation time
and all further code and simply read it directly from the request structure.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    3 ++-
 drivers/gpu/drm/i915/i915_gem.c         |   14 +-------------
 drivers/gpu/drm/i915/intel_lrc.c        |    6 ++++--
 drivers/gpu/drm/i915/intel_ringbuffer.c |    1 +
 4 files changed, 8 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2dedd43..ba09137 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2144,8 +2144,9 @@ struct drm_i915_gem_request {
 	/** Position in the ringbuffer of the end of the whole request */
 	u32 tail;
 
-	/** Context related to this request */
+	/** Context and ring buffer related to this request */
 	struct intel_context *ctx;
+	struct intel_ringbuffer *ringbuf;
 
 	/** Batch buffer related to this request if any */
 	struct drm_i915_gem_object *batch_obj;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 61134ab..7a0dc7c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2763,7 +2763,6 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
 
 	while (!list_empty(&ring->request_list)) {
 		struct drm_i915_gem_request *request;
-		struct intel_ringbuffer *ringbuf;
 
 		request = list_first_entry(&ring->request_list,
 					   struct drm_i915_gem_request,
@@ -2774,23 +2773,12 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
 
 		trace_i915_gem_request_retire(request);
 
-		/* This is one of the few common intersection points
-		 * between legacy ringbuffer submission and execlists:
-		 * we need to tell them apart in order to find the correct
-		 * ringbuffer to which the request belongs to.
-		 */
-		if (i915.enable_execlists) {
-			struct intel_context *ctx = request->ctx;
-			ringbuf = ctx->engine[ring->id].ringbuf;
-		} else
-			ringbuf = ring->buffer;
-
 		/* We know the GPU must have read the request to have
 		 * sent us the seqno + interrupt, so use the position
 		 * of tail of the request to update the last known position
 		 * of the GPU head.
 		 */
-		ringbuf->last_retired_head = request->postfix;
+		request->ringbuf->last_retired_head = request->postfix;
 
 		i915_gem_free_request(request);
 	}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 637cbb7..f14b517 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -888,12 +888,14 @@ static int logical_ring_alloc_request(struct intel_engine_cs *ring,
 		return ret;
 	}
 
-	/* Hold a reference to the context this request belongs to
+	/*
+	 * Hold a reference to the context this request belongs to
 	 * (we will need it when the time comes to emit/retire the
-	 * request).
+	 * request). Likewise, the ringbuff is useful to keep track of.
 	 */
 	request->ctx = ctx;
 	i915_gem_context_reference(request->ctx);
+	request->ringbuf = ctx->engine[ring->id].ringbuf;
 
 	ring->outstanding_lazy_request = request;
 	return 0;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index ca7de3d..7fd89e5 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2179,6 +2179,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring)
 
 	kref_init(&request->ref);
 	request->ring = ring;
+	request->ringbuf = ring->buffer;
 	request->uniq = dev_private->request_uniq++;
 
 	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
-- 
1.7.9.5

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[PATCH 04/53] drm/i915: Merged the many do_execbuf() parameters into a structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The do_execbuf() function takes quite a few parameters. The actual set of
parameters is going to change with the conversion to passing requests around.
Further, it is due to grow massively with the arrival of the GPU scheduler.

This patch simplies the prototype by passing a parameter structure instead.
Changing the parameter set in the future is then simply a matter of
adding/removing items to the structure.

Note that the structure does not contain absolutely everything that is passed
in. This is because the intention is to use this structure more extensively
later in this patch series and more especially in the GPU scheduler that is
coming soon. The latter requires hanging on to the structure as the final
hardware submission can be delayed until long after the execbuf IOCTL has
returned to user land. Thus it is unsafe to put anything in the structure that
is local to the IOCTL call itself - such as the 'args' parameter. All entries
must be copies of data or pointers to structures that are reference counted in
someway and guaranteed to exist for the duration of the batch buffer's life.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |   27 +++++++-------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   56 ++++++++++++++++++----------
 drivers/gpu/drm/i915/intel_lrc.c           |   26 +++++++------
 drivers/gpu/drm/i915/intel_lrc.h           |    9 ++---
 4 files changed, 67 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ba09137..fdd63ab 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1645,6 +1645,16 @@ struct i915_virtual_gpu {
 	bool active;
 };
 
+struct i915_execbuffer_params {
+	struct drm_device               *dev;
+	struct drm_file                 *file;
+	uint32_t                        dispatch_flags;
+	uint32_t                        batch_obj_vm_offset;
+	struct intel_engine_cs          *ring;
+	struct drm_i915_gem_object      *batch_obj;
+	struct intel_context            *ctx;
+};
+
 struct drm_i915_private {
 	struct drm_device *dev;
 	struct kmem_cache *slab;
@@ -1898,13 +1908,9 @@ struct drm_i915_private {
 
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
-		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
-				  struct intel_engine_cs *ring,
-				  struct intel_context *ctx,
+		int (*do_execbuf)(struct i915_execbuffer_params *params,
 				  struct drm_i915_gem_execbuffer2 *args,
-				  struct list_head *vmas,
-				  struct drm_i915_gem_object *batch_obj,
-				  u64 exec_start, u32 flags);
+				  struct list_head *vmas);
 		int (*init_rings)(struct drm_device *dev);
 		void (*cleanup_ring)(struct intel_engine_cs *ring);
 		void (*stop_ring)(struct intel_engine_cs *ring);
@@ -2638,14 +2644,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 					 struct drm_file *file,
 					 struct intel_engine_cs *ring,
 					 struct drm_i915_gem_object *obj);
-int i915_gem_ringbuffer_submission(struct drm_device *dev,
-				   struct drm_file *file,
-				   struct intel_engine_cs *ring,
-				   struct intel_context *ctx,
+int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
-				   struct list_head *vmas,
-				   struct drm_i915_gem_object *batch_obj,
-				   u64 exec_start, u32 flags);
+				   struct list_head *vmas);
 int i915_gem_execbuffer(struct drm_device *dev, void *data,
 			struct drm_file *file_priv);
 int i915_gem_execbuffer2(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index ec9ea45..93b0ef0 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1132,17 +1132,15 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *ring,
 }
 
 int
-i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags)
+			       struct list_head *vmas)
 {
 	struct drm_clip_rect *cliprects = NULL;
+	struct drm_device *dev = params->dev;
+	struct intel_engine_cs *ring = params->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u64 exec_len;
+	u64 exec_start, exec_len;
 	int instp_mode;
 	u32 instp_mask;
 	int i, ret = 0;
@@ -1194,7 +1192,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 	if (ret)
 		goto error;
 
-	ret = i915_switch_context(ring, ctx);
+	ret = i915_switch_context(ring, params->ctx);
 	if (ret)
 		goto error;
 
@@ -1251,12 +1249,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 	}
 
 	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
-		ret = i915_reset_gen7_sol_offsets(dev, ring);
+		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
 		if (ret)
 			goto error;
 	}
 
-	exec_len = args->batch_len;
+	exec_len   = args->batch_len;
+	exec_start = params->batch_obj_vm_offset +
+		     args->batch_start_offset;
+
 	if (cliprects) {
 		for (i = 0; i < args->num_cliprects; i++) {
 			ret = i915_emit_box(ring, &cliprects[i],
@@ -1266,22 +1267,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 
 			ret = ring->dispatch_execbuffer(ring,
 							exec_start, exec_len,
-							dispatch_flags);
+							params->dispatch_flags);
 			if (ret)
 				goto error;
 		}
 	} else {
 		ret = ring->dispatch_execbuffer(ring,
 						exec_start, exec_len,
-						dispatch_flags);
+						params->dispatch_flags);
 		if (ret)
 			return ret;
 	}
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
+					    params->batch_obj);
 
 error:
 	kfree(cliprects);
@@ -1351,8 +1353,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct intel_engine_cs *ring;
 	struct intel_context *ctx;
 	struct i915_address_space *vm;
+	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
+	struct i915_execbuffer_params *params = &params_master;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
-	u64 exec_start = args->batch_start_offset;
 	u32 dispatch_flags;
 	int ret;
 	bool need_relocs;
@@ -1445,6 +1448,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	else
 		vm = &dev_priv->gtt.base;
 
+	memset(&params_master, 0x00, sizeof(params_master));
+
 	eb = eb_create(args);
 	if (eb == NULL) {
 		i915_gem_context_unreference(ctx);
@@ -1522,13 +1527,24 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		if (ret)
 			goto err;
 
-		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
+		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
 	} else
-		exec_start += i915_gem_obj_offset(batch_obj, vm);
+		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
-	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
-				      &eb->vmas, batch_obj, exec_start,
-				      dispatch_flags);
+	/*
+	 * Save assorted stuff away to pass through to *_submission().
+	 * NB: This data should be 'persistent' and not local as it will
+	 * kept around beyond the duration of the IOCTL once the GPU
+	 * scheduler arrives.
+	 */
+	params->dev                     = dev;
+	params->file                    = file;
+	params->ring                    = ring;
+	params->dispatch_flags          = dispatch_flags;
+	params->batch_obj               = batch_obj;
+	params->ctx                     = ctx;
+
+	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
 
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f14b517..f6a24e8a2 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -627,16 +627,15 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
  *
  * Return: non-zero if the submission fails.
  */
-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+int intel_execlists_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags)
+			       struct list_head *vmas)
 {
+	struct drm_device       *dev = params->dev;
+	struct intel_engine_cs  *ring = params->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
+	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
+	u64 exec_start;
 	int instp_mode;
 	u32 instp_mask;
 	int ret;
@@ -687,13 +686,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		return -EINVAL;
 	}
 
-	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
+	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
 	if (ret)
 		return ret;
 
 	if (ring == &dev_priv->ring[RCS] &&
 	    instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
 		if (ret)
 			return ret;
 
@@ -706,14 +705,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		dev_priv->relative_constants_mode = instp_mode;
 	}
 
-	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
+	exec_start = params->batch_obj_vm_offset +
+		     args->batch_start_offset;
+
+	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index b66fc4d..3a6abce 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -76,13 +76,10 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
 
 /* Execlists */
 int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+struct i915_execbuffer_params;
+int intel_execlists_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags);
+			       struct list_head *vmas);
 u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
 
 void intel_lrc_irq_handler(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 05/53] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

For some reason, the i915_add_request() call in
i915_gem_execbuffer_retire_commands() was explicitly having its return code
ignored. The _retire_commands() function itself was 'void'. Given that
_add_request() can fail without dispatching the batch buffer, this seems odd.

Also shrunk the parameter list to a single structure as everything it requires
is available in the execbuff_params object.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    5 +----
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   16 +++++++---------
 drivers/gpu/drm/i915/intel_lrc.c           |    3 +--
 3 files changed, 9 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fdd63ab..b350910 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2640,10 +2640,7 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
 			     struct drm_file *file_priv);
 void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 					struct intel_engine_cs *ring);
-void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
-					 struct drm_file *file,
-					 struct intel_engine_cs *ring,
-					 struct drm_i915_gem_object *obj);
+int i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
 int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
 				   struct list_head *vmas);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 93b0ef0..ca85803 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -989,17 +989,15 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 	}
 }
 
-void
-i915_gem_execbuffer_retire_commands(struct drm_device *dev,
-				    struct drm_file *file,
-				    struct intel_engine_cs *ring,
-				    struct drm_i915_gem_object *obj)
+int
+i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 {
 	/* Unconditionally force add_request to emit a full flush. */
-	ring->gpu_caches_dirty = true;
+	params->ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	(void)__i915_add_request(ring, file, obj);
+	return __i915_add_request(params->ring, params->file,
+				  params->batch_obj);
 }
 
 static int
@@ -1282,8 +1280,8 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
-					    params->batch_obj);
+
+	ret = i915_gem_execbuffer_retire_commands(params);
 
 error:
 	kfree(cliprects);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f6a24e8a2..dc474b4 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -715,9 +715,8 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
 
-	return 0;
+	return i915_gem_execbuffer_retire_commands(params);
 }
 
 void intel_execlists_retire_requests(struct intel_engine_cs *ring)
-- 
1.7.9.5

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[PATCH 06/53] drm/i915: Wrap request allocation with a function pointer

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In order to explicitly manage requests from creation to submission, it is
necessary to be able to explicitly create them in the first place. This patch
adds an indirection wrapper to the request creation function so that it can be
called from generic code without having to worry about execlist vs legacy mode.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 ++
 drivers/gpu/drm/i915/i915_gem.c         |    2 ++
 drivers/gpu/drm/i915/intel_lrc.c        |    6 +++---
 drivers/gpu/drm/i915/intel_lrc.h        |    2 ++
 drivers/gpu/drm/i915/intel_ringbuffer.c |    6 +++---
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 ++
 6 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b350910..87a4a2e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1908,6 +1908,8 @@ struct drm_i915_private {
 
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
+		int (*alloc_request)(struct intel_engine_cs *ring,
+				     struct intel_context *ctx);
 		int (*do_execbuf)(struct i915_execbuffer_params *params,
 				  struct drm_i915_gem_execbuffer2 *args,
 				  struct list_head *vmas);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 7a0dc7c..cf959e3 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4860,11 +4860,13 @@ int i915_gem_init(struct drm_device *dev)
 	}
 
 	if (!i915.enable_execlists) {
+		dev_priv->gt.alloc_request = intel_ring_alloc_request;
 		dev_priv->gt.do_execbuf = i915_gem_ringbuffer_submission;
 		dev_priv->gt.init_rings = i915_gem_init_rings;
 		dev_priv->gt.cleanup_ring = intel_cleanup_ring_buffer;
 		dev_priv->gt.stop_ring = intel_stop_ring_buffer;
 	} else {
+		dev_priv->gt.alloc_request = intel_logical_ring_alloc_request;
 		dev_priv->gt.do_execbuf = intel_execlists_submission;
 		dev_priv->gt.init_rings = intel_logical_rings_init;
 		dev_priv->gt.cleanup_ring = intel_logical_ring_cleanup;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index dc474b4..8628abf 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -856,8 +856,8 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
 	}
 }
 
-static int logical_ring_alloc_request(struct intel_engine_cs *ring,
-				      struct intel_context *ctx)
+int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
+				     struct intel_context *ctx)
 {
 	struct drm_i915_gem_request *request;
 	struct drm_i915_private *dev_private = ring->dev->dev_private;
@@ -1066,7 +1066,7 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = logical_ring_alloc_request(ring, ctx);
+	ret = intel_logical_ring_alloc_request(ring, ctx);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 3a6abce..3cc38bd 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -36,6 +36,8 @@
 #define RING_CONTEXT_STATUS_PTR(ring)	((ring)->mmio_base+0x3a0)
 
 /* Logical Rings */
+int __must_check intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
+						  struct intel_context *ctx);
 void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 7fd89e5..635707a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2163,8 +2163,8 @@ int intel_ring_idle(struct intel_engine_cs *ring)
 	return i915_wait_request(req);
 }
 
-static int
-intel_ring_alloc_request(struct intel_engine_cs *ring)
+int
+intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx)
 {
 	int ret;
 	struct drm_i915_gem_request *request;
@@ -2229,7 +2229,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = intel_ring_alloc_request(ring);
+	ret = intel_ring_alloc_request(ring, NULL);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index ffa3724..2fd960a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -392,6 +392,8 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
 int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
+int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
+					  struct intel_context *ctx);
 static inline void intel_ring_emit(struct intel_engine_cs *ring,
 				   u32 data)
 {
-- 
1.7.9.5

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[PATCH 07/53] drm/i915: Early alloc request in execbuff

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Start of explicit request management in the execbuffer code path. This patch
adds a call to allocate a request structure before all the actual hardware work
is done. Thus guaranteeing that all that work is tagged by a known request. At
present, nothing further is done with the request, the rest comes later in the
series.

The only noticable change is that failure to get a request (e.g. due to lack of
memory) will be caught earlier in the sequence. It now occurs right at the start
before any un-undoable work has been done.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index ca85803..61471e9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1356,7 +1356,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u32 dispatch_flags;
 	int ret;
-	bool need_relocs;
+	bool need_relocs, batch_pinned = false;
 
 	if (!i915_gem_check_execbuffer(args))
 		return -EINVAL;
@@ -1525,10 +1525,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		if (ret)
 			goto err;
 
+		batch_pinned = true;
 		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
 	} else
 		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
+	/* Allocate a request for this batch buffer nice and early. */
+	ret = dev_priv->gt.alloc_request(ring, ctx);
+	if (ret)
+		goto err;
+
 	/*
 	 * Save assorted stuff away to pass through to *_submission().
 	 * NB: This data should be 'persistent' and not local as it will
@@ -1544,15 +1550,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 
 	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
 
+err:
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
 	 * batch vma for correctness. For less ugly and less fragility this
 	 * needs to be adjusted to also track the ggtt batch vma properly as
 	 * active.
 	 */
-	if (dispatch_flags & I915_DISPATCH_SECURE)
+	if (batch_pinned)
 		i915_gem_object_ggtt_unpin(batch_obj);
-err:
+
 	/* the request owns the ref now */
 	i915_gem_context_unreference(ctx);
 	eb_destroy(eb);
-- 
1.7.9.5

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[PATCH 08/53] drm/i915: Update alloc_request to return the allocated request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The alloc_request() function does not actually return the newly allocated
request. Instead, it must be pulled from ring->outstanding_lazy_request. This
patch fixes this so that code can create a request and start using it knowing
exactly which request it actually owns.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
 drivers/gpu/drm/i915/intel_lrc.c           |   13 +++++++++----
 drivers/gpu/drm/i915/intel_lrc.h           |    3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   14 ++++++++++----
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    3 ++-
 6 files changed, 27 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 87a4a2e..90223f208 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1909,7 +1909,8 @@ struct drm_i915_private {
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
 		int (*alloc_request)(struct intel_engine_cs *ring,
-				     struct intel_context *ctx);
+				     struct intel_context *ctx,
+				     struct drm_i915_gem_request **req_out);
 		int (*do_execbuf)(struct i915_execbuffer_params *params,
 				  struct drm_i915_gem_execbuffer2 *args,
 				  struct list_head *vmas);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 61471e9..37dcc6f 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1353,6 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct i915_address_space *vm;
 	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
 	struct i915_execbuffer_params *params = &params_master;
+	struct drm_i915_gem_request *request;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u32 dispatch_flags;
 	int ret;
@@ -1531,7 +1532,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
 	/* Allocate a request for this batch buffer nice and early. */
-	ret = dev_priv->gt.alloc_request(ring, ctx);
+	ret = dev_priv->gt.alloc_request(ring, ctx, &request);
 	if (ret)
 		goto err;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 8628abf..c3c783f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -857,13 +857,17 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
 }
 
 int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
-				     struct intel_context *ctx)
+				     struct intel_context *ctx,
+				     struct drm_i915_gem_request **req_out)
 {
 	struct drm_i915_gem_request *request;
 	struct drm_i915_private *dev_private = ring->dev->dev_private;
 	int ret;
 
-	if (ring->outstanding_lazy_request)
+	if (!req_out)
+		return -EINVAL;
+
+	if ((*req_out = ring->outstanding_lazy_request) != NULL)
 		return 0;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
@@ -898,7 +902,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
 	i915_gem_context_reference(request->ctx);
 	request->ringbuf = ctx->engine[ring->id].ringbuf;
 
-	ring->outstanding_lazy_request = request;
+	*req_out = ring->outstanding_lazy_request = request;
 	return 0;
 }
 
@@ -1051,6 +1055,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
 int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 			     struct intel_context *ctx, int num_dwords)
 {
+	struct drm_i915_gem_request *req;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1066,7 +1071,7 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = intel_logical_ring_alloc_request(ring, ctx);
+	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 3cc38bd..77de8ac 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -37,7 +37,8 @@
 
 /* Logical Rings */
 int __must_check intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
-						  struct intel_context *ctx);
+						  struct intel_context *ctx,
+						  struct drm_i915_gem_request **req_out);
 void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 635707a..1a9f884 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2164,13 +2164,18 @@ int intel_ring_idle(struct intel_engine_cs *ring)
 }
 
 int
-intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx)
+intel_ring_alloc_request(struct intel_engine_cs *ring,
+			 struct intel_context *ctx,
+			 struct drm_i915_gem_request **req_out)
 {
 	int ret;
 	struct drm_i915_gem_request *request;
 	struct drm_i915_private *dev_private = ring->dev->dev_private;
 
-	if (ring->outstanding_lazy_request)
+	if (!req_out)
+		return -EINVAL;
+
+	if ((*req_out = ring->outstanding_lazy_request) != NULL)
 		return 0;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
@@ -2188,7 +2193,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx
 		return ret;
 	}
 
-	ring->outstanding_lazy_request = request;
+	*req_out = ring->outstanding_lazy_request = request;
 	return 0;
 }
 
@@ -2216,6 +2221,7 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring,
 int intel_ring_begin(struct intel_engine_cs *ring,
 		     int num_dwords)
 {
+	struct drm_i915_gem_request *req;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	int ret;
 
@@ -2229,7 +2235,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = intel_ring_alloc_request(ring, NULL);
+	ret = intel_ring_alloc_request(ring, NULL, &req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 2fd960a..4f8a14a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -393,7 +393,8 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
 int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
 int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
-					  struct intel_context *ctx);
+					  struct intel_context *ctx,
+					  struct drm_i915_gem_request **req_out);
 static inline void intel_ring_emit(struct intel_engine_cs *ring,
 				   u32 data)
 {
-- 
1.7.9.5

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[PATCH 09/53] drm/i915: Add request to execbuf params and add explicit cleanup

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Rather than just having a local request variable in the execbuff code, the
request pointer is now stored in the execbuff params structure. Also added
explicit cleanup of the request (plus wiping the OLR to match) in the error
case. This means that the execbuff code is no longer dependent upon the OLR
keeping track of the request so as to not leak it when things do go wrong. Note
that in the success case, the i915_add_request() at the end of the submission
function will tidy up the request and clear the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    1 +
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 +++++++++++--
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 90223f208..678b190 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1653,6 +1653,7 @@ struct i915_execbuffer_params {
 	struct intel_engine_cs          *ring;
 	struct drm_i915_gem_object      *batch_obj;
 	struct intel_context            *ctx;
+	struct drm_i915_gem_request     *request;
 };
 
 struct drm_i915_private {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 37dcc6f..10462f6 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1353,7 +1353,6 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct i915_address_space *vm;
 	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
 	struct i915_execbuffer_params *params = &params_master;
-	struct drm_i915_gem_request *request;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u32 dispatch_flags;
 	int ret;
@@ -1532,7 +1531,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
 	/* Allocate a request for this batch buffer nice and early. */
-	ret = dev_priv->gt.alloc_request(ring, ctx, &request);
+	ret = dev_priv->gt.alloc_request(ring, ctx, &params->request);
 	if (ret)
 		goto err;
 
@@ -1565,6 +1564,16 @@ err:
 	i915_gem_context_unreference(ctx);
 	eb_destroy(eb);
 
+	/*
+	 * If the request was created but not successfully submitted then it
+	 * must be freed again. If it was submitted then it is being tracked
+	 * on the active request list and no clean up is required here.
+	 */
+	if (ret && params->request) {
+		i915_gem_request_unreference(params->request);
+		ring->outstanding_lazy_request = NULL;
+	}
+
 	mutex_unlock(&dev->struct_mutex);
 
 pre_mutex_err:
-- 
1.7.9.5

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[PATCH 10/53] drm/i915: Update the dispatch tracepoint to use params->request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated a couple of trace points to use the now cached request pointer rather
than extracting it from the ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 10462f6..883cabd 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1277,7 +1277,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			return ret;
 	}
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
+	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c3c783f..c42af08 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -712,7 +712,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
+	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 
-- 
1.7.9.5

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[PATCH 11/53] drm/i915: Update move_to_gpu() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the move_to_gpu() code paths.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   10 +++++-----
 drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++------
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 883cabd..da1e232 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -828,7 +828,7 @@ err:
 }
 
 static int
-i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
+i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
 				struct list_head *vmas)
 {
 	struct i915_vma *vma;
@@ -838,7 +838,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
 
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
-		ret = i915_gem_object_sync(obj, ring);
+		ret = i915_gem_object_sync(obj, req->ring);
 		if (ret)
 			return ret;
 
@@ -849,7 +849,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
 	}
 
 	if (flush_chipset)
-		i915_gem_chipset_flush(ring->dev);
+		i915_gem_chipset_flush(req->ring->dev);
 
 	if (flush_domains & I915_GEM_DOMAIN_GTT)
 		wmb();
@@ -857,7 +857,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return intel_ring_invalidate_all_caches(ring);
+	return intel_ring_invalidate_all_caches(req->ring);
 }
 
 static bool
@@ -1186,7 +1186,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 		}
 	}
 
-	ret = i915_gem_execbuffer_move_to_gpu(ring, vmas);
+	ret = i915_gem_execbuffer_move_to_gpu(params->request, vmas);
 	if (ret)
 		goto error;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c42af08..efe970f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -578,11 +578,9 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
-				 struct intel_context *ctx,
+static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 				 struct list_head *vmas)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
 	struct i915_vma *vma;
 	uint32_t flush_domains = 0;
 	bool flush_chipset = false;
@@ -591,7 +589,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
 
-		ret = i915_gem_object_sync(obj, ring);
+		ret = i915_gem_object_sync(obj, req->ring);
 		if (ret)
 			return ret;
 
@@ -607,7 +605,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return logical_ring_invalidate_all_caches(ringbuf, ctx);
+	return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx);
 }
 
 /**
@@ -686,7 +684,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 		return -EINVAL;
 	}
 
-	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
+	ret = execlists_move_to_gpu(params->request, vmas);
 	if (ret)
 		return ret;
 
-- 
1.7.9.5

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[PATCH 12/53] drm/i915: Update execbuffer_move_to_active() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the
execbuffer_move_to_active() code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    6 +++---
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 678b190..68d6dec 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2643,7 +2643,7 @@ int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
 int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
 			     struct drm_file *file_priv);
 void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
-					struct intel_engine_cs *ring);
+					struct drm_i915_gem_request *req);
 int i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
 int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index da1e232..f7c19bc 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -950,9 +950,9 @@ i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
 
 void
 i915_gem_execbuffer_move_to_active(struct list_head *vmas,
-				   struct intel_engine_cs *ring)
+				   struct drm_i915_gem_request *req)
 {
-	struct drm_i915_gem_request *req = intel_ring_get_request(ring);
+	struct intel_engine_cs *ring = i915_gem_request_get_ring(req);
 	struct i915_vma *vma;
 
 	list_for_each_entry(vma, vmas, exec_list) {
@@ -1279,7 +1279,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
-	i915_gem_execbuffer_move_to_active(vmas, ring);
+	i915_gem_execbuffer_move_to_active(vmas, params->request);
 
 	ret = i915_gem_execbuffer_retire_commands(params);
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index efe970f..bc3809e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -712,7 +712,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 
 	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
-	i915_gem_execbuffer_move_to_active(vmas, ring);
+	i915_gem_execbuffer_move_to_active(vmas, params->request);
 
 	return i915_gem_execbuffer_retire_commands(params);
 }
-- 
1.7.9.5

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[PATCH 13/53] drm/i915: Add flag to i915_add_request() to skip the cache flush

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In order to explcitly track all GPU work (and completely remove the outstanding
lazy request), it is necessary to add extra i915_add_request() calls to various
places. Some of these do not need the implicit cache flush done as part of the
standard batch buffer submission process.

This patch adds a flag to _add_request() to specify whether the flush is
required or not.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    7 +++++--
 drivers/gpu/drm/i915/i915_gem.c              |   25 +++++++++++--------------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    2 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
 5 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 68d6dec..375d4f9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2831,9 +2831,12 @@ int __must_check i915_gpu_idle(struct drm_device *dev);
 int __must_check i915_gem_suspend(struct drm_device *dev);
 int __i915_add_request(struct intel_engine_cs *ring,
 		       struct drm_file *file,
-		       struct drm_i915_gem_object *batch_obj);
+		       struct drm_i915_gem_object *batch_obj,
+		       bool flush_caches);
 #define i915_add_request(ring) \
-	__i915_add_request(ring, NULL, NULL)
+	__i915_add_request(ring, NULL, NULL, true)
+#define i915_add_request_no_flush(ring) \
+	__i915_add_request(ring, NULL, NULL, false)
 int __i915_wait_request(struct drm_i915_gem_request *req,
 			unsigned reset_counter,
 			bool interruptible,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index cf959e3..4c29177 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2409,7 +2409,8 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
 
 int __i915_add_request(struct intel_engine_cs *ring,
 		       struct drm_file *file,
-		       struct drm_i915_gem_object *obj)
+		       struct drm_i915_gem_object *obj,
+		       bool flush_caches)
 {
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	struct drm_i915_gem_request *request;
@@ -2434,12 +2435,11 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	 * is that the flush _must_ happen before the next request, no matter
 	 * what.
 	 */
-	if (i915.enable_execlists) {
-		ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
-		if (ret)
-			return ret;
-	} else {
-		ret = intel_ring_flush_all_caches(ring);
+	if (flush_caches) {
+		if (i915.enable_execlists)
+			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
+		else
+			ret = intel_ring_flush_all_caches(ring);
 		if (ret)
 			return ret;
 	}
@@ -2451,15 +2451,12 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	 */
 	request->postfix = intel_ring_get_tail(ringbuf);
 
-	if (i915.enable_execlists) {
+	if (i915.enable_execlists)
 		ret = ring->emit_request(ringbuf, request);
-		if (ret)
-			return ret;
-	} else {
+	else
 		ret = ring->add_request(ring);
-		if (ret)
-			return ret;
-	}
+	if (ret)
+		return ret;
 
 	request->head = request_start;
 	request->tail = intel_ring_get_tail(ringbuf);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index f7c19bc..76f6dcf 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -997,7 +997,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 
 	/* Add a breadcrumb for the completion of the batch buffer */
 	return __i915_add_request(params->ring, params->file,
-				  params->batch_obj);
+				  params->batch_obj, true);
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 521548a..aba39c3 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -173,7 +173,7 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, NULL, so.obj);
+	ret = __i915_add_request(ring, NULL, so.obj, true);
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index bc3809e..4b42346 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1370,7 +1370,7 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, file, so.obj);
+	ret = __i915_add_request(ring, file, so.obj, true);
 	/* intel_logical_ring_add_request moves object to inactive if it
 	 * fails */
 out:
-- 
1.7.9.5

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[PATCH 14/53] drm/i915: Update pin_to_display_plane() to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Added explicit creation creation and submission of the request structure to the
display object pinning code. This removes any reliance on the OLR keeping track
of the request and the unknown randomness that can ensue with other work
becoming part of the same request.

v2: Added semaphore enabled check to prevent allocating a pointless request
structure in the case where the sync just calls wait_rendering().

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c |   21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4c29177..5897d54 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3943,9 +3943,24 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
 	int ret;
 
 	if (pipelined != i915_gem_request_get_ring(obj->last_read_req)) {
-		ret = i915_gem_object_sync(obj, pipelined);
-		if (ret)
-			return ret;
+		if (!pipelined || !i915_semaphore_is_enabled(obj->base.dev)) {
+			ret = i915_gem_object_wait_rendering(obj, false);
+		} else {
+			struct drm_i915_private *dev_priv = pipelined->dev->dev_private;
+			struct drm_i915_gem_request *req;
+
+			ret = dev_priv->gt.alloc_request(pipelined, pipelined->default_context, &req);
+			if (ret)
+				return ret;
+
+			ret = i915_gem_object_sync(obj, req->ring);
+			if (ret)
+				return ret;
+
+			ret = i915_add_request_no_flush(req->ring);
+			if (ret)
+				return ret;
+		}
 	}
 
 	/* Mark the pin_display early so that we account for the
-- 
1.7.9.5

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[PATCH 15/53] drm/i915: Update i915_gem_object_sync() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the i915_gem_object_sync()
code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    2 +-
 drivers/gpu/drm/i915/i915_gem.c            |    7 ++++---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 4 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 375d4f9..bfd7b47 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2744,7 +2744,7 @@ static inline void i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
 
 int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
 int i915_gem_object_sync(struct drm_i915_gem_object *obj,
-			 struct intel_engine_cs *to);
+			 struct drm_i915_gem_request *to_req);
 void i915_vma_move_to_active(struct i915_vma *vma,
 			     struct intel_engine_cs *ring);
 int i915_gem_dumb_create(struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5897d54..c5b9bc7 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2956,7 +2956,7 @@ out:
  * i915_gem_object_sync - sync an object to a ring.
  *
  * @obj: object which may be in use on another ring.
- * @to: ring we wish to use the object on. May be NULL.
+ * @to_req: request we wish to use the object for. May be NULL.
  *
  * This code is meant to abstract object synchronization with the GPU.
  * Calling with NULL implies synchronizing the object with the CPU
@@ -2966,8 +2966,9 @@ out:
  */
 int
 i915_gem_object_sync(struct drm_i915_gem_object *obj,
-		     struct intel_engine_cs *to)
+		     struct drm_i915_gem_request *to_req)
 {
+	struct intel_engine_cs *to = to_req ? to_req->ring : NULL;
 	struct intel_engine_cs *from;
 	u32 seqno;
 	int ret, idx;
@@ -3953,7 +3954,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
 			if (ret)
 				return ret;
 
-			ret = i915_gem_object_sync(obj, req->ring);
+			ret = i915_gem_object_sync(obj, req);
 			if (ret)
 				return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 76f6dcf..2cd0579 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -838,7 +838,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
 
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
-		ret = i915_gem_object_sync(obj, req->ring);
+		ret = i915_gem_object_sync(obj, req);
 		if (ret)
 			return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4b42346..0d88e9c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -589,7 +589,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
 
-		ret = i915_gem_object_sync(obj, req->ring);
+		ret = i915_gem_object_sync(obj, req);
 		if (ret)
 			return ret;
 
-- 
1.7.9.5

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[PATCH 16/53] drm/i915: Update i915_gpu_idle() to manage its own request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Added explicit request creation and submission to the GPU idle code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c |   18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c5b9bc7..51f719c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3114,11 +3114,27 @@ int i915_gpu_idle(struct drm_device *dev)
 	/* Flush everything onto the inactive list. */
 	for_each_ring(ring, dev_priv, i) {
 		if (!i915.enable_execlists) {
-			ret = i915_switch_context(ring, ring->default_context);
+			struct drm_i915_gem_request *req;
+
+			ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 			if (ret)
 				return ret;
+
+			ret = i915_switch_context(req->ring, ring->default_context);
+			if (ret) {
+				i915_gem_request_unreference(req);
+				return ret;
+			}
+
+			ret = i915_add_request_no_flush(req->ring);
+			if (ret) {
+				i915_gem_request_unreference(req);
+				return ret;
+			}
 		}
 
+		WARN_ON(ring->outstanding_lazy_request);
+
 		ret = intel_ring_idle(ring);
 		if (ret)
 			return ret;
-- 
1.7.9.5

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[PATCH 17/53] drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The i915_gem_init_hw() function calls a bunch of smaller initialisation
functions. Multiple of which have generic sections and per ring sections. This
means multiple passes are done over the rings. Each pass writes data to the ring
which floats around in that ring's OLR until some random point in the future
when an add_request() is done by some random other piece of code.

This patch breaks i915_ppgtt_init_hw() in two with the per ring initialisation
now being done in i915_ppgtt_init_ring(). The ring looping is now done at the
top level in i915_gem_init_hw().

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c     |   25 +++++++++++++++++++------
 drivers/gpu/drm/i915/i915_gem_gtt.c |   25 ++++++++++++-------------
 drivers/gpu/drm/i915/i915_gem_gtt.h |    1 +
 3 files changed, 32 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 51f719c..9bc60d7 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4844,19 +4844,32 @@ i915_gem_init_hw(struct drm_device *dev)
 	 */
 	init_unused_rings(dev);
 
+	ret = i915_ppgtt_init_hw(dev);
+	if (ret) {
+		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
+		return ret;
+	}
+
+	/* Need to do basic initialisation of all rings first: */
 	for_each_ring(ring, dev_priv, i) {
 		ret = ring->init_hw(ring);
 		if (ret)
 			return ret;
 	}
 
-	for (i = 0; i < NUM_L3_SLICES(dev); i++)
-		i915_gem_l3_remap(&dev_priv->ring[RCS], i);
+	/* Now it is safe to go back round and do everything else: */
+	for_each_ring(ring, dev_priv, i) {
+		if (ring->id == RCS) {
+			for (i = 0; i < NUM_L3_SLICES(dev); i++)
+				i915_gem_l3_remap(ring, i);
+		}
 
-	ret = i915_ppgtt_init_hw(dev);
-	if (ret && ret != -EIO) {
-		DRM_ERROR("PPGTT enable failed %d\n", ret);
-		i915_gem_cleanup_ringbuffer(dev);
+		ret = i915_ppgtt_init_ring(ring);
+		if (ret && ret != -EIO) {
+			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
+			i915_gem_cleanup_ringbuffer(dev);
+			return ret;
+		}
 	}
 
 	ret = i915_gem_context_enable(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e54b2a0..428d2f6 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1206,11 +1206,6 @@ int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
 
 int i915_ppgtt_init_hw(struct drm_device *dev)
 {
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_engine_cs *ring;
-	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
-	int i, ret = 0;
-
 	/* In the case of execlists, PPGTT is enabled by the context descriptor
 	 * and the PDPs are contained within the context itself.  We don't
 	 * need to do anything here. */
@@ -1229,16 +1224,20 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
 	else
 		MISSING_CASE(INTEL_INFO(dev)->gen);
 
-	if (ppgtt) {
-		for_each_ring(ring, dev_priv, i) {
-			ret = ppgtt->switch_mm(ppgtt, ring);
-			if (ret != 0)
-				return ret;
-		}
-	}
+	return 0;
+}
 
-	return ret;
+int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
+{
+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
+	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
+
+	if (!ppgtt)
+		return 0;
+
+	return ppgtt->switch_mm(ppgtt, ring);
 }
+
 struct i915_hw_ppgtt *
 i915_ppgtt_create(struct drm_device *dev, struct drm_i915_file_private *fpriv)
 {
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 8f76990..5a6cef9 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -300,6 +300,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
 
 int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
 int i915_ppgtt_init_hw(struct drm_device *dev);
+int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
 void i915_ppgtt_release(struct kref *kref);
 struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
 					struct drm_i915_file_private *fpriv);
-- 
1.7.9.5

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[PATCH 18/53] drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The start of day context initialisation code in i915_gem_context_enable() loops
over each ring and calls the legacy switch context or the execlist init context
code as appropriate.

This patch moves the ring looping out of that function in to the top level
caller i915_gem_init_hw(). This means the a single pass can be made over all
rings doing the PPGTT, L3 remap and context initialisation of each ring
altogether.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/i915_gem.c         |   18 ++++++++++-------
 drivers/gpu/drm/i915/i915_gem_context.c |   32 +++++++++++--------------------
 3 files changed, 23 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bfd7b47..653c82d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2989,7 +2989,7 @@ int __must_check i915_gem_context_init(struct drm_device *dev);
 void i915_gem_context_fini(struct drm_device *dev);
 void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
-int i915_gem_context_enable(struct drm_i915_private *dev_priv);
+int i915_gem_context_enable(struct intel_engine_cs *ring);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
 int i915_switch_context(struct intel_engine_cs *ring,
 			struct intel_context *to);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9bc60d7..5850991 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4844,6 +4844,8 @@ i915_gem_init_hw(struct drm_device *dev)
 	 */
 	init_unused_rings(dev);
 
+	BUG_ON(!dev_priv->ring[RCS].default_context);
+
 	ret = i915_ppgtt_init_hw(dev);
 	if (ret) {
 		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
@@ -4859,6 +4861,8 @@ i915_gem_init_hw(struct drm_device *dev)
 
 	/* Now it is safe to go back round and do everything else: */
 	for_each_ring(ring, dev_priv, i) {
+		WARN_ON(!ring->default_context);
+
 		if (ring->id == RCS) {
 			for (i = 0; i < NUM_L3_SLICES(dev); i++)
 				i915_gem_l3_remap(ring, i);
@@ -4870,17 +4874,17 @@ i915_gem_init_hw(struct drm_device *dev)
 			i915_gem_cleanup_ringbuffer(dev);
 			return ret;
 		}
-	}
 
-	ret = i915_gem_context_enable(dev_priv);
-	if (ret && ret != -EIO) {
-		DRM_ERROR("Context enable failed %d\n", ret);
-		i915_gem_cleanup_ringbuffer(dev);
+		ret = i915_gem_context_enable(ring);
+		if (ret && ret != -EIO) {
+			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
+			i915_gem_cleanup_ringbuffer(dev);
 
-		return ret;
+			return ret;
+		}
 	}
 
-	return ret;
+	return 0;
 }
 
 int i915_gem_init(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 8603bf4..dd83d61 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -403,32 +403,22 @@ void i915_gem_context_fini(struct drm_device *dev)
 	i915_gem_context_unreference(dctx);
 }
 
-int i915_gem_context_enable(struct drm_i915_private *dev_priv)
+int i915_gem_context_enable(struct intel_engine_cs *ring)
 {
-	struct intel_engine_cs *ring;
-	int ret, i;
-
-	BUG_ON(!dev_priv->ring[RCS].default_context);
+	int ret;
 
 	if (i915.enable_execlists) {
-		for_each_ring(ring, dev_priv, i) {
-			if (ring->init_context) {
-				ret = ring->init_context(ring,
-						ring->default_context);
-				if (ret) {
-					DRM_ERROR("ring init context: %d\n",
-							ret);
-					return ret;
-				}
-			}
-		}
+		if (ring->init_context == NULL)
+			return 0;
 
+		ret = ring->init_context(ring, ring->default_context);
 	} else
-		for_each_ring(ring, dev_priv, i) {
-			ret = i915_switch_context(ring, ring->default_context);
-			if (ret)
-				return ret;
-		}
+		ret = i915_switch_context(ring, ring->default_context);
+
+	if (ret) {
+		DRM_ERROR("ring init context: %d\n", ret);
+		return ret;
+	}
 
 	return 0;
 }
-- 
1.7.9.5

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[PATCH 19/53] drm/i915: Add explicit request management to i915_gem_init_hw()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that a single per ring loop is being done for all the different
intialisation steps in i915_gem_init_hw(), it is possible to add proper request
management as well. The last remaining issue is that the context enable call
eventually ends up within *_render_state_init() and this does it's own private
_i915_add_request() call.

This patch adds explicit request creation and submission to the top level loop
and removes the add_request() from deep within the sub-functions. Note that the
old add_request() call was being passed a batch object. This is now explicitly
written to the request object instead. A warning has also been added to
i915_add_request() to ensure that there is never an attempt to add two batch
objects to a single request - e.g. because render_state_init() was called during
execbuffer processing.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    3 ++-
 drivers/gpu/drm/i915/i915_gem.c              |   18 ++++++++++++++++++
 drivers/gpu/drm/i915/i915_gem_render_state.c |    3 ++-
 drivers/gpu/drm/i915/intel_lrc.c             |    8 +++-----
 4 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 653c82d..ea0da6b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2158,7 +2158,8 @@ struct drm_i915_gem_request {
 	struct intel_context *ctx;
 	struct intel_ringbuffer *ringbuf;
 
-	/** Batch buffer related to this request if any */
+	/** Batch buffer related to this request if any (used for
+	    error state dump only) */
 	struct drm_i915_gem_object *batch_obj;
 
 	/** Time at which this request was emitted, in jiffies. */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5850991..efed49a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2467,6 +2467,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	 * inactive_list and lose its active reference. Hence we do not need
 	 * to explicitly hold another reference here.
 	 */
+	WARN_ON(request->batch_obj && obj);
 	request->batch_obj = obj;
 
 	if (!i915.enable_execlists) {
@@ -4861,8 +4862,16 @@ i915_gem_init_hw(struct drm_device *dev)
 
 	/* Now it is safe to go back round and do everything else: */
 	for_each_ring(ring, dev_priv, i) {
+		struct drm_i915_gem_request *req;
+
 		WARN_ON(!ring->default_context);
 
+		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
+		if (ret) {
+			i915_gem_cleanup_ringbuffer(dev);
+			return ret;
+		}
+
 		if (ring->id == RCS) {
 			for (i = 0; i < NUM_L3_SLICES(dev); i++)
 				i915_gem_l3_remap(ring, i);
@@ -4871,6 +4880,7 @@ i915_gem_init_hw(struct drm_device *dev)
 		ret = i915_ppgtt_init_ring(ring);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
+			i915_gem_request_unreference(req);
 			i915_gem_cleanup_ringbuffer(dev);
 			return ret;
 		}
@@ -4878,8 +4888,16 @@ i915_gem_init_hw(struct drm_device *dev)
 		ret = i915_gem_context_enable(ring);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
+			i915_gem_request_unreference(req);
 			i915_gem_cleanup_ringbuffer(dev);
+			return ret;
+		}
 
+		ret = i915_add_request_no_flush(ring);
+		if (ret) {
+			DRM_ERROR("Add request ring #%d failed: %d\n", i, ret);
+			i915_gem_request_unreference(req);
+			i915_gem_cleanup_ringbuffer(dev);
 			return ret;
 		}
 	}
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index aba39c3..989476e 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -173,7 +173,8 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, NULL, so.obj, true);
+	WARN_ON(ring->outstanding_lazy_request->batch_obj);
+	ring->outstanding_lazy_request->batch_obj = so.obj;
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0d88e9c..dff7829 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1350,8 +1350,6 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 {
 	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
 	struct render_state so;
-	struct drm_i915_file_private *file_priv = ctx->file_priv;
-	struct drm_file *file = file_priv ? file_priv->file : NULL;
 	int ret;
 
 	ret = i915_gem_render_state_prepare(ring, &so);
@@ -1370,9 +1368,9 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, file, so.obj, true);
-	/* intel_logical_ring_add_request moves object to inactive if it
-	 * fails */
+	WARN_ON(ring->outstanding_lazy_request->batch_obj);
+	ring->outstanding_lazy_request->batch_obj = so.obj;
+	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
 	return ret;
-- 
1.7.9.5

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[PATCH 20/53] drm/i915: Update ppgtt_init_ring() & context_enable() to take requests

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The final step in removing the OLR from i915_gem_init_hw() is to pass the newly
allocated request structure in to each step rather than passing a ring
structure. This patch updates both i915_ppgtt_init_ring() and
i915_gem_context_enable() to take request pointers.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
 drivers/gpu/drm/i915/i915_gem_context.c |    7 ++++---
 drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
 drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
 5 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ea0da6b..618a841 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2990,7 +2990,7 @@ int __must_check i915_gem_context_init(struct drm_device *dev);
 void i915_gem_context_fini(struct drm_device *dev);
 void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
-int i915_gem_context_enable(struct intel_engine_cs *ring);
+int i915_gem_context_enable(struct drm_i915_gem_request *req);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
 int i915_switch_context(struct intel_engine_cs *ring,
 			struct intel_context *to);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index efed49a..379bf44 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4877,7 +4877,7 @@ i915_gem_init_hw(struct drm_device *dev)
 				i915_gem_l3_remap(ring, i);
 		}
 
-		ret = i915_ppgtt_init_ring(ring);
+		ret = i915_ppgtt_init_ring(req);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
 			i915_gem_request_unreference(req);
@@ -4885,7 +4885,7 @@ i915_gem_init_hw(struct drm_device *dev)
 			return ret;
 		}
 
-		ret = i915_gem_context_enable(ring);
+		ret = i915_gem_context_enable(req);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
 			i915_gem_request_unreference(req);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index dd83d61..04d2a20 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -403,17 +403,18 @@ void i915_gem_context_fini(struct drm_device *dev)
 	i915_gem_context_unreference(dctx);
 }
 
-int i915_gem_context_enable(struct intel_engine_cs *ring)
+int i915_gem_context_enable(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (i915.enable_execlists) {
 		if (ring->init_context == NULL)
 			return 0;
 
-		ret = ring->init_context(ring, ring->default_context);
+		ret = ring->init_context(req->ring, ring->default_context);
 	} else
-		ret = i915_switch_context(ring, ring->default_context);
+		ret = i915_switch_context(req->ring, ring->default_context);
 
 	if (ret) {
 		DRM_ERROR("ring init context: %d\n", ret);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 428d2f6..cd00080 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1227,15 +1227,15 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
 	return 0;
 }
 
-int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
+int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
 {
-	struct drm_i915_private *dev_priv = ring->dev->dev_private;
+	struct drm_i915_private *dev_priv = req->ring->dev->dev_private;
 	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
 
 	if (!ppgtt)
 		return 0;
 
-	return ppgtt->switch_mm(ppgtt, ring);
+	return ppgtt->switch_mm(ppgtt, req->ring);
 }
 
 struct i915_hw_ppgtt *
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 5a6cef9..e7e202f 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -300,7 +300,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
 
 int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
 int i915_ppgtt_init_hw(struct drm_device *dev);
-int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
+int i915_ppgtt_init_ring(struct drm_i915_gem_request *req);
 void i915_ppgtt_release(struct kref *kref);
 struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
 					struct drm_i915_file_private *fpriv);
-- 
1.7.9.5

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[PATCH 21/53] drm/i915: Set context in request from creation even in legacy mode

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In execlist mode, the context object pointer is written in to the request
structure (and reference counted) at the point of request creation. In legacy
mode, this only happens inside i915_add_request().

This patch updates the legacy code path to match the execlist version. This
allows all the intermediate code between request creation and request submission
to get at the context object given only a request structure. Thus negating the
need to pass context pointers here, there and everywhere.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    9 +--------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    2 ++
 2 files changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 379bf44..64288e3 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2470,14 +2470,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	WARN_ON(request->batch_obj && obj);
 	request->batch_obj = obj;
 
-	if (!i915.enable_execlists) {
-		/* Hold a reference to the current context so that we can inspect
-		 * it later in case a hangcheck error event fires.
-		 */
-		request->ctx = ring->last_context;
-		if (request->ctx)
-			i915_gem_context_reference(request->ctx);
-	}
+	WARN_ON(request->ctx != ring->last_context);
 
 	request->emitted_jiffies = jiffies;
 	list_add_tail(&request->list, &ring->request_list);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 1a9f884..05a7e33 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2186,6 +2186,8 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
 	request->ring = ring;
 	request->ringbuf = ring->buffer;
 	request->uniq = dev_private->request_uniq++;
+	request->ctx = ctx;
+	i915_gem_context_reference(request->ctx);
 
 	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
 	if (ret) {
-- 
1.7.9.5

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[PATCH 22/53] drm/i915: Update i915_switch_context() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that the request is guaranteed to specify the context, it is possible to
update the context switch code to use requests rather than ring and context
pairs. This patch updates i915_switch_context() accordingly.

Also removed the warning that the request's context must match the last context
switch's context. As the context switch now gets the context object from the
request structure, there is no longer any scope for the two to become out of
step.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    3 +--
 drivers/gpu/drm/i915/i915_gem.c            |    4 +---
 drivers/gpu/drm/i915/i915_gem_context.c    |   19 +++++++++----------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 4 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 618a841..e9cc343 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2992,8 +2992,7 @@ void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
 int i915_gem_context_enable(struct drm_i915_gem_request *req);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
-int i915_switch_context(struct intel_engine_cs *ring,
-			struct intel_context *to);
+int i915_switch_context(struct drm_i915_gem_request *req);
 struct intel_context *
 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
 void i915_gem_context_free(struct kref *ctx_ref);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 64288e3..0c7e1bd 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2470,8 +2470,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	WARN_ON(request->batch_obj && obj);
 	request->batch_obj = obj;
 
-	WARN_ON(request->ctx != ring->last_context);
-
 	request->emitted_jiffies = jiffies;
 	list_add_tail(&request->list, &ring->request_list);
 	request->file_priv = NULL;
@@ -3114,7 +3112,7 @@ int i915_gpu_idle(struct drm_device *dev)
 			if (ret)
 				return ret;
 
-			ret = i915_switch_context(req->ring, ring->default_context);
+			ret = i915_switch_context(req);
 			if (ret) {
 				i915_gem_request_unreference(req);
 				return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 04d2a20..b326f8d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -414,7 +414,7 @@ int i915_gem_context_enable(struct drm_i915_gem_request *req)
 
 		ret = ring->init_context(req->ring, ring->default_context);
 	} else
-		ret = i915_switch_context(req->ring, ring->default_context);
+		ret = i915_switch_context(req);
 
 	if (ret) {
 		DRM_ERROR("ring init context: %d\n", ret);
@@ -693,8 +693,7 @@ unpin_out:
 
 /**
  * i915_switch_context() - perform a GPU context switch.
- * @ring: ring for which we'll execute the context switch
- * @to: the context to switch to
+ * @req: request for which we'll execute the context switch
  *
  * The context life cycle is simple. The context refcount is incremented and
  * decremented by 1 and create and destroy. If the context is in use by the GPU,
@@ -705,25 +704,25 @@ unpin_out:
  * switched by writing to the ELSP and requests keep a reference to their
  * context.
  */
-int i915_switch_context(struct intel_engine_cs *ring,
-			struct intel_context *to)
+int i915_switch_context(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 
 	WARN_ON(i915.enable_execlists);
 	WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
-	if (to->legacy_hw_ctx.rcs_state == NULL) { /* We have the fake context */
-		if (to != ring->last_context) {
-			i915_gem_context_reference(to);
+	if (req->ctx->legacy_hw_ctx.rcs_state == NULL) { /* We have the fake context */
+		if (req->ctx != ring->last_context) {
+			i915_gem_context_reference(req->ctx);
 			if (ring->last_context)
 				i915_gem_context_unreference(ring->last_context);
-			ring->last_context = to;
+			ring->last_context = req->ctx;
 		}
 		return 0;
 	}
 
-	return do_switch(ring, to);
+	return do_switch(req->ring, req->ctx);
 }
 
 static bool contexts_enabled(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 2cd0579..1e2fc80 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1190,7 +1190,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 	if (ret)
 		goto error;
 
-	ret = i915_switch_context(ring, params->ctx);
+	ret = i915_switch_context(params->request);
 	if (ret)
 		goto error;
 
-- 
1.7.9.5

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[PATCH 23/53] drm/i915: Update do_switch() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated do_switch() to take a request pointer instead of a ring/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |   17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index b326f8d..eedb994 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -556,9 +556,10 @@ mi_set_context(struct intel_engine_cs *ring,
 	return ret;
 }
 
-static int do_switch(struct intel_engine_cs *ring,
-		     struct intel_context *to)
+static int do_switch(struct drm_i915_gem_request *req)
 {
+	struct intel_context *to = req->ctx;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	struct intel_context *from = ring->last_context;
 	u32 hw_flags = 0;
@@ -591,7 +592,7 @@ static int do_switch(struct intel_engine_cs *ring,
 
 	if (to->ppgtt) {
 		trace_switch_mm(ring, to);
-		ret = to->ppgtt->switch_mm(to->ppgtt, ring);
+		ret = to->ppgtt->switch_mm(to->ppgtt, req->ring);
 		if (ret)
 			goto unpin_out;
 	}
@@ -627,7 +628,7 @@ static int do_switch(struct intel_engine_cs *ring,
 	if (!to->legacy_hw_ctx.initialized || i915_gem_context_is_default(to))
 		hw_flags |= MI_RESTORE_INHIBIT;
 
-	ret = mi_set_context(ring, to, hw_flags);
+	ret = mi_set_context(req->ring, to, hw_flags);
 	if (ret)
 		goto unpin_out;
 
@@ -635,7 +636,7 @@ static int do_switch(struct intel_engine_cs *ring,
 		if (!(to->remap_slice & (1<<i)))
 			continue;
 
-		ret = i915_gem_l3_remap(ring, i);
+		ret = i915_gem_l3_remap(req->ring, i);
 		/* If it failed, try again next round */
 		if (ret)
 			DRM_DEBUG_DRIVER("L3 remapping failed\n");
@@ -651,7 +652,7 @@ static int do_switch(struct intel_engine_cs *ring,
 	 */
 	if (from != NULL) {
 		from->legacy_hw_ctx.rcs_state->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
-		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), ring);
+		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req->ring);
 		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
 		 * whole damn pipeline, we don't need to explicitly mark the
 		 * object dirty. The only exception is that the context must be
@@ -677,7 +678,7 @@ done:
 
 	if (uninitialized) {
 		if (ring->init_context) {
-			ret = ring->init_context(ring, to);
+			ret = ring->init_context(req->ring, to);
 			if (ret)
 				DRM_ERROR("ring init context: %d\n", ret);
 		}
@@ -722,7 +723,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
 		return 0;
 	}
 
-	return do_switch(req->ring, req->ctx);
+	return do_switch(req);
 }
 
 static bool contexts_enabled(struct drm_device *dev)
-- 
1.7.9.5

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[PATCH 24/53] drm/i915: Update deferred context creation to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In execlist mode, context initialisation is deferred until first use of the
given context. This is because execlist mode has many more contexts than legacy
mode and many are never actually used. Previously, the initialisation commands
were written to the ring and tagged with some random request structure via the
OLR. This seemed to be causing a null pointer deference bug under certain
circumstances (BZ:40112).

This patch adds explicit request creation and submission to the deferred
initialisation code path. Thus removing any reliance on or randomness caused by
the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index dff7829..4bcb70e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1849,6 +1849,7 @@ static void lrc_setup_hardware_status_page(struct intel_engine_cs *ring,
 int intel_lr_context_deferred_create(struct intel_context *ctx,
 				     struct intel_engine_cs *ring)
 {
+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	const bool is_global_default_ctx = (ctx == ring->default_context);
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_gem_object *ctx_obj;
@@ -1929,13 +1930,27 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
 		lrc_setup_hardware_status_page(ring, ctx_obj);
 	else if (ring->id == RCS && !ctx->rcs_initialized) {
 		if (ring->init_context) {
-			ret = ring->init_context(ring, ctx);
+			struct drm_i915_gem_request *req;
+
+			ret = dev_priv->gt.alloc_request(ring, ctx, &req);
+			if (ret)
+				return ret;
+
+			ret = ring->init_context(req->ring, ctx);
 			if (ret) {
 				DRM_ERROR("ring init context: %d\n", ret);
+				i915_gem_request_unreference(req);
 				ctx->engine[ring->id].ringbuf = NULL;
 				ctx->engine[ring->id].state = NULL;
 				goto error;
 			}
+
+			ret = i915_add_request_no_flush(req->ring);
+			if (ret) {
+				DRM_ERROR("ring init context: %d\n", ret);
+				i915_gem_request_unreference(req);
+				goto error;
+			}
 		}
 
 		ctx->rcs_initialized = true;
-- 
1.7.9.5

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[PATCH 25/53] drm/i915: Update init_context() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use requests, it is possible to
update init_context() to take a request pointer instead of a ring/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    4 ++--
 drivers/gpu/drm/i915/intel_lrc.c        |    9 ++++-----
 drivers/gpu/drm/i915/intel_ringbuffer.c |    7 +++----
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 4 files changed, 10 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index eedb994..938cd26 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -412,7 +412,7 @@ int i915_gem_context_enable(struct drm_i915_gem_request *req)
 		if (ring->init_context == NULL)
 			return 0;
 
-		ret = ring->init_context(req->ring, ring->default_context);
+		ret = ring->init_context(req);
 	} else
 		ret = i915_switch_context(req);
 
@@ -678,7 +678,7 @@ done:
 
 	if (uninitialized) {
 		if (ring->init_context) {
-			ret = ring->init_context(req->ring, to);
+			ret = ring->init_context(req);
 			if (ret)
 				DRM_ERROR("ring init context: %d\n", ret);
 		}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4bcb70e..cbec056 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1376,16 +1376,15 @@ out:
 	return ret;
 }
 
-static int gen8_init_rcs_context(struct intel_engine_cs *ring,
-		       struct intel_context *ctx)
+static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_logical_ring_workarounds_emit(ring, ctx);
+	ret = intel_logical_ring_workarounds_emit(req->ring, req->ctx);
 	if (ret)
 		return ret;
 
-	return intel_lr_context_render_state_init(ring, ctx);
+	return intel_lr_context_render_state_init(req->ring, req->ctx);
 }
 
 /**
@@ -1936,7 +1935,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
 			if (ret)
 				return ret;
 
-			ret = ring->init_context(req->ring, ctx);
+			ret = ring->init_context(req);
 			if (ret) {
 				DRM_ERROR("ring init context: %d\n", ret);
 				i915_gem_request_unreference(req);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 05a7e33..26964a2 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -775,16 +775,15 @@ static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
 	return 0;
 }
 
-static int intel_rcs_ctx_init(struct intel_engine_cs *ring,
-			      struct intel_context *ctx)
+static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_ring_workarounds_emit(ring, ctx);
+	ret = intel_ring_workarounds_emit(req->ring, req->ctx);
 	if (ret != 0)
 		return ret;
 
-	ret = i915_gem_render_state_init(ring);
+	ret = i915_gem_render_state_init(req->ring);
 	if (ret)
 		DRM_ERROR("init render state: %d\n", ret);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 4f8a14a..c32f5a1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -143,8 +143,7 @@ struct  intel_engine_cs {
 
 	int		(*init_hw)(struct intel_engine_cs *ring);
 
-	int		(*init_context)(struct intel_engine_cs *ring,
-					struct intel_context *ctx);
+	int		(*init_context)(struct drm_i915_gem_request *req);
 
 	void		(*write_tail)(struct intel_engine_cs *ring,
 				      u32 value);
-- 
1.7.9.5

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[PATCH 26/53] drm/i915: Update render_state_init() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the two render_state_init() functions to take a request pointer instead
of a ring. This removes their reliance on the OLR.

v2: Rebased to newer tree.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_render_state.c |   18 +++++++++---------
 drivers/gpu/drm/i915/i915_gem_render_state.h |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |   22 ++++++++++------------
 drivers/gpu/drm/i915/intel_ringbuffer.c      |    2 +-
 4 files changed, 21 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 989476e..85cc746 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -152,29 +152,29 @@ int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
 	return 0;
 }
 
-int i915_gem_render_state_init(struct intel_engine_cs *ring)
+int i915_gem_render_state_init(struct drm_i915_gem_request *req)
 {
 	struct render_state so;
 	int ret;
 
-	ret = i915_gem_render_state_prepare(ring, &so);
+	ret = i915_gem_render_state_prepare(req->ring, &so);
 	if (ret)
 		return ret;
 
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = ring->dispatch_execbuffer(ring,
-					so.ggtt_offset,
-					so.rodata->batch_items * 4,
-					I915_DISPATCH_SECURE);
+	ret = req->ring->dispatch_execbuffer(req->ring,
+					     so.ggtt_offset,
+					     so.rodata->batch_items * 4,
+					     I915_DISPATCH_SECURE);
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
 
-	WARN_ON(ring->outstanding_lazy_request->batch_obj);
-	ring->outstanding_lazy_request->batch_obj = so.obj;
+	WARN_ON(req->batch_obj);
+	req->batch_obj = so.obj;
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.h b/drivers/gpu/drm/i915/i915_gem_render_state.h
index c44961e..7aa7372 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.h
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.h
@@ -39,7 +39,7 @@ struct render_state {
 	int gen;
 };
 
-int i915_gem_render_state_init(struct intel_engine_cs *ring);
+int i915_gem_render_state_init(struct drm_i915_gem_request *req);
 void i915_gem_render_state_fini(struct render_state *so);
 int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
 				  struct render_state *so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index cbec056..f0bb98a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1345,31 +1345,29 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
-					      struct intel_context *ctx)
+static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
 {
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
 	struct render_state so;
 	int ret;
 
-	ret = i915_gem_render_state_prepare(ring, &so);
+	ret = i915_gem_render_state_prepare(req->ring, &so);
 	if (ret)
 		return ret;
 
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = ring->emit_bb_start(ringbuf,
-			ctx,
-			so.ggtt_offset,
-			I915_DISPATCH_SECURE);
+	ret = req->ring->emit_bb_start(req->ringbuf,
+				       req->ctx,
+				       so.ggtt_offset,
+				       I915_DISPATCH_SECURE);
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
 
-	WARN_ON(ring->outstanding_lazy_request->batch_obj);
-	ring->outstanding_lazy_request->batch_obj = so.obj;
+	WARN_ON(req->batch_obj);
+	req->batch_obj = so.obj;
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
@@ -1384,7 +1382,7 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	return intel_lr_context_render_state_init(req->ring, req->ctx);
+	return intel_lr_context_render_state_init(req);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 26964a2..efb1729 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -783,7 +783,7 @@ static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
 	if (ret != 0)
 		return ret;
 
-	ret = i915_gem_render_state_init(req->ring);
+	ret = i915_gem_render_state_init(req);
 	if (ret)
 		DRM_ERROR("init render state: %d\n", ret);
 
-- 
1.7.9.5

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[PATCH 27/53] drm/i915: Update overlay code to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The overlay update code path to do explicit request creation and submission
rather than relying on the OLR to do the right thing.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_overlay.c |   64 +++++++++++++++++++++++++---------
 1 file changed, 48 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index f93dfc1..dc209bf 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -209,19 +209,19 @@ static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
 }
 
 static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
+					 struct drm_i915_gem_request *req,
 					 void (*tail)(struct intel_overlay *))
 {
 	struct drm_device *dev = overlay->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
 	int ret;
 
 	BUG_ON(overlay->last_flip_req);
-	i915_gem_request_assign(&overlay->last_flip_req,
-					     ring->outstanding_lazy_request);
-	ret = i915_add_request(ring);
-	if (ret)
+	i915_gem_request_assign(&overlay->last_flip_req, req);
+	ret = i915_add_request(req->ring);
+	if (ret) {
+		i915_gem_request_unreference(req);
 		return ret;
+	}
 
 	overlay->flip_tail = tail;
 	ret = i915_wait_request(overlay->last_flip_req);
@@ -239,6 +239,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 	struct drm_device *dev = overlay->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req;
 	int ret;
 
 	BUG_ON(overlay->active);
@@ -246,17 +247,23 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 
 	WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
 
-	ret = intel_ring_begin(ring, 4);
+	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
+	ret = intel_ring_begin(ring, 4);
+	if (ret) {
+		i915_gem_request_unreference(req);
+		return ret;
+	}
+
 	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_ON);
 	intel_ring_emit(ring, overlay->flip_addr | OFC_UPDATE);
 	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
 
-	return intel_overlay_do_wait_request(overlay, NULL);
+	return intel_overlay_do_wait_request(overlay, req, NULL);
 }
 
 /* overlay needs to be enabled in OCMD reg */
@@ -266,6 +273,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	struct drm_device *dev = overlay->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req;
 	u32 flip_addr = overlay->flip_addr;
 	u32 tmp;
 	int ret;
@@ -280,18 +288,27 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	if (tmp & (1 << 17))
 		DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp);
 
-	ret = intel_ring_begin(ring, 2);
+	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
+	ret = intel_ring_begin(ring, 2);
+	if (ret) {
+		i915_gem_request_unreference(req);
+		return ret;
+	}
+
 	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
 	intel_ring_emit(ring, flip_addr);
 	intel_ring_advance(ring);
 
 	WARN_ON(overlay->last_flip_req);
-	i915_gem_request_assign(&overlay->last_flip_req,
-					     ring->outstanding_lazy_request);
-	return i915_add_request(ring);
+	i915_gem_request_assign(&overlay->last_flip_req, req);
+	ret = i915_add_request(req->ring);
+	if (ret)
+		i915_gem_request_unreference(req);
+
+	return ret;
 }
 
 static void intel_overlay_release_old_vid_tail(struct intel_overlay *overlay)
@@ -326,6 +343,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	struct drm_device *dev = overlay->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req;
 	u32 flip_addr = overlay->flip_addr;
 	int ret;
 
@@ -337,10 +355,16 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	 * of the hw. Do it in both cases */
 	flip_addr |= OFC_UPDATE;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
+	ret = intel_ring_begin(ring, 6);
+	if (ret) {
+		i915_gem_request_unreference(req);
+		return ret;
+	}
+
 	/* wait for overlay to go idle */
 	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
 	intel_ring_emit(ring, flip_addr);
@@ -359,7 +383,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	}
 	intel_ring_advance(ring);
 
-	return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail);
+	return intel_overlay_do_wait_request(overlay, req, intel_overlay_off_tail);
 }
 
 /* recover from an interruption due to a signal
@@ -404,15 +428,23 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
 
 	if (I915_READ(ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT) {
 		/* synchronous slowpath */
-		ret = intel_ring_begin(ring, 2);
+		struct drm_i915_gem_request *req;
+
+		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
 		if (ret)
 			return ret;
 
+		ret = intel_ring_begin(ring, 2);
+		if (ret) {
+			i915_gem_request_unreference(req);
+			return ret;
+		}
+
 		intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 		intel_ring_emit(ring, MI_NOOP);
 		intel_ring_advance(ring);
 
-		ret = intel_overlay_do_wait_request(overlay,
+		ret = intel_overlay_do_wait_request(overlay, req,
 						    intel_overlay_release_old_vid_tail);
 		if (ret)
 			return ret;
-- 
1.7.9.5

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[PATCH 28/53] drm/i915: Update queue_flip() to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the display page flip code to do explicit request creation and
submission rather than relying on the OLR and just hoping that the request
actually gets submitted at some random point.

The sequence is now to create a request, queue the work to the ring, assign the
known request to the flip queue work item then actually submit the work and post
the request.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/intel_display.c    |   43 ++++++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.h |    1 -
 4 files changed, 30 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e9cc343..34fd338 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -560,7 +560,7 @@ struct drm_i915_display_funcs {
 	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
 			  struct drm_framebuffer *fb,
 			  struct drm_i915_gem_object *obj,
-			  struct intel_engine_cs *ring,
+			  struct drm_i915_gem_request *req,
 			  uint32_t flags);
 	void (*update_primary_plane)(struct drm_crtc *crtc,
 				     struct drm_framebuffer *fb,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3b0fe9f..c32bc0c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9251,9 +9251,10 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	u32 flip_mask;
 	int ret;
@@ -9278,7 +9279,6 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, 0); /* aux display base address, unused */
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9286,9 +9286,10 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	u32 flip_mask;
 	int ret;
@@ -9310,7 +9311,6 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, MI_NOOP);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9318,9 +9318,10 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t pf, pipesrc;
@@ -9349,7 +9350,6 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, pf | pipesrc);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9357,9 +9357,10 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t pf, pipesrc;
@@ -9385,7 +9386,6 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, pf | pipesrc);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9393,9 +9393,10 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t plane_bit = 0;
 	int len, ret;
@@ -9480,7 +9481,6 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, (MI_NOOP));
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9636,7 +9636,7 @@ static int intel_default_queue_flip(struct drm_device *dev,
 				    struct drm_crtc *crtc,
 				    struct drm_framebuffer *fb,
 				    struct drm_i915_gem_object *obj,
-				    struct intel_engine_cs *ring,
+				    struct drm_i915_gem_request *req,
 				    uint32_t flags)
 {
 	return -ENODEV;
@@ -9715,6 +9715,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 	enum pipe pipe = intel_crtc->pipe;
 	struct intel_unpin_work *work;
 	struct intel_engine_cs *ring;
+	struct drm_i915_gem_request *request;
 	int ret;
 
 	/*
@@ -9828,13 +9829,20 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 		i915_gem_request_assign(&work->flip_queued_req,
 					obj->last_write_req);
 	} else {
-		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, ring,
-						   page_flip_flags);
+		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &request);
 		if (ret)
 			goto cleanup_unpin;
 
-		i915_gem_request_assign(&work->flip_queued_req,
-					intel_ring_get_request(ring));
+		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, request,
+						   page_flip_flags);
+		if (ret)
+			goto cleanup_request;
+
+		i915_gem_request_assign(&work->flip_queued_req, request);
+
+		ret = i915_add_request_no_flush(request->ring);
+		if (ret)
+			goto cleanup_request_assign;
 	}
 
 	work->flip_queued_vblank = drm_vblank_count(dev, intel_crtc->pipe);
@@ -9851,6 +9859,11 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 
 	return 0;
 
+cleanup_request_assign:
+	i915_gem_request_assign(&work->flip_queued_req, NULL);
+cleanup_request:
+	i915_gem_request_unreference(request);
+
 cleanup_unpin:
 	intel_unpin_fb_obj(obj);
 cleanup_pending:
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index efb1729..18d12a5 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -81,7 +81,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring)
 	return dev_priv->gpu_error.stop_rings & intel_ring_flag(ring);
 }
 
-void __intel_ring_advance(struct intel_engine_cs *ring)
+static void __intel_ring_advance(struct intel_engine_cs *ring)
 {
 	struct intel_ringbuffer *ringbuf = ring->buffer;
 	ringbuf->tail &= ringbuf->size - 1;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index c32f5a1..25d5ede 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -410,7 +410,6 @@ int __intel_ring_space(int head, int tail, int size);
 void intel_ring_update_space(struct intel_ringbuffer *ringbuf);
 int intel_ring_space(struct intel_ringbuffer *ringbuf);
 bool intel_ring_stopped(struct intel_engine_cs *ring);
-void __intel_ring_advance(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_idle(struct intel_engine_cs *ring);
 void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
-- 
1.7.9.5

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[PATCH 29/53] drm/i915: Update add_request() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that all callers of i915_add_request() have a request pointer to hand, it is
possible to update the add request function to take a request pointer rather
than pulling it out of the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |   10 +++++-----
 drivers/gpu/drm/i915/i915_gem.c            |   24 ++++++++++++------------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_display.c       |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 drivers/gpu/drm/i915/intel_overlay.c       |    4 ++--
 drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
 7 files changed, 24 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 34fd338..9206328 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2830,14 +2830,14 @@ void i915_gem_init_swizzling(struct drm_device *dev);
 void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
 int __must_check i915_gem_suspend(struct drm_device *dev);
-int __i915_add_request(struct intel_engine_cs *ring,
+int __i915_add_request(struct drm_i915_gem_request *req,
 		       struct drm_file *file,
 		       struct drm_i915_gem_object *batch_obj,
 		       bool flush_caches);
-#define i915_add_request(ring) \
-	__i915_add_request(ring, NULL, NULL, true)
-#define i915_add_request_no_flush(ring) \
-	__i915_add_request(ring, NULL, NULL, false)
+#define i915_add_request(req) \
+	__i915_add_request(req, NULL, NULL, true)
+#define i915_add_request_no_flush(req) \
+	__i915_add_request(req, NULL, NULL, false)
 int __i915_wait_request(struct drm_i915_gem_request *req,
 			unsigned reset_counter,
 			bool interruptible,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0c7e1bd..24fb7b9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1162,7 +1162,7 @@ i915_gem_check_olr(struct drm_i915_gem_request *req)
 
 	ret = 0;
 	if (req == req->ring->outstanding_lazy_request)
-		ret = i915_add_request(req->ring);
+		ret = i915_add_request(req);
 
 	return ret;
 }
@@ -2407,25 +2407,25 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
 	return 0;
 }
 
-int __i915_add_request(struct intel_engine_cs *ring,
+int __i915_add_request(struct drm_i915_gem_request *request,
 		       struct drm_file *file,
 		       struct drm_i915_gem_object *obj,
 		       bool flush_caches)
 {
-	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-	struct drm_i915_gem_request *request;
+	struct intel_engine_cs *ring;
+	struct drm_i915_private *dev_priv;
 	struct intel_ringbuffer *ringbuf;
 	u32 request_start;
 	int ret;
 
-	request = ring->outstanding_lazy_request;
 	if (WARN_ON(request == NULL))
 		return -ENOMEM;
 
-	if (i915.enable_execlists) {
-		ringbuf = request->ctx->engine[ring->id].ringbuf;
-	} else
-		ringbuf = ring->buffer;
+	ring = request->ring;
+	dev_priv = ring->dev->dev_private;
+	ringbuf = request->ringbuf;
+
+	WARN_ON(request != ring->outstanding_lazy_request);
 
 	request_start = intel_ring_get_tail(ringbuf);
 	/*
@@ -3118,7 +3118,7 @@ int i915_gpu_idle(struct drm_device *dev)
 				return ret;
 			}
 
-			ret = i915_add_request_no_flush(req->ring);
+			ret = i915_add_request_no_flush(req);
 			if (ret) {
 				i915_gem_request_unreference(req);
 				return ret;
@@ -3966,7 +3966,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
 			if (ret)
 				return ret;
 
-			ret = i915_add_request_no_flush(req->ring);
+			ret = i915_add_request_no_flush(req);
 			if (ret)
 				return ret;
 		}
@@ -4884,7 +4884,7 @@ i915_gem_init_hw(struct drm_device *dev)
 			return ret;
 		}
 
-		ret = i915_add_request_no_flush(ring);
+		ret = i915_add_request_no_flush(req);
 		if (ret) {
 			DRM_ERROR("Add request ring #%d failed: %d\n", i, ret);
 			i915_gem_request_unreference(req);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1e2fc80..15e33a9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -996,7 +996,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 	params->ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	return __i915_add_request(params->ring, params->file,
+	return __i915_add_request(params->request, params->file,
 				  params->batch_obj, true);
 }
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c32bc0c..9cbfb93 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9840,7 +9840,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 
 		i915_gem_request_assign(&work->flip_queued_req, request);
 
-		ret = i915_add_request_no_flush(request->ring);
+		ret = i915_add_request_no_flush(request);
 		if (ret)
 			goto cleanup_request_assign;
 	}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f0bb98a..3b4393c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1942,7 +1942,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
 				goto error;
 			}
 
-			ret = i915_add_request_no_flush(req->ring);
+			ret = i915_add_request_no_flush(req);
 			if (ret) {
 				DRM_ERROR("ring init context: %d\n", ret);
 				i915_gem_request_unreference(req);
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index dc209bf..228c9d1 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -217,7 +217,7 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
 
 	BUG_ON(overlay->last_flip_req);
 	i915_gem_request_assign(&overlay->last_flip_req, req);
-	ret = i915_add_request(req->ring);
+	ret = i915_add_request(req);
 	if (ret) {
 		i915_gem_request_unreference(req);
 		return ret;
@@ -304,7 +304,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 
 	WARN_ON(overlay->last_flip_req);
 	i915_gem_request_assign(&overlay->last_flip_req, req);
-	ret = i915_add_request(req->ring);
+	ret = i915_add_request(req);
 	if (ret)
 		i915_gem_request_unreference(req);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 18d12a5..508d7d8 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2145,8 +2145,9 @@ int intel_ring_idle(struct intel_engine_cs *ring)
 	int ret;
 
 	/* We need to add any requests required to flush the objects and ring */
+	WARN_ON(ring->outstanding_lazy_request);
 	if (ring->outstanding_lazy_request) {
-		ret = i915_add_request(ring);
+		ret = i915_add_request(ring->outstanding_lazy_request);
 		if (ret)
 			return ret;
 	}
-- 
1.7.9.5

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[PATCH 30/53] drm/i915: Update [vma|object]_move_to_active() to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use request structures, it is
possible to update the lower level move_to_active() functions to be request
based as well.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    2 +-
 drivers/gpu/drm/i915/i915_gem.c              |   17 ++++++++---------
 drivers/gpu/drm/i915/i915_gem_context.c      |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    2 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
 6 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9206328..e9fef4c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2747,7 +2747,7 @@ int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
 int i915_gem_object_sync(struct drm_i915_gem_object *obj,
 			 struct drm_i915_gem_request *to_req);
 void i915_vma_move_to_active(struct i915_vma *vma,
-			     struct intel_engine_cs *ring);
+			     struct drm_i915_gem_request *req);
 int i915_gem_dumb_create(struct drm_file *file_priv,
 			 struct drm_device *dev,
 			 struct drm_mode_create_dumb *args);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 24fb7b9..0ae9be2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2265,17 +2265,16 @@ i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
 
 static void
 i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
-			       struct intel_engine_cs *ring)
+			       struct drm_i915_gem_request *req)
 {
-	struct drm_i915_gem_request *req;
-	struct intel_engine_cs *old_ring;
+	struct intel_engine_cs *new_ring, *old_ring;
 
-	BUG_ON(ring == NULL);
+	BUG_ON(req == NULL);
 
-	req = intel_ring_get_request(ring);
+	new_ring = i915_gem_request_get_ring(req);
 	old_ring = i915_gem_request_get_ring(obj->last_read_req);
 
-	if (old_ring != ring && obj->last_write_req) {
+	if (old_ring != new_ring && obj->last_write_req) {
 		/* Keep the request relative to the current ring */
 		i915_gem_request_assign(&obj->last_write_req, req);
 	}
@@ -2286,16 +2285,16 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
 		obj->active = 1;
 	}
 
-	list_move_tail(&obj->ring_list, &ring->active_list);
+	list_move_tail(&obj->ring_list, &new_ring->active_list);
 
 	i915_gem_request_assign(&obj->last_read_req, req);
 }
 
 void i915_vma_move_to_active(struct i915_vma *vma,
-			     struct intel_engine_cs *ring)
+			     struct drm_i915_gem_request *req)
 {
 	list_move_tail(&vma->mm_list, &vma->vm->active_list);
-	return i915_gem_object_move_to_active(vma->obj, ring);
+	return i915_gem_object_move_to_active(vma->obj, req);
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 938cd26..e4d75be 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -652,7 +652,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 	 */
 	if (from != NULL) {
 		from->legacy_hw_ctx.rcs_state->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
-		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req->ring);
+		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req);
 		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
 		 * whole damn pipeline, we don't need to explicitly mark the
 		 * object dirty. The only exception is that the context must be
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 15e33a9..dc13751 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -966,7 +966,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 			obj->base.pending_read_domains |= obj->base.read_domains;
 		obj->base.read_domains = obj->base.pending_read_domains;
 
-		i915_vma_move_to_active(vma, ring);
+		i915_vma_move_to_active(vma, req);
 		if (obj->base.write_domain) {
 			obj->dirty = 1;
 			i915_gem_request_assign(&obj->last_write_req, req);
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 85cc746..866274c 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -171,7 +171,7 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
 
 	WARN_ON(req->batch_obj);
 	req->batch_obj = so.obj;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 3b4393c..479365e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1364,7 +1364,7 @@ static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
 
 	WARN_ON(req->batch_obj);
 	req->batch_obj = so.obj;
-- 
1.7.9.5

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[PATCH 31/53] drm/i915: Update l3_remap to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Converted i915_gem_l3_remap() to take a request structure instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/i915_gem.c         |    5 +++--
 drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e9fef4c..3955bef 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2825,7 +2825,7 @@ int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
 int __must_check i915_gem_init(struct drm_device *dev);
 int i915_gem_init_rings(struct drm_device *dev);
 int __must_check i915_gem_init_hw(struct drm_device *dev);
-int i915_gem_l3_remap(struct intel_engine_cs *ring, int slice);
+int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice);
 void i915_gem_init_swizzling(struct drm_device *dev);
 void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0ae9be2..043933b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4644,8 +4644,9 @@ err:
 	return ret;
 }
 
-int i915_gem_l3_remap(struct intel_engine_cs *ring, int slice)
+int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 reg_base = GEN7_L3LOG_BASE + (slice * 0x200);
@@ -4864,7 +4865,7 @@ i915_gem_init_hw(struct drm_device *dev)
 
 		if (ring->id == RCS) {
 			for (i = 0; i < NUM_L3_SLICES(dev); i++)
-				i915_gem_l3_remap(ring, i);
+				i915_gem_l3_remap(req, i);
 		}
 
 		ret = i915_ppgtt_init_ring(req);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index e4d75be..475d1fd 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -636,7 +636,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 		if (!(to->remap_slice & (1<<i)))
 			continue;
 
-		ret = i915_gem_l3_remap(req->ring, i);
+		ret = i915_gem_l3_remap(req, i);
 		/* If it failed, try again next round */
 		if (ret)
 			DRM_DEBUG_DRIVER("L3 remapping failed\n");
-- 
1.7.9.5

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[PATCH 32/53] drm/i915: Update mi_set_context() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated mi_set_context() to take a request structure instead of a ring and
context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 475d1fd..9e66fac 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -472,10 +472,9 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
 }
 
 static inline int
-mi_set_context(struct intel_engine_cs *ring,
-	       struct intel_context *new_context,
-	       u32 hw_flags)
+mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = hw_flags | MI_MM_SPACE_GTT;
 	const int num_rings =
 		/* Use an extended w/a on ivb+ if signalling from other rings */
@@ -527,7 +526,7 @@ mi_set_context(struct intel_engine_cs *ring,
 
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_emit(ring, MI_SET_CONTEXT);
-	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->legacy_hw_ctx.rcs_state) |
+	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(req->ctx->legacy_hw_ctx.rcs_state) |
 			flags);
 	/*
 	 * w/a: MI_SET_CONTEXT must always be followed by MI_NOOP
@@ -628,7 +627,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 	if (!to->legacy_hw_ctx.initialized || i915_gem_context_is_default(to))
 		hw_flags |= MI_RESTORE_INHIBIT;
 
-	ret = mi_set_context(req->ring, to, hw_flags);
+	ret = mi_set_context(req, hw_flags);
 	if (ret)
 		goto unpin_out;
 
-- 
1.7.9.5

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[PATCH 33/53] drm/i915: Update a bunch of execbuffer heplers to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated *_ring_invalidate_all_caches(), i915_reset_gen7_sol_offsets() and
i915_emit_box() to take request structures instead of ring or ringbuf/context
pairs.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   12 +++++++-----
 drivers/gpu/drm/i915/intel_lrc.c           |    9 ++++-----
 drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
 4 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index dc13751..a79c893 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -857,7 +857,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return intel_ring_invalidate_all_caches(req->ring);
+	return intel_ring_invalidate_all_caches(req);
 }
 
 static bool
@@ -1002,8 +1002,9 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 
 static int
 i915_reset_gen7_sol_offsets(struct drm_device *dev,
-			    struct intel_engine_cs *ring)
+			    struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret, i;
 
@@ -1028,10 +1029,11 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
 }
 
 static int
-i915_emit_box(struct intel_engine_cs *ring,
+i915_emit_box(struct drm_i915_gem_request *req,
 	      struct drm_clip_rect *box,
 	      int DR1, int DR4)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (box->y2 <= box->y1 || box->x2 <= box->x1 ||
@@ -1247,7 +1249,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 	}
 
 	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
-		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
+		ret = i915_reset_gen7_sol_offsets(params->dev, params->request);
 		if (ret)
 			goto error;
 	}
@@ -1258,7 +1260,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	if (cliprects) {
 		for (i = 0; i < args->num_cliprects; i++) {
-			ret = i915_emit_box(ring, &cliprects[i],
+			ret = i915_emit_box(params->request, &cliprects[i],
 					    args->DR1, args->DR4);
 			if (ret)
 				goto error;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 479365e..fab9269 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -558,10 +558,9 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
 	return 0;
 }
 
-static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
-					      struct intel_context *ctx)
+static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = req->ring;
 	uint32_t flush_domains;
 	int ret;
 
@@ -569,7 +568,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
 	if (ring->gpu_caches_dirty)
 		flush_domains = I915_GEM_GPU_DOMAINS;
 
-	ret = ring->emit_flush(ringbuf, ctx,
+	ret = ring->emit_flush(req->ringbuf, req->ctx,
 			       I915_GEM_GPU_DOMAINS, flush_domains);
 	if (ret)
 		return ret;
@@ -605,7 +604,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx);
+	return logical_ring_invalidate_all_caches(req);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 508d7d8..efa44db 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2864,8 +2864,9 @@ intel_ring_flush_all_caches(struct intel_engine_cs *ring)
 }
 
 int
-intel_ring_invalidate_all_caches(struct intel_engine_cs *ring)
+intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	uint32_t flush_domains;
 	int ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 25d5ede..b817725 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -414,7 +414,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring);
 int __must_check intel_ring_idle(struct intel_engine_cs *ring);
 void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
 int intel_ring_flush_all_caches(struct intel_engine_cs *ring);
-int intel_ring_invalidate_all_caches(struct intel_engine_cs *ring);
+int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);
 
 void intel_fini_pipe_control(struct intel_engine_cs *ring);
 int intel_init_pipe_control(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 34/53] drm/i915: Update workarounds_emit() to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the *_ring_workarounds_emit() functions to take requests instead of
ring/context pairs.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   14 +++++++-------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    6 +++---
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index fab9269..08ed800 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1076,11 +1076,11 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
-					       struct intel_context *ctx)
+static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 {
 	int ret, i;
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
+	struct intel_engine_cs *ring = req->ring;
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct i915_workarounds *w = &dev_priv->workarounds;
@@ -1089,11 +1089,11 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
 		return 0;
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, ctx);
+	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
 	if (ret)
 		return ret;
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, w->count * 2 + 2);
+	ret = intel_logical_ring_begin(ringbuf, req->ctx, w->count * 2 + 2);
 	if (ret)
 		return ret;
 
@@ -1107,7 +1107,7 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
 	intel_logical_ring_advance(ringbuf);
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, ctx);
+	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
 	if (ret)
 		return ret;
 
@@ -1377,7 +1377,7 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_logical_ring_workarounds_emit(req->ring, req->ctx);
+	ret = intel_logical_ring_workarounds_emit(req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index efa44db..d147ffa 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -736,10 +736,10 @@ err:
 	return ret;
 }
 
-static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
-				       struct intel_context *ctx)
+static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 {
 	int ret, i;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct i915_workarounds *w = &dev_priv->workarounds;
@@ -779,7 +779,7 @@ static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_ring_workarounds_emit(req->ring, req->ctx);
+	ret = intel_ring_workarounds_emit(req);
 	if (ret != 0)
 		return ret;
 
-- 
1.7.9.5

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[PATCH 35/53] drm/i915: Update flush_all_caches() to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the *_ring_flush_all_caches() functions to take requests instead of
rings or ringbuf/context pairs.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
 drivers/gpu/drm/i915/intel_lrc.c        |   11 +++++------
 drivers/gpu/drm/i915/intel_lrc.h        |    3 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c |    7 ++++---
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 5 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 043933b..e8577d7 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2436,9 +2436,9 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	 */
 	if (flush_caches) {
 		if (i915.enable_execlists)
-			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
+			ret = logical_ring_flush_all_caches(request);
 		else
-			ret = intel_ring_flush_all_caches(ring);
+			ret = intel_ring_flush_all_caches(request);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 08ed800..d8084a1 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -768,16 +768,15 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring)
 	I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));
 }
 
-int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
-				  struct intel_context *ctx)
+int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (!ring->gpu_caches_dirty)
 		return 0;
 
-	ret = ring->emit_flush(ringbuf, ctx, 0, I915_GEM_GPU_DOMAINS);
+	ret = ring->emit_flush(req->ringbuf, req->ctx, 0, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -1089,7 +1088,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 		return 0;
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
+	ret = logical_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
@@ -1107,7 +1106,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	intel_logical_ring_advance(ringbuf);
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
+	ret = logical_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 77de8ac..40848b0 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -43,8 +43,7 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
 
-int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
-				  struct intel_context *ctx);
+int logical_ring_flush_all_caches(struct drm_i915_gem_request *req);
 /**
  * intel_logical_ring_advance() - advance the ringbuffer tail
  * @ringbuf: Ringbuffer to advance.
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index d147ffa..91a9131 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -748,7 +748,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 		return 0;
 
 	ring->gpu_caches_dirty = true;
-	ret = intel_ring_flush_all_caches(ring);
+	ret = intel_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
@@ -766,7 +766,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	intel_ring_advance(ring);
 
 	ring->gpu_caches_dirty = true;
-	ret = intel_ring_flush_all_caches(ring);
+	ret = intel_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
@@ -2846,8 +2846,9 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
 }
 
 int
-intel_ring_flush_all_caches(struct intel_engine_cs *ring)
+intel_ring_flush_all_caches(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (!ring->gpu_caches_dirty)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index b817725..0ef29fb 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -413,7 +413,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_idle(struct intel_engine_cs *ring);
 void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
-int intel_ring_flush_all_caches(struct intel_engine_cs *ring);
+int intel_ring_flush_all_caches(struct drm_i915_gem_request *req);
 int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);
 
 void intel_fini_pipe_control(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 36/53] drm/i915: Update switch_mm() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the switch_mm() code paths to take a request instead of a ring.

v2: Rebased to newer tree.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c     |   23 ++++++++++++++---------
 drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
 3 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 9e66fac..816a442 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -591,7 +591,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 
 	if (to->ppgtt) {
 		trace_switch_mm(ring, to);
-		ret = to->ppgtt->switch_mm(to->ppgtt, req->ring);
+		ret = to->ppgtt->switch_mm(to->ppgtt, req);
 		if (ret)
 			goto unpin_out;
 	}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index cd00080..c3408f2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -280,9 +280,10 @@ static gen6_gtt_pte_t iris_pte_encode(dma_addr_t addr,
 }
 
 /* Broadwell Page Directory Pointer Descriptors */
-static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
-			   uint64_t val)
+static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
+			  uint64_t val)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	BUG_ON(entry >= 4);
@@ -303,7 +304,7 @@ static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
 }
 
 static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
 	int i, ret;
 
@@ -312,7 +313,7 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
 
 	for (i = used_pd - 1; i >= 0; i--) {
 		dma_addr_t addr = ppgtt->pd_dma_addr[i];
-		ret = gen8_write_pdp(ring, i, addr);
+		ret = gen8_write_pdp(req, i, addr);
 		if (ret)
 			return ret;
 	}
@@ -777,8 +778,9 @@ static uint32_t get_pd_offset(struct i915_hw_ppgtt *ppgtt)
 }
 
 static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			 struct intel_engine_cs *ring)
+			 struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
@@ -802,8 +804,9 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 }
 
 static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev);
 
 	I915_WRITE(RING_PP_DIR_DCLV(ring), PP_DIR_DCLV_2G);
@@ -812,8 +815,9 @@ static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
 }
 
 static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
@@ -844,8 +848,9 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 }
 
 static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ppgtt->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
@@ -1235,7 +1240,7 @@ int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
 	if (!ppgtt)
 		return 0;
 
-	return ppgtt->switch_mm(ppgtt, req->ring);
+	return ppgtt->switch_mm(ppgtt, req);
 }
 
 struct i915_hw_ppgtt *
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index e7e202f..073be7f 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -289,7 +289,7 @@ struct i915_hw_ppgtt {
 
 	int (*enable)(struct i915_hw_ppgtt *ppgtt);
 	int (*switch_mm)(struct i915_hw_ppgtt *ppgtt,
-			 struct intel_engine_cs *ring);
+			 struct drm_i915_gem_request *req);
 	void (*debug_dump)(struct i915_hw_ppgtt *ppgtt, struct seq_file *m);
 };
 
-- 
1.7.9.5

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[PATCH 37/53] drm/i915: Update ring->flush() to take a requests structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Udpated the various ring->flush() functions to take a request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
 drivers/gpu/drm/i915/intel_ringbuffer.c |   30 +++++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 4 files changed, 24 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 816a442..384f481 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -489,7 +489,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 	 * itlb_before_ctx_switch.
 	 */
 	if (IS_GEN6(ring->dev)) {
-		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
+		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, 0);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index c3408f2..a1af644 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -784,7 +784,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
-	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -821,7 +821,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
-	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -839,7 +839,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 
 	/* XXX: RCS is the only one to auto invalidate the TLBs? */
 	if (ring->id != RCS) {
-		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 91a9131..ca8f039 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -91,10 +91,11 @@ static void __intel_ring_advance(struct intel_engine_cs *ring)
 }
 
 static int
-gen2_render_ring_flush(struct intel_engine_cs *ring,
+gen2_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32	invalidate_domains,
 		       u32	flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 cmd;
 	int ret;
 
@@ -117,10 +118,11 @@ gen2_render_ring_flush(struct intel_engine_cs *ring,
 }
 
 static int
-gen4_render_ring_flush(struct intel_engine_cs *ring,
+gen4_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32	invalidate_domains,
 		       u32	flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	u32 cmd;
 	int ret;
@@ -247,9 +249,10 @@ intel_emit_post_sync_nonzero_flush(struct intel_engine_cs *ring)
 }
 
 static int
-gen6_render_ring_flush(struct intel_engine_cs *ring,
-                         u32 invalidate_domains, u32 flush_domains)
+gen6_render_ring_flush(struct drm_i915_gem_request *req,
+		       u32 invalidate_domains, u32 flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
@@ -341,9 +344,10 @@ static int gen7_ring_fbc_flush(struct intel_engine_cs *ring, u32 value)
 }
 
 static int
-gen7_render_ring_flush(struct intel_engine_cs *ring,
+gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32 invalidate_domains, u32 flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
@@ -426,9 +430,10 @@ gen8_emit_pipe_control(struct intel_engine_cs *ring,
 }
 
 static int
-gen8_render_ring_flush(struct intel_engine_cs *ring,
+gen8_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32 invalidate_domains, u32 flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
@@ -1527,10 +1532,11 @@ i8xx_ring_put_irq(struct intel_engine_cs *ring)
 }
 
 static int
-bsd_ring_flush(struct intel_engine_cs *ring,
+bsd_ring_flush(struct drm_i915_gem_request *req,
 	       u32     invalidate_domains,
 	       u32     flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -2318,9 +2324,10 @@ static void gen6_bsd_ring_write_tail(struct intel_engine_cs *ring,
 		   _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
 }
 
-static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
+static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 			       u32 invalidate, u32 flush)
 {
+	struct intel_engine_cs *ring = req->ring;
 	uint32_t cmd;
 	int ret;
 
@@ -2430,9 +2437,10 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 
 /* Blitter support (SandyBridge+) */
 
-static int gen6_ring_flush(struct intel_engine_cs *ring,
+static int gen6_ring_flush(struct drm_i915_gem_request *req,
 			   u32 invalidate, u32 flush)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	uint32_t cmd;
@@ -2854,7 +2862,7 @@ intel_ring_flush_all_caches(struct drm_i915_gem_request *req)
 	if (!ring->gpu_caches_dirty)
 		return 0;
 
-	ret = ring->flush(ring, 0, I915_GEM_GPU_DOMAINS);
+	ret = ring->flush(req, 0, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -2875,7 +2883,7 @@ intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 	if (ring->gpu_caches_dirty)
 		flush_domains = I915_GEM_GPU_DOMAINS;
 
-	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, flush_domains);
+	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 0ef29fb..c08e2dc 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -147,7 +147,7 @@ struct  intel_engine_cs {
 
 	void		(*write_tail)(struct intel_engine_cs *ring,
 				      u32 value);
-	int __must_check (*flush)(struct intel_engine_cs *ring,
+	int __must_check (*flush)(struct drm_i915_gem_request *req,
 				  u32	invalidate_domains,
 				  u32	flush_domains);
 	int		(*add_request)(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 38/53] drm/i915: Update some flush helpers to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated intel_emit_post_sync_nonzero_flush(), gen7_render_ring_cs_stall_wa(),
gen7_ring_fbc_flush() and gen8_emit_pipe_control() to take requests instead of
rings.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c |   29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index ca8f039..470fa93 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -214,8 +214,9 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
  * really our business.  That leaves only stall at scoreboard.
  */
 static int
-intel_emit_post_sync_nonzero_flush(struct intel_engine_cs *ring)
+intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
@@ -258,7 +259,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
 	int ret;
 
 	/* Force SNB workarounds for PIPE_CONTROL flushes */
-	ret = intel_emit_post_sync_nonzero_flush(ring);
+	ret = intel_emit_post_sync_nonzero_flush(req);
 	if (ret)
 		return ret;
 
@@ -302,8 +303,9 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-gen7_render_ring_cs_stall_wa(struct intel_engine_cs *ring)
+gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 4);
@@ -320,8 +322,9 @@ gen7_render_ring_cs_stall_wa(struct intel_engine_cs *ring)
 	return 0;
 }
 
-static int gen7_ring_fbc_flush(struct intel_engine_cs *ring, u32 value)
+static int gen7_ring_fbc_flush(struct drm_i915_gem_request *req, u32 value)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (!ring->fbc_dirty)
@@ -389,7 +392,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		/* Workaround: we must issue a pipe_control with CS-stall bit
 		 * set before a pipe_control command that has the state cache
 		 * invalidate bit set. */
-		gen7_render_ring_cs_stall_wa(ring);
+		gen7_render_ring_cs_stall_wa(req);
 	}
 
 	ret = intel_ring_begin(ring, 4);
@@ -403,15 +406,16 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
 	intel_ring_advance(ring);
 
 	if (!invalidate_domains && flush_domains)
-		return gen7_ring_fbc_flush(ring, FBC_REND_NUKE);
+		return gen7_ring_fbc_flush(req, FBC_REND_NUKE);
 
 	return 0;
 }
 
 static int
-gen8_emit_pipe_control(struct intel_engine_cs *ring,
+gen8_emit_pipe_control(struct drm_i915_gem_request *req,
 		       u32 flags, u32 scratch_addr)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 6);
@@ -433,9 +437,8 @@ static int
 gen8_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32 invalidate_domains, u32 flush_domains)
 {
-	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
-	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
+	u32 scratch_addr = req->ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
 	flags |= PIPE_CONTROL_CS_STALL;
@@ -455,7 +458,7 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req,
 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
 
 		/* WaCsStallBeforeStateCacheInvalidate:bdw,chv */
-		ret = gen8_emit_pipe_control(ring,
+		ret = gen8_emit_pipe_control(req,
 					     PIPE_CONTROL_CS_STALL |
 					     PIPE_CONTROL_STALL_AT_SCOREBOARD,
 					     0);
@@ -463,12 +466,12 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req,
 			return ret;
 	}
 
-	ret = gen8_emit_pipe_control(ring, flags, scratch_addr);
+	ret = gen8_emit_pipe_control(req, flags, scratch_addr);
 	if (ret)
 		return ret;
 
 	if (!invalidate_domains && flush_domains)
-		return gen7_ring_fbc_flush(ring, FBC_REND_NUKE);
+		return gen7_ring_fbc_flush(req, FBC_REND_NUKE);
 
 	return 0;
 }
@@ -2482,7 +2485,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req,
 
 	if (!invalidate && flush) {
 		if (IS_GEN7(dev))
-			return gen7_ring_fbc_flush(ring, FBC_REND_CACHE_CLEAN);
+			return gen7_ring_fbc_flush(req, FBC_REND_CACHE_CLEAN);
 		else if (IS_BROADWELL(dev))
 			dev_priv->fbc.need_sw_cache_clean = true;
 	}
-- 
1.7.9.5

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[PATCH 39/53] drm/i915: Update ring->emit_flush() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->emit_flush() implementations to take a request instead
of a ringbuf/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   17 ++++++++---------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index d8084a1..f3bf2cc 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -568,8 +568,7 @@ static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 	if (ring->gpu_caches_dirty)
 		flush_domains = I915_GEM_GPU_DOMAINS;
 
-	ret = ring->emit_flush(req->ringbuf, req->ctx,
-			       I915_GEM_GPU_DOMAINS, flush_domains);
+	ret = ring->emit_flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
 	if (ret)
 		return ret;
 
@@ -776,7 +775,7 @@ int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
 	if (!ring->gpu_caches_dirty)
 		return 0;
 
-	ret = ring->emit_flush(req->ringbuf, req->ctx, 0, I915_GEM_GPU_DOMAINS);
+	ret = ring->emit_flush(req, 0, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -1221,18 +1220,18 @@ static void gen8_logical_ring_put_irq(struct intel_engine_cs *ring)
 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
 }
 
-static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
-			   struct intel_context *ctx,
+static int gen8_emit_flush(struct drm_i915_gem_request *request,
 			   u32 invalidate_domains,
 			   u32 unused)
 {
+	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+	ret = intel_logical_ring_begin(ringbuf, request->ctx, 4);
 	if (ret)
 		return ret;
 
@@ -1262,11 +1261,11 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
-				  struct intel_context *ctx,
+static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
 				  u32 invalidate_domains,
 				  u32 flush_domains)
 {
+	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	u32 flags = 0;
@@ -1290,7 +1289,7 @@ static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
 	}
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, 6);
+	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index c08e2dc..6f7c79c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -235,8 +235,7 @@ struct  intel_engine_cs {
 	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
 	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
 					struct drm_i915_gem_request *request);
-	int		(*emit_flush)(struct intel_ringbuffer *ringbuf,
-				      struct intel_context *ctx,
+	int		(*emit_flush)(struct drm_i915_gem_request *request,
 				      u32 invalidate_domains,
 				      u32 flush_domains);
 	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
-- 
1.7.9.5

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[PATCH 40/53] drm/i915: Update ring->add_request() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->add_request() implementations to take a request
instead of a ring. This removes their reliance on the OLR to obtain the seqno
value that the request should be tagged with.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |   26 ++++++++++++--------------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 3 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e8577d7..4357cd3 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2453,7 +2453,7 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	if (i915.enable_execlists)
 		ret = ring->emit_request(ringbuf, request);
 	else
-		ret = ring->add_request(ring);
+		ret = ring->add_request(request);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 470fa93..99f0dd1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1222,16 +1222,16 @@ static int gen6_signal(struct intel_engine_cs *signaller,
 
 /**
  * gen6_add_request - Update the semaphore mailbox registers
- * 
- * @ring - ring that is adding a request
- * @seqno - return seqno stuck into the ring
+ *
+ * @request - request to write to the ring
  *
  * Update the mailbox registers in the *other* rings with the current seqno.
  * This acts like a signal in the canonical semaphore.
  */
 static int
-gen6_add_request(struct intel_engine_cs *ring)
+gen6_add_request(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (ring->semaphore.signal)
@@ -1244,8 +1244,7 @@ gen6_add_request(struct intel_engine_cs *ring)
 
 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, MI_USER_INTERRUPT);
 	__intel_ring_advance(ring);
 
@@ -1342,8 +1341,9 @@ do {									\
 } while (0)
 
 static int
-pc_render_add_request(struct intel_engine_cs *ring)
+pc_render_add_request(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
@@ -1363,8 +1363,7 @@ pc_render_add_request(struct intel_engine_cs *ring)
 			PIPE_CONTROL_WRITE_FLUSH |
 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, 0);
 	PIPE_CONTROL_FLUSH(ring, scratch_addr);
 	scratch_addr += 2 * CACHELINE_BYTES; /* write to separate cachelines */
@@ -1383,8 +1382,7 @@ pc_render_add_request(struct intel_engine_cs *ring)
 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
 			PIPE_CONTROL_NOTIFY);
 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, 0);
 	__intel_ring_advance(ring);
 
@@ -1553,8 +1551,9 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-i9xx_add_request(struct intel_engine_cs *ring)
+i9xx_add_request(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 4);
@@ -1563,8 +1562,7 @@ i9xx_add_request(struct intel_engine_cs *ring)
 
 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, MI_USER_INTERRUPT);
 	__intel_ring_advance(ring);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 6f7c79c..d2391a9 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -150,7 +150,7 @@ struct  intel_engine_cs {
 	int __must_check (*flush)(struct drm_i915_gem_request *req,
 				  u32	invalidate_domains,
 				  u32	flush_domains);
-	int		(*add_request)(struct intel_engine_cs *ring);
+	int		(*add_request)(struct drm_i915_gem_request *req);
 	/* Some chipsets are not quite as coherent as advertised and need
 	 * an expensive kick to force a true read of the up-to-date seqno.
 	 * However, the up-to-date seqno is not always required and the last
-- 
1.7.9.5

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[PATCH 41/53] drm/i915: Update ring->emit_request() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the ring->emit_request() implementation to take a request instead of a
ringbuf/request pair. Also removed it's use of the OLR for obtaining the
request's seqno.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c        |    7 +++----
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4357cd3..4f6e9ad 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2451,7 +2451,7 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	request->postfix = intel_ring_get_tail(ringbuf);
 
 	if (i915.enable_execlists)
-		ret = ring->emit_request(ringbuf, request);
+		ret = ring->emit_request(request);
 	else
 		ret = ring->add_request(request);
 	if (ret)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f3bf2cc..f4661ec 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1314,9 +1314,9 @@ static void gen8_set_seqno(struct intel_engine_cs *ring, u32 seqno)
 	intel_write_status_page(ring, I915_GEM_HWS_INDEX, seqno);
 }
 
-static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
-			     struct drm_i915_gem_request *request)
+static int gen8_emit_request(struct drm_i915_gem_request *request)
 {
+	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	u32 cmd;
 	int ret;
@@ -1333,8 +1333,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
 				(ring->status_page.gfx_addr +
 				(I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT)));
 	intel_logical_ring_emit(ringbuf, 0);
-	intel_logical_ring_emit(ringbuf,
-		i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request));
 	intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
 	intel_logical_ring_emit(ringbuf, MI_NOOP);
 	intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index d2391a9..d8300f2 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -233,8 +233,7 @@ struct  intel_engine_cs {
 	struct list_head execlist_retired_req_list;
 	u8 next_context_status_buffer;
 	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
-	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
-					struct drm_i915_gem_request *request);
+	int		(*emit_request)(struct drm_i915_gem_request *request);
 	int		(*emit_flush)(struct drm_i915_gem_request *request,
 				      u32 invalidate_domains,
 				      u32 flush_domains);
-- 
1.7.9.5

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[PATCH 42/53] drm/i915: Update ring->dispatch_execbuffer() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->dispatch_execbuffer() implementations to take a
request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    4 ++--
 drivers/gpu/drm/i915/i915_gem_render_state.c |    3 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c      |   18 ++++++++++++------
 drivers/gpu/drm/i915/intel_ringbuffer.h      |    2 +-
 4 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index a79c893..8b4f8a9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1265,14 +1265,14 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			if (ret)
 				goto error;
 
-			ret = ring->dispatch_execbuffer(ring,
+			ret = ring->dispatch_execbuffer(params->request,
 							exec_start, exec_len,
 							params->dispatch_flags);
 			if (ret)
 				goto error;
 		}
 	} else {
-		ret = ring->dispatch_execbuffer(ring,
+		ret = ring->dispatch_execbuffer(params->request,
 						exec_start, exec_len,
 						params->dispatch_flags);
 		if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 866274c..cdf2fee 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -164,8 +164,7 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = req->ring->dispatch_execbuffer(req->ring,
-					     so.ggtt_offset,
+	ret = req->ring->dispatch_execbuffer(req, so.ggtt_offset,
 					     so.rodata->batch_items * 4,
 					     I915_DISPATCH_SECURE);
 	if (ret)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 99f0dd1..87612f1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1694,10 +1694,11 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
 }
 
 static int
-i965_dispatch_execbuffer(struct intel_engine_cs *ring,
+i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			 u64 offset, u32 length,
 			 unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -1720,10 +1721,11 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
 #define I830_TLB_ENTRIES (2)
 #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
 static int
-i830_dispatch_execbuffer(struct intel_engine_cs *ring,
+i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			 u64 offset, u32 len,
 			 unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 cs_offset = ring->scratch.gtt_offset;
 	int ret;
 
@@ -1782,10 +1784,11 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
 }
 
 static int
-i915_dispatch_execbuffer(struct intel_engine_cs *ring,
+i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			 u64 offset, u32 len,
 			 unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -2370,10 +2373,11 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
+gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			      u64 offset, u32 len,
 			      unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	bool ppgtt = USES_PPGTT(ring->dev) &&
 			!(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
@@ -2393,10 +2397,11 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 }
 
 static int
-hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
+hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			     u64 offset, u32 len,
 			     unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -2415,10 +2420,11 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 }
 
 static int
-gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
+gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			      u64 offset, u32 len,
 			      unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index d8300f2..0b03b3a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -161,7 +161,7 @@ struct  intel_engine_cs {
 				     bool lazy_coherency);
 	void		(*set_seqno)(struct intel_engine_cs *ring,
 				     u32 seqno);
-	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
+	int		(*dispatch_execbuffer)(struct drm_i915_gem_request *req,
 					       u64 offset, u32 length,
 					       unsigned dispatch_flags);
 #define I915_DISPATCH_SECURE 0x1
-- 
1.7.9.5

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[PATCH 43/53] drm/i915: Update ring->emit_bb_start() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the ring->emit_bb_start() implementation to take a request instead of a
ringbuf/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   12 +++++-------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f4661ec..5212b54 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -704,7 +704,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 	exec_start = params->batch_obj_vm_offset +
 		     args->batch_start_offset;
 
-	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
+	ret = ring->emit_bb_start(params->request, exec_start, params->dispatch_flags);
 	if (ret)
 		return ret;
 
@@ -1166,14 +1166,14 @@ static int gen9_init_render_ring(struct intel_engine_cs *ring)
 	return init_workarounds_ring(ring);
 }
 
-static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
-			      struct intel_context *ctx,
+static int gen8_emit_bb_start(struct drm_i915_gem_request *req,
 			      u64 offset, unsigned dispatch_flags)
 {
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+	ret = intel_logical_ring_begin(ringbuf, req->ctx, 4);
 	if (ret)
 		return ret;
 
@@ -1353,9 +1353,7 @@ static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = req->ring->emit_bb_start(req->ringbuf,
-				       req->ctx,
-				       so.ggtt_offset,
+	ret = req->ring->emit_bb_start(req, so.ggtt_offset,
 				       I915_DISPATCH_SECURE);
 	if (ret)
 		goto out;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 0b03b3a..1ff0ad1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -237,8 +237,7 @@ struct  intel_engine_cs {
 	int		(*emit_flush)(struct drm_i915_gem_request *request,
 				      u32 invalidate_domains,
 				      u32 flush_domains);
-	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
-					 struct intel_context *ctx,
+	int		(*emit_bb_start)(struct drm_i915_gem_request *req,
 					 u64 offset, unsigned dispatch_flags);
 
 	/**
-- 
1.7.9.5

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[PATCH 44/53] drm/i915: Update ring->sync_to() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the ring->sync_to() implementations to take a request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |    6 ++++--
 drivers/gpu/drm/i915/intel_ringbuffer.h |    4 ++--
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4f6e9ad..b5613ff 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2985,7 +2985,7 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
 		return ret;
 
 	trace_i915_gem_ring_sync_to(from, to, obj->last_read_req);
-	ret = to->semaphore.sync_to(to, from, seqno);
+	ret = to->semaphore.sync_to(to_req, from, seqno);
 	if (!ret)
 		/* We use last_read_req because sync_to()
 		 * might have just caused seqno wrap under
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 87612f1..767bab1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1267,10 +1267,11 @@ static inline bool i915_gem_has_seqno_wrapped(struct drm_device *dev,
  */
 
 static int
-gen8_ring_sync(struct intel_engine_cs *waiter,
+gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
 	       struct intel_engine_cs *signaller,
 	       u32 seqno)
 {
+	struct intel_engine_cs *waiter = waiter_req->ring;
 	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
 	int ret;
 
@@ -1292,10 +1293,11 @@ gen8_ring_sync(struct intel_engine_cs *waiter,
 }
 
 static int
-gen6_ring_sync(struct intel_engine_cs *waiter,
+gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
 	       struct intel_engine_cs *signaller,
 	       u32 seqno)
 {
+	struct intel_engine_cs *waiter = waiter_req->ring;
 	u32 dw1 = MI_SEMAPHORE_MBOX |
 		  MI_SEMAPHORE_COMPARE |
 		  MI_SEMAPHORE_REGISTER;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 1ff0ad1..65fe151 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -219,8 +219,8 @@ struct  intel_engine_cs {
 		};
 
 		/* AKA wait() */
-		int	(*sync_to)(struct intel_engine_cs *ring,
-				   struct intel_engine_cs *to,
+		int	(*sync_to)(struct drm_i915_gem_request *to_req,
+				   struct intel_engine_cs *from,
 				   u32 seqno);
 		int	(*signal)(struct intel_engine_cs *signaller,
 				  /* num_dwords needed by caller */
-- 
1.7.9.5

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[PATCH 45/53] drm/i915: Update ring->signal() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->signal() implementations to take a request instead of
a ring. This removes their reliance on the OLR to obtain the seqno value that
should be used for the signal.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c |   20 ++++++++++----------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 767bab1..440356d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1105,10 +1105,11 @@ static void render_ring_cleanup(struct intel_engine_cs *ring)
 	intel_fini_pipe_control(ring);
 }
 
-static int gen8_rcs_signal(struct intel_engine_cs *signaller,
+static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
 			   unsigned int num_dwords)
 {
 #define MBOX_UPDATE_DWORDS 8
+	struct intel_engine_cs *signaller = signaller_req->ring;
 	struct drm_device *dev = signaller->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *waiter;
@@ -1128,8 +1129,7 @@ static int gen8_rcs_signal(struct intel_engine_cs *signaller,
 		if (gtt_offset == MI_SEMAPHORE_SYNC_INVALID)
 			continue;
 
-		seqno = i915_gem_request_get_seqno(
-					   signaller->outstanding_lazy_request);
+		seqno = i915_gem_request_get_seqno(signaller_req);
 		intel_ring_emit(signaller, GFX_OP_PIPE_CONTROL(6));
 		intel_ring_emit(signaller, PIPE_CONTROL_GLOBAL_GTT_IVB |
 					   PIPE_CONTROL_QW_WRITE |
@@ -1146,10 +1146,11 @@ static int gen8_rcs_signal(struct intel_engine_cs *signaller,
 	return 0;
 }
 
-static int gen8_xcs_signal(struct intel_engine_cs *signaller,
+static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
 			   unsigned int num_dwords)
 {
 #define MBOX_UPDATE_DWORDS 6
+	struct intel_engine_cs *signaller = signaller_req->ring;
 	struct drm_device *dev = signaller->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *waiter;
@@ -1169,8 +1170,7 @@ static int gen8_xcs_signal(struct intel_engine_cs *signaller,
 		if (gtt_offset == MI_SEMAPHORE_SYNC_INVALID)
 			continue;
 
-		seqno = i915_gem_request_get_seqno(
-					   signaller->outstanding_lazy_request);
+		seqno = i915_gem_request_get_seqno(signaller_req);
 		intel_ring_emit(signaller, (MI_FLUSH_DW + 1) |
 					   MI_FLUSH_DW_OP_STOREDW);
 		intel_ring_emit(signaller, lower_32_bits(gtt_offset) |
@@ -1185,9 +1185,10 @@ static int gen8_xcs_signal(struct intel_engine_cs *signaller,
 	return 0;
 }
 
-static int gen6_signal(struct intel_engine_cs *signaller,
+static int gen6_signal(struct drm_i915_gem_request *signaller_req,
 		       unsigned int num_dwords)
 {
+	struct intel_engine_cs *signaller = signaller_req->ring;
 	struct drm_device *dev = signaller->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *useless;
@@ -1205,8 +1206,7 @@ static int gen6_signal(struct intel_engine_cs *signaller,
 	for_each_ring(useless, dev_priv, i) {
 		u32 mbox_reg = signaller->semaphore.mbox.signal[i];
 		if (mbox_reg != GEN6_NOSYNC) {
-			u32 seqno = i915_gem_request_get_seqno(
-					   signaller->outstanding_lazy_request);
+			u32 seqno = i915_gem_request_get_seqno(signaller_req);
 			intel_ring_emit(signaller, MI_LOAD_REGISTER_IMM(1));
 			intel_ring_emit(signaller, mbox_reg);
 			intel_ring_emit(signaller, seqno);
@@ -1235,7 +1235,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
 	int ret;
 
 	if (ring->semaphore.signal)
-		ret = ring->semaphore.signal(ring, 4);
+		ret = ring->semaphore.signal(req, 4);
 	else
 		ret = intel_ring_begin(ring, 4);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 65fe151..7c1e0f5 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -222,7 +222,7 @@ struct  intel_engine_cs {
 		int	(*sync_to)(struct drm_i915_gem_request *to_req,
 				   struct intel_engine_cs *from,
 				   u32 seqno);
-		int	(*signal)(struct intel_engine_cs *signaller,
+		int	(*signal)(struct drm_i915_gem_request *signaller_req,
 				  /* num_dwords needed by caller */
 				  unsigned int num_dwords);
 	} semaphore;
-- 
1.7.9.5

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[PATCH 46/53] drm/i915: Update cacheline_align() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated intel_ring_cacheline_align() to take a request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_display.c    |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |    3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9cbfb93..7962946 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9438,7 +9438,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 	 * then do the cacheline alignment, and finally emit the
 	 * MI_DISPLAY_FLIP.
 	 */
-	ret = intel_ring_cacheline_align(ring);
+	ret = intel_ring_cacheline_align(req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 440356d..109f283 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2258,8 +2258,9 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 }
 
 /* Align the ring tail to a cacheline boundary */
-int intel_ring_cacheline_align(struct intel_engine_cs *ring)
+int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int num_dwords = (ring->buffer->tail & (CACHELINE_BYTES - 1)) / sizeof(uint32_t);
 	int ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 7c1e0f5..80eb399 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -387,7 +387,7 @@ void intel_stop_ring_buffer(struct intel_engine_cs *ring);
 void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
-int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
+int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
 int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
 					  struct intel_context *ctx,
 					  struct drm_i915_gem_request **req_out);
-- 
1.7.9.5

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[PATCH 47/53] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated ironlake_enable_rc6() to do explicit request creation and submission.

v2: Fixed null context bug.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c |   31 +++++++++++++++++++++----------
 1 file changed, 21 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f7c9938..6594a52 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4985,6 +4985,7 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req = NULL;
 	bool was_interruptible;
 	int ret;
 
@@ -5003,16 +5004,17 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 	was_interruptible = dev_priv->mm.interruptible;
 	dev_priv->mm.interruptible = false;
 
+	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
+	if (ret)
+		goto err;
+
 	/*
 	 * GPU can automatically power down the render unit if given a page
 	 * to save state.
 	 */
 	ret = intel_ring_begin(ring, 6);
-	if (ret) {
-		ironlake_teardown_rc6(dev);
-		dev_priv->mm.interruptible = was_interruptible;
-		return;
-	}
+	if (ret)
+		goto err;
 
 	intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);
 	intel_ring_emit(ring, MI_SET_CONTEXT);
@@ -5026,6 +5028,11 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 	intel_ring_emit(ring, MI_FLUSH);
 	intel_ring_advance(ring);
 
+	ret = i915_add_request_no_flush(req);
+	if (ret)
+		goto err;
+	req = NULL;
+
 	/*
 	 * Wait for the command parser to advance past MI_SET_CONTEXT. The HW
 	 * does an implicit flush, combined with MI_FLUSH above, it should be
@@ -5033,16 +5040,20 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 	 */
 	ret = intel_ring_idle(ring);
 	dev_priv->mm.interruptible = was_interruptible;
-	if (ret) {
-		DRM_ERROR("failed to enable ironlake power savings\n");
-		ironlake_teardown_rc6(dev);
-		return;
-	}
+	if (ret)
+		goto err;
 
 	I915_WRITE(PWRCTXA, i915_gem_obj_ggtt_offset(dev_priv->ips.pwrctx) | PWRCTX_EN);
 	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
 
 	intel_print_rc6_info(dev, GEN6_RC_CTL_RC6_ENABLE);
+
+err:
+	DRM_ERROR("failed to enable ironlake power savings\n");
+	ironlake_teardown_rc6(dev);
+	dev_priv->mm.interruptible = was_interruptible;
+	if (req)
+		i915_gem_request_unreference(req);
 }
 
 static unsigned long intel_pxfreq(u32 vidfreq)
-- 
1.7.9.5

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[PATCH 48/53] drm/i915: Update intel_ring_begin() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use requests, intel_ring_begin()
can be updated to take a request instead of a ring. This also means that it no
longer needs to lazily allocate a request if no-one happens to have done it
earlier.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c            |    2 +-
 drivers/gpu/drm/i915/i915_gem_context.c    |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    8 ++--
 drivers/gpu/drm/i915/i915_gem_gtt.c        |    6 +--
 drivers/gpu/drm/i915/intel_display.c       |   10 ++--
 drivers/gpu/drm/i915/intel_overlay.c       |    8 ++--
 drivers/gpu/drm/i915/intel_pm.c            |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   72 +++++++++++++---------------
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
 9 files changed, 54 insertions(+), 58 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index b5613ff..60f6671 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4656,7 +4656,7 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 	if (!HAS_L3_DPF(dev) || !remap_info)
 		return 0;
 
-	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
+	ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 384f481..e348424 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -503,7 +503,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 	if (INTEL_INFO(ring->dev)->gen >= 7)
 		len += 2 + (num_rings ? 4*num_rings + 2 : 0);
 
-	ret = intel_ring_begin(ring, len);
+	ret = intel_ring_begin(req, len);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 8b4f8a9..6a703e6 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1013,7 +1013,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
 		return -EINVAL;
 	}
 
-	ret = intel_ring_begin(ring, 4 * 3);
+	ret = intel_ring_begin(req, 4 * 3);
 	if (ret)
 		return ret;
 
@@ -1044,7 +1044,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
 	}
 
 	if (INTEL_INFO(ring->dev)->gen >= 4) {
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(req, 4);
 		if (ret)
 			return ret;
 
@@ -1053,7 +1053,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
 		intel_ring_emit(ring, ((box->x2 - 1) & 0xffff) | (box->y2 - 1) << 16);
 		intel_ring_emit(ring, DR4);
 	} else {
-		ret = intel_ring_begin(ring, 6);
+		ret = intel_ring_begin(req, 6);
 		if (ret)
 			return ret;
 
@@ -1235,7 +1235,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	if (ring == &dev_priv->ring[RCS] &&
 			instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(params->request, 4);
 		if (ret)
 			goto error;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index a1af644..0445278 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -288,7 +288,7 @@ static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
 
 	BUG_ON(entry >= 4);
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -788,7 +788,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -825,7 +825,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7962946..6901e9a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9259,7 +9259,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
 	u32 flip_mask;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -9294,7 +9294,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
 	u32 flip_mask;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -9327,7 +9327,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
 	uint32_t pf, pipesrc;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -9366,7 +9366,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 	uint32_t pf, pipesrc;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -9442,7 +9442,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, len);
+	ret = intel_ring_begin(req, len);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 228c9d1..1fb7653 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -251,7 +251,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret) {
 		i915_gem_request_unreference(req);
 		return ret;
@@ -292,7 +292,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret) {
 		i915_gem_request_unreference(req);
 		return ret;
@@ -359,7 +359,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret) {
 		i915_gem_request_unreference(req);
 		return ret;
@@ -434,7 +434,7 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
 		if (ret)
 			return ret;
 
-		ret = intel_ring_begin(ring, 2);
+		ret = intel_ring_begin(req, 2);
 		if (ret) {
 			i915_gem_request_unreference(req);
 			return ret;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6594a52..cc22536 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5012,7 +5012,7 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 	 * GPU can automatically power down the render unit if given a page
 	 * to save state.
 	 */
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		goto err;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 109f283..5eef02e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -106,7 +106,7 @@ gen2_render_ring_flush(struct drm_i915_gem_request *req,
 	if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER)
 		cmd |= MI_READ_FLUSH;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -165,7 +165,7 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
 	    (IS_G4X(dev) || IS_GEN5(dev)))
 		cmd |= MI_INVALIDATE_ISP;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -220,8 +220,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
-
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -234,7 +233,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -289,7 +288,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
 		flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL;
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -308,7 +307,7 @@ gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -330,7 +329,7 @@ static int gen7_ring_fbc_flush(struct drm_i915_gem_request *req, u32 value)
 	if (!ring->fbc_dirty)
 		return 0;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 	/* WaFbcNukeOn3DBlt:ivb/hsw */
@@ -395,7 +394,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		gen7_render_ring_cs_stall_wa(req);
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -418,7 +417,7 @@ gen8_emit_pipe_control(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -760,7 +759,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, (w->count * 2 + 2));
+	ret = intel_ring_begin(req, (w->count * 2 + 2));
 	if (ret)
 		return ret;
 
@@ -1119,7 +1118,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1160,7 +1159,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1199,7 +1198,7 @@ static int gen6_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2);
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1237,7 +1236,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
 	if (ring->semaphore.signal)
 		ret = ring->semaphore.signal(req, 4);
 	else
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(req, 4);
 
 	if (ret)
 		return ret;
@@ -1275,7 +1274,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
 	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
 	int ret;
 
-	ret = intel_ring_begin(waiter, 4);
+	ret = intel_ring_begin(waiter_req, 4);
 	if (ret)
 		return ret;
 
@@ -1312,7 +1311,7 @@ gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
 
 	WARN_ON(wait_mbox == MI_SEMAPHORE_SYNC_INVALID);
 
-	ret = intel_ring_begin(waiter, 4);
+	ret = intel_ring_begin(waiter_req, 4);
 	if (ret)
 		return ret;
 
@@ -1357,7 +1356,7 @@ pc_render_add_request(struct drm_i915_gem_request *req)
 	 * incoherence by flushing the 6 PIPE_NOTIFY buffers out to
 	 * memory before requesting an interrupt.
 	 */
-	ret = intel_ring_begin(ring, 32);
+	ret = intel_ring_begin(req, 32);
 	if (ret)
 		return ret;
 
@@ -1542,7 +1541,7 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -1558,7 +1557,7 @@ i9xx_add_request(struct drm_i915_gem_request *req)
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1703,7 +1702,7 @@ i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -1731,7 +1730,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	u32 cs_offset = ring->scratch.gtt_offset;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -1748,7 +1747,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 		if (len > I830_BATCH_LIMIT)
 			return -ENOSPC;
 
-		ret = intel_ring_begin(ring, 6 + 2);
+		ret = intel_ring_begin(req, 6 + 2);
 		if (ret)
 			return ret;
 
@@ -1771,7 +1770,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 		offset = cs_offset;
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1793,7 +1792,7 @@ i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2232,13 +2231,15 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring,
 	return 0;
 }
 
-int intel_ring_begin(struct intel_engine_cs *ring,
+int intel_ring_begin(struct drm_i915_gem_request *req,
 		     int num_dwords)
 {
-	struct drm_i915_gem_request *req;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	int ret;
 
+	WARN_ON(req == NULL);
+
 	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
 				   dev_priv->mm.interruptible);
 	if (ret)
@@ -2248,11 +2249,6 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 	if (ret)
 		return ret;
 
-	/* Preallocate the olr before touching the ring */
-	ret = intel_ring_alloc_request(ring, NULL, &req);
-	if (ret)
-		return ret;
-
 	ring->buffer->space -= num_dwords * sizeof(uint32_t);
 	return 0;
 }
@@ -2268,7 +2264,7 @@ int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
 		return 0;
 
 	num_dwords = CACHELINE_BYTES / sizeof(uint32_t) - num_dwords;
-	ret = intel_ring_begin(ring, num_dwords);
+	ret = intel_ring_begin(req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -2338,7 +2334,7 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -2385,7 +2381,7 @@ gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			!(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -2407,7 +2403,7 @@ hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2430,7 +2426,7 @@ gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2456,7 +2452,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 80eb399..e83fbbb 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -386,7 +386,7 @@ int intel_alloc_ringbuffer_obj(struct drm_device *dev,
 void intel_stop_ring_buffer(struct intel_engine_cs *ring);
 void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 
-int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
+int __must_check intel_ring_begin(struct drm_i915_gem_request *req, int n);
 int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
 int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
 					  struct intel_context *ctx,
-- 
1.7.9.5

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[PATCH 49/53] drm/i915: Make intel_logical_ring_begin() static

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The only usage of intel_logical_ring_begin() is within intel_lrc.c so it can be
made static. To avoid a forward declaration at the top of the file, it and bunch
of other functions have been shuffled upwards.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |  394 +++++++++++++++++++-------------------
 drivers/gpu/drm/i915/intel_lrc.h |    3 -
 2 files changed, 197 insertions(+), 200 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 5212b54..b40501d 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -606,6 +606,203 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 	return logical_ring_invalidate_all_caches(req);
 }
 
+static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
+				     int bytes)
+{
+	struct intel_engine_cs *ring = ringbuf->ring;
+	struct drm_i915_gem_request *request;
+	int ret;
+
+	if (intel_ring_space(ringbuf) >= bytes)
+		return 0;
+
+	list_for_each_entry(request, &ring->request_list, list) {
+		/*
+		 * The request queue is per-engine, so can contain requests
+		 * from multiple ringbuffers. Here, we must ignore any that
+		 * aren't from the ringbuffer we're considering.
+		 */
+		struct intel_context *ctx = request->ctx;
+		if (ctx->engine[ring->id].ringbuf != ringbuf)
+			continue;
+
+		/* Would completion of this request free enough space? */
+		if (__intel_ring_space(request->tail, ringbuf->tail,
+				       ringbuf->size) >= bytes) {
+			break;
+		}
+	}
+
+	if (&request->list == &ring->request_list)
+		return -ENOSPC;
+
+	ret = i915_wait_request(request);
+	if (ret)
+		return ret;
+
+	i915_gem_retire_requests_ring(ring);
+
+	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
+}
+
+/*
+ * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
+ * @ringbuf: Logical Ringbuffer to advance.
+ *
+ * The tail is updated in our logical ringbuffer struct, not in the actual context. What
+ * really happens during submission is that the context and current tail will be placed
+ * on a queue waiting for the ELSP to be ready to accept a new context submission. At that
+ * point, the tail *inside* the context is updated and the ELSP written to.
+ */
+static void
+intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
+				      struct intel_context *ctx,
+				      struct drm_i915_gem_request *request)
+{
+	struct intel_engine_cs *ring = ringbuf->ring;
+
+	intel_logical_ring_advance(ringbuf);
+
+	if (intel_ring_stopped(ring))
+		return;
+
+	execlists_context_queue(ring, ctx, ringbuf->tail, request);
+}
+
+static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
+				       struct intel_context *ctx,
+				       int bytes)
+{
+	struct intel_engine_cs *ring = ringbuf->ring;
+	struct drm_device *dev = ring->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	unsigned long end;
+	int ret;
+
+	ret = logical_ring_wait_request(ringbuf, bytes);
+	if (ret != -ENOSPC)
+		return ret;
+
+	/* Force the context submission in case we have been skipping it */
+	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
+
+	/* With GEM the hangcheck timer should kick us out of the loop,
+	 * leaving it early runs the risk of corrupting GEM state (due
+	 * to running on almost untested codepaths). But on resume
+	 * timers don't work yet, so prevent a complete hang in that
+	 * case by choosing an insanely large timeout. */
+	end = jiffies + 60 * HZ;
+
+	ret = 0;
+	do {
+		if (intel_ring_space(ringbuf) >= bytes)
+			break;
+
+		msleep(1);
+
+		if (dev_priv->mm.interruptible && signal_pending(current)) {
+			ret = -ERESTARTSYS;
+			break;
+		}
+
+		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
+					   dev_priv->mm.interruptible);
+		if (ret)
+			break;
+
+		if (time_after(jiffies, end)) {
+			ret = -EBUSY;
+			break;
+		}
+	} while (1);
+
+	return ret;
+}
+
+static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
+				    struct intel_context *ctx)
+{
+	uint32_t __iomem *virt;
+	int rem = ringbuf->size - ringbuf->tail;
+
+	if (ringbuf->space < rem) {
+		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
+
+		if (ret)
+			return ret;
+	}
+
+	virt = ringbuf->virtual_start + ringbuf->tail;
+	rem /= 4;
+	while (rem--)
+		iowrite32(MI_NOOP, virt++);
+
+	ringbuf->tail = 0;
+	intel_ring_update_space(ringbuf);
+
+	return 0;
+}
+
+static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
+				struct intel_context *ctx, int bytes)
+{
+	int ret;
+
+	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
+		ret = logical_ring_wrap_buffer(ringbuf, ctx);
+		if (unlikely(ret))
+			return ret;
+	}
+
+	if (unlikely(ringbuf->space < bytes)) {
+		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
+		if (unlikely(ret))
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
+ *
+ * @ringbuf: Logical ringbuffer.
+ * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
+ *
+ * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
+ * be wrapped, or wait a bit for the tail to be updated). This function takes care of that
+ * and also preallocates a request (every workload submission is still mediated through
+ * requests, same as it did with legacy ringbuffer submission).
+ *
+ * Return: non-zero if the ringbuffer is not ready to be written to.
+ */
+static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
+				    struct intel_context *ctx, int num_dwords)
+{
+	struct drm_i915_gem_request *req;
+	struct intel_engine_cs *ring = ringbuf->ring;
+	struct drm_device *dev = ring->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	int ret;
+
+	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
+				   dev_priv->mm.interruptible);
+	if (ret)
+		return ret;
+
+	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
+	if (ret)
+		return ret;
+
+	/* Preallocate the olr before touching the ring */
+	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
+	if (ret)
+		return ret;
+
+	ringbuf->space -= num_dwords * sizeof(uint32_t);
+	return 0;
+}
+
 /**
  * execlists_submission() - submit a batchbuffer for execution, Execlists style
  * @dev: DRM device.
@@ -783,30 +980,6 @@ int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
 	return 0;
 }
 
-/*
- * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
- * @ringbuf: Logical Ringbuffer to advance.
- *
- * The tail is updated in our logical ringbuffer struct, not in the actual context. What
- * really happens during submission is that the context and current tail will be placed
- * on a queue waiting for the ELSP to be ready to accept a new context submission. At that
- * point, the tail *inside* the context is updated and the ELSP written to.
- */
-static void
-intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
-				      struct intel_context *ctx,
-				      struct drm_i915_gem_request *request)
-{
-	struct intel_engine_cs *ring = ringbuf->ring;
-
-	intel_logical_ring_advance(ringbuf);
-
-	if (intel_ring_stopped(ring))
-		return;
-
-	execlists_context_queue(ring, ctx, ringbuf->tail, request);
-}
-
 static int intel_lr_context_pin(struct intel_engine_cs *ring,
 		struct intel_context *ctx)
 {
@@ -901,179 +1074,6 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
 	return 0;
 }
 
-static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
-				     int bytes)
-{
-	struct intel_engine_cs *ring = ringbuf->ring;
-	struct drm_i915_gem_request *request;
-	int ret;
-
-	if (intel_ring_space(ringbuf) >= bytes)
-		return 0;
-
-	list_for_each_entry(request, &ring->request_list, list) {
-		/*
-		 * The request queue is per-engine, so can contain requests
-		 * from multiple ringbuffers. Here, we must ignore any that
-		 * aren't from the ringbuffer we're considering.
-		 */
-		struct intel_context *ctx = request->ctx;
-		if (ctx->engine[ring->id].ringbuf != ringbuf)
-			continue;
-
-		/* Would completion of this request free enough space? */
-		if (__intel_ring_space(request->tail, ringbuf->tail,
-				       ringbuf->size) >= bytes) {
-			break;
-		}
-	}
-
-	if (&request->list == &ring->request_list)
-		return -ENOSPC;
-
-	ret = i915_wait_request(request);
-	if (ret)
-		return ret;
-
-	i915_gem_retire_requests_ring(ring);
-
-	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
-}
-
-static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
-				       struct intel_context *ctx,
-				       int bytes)
-{
-	struct intel_engine_cs *ring = ringbuf->ring;
-	struct drm_device *dev = ring->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	unsigned long end;
-	int ret;
-
-	ret = logical_ring_wait_request(ringbuf, bytes);
-	if (ret != -ENOSPC)
-		return ret;
-
-	/* Force the context submission in case we have been skipping it */
-	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
-
-	/* With GEM the hangcheck timer should kick us out of the loop,
-	 * leaving it early runs the risk of corrupting GEM state (due
-	 * to running on almost untested codepaths). But on resume
-	 * timers don't work yet, so prevent a complete hang in that
-	 * case by choosing an insanely large timeout. */
-	end = jiffies + 60 * HZ;
-
-	ret = 0;
-	do {
-		if (intel_ring_space(ringbuf) >= bytes)
-			break;
-
-		msleep(1);
-
-		if (dev_priv->mm.interruptible && signal_pending(current)) {
-			ret = -ERESTARTSYS;
-			break;
-		}
-
-		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
-					   dev_priv->mm.interruptible);
-		if (ret)
-			break;
-
-		if (time_after(jiffies, end)) {
-			ret = -EBUSY;
-			break;
-		}
-	} while (1);
-
-	return ret;
-}
-
-static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
-				    struct intel_context *ctx)
-{
-	uint32_t __iomem *virt;
-	int rem = ringbuf->size - ringbuf->tail;
-
-	if (ringbuf->space < rem) {
-		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
-
-		if (ret)
-			return ret;
-	}
-
-	virt = ringbuf->virtual_start + ringbuf->tail;
-	rem /= 4;
-	while (rem--)
-		iowrite32(MI_NOOP, virt++);
-
-	ringbuf->tail = 0;
-	intel_ring_update_space(ringbuf);
-
-	return 0;
-}
-
-static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
-				struct intel_context *ctx, int bytes)
-{
-	int ret;
-
-	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
-		ret = logical_ring_wrap_buffer(ringbuf, ctx);
-		if (unlikely(ret))
-			return ret;
-	}
-
-	if (unlikely(ringbuf->space < bytes)) {
-		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
-		if (unlikely(ret))
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
- *
- * @ringbuf: Logical ringbuffer.
- * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
- *
- * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
- * be wrapped, or wait a bit for the tail to be updated). This function takes care of that
- * and also preallocates a request (every workload submission is still mediated through
- * requests, same as it did with legacy ringbuffer submission).
- *
- * Return: non-zero if the ringbuffer is not ready to be written to.
- */
-int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
-			     struct intel_context *ctx, int num_dwords)
-{
-	struct drm_i915_gem_request *req;
-	struct intel_engine_cs *ring = ringbuf->ring;
-	struct drm_device *dev = ring->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	int ret;
-
-	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
-				   dev_priv->mm.interruptible);
-	if (ret)
-		return ret;
-
-	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
-	if (ret)
-		return ret;
-
-	/* Preallocate the olr before touching the ring */
-	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
-	if (ret)
-		return ret;
-
-	ringbuf->space -= num_dwords * sizeof(uint32_t);
-	return 0;
-}
-
 static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 {
 	int ret, i;
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 40848b0..dceecc6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -65,9 +65,6 @@ static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
 	iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
 	ringbuf->tail += 4;
 }
-int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
-			     struct intel_context *ctx,
-			     int num_dwords);
 
 /* Logical Ring Contexts */
 void intel_lr_context_free(struct intel_context *ctx);
-- 
1.7.9.5

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[PATCH 50/53] drm/i915: Update intel_logical_ring_begin() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use requests,
intel_logical_ring_begin() can be updated to take a request instead of a
ringbuf/context pair. This also means that it no longer needs to lazily allocate
a request if no-one happens to have done it earlier.

Note that this change makes the execlist signature the same as the legacy
version. Thus the two functions could be merged into a ring->begin() wrapper if
required.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   33 +++++++++++++++------------------
 1 file changed, 15 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index b40501d..2911cf6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -766,7 +766,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
 /**
  * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
  *
- * @ringbuf: Logical ringbuffer.
+ * @request: The request to start some new work for
  * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
  *
  * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
@@ -776,30 +776,27 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
  *
  * Return: non-zero if the ringbuffer is not ready to be written to.
  */
-static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
-				    struct intel_context *ctx, int num_dwords)
+static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
+				    int num_dwords)
 {
-	struct drm_i915_gem_request *req;
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret;
 
+	WARN_ON(req == NULL);
+
 	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
 				   dev_priv->mm.interruptible);
 	if (ret)
 		return ret;
 
-	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
-	if (ret)
-		return ret;
-
-	/* Preallocate the olr before touching the ring */
-	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
+	ret = logical_ring_prepare(req->ringbuf, req->ctx,
+				   num_dwords * sizeof(uint32_t));
 	if (ret)
 		return ret;
 
-	ringbuf->space -= num_dwords * sizeof(uint32_t);
+	req->ringbuf->space -= num_dwords * sizeof(uint32_t);
 	return 0;
 }
 
@@ -885,7 +882,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 
 	if (ring == &dev_priv->ring[RCS] &&
 	    instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
+		ret = intel_logical_ring_begin(params->request, 4);
 		if (ret)
 			return ret;
 
@@ -1091,7 +1088,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	ret = intel_logical_ring_begin(ringbuf, req->ctx, w->count * 2 + 2);
+	ret = intel_logical_ring_begin(req, w->count * 2 + 2);
 	if (ret)
 		return ret;
 
@@ -1173,7 +1170,7 @@ static int gen8_emit_bb_start(struct drm_i915_gem_request *req,
 	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, req->ctx, 4);
+	ret = intel_logical_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1231,7 +1228,7 @@ static int gen8_emit_flush(struct drm_i915_gem_request *request,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, request->ctx, 4);
+	ret = intel_logical_ring_begin(request, 4);
 	if (ret)
 		return ret;
 
@@ -1289,7 +1286,7 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
 	}
 
-	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
+	ret = intel_logical_ring_begin(request, 6);
 	if (ret)
 		return ret;
 
@@ -1321,7 +1318,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
 	u32 cmd;
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
+	ret = intel_logical_ring_begin(request, 6);
 	if (ret)
 		return ret;
 
-- 
1.7.9.5

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[PATCH 51/53] drm/i915: Remove the now obsolete intel_ring_get_request()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Much of the driver has now been converted to passing requests around instead of
rings/ringbufs/contexts. Thus the function for retreiving the request from a
ring (i.e. the OLR) is no longer used and can be removed.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.h |    7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index e83fbbb..3b0261f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -431,11 +431,4 @@ static inline u32 intel_ring_get_tail(struct intel_ringbuffer *ringbuf)
 	return ringbuf->tail;
 }
 
-static inline struct drm_i915_gem_request *
-intel_ring_get_request(struct intel_engine_cs *ring)
-{
-	BUG_ON(ring->outstanding_lazy_request == NULL);
-	return ring->outstanding_lazy_request;
-}
-
 #endif /* _INTEL_RINGBUFFER_H_ */
-- 
1.7.9.5

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[PATCH 52/53] drm/i915: Remove the now obsolete 'outstanding_lazy_request'

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The outstanding_lazy_request is no longer used anywhere in the driver.
Everything that was looking at it now has a request explicitly passed in from on
high. Everything that was relying upon behind the scenes is now explicitly
creating/passing/submitting it's own private request. Thus the OLR can be
removed.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c            |   16 +---------------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    4 +---
 drivers/gpu/drm/i915/intel_lrc.c           |    6 ++----
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   17 ++---------------
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ----
 5 files changed, 6 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 60f6671..8e7418b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1156,15 +1156,9 @@ i915_gem_check_wedge(struct i915_gpu_error *error,
 int
 i915_gem_check_olr(struct drm_i915_gem_request *req)
 {
-	int ret;
-
 	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
 
-	ret = 0;
-	if (req == req->ring->outstanding_lazy_request)
-		ret = i915_add_request(req);
-
-	return ret;
+	return 0;
 }
 
 static void fake_irq(unsigned long data)
@@ -2424,8 +2418,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	dev_priv = ring->dev->dev_private;
 	ringbuf = request->ringbuf;
 
-	WARN_ON(request != ring->outstanding_lazy_request);
-
 	request_start = intel_ring_get_tail(ringbuf);
 	/*
 	 * Emit any outstanding flushes - execbuf can fail to emit the flush
@@ -2486,7 +2478,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	}
 
 	trace_i915_gem_request_add(request);
-	ring->outstanding_lazy_request = NULL;
 
 	i915_queue_hangcheck(ring->dev);
 
@@ -2672,9 +2663,6 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
 
 		i915_gem_free_request(request);
 	}
-
-	/* This may not have been flushed before the reset, so clean it now */
-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
 }
 
 void i915_gem_restore_fences(struct drm_device *dev)
@@ -3124,8 +3112,6 @@ int i915_gpu_idle(struct drm_device *dev)
 			}
 		}
 
-		WARN_ON(ring->outstanding_lazy_request);
-
 		ret = intel_ring_idle(ring);
 		if (ret)
 			return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 6a703e6..0eae592 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1571,10 +1571,8 @@ err:
 	 * must be freed again. If it was submitted then it is being tracked
 	 * on the active request list and no clean up is required here.
 	 */
-	if (ret && params->request) {
+	if (ret && params->request)
 		i915_gem_request_unreference(params->request);
-		ring->outstanding_lazy_request = NULL;
-	}
 
 	mutex_unlock(&dev->struct_mutex);
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 2911cf6..db63ea0 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1032,8 +1032,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
 	if (!req_out)
 		return -EINVAL;
 
-	if ((*req_out = ring->outstanding_lazy_request) != NULL)
-		return 0;
+	*req_out = NULL;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
 	if (request == NULL)
@@ -1067,7 +1066,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
 	i915_gem_context_reference(request->ctx);
 	request->ringbuf = ctx->engine[ring->id].ringbuf;
 
-	*req_out = ring->outstanding_lazy_request = request;
+	*req_out = request;
 	return 0;
 }
 
@@ -1393,7 +1392,6 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
 
 	intel_logical_ring_stop(ring);
 	WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0);
-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
 
 	if (ring->cleanup)
 		ring->cleanup(ring);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 5eef02e..85daa18 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2034,7 +2034,6 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
 
 	intel_unpin_ringbuffer_obj(ringbuf);
 	intel_destroy_ringbuffer_obj(ringbuf);
-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
 
 	if (ring->cleanup)
 		ring->cleanup(ring);
@@ -2153,15 +2152,6 @@ static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
 int intel_ring_idle(struct intel_engine_cs *ring)
 {
 	struct drm_i915_gem_request *req;
-	int ret;
-
-	/* We need to add any requests required to flush the objects and ring */
-	WARN_ON(ring->outstanding_lazy_request);
-	if (ring->outstanding_lazy_request) {
-		ret = i915_add_request(ring->outstanding_lazy_request);
-		if (ret)
-			return ret;
-	}
 
 	/* Wait upon the last request to be completed */
 	if (list_empty(&ring->request_list))
@@ -2186,8 +2176,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
 	if (!req_out)
 		return -EINVAL;
 
-	if ((*req_out = ring->outstanding_lazy_request) != NULL)
-		return 0;
+	*req_out = NULL;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
 	if (request == NULL)
@@ -2206,7 +2195,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
 		return ret;
 	}
 
-	*req_out = ring->outstanding_lazy_request = request;
+	*req_out = request;
 	return 0;
 }
 
@@ -2281,8 +2270,6 @@ void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	BUG_ON(ring->outstanding_lazy_request);
-
 	if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {
 		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
 		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 3b0261f..d2c6427 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -258,10 +258,6 @@ struct  intel_engine_cs {
 	 */
 	struct list_head request_list;
 
-	/**
-	 * Do we have some not yet emitted requests outstanding?
-	 */
-	struct drm_i915_gem_request *outstanding_lazy_request;
 	bool gpu_caches_dirty;
 	bool fbc_dirty;
 
-- 
1.7.9.5

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[PATCH 53/53] drm/i915: Move the request/file and request/pid association to creation time

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In _i915_add_request(), the request is associated with a userland client.
Specifically it is linked to the 'file' structure and the current user process
is recorded. One problem here is that the current user process is not
necessarily the same as when the request was submitted to the driver. This is
especially true when the GPU scheduler arrives and decouples driver submission
from hardware submission. Note also that it is only in the case where the add
request comes from an execbuff call that there is a client to associate. Any
other add request call is kernel only so does not need to do it.

This patch moves the client association into a separate function. This is then
called from the execbuffer code path itself at a sensible time. It also removes
the now redundant 'file' pointer from the add request parameter list.

An extra cleanup of the client association is also added to the request clean up
code for the eventuality where the request is killed after association but
before being submitted (e.g. due to out of memory error somewhere). Once the
submission has happened, the request is on the request list and the regular
request list removal will clear the association. Note that this still needs to
happen at this point in time because the request might be kept floating around
much longer (due to someone holding a reference count) and the client should not
be worrying about this request after it has been retired.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    8 +++--
 drivers/gpu/drm/i915/i915_gem.c            |   49 +++++++++++++++++++---------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    7 ++--
 3 files changed, 44 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3955bef..4a9248f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2199,6 +2199,9 @@ struct drm_i915_gem_request {
 };
 
 void i915_gem_request_free(struct kref *req_ref);
+void i915_gem_request_remove_from_client(struct drm_i915_gem_request *request);
+int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
+				   struct drm_file *file);
 
 static inline uint32_t
 i915_gem_request_get_seqno(struct drm_i915_gem_request *req)
@@ -2831,13 +2834,12 @@ void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
 int __must_check i915_gem_suspend(struct drm_device *dev);
 int __i915_add_request(struct drm_i915_gem_request *req,
-		       struct drm_file *file,
 		       struct drm_i915_gem_object *batch_obj,
 		       bool flush_caches);
 #define i915_add_request(req) \
-	__i915_add_request(req, NULL, NULL, true)
+	__i915_add_request(req, NULL, true)
 #define i915_add_request_no_flush(req) \
-	__i915_add_request(req, NULL, NULL, false)
+	__i915_add_request(req, NULL, false)
 int __i915_wait_request(struct drm_i915_gem_request *req,
 			unsigned reset_counter,
 			bool interruptible,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8e7418b..660518d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2401,7 +2401,6 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
 }
 
 int __i915_add_request(struct drm_i915_gem_request *request,
-		       struct drm_file *file,
 		       struct drm_i915_gem_object *obj,
 		       bool flush_caches)
 {
@@ -2463,19 +2462,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 
 	request->emitted_jiffies = jiffies;
 	list_add_tail(&request->list, &ring->request_list);
-	request->file_priv = NULL;
-
-	if (file) {
-		struct drm_i915_file_private *file_priv = file->driver_priv;
-
-		spin_lock(&file_priv->mm.lock);
-		request->file_priv = file_priv;
-		list_add_tail(&request->client_list,
-			      &file_priv->mm.request_list);
-		spin_unlock(&file_priv->mm.lock);
-
-		request->pid = get_pid(task_pid(current));
-	}
 
 	trace_i915_gem_request_add(request);
 
@@ -2490,7 +2476,34 @@ int __i915_add_request(struct drm_i915_gem_request *request,
 	return 0;
 }
 
-static inline void
+int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
+				   struct drm_file *file)
+{
+	struct drm_i915_private *dev_private;
+	struct drm_i915_file_private *file_priv;
+
+	WARN_ON(!req || !file || req->file_priv);
+
+	if (!req || !file)
+		return -EINVAL;
+
+	if (req->file_priv)
+		return -EINVAL;
+
+	dev_private = req->ring->dev->dev_private;
+	file_priv = file->driver_priv;
+
+	spin_lock(&file_priv->mm.lock);
+	req->file_priv = file_priv;
+	list_add_tail(&req->client_list, &file_priv->mm.request_list);
+	spin_unlock(&file_priv->mm.lock);
+
+	req->pid = get_pid(task_pid(current));
+
+	return 0;
+}
+
+inline void
 i915_gem_request_remove_from_client(struct drm_i915_gem_request *request)
 {
 	struct drm_i915_file_private *file_priv = request->file_priv;
@@ -2565,6 +2578,9 @@ void i915_gem_request_free(struct kref *req_ref)
 						 typeof(*req), ref);
 	struct intel_context *ctx = req->ctx;
 
+	if (req->file_priv)
+		i915_gem_request_remove_from_client(req);
+
 	if (ctx) {
 		if (i915.enable_execlists) {
 			struct intel_engine_cs *ring = req->ring;
@@ -4120,6 +4136,9 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file)
 		if (time_after_eq(request->emitted_jiffies, recent_enough))
 			break;
 
+		if (!request->emitted_jiffies)
+			continue;
+
 		target = request;
 	}
 	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 0eae592..739aaeb 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -996,8 +996,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 	params->ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	return __i915_add_request(params->request, params->file,
-				  params->batch_obj, true);
+	return __i915_add_request(params->request, params->batch_obj, true);
 }
 
 static int
@@ -1537,6 +1536,10 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	if (ret)
 		goto err;
 
+	ret = i915_gem_request_add_to_client(params->request, file);
+	if (ret)
+		goto err;
+
 	/*
 	 * Save assorted stuff away to pass through to *_submission().
 	 * NB: This data should be 'persistent' and not local as it will
-- 
1.7.9.5

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Re: [PATCH 17/53] drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring

[Daniel, Thomas]

> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
> John.C.Harrison@Intel.com
> Sent: Thursday, February 19, 2015 5:17 PM
> To: Intel-GFX@Lists.FreeDesktop.Org
> Subject: [Intel-gfx] [PATCH 17/53] drm/i915: Split i915_ppgtt_init_hw() in half -
> generic and per ring
> 
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> The i915_gem_init_hw() function calls a bunch of smaller initialisation
> functions. Multiple of which have generic sections and per ring sections. This
> means multiple passes are done over the rings. Each pass writes data to the ring
> which floats around in that ring's OLR until some random point in the future
> when an add_request() is done by some random other piece of code.
> 
> This patch breaks i915_ppgtt_init_hw() in two with the per ring initialisation
> now being done in i915_ppgtt_init_ring(). The ring looping is now done at the
> top level in i915_gem_init_hw().
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem.c     |   25 +++++++++++++++++++------
>  drivers/gpu/drm/i915/i915_gem_gtt.c |   25 ++++++++++++-------------
>  drivers/gpu/drm/i915/i915_gem_gtt.h |    1 +
>  3 files changed, 32 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c
> b/drivers/gpu/drm/i915/i915_gem.c
> index 51f719c..9bc60d7 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4844,19 +4844,32 @@ i915_gem_init_hw(struct drm_device *dev)
>  	 */
>  	init_unused_rings(dev);
> 
> +	ret = i915_ppgtt_init_hw(dev);
> +	if (ret) {
> +		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
> +		return ret;
> +	}
> +
> +	/* Need to do basic initialisation of all rings first: */
>  	for_each_ring(ring, dev_priv, i) {
>  		ret = ring->init_hw(ring);
>  		if (ret)
>  			return ret;
>  	}
> 
> -	for (i = 0; i < NUM_L3_SLICES(dev); i++)
> -		i915_gem_l3_remap(&dev_priv->ring[RCS], i);
> +	/* Now it is safe to go back round and do everything else: */
> +	for_each_ring(ring, dev_priv, i) {
> +		if (ring->id == RCS) {
> +			for (i = 0; i < NUM_L3_SLICES(dev); i++)
> +				i915_gem_l3_remap(ring, i);
> +		}
> 
> -	ret = i915_ppgtt_init_hw(dev);
> -	if (ret && ret != -EIO) {
> -		DRM_ERROR("PPGTT enable failed %d\n", ret);
> -		i915_gem_cleanup_ringbuffer(dev);
> +		ret = i915_ppgtt_init_ring(ring);
> +		if (ret && ret != -EIO) {
> +			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i,
> ret);
> +			i915_gem_cleanup_ringbuffer(dev);
> +			return ret;
> +		}
>  	}
> 
>  	ret = i915_gem_context_enable(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index e54b2a0..428d2f6 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1206,11 +1206,6 @@ int i915_ppgtt_init(struct drm_device *dev, struct
> i915_hw_ppgtt *ppgtt)
> 
>  int i915_ppgtt_init_hw(struct drm_device *dev)
>  {
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_engine_cs *ring;
> -	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
> -	int i, ret = 0;
> -
>  	/* In the case of execlists, PPGTT is enabled by the context descriptor
>  	 * and the PDPs are contained within the context itself.  We don't
>  	 * need to do anything here. */
> @@ -1229,16 +1224,20 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
>  	else
>  		MISSING_CASE(INTEL_INFO(dev)->gen);
> 
> -	if (ppgtt) {
> -		for_each_ring(ring, dev_priv, i) {
> -			ret = ppgtt->switch_mm(ppgtt, ring);
> -			if (ret != 0)
> -				return ret;
> -		}
> -	}
> +	return 0;
> +}
> 
> -	return ret;
> +int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
> +{
> +	struct drm_i915_private *dev_priv = ring->dev->dev_private;
> +	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
> +
> +	if (!ppgtt)
> +		return 0;
> +
> +	return ppgtt->switch_mm(ppgtt, ring);
>  }
This breaks alias PPGTT for execlists.
I915_ppgtt_init_hw() is a noop for execlists mode, but the new i915_ppgtt_init_ring() will try to do a switch_mm() which should not be done for execlists.

Thomas.

> +
>  struct i915_hw_ppgtt *
>  i915_ppgtt_create(struct drm_device *dev, struct drm_i915_file_private *fpriv)
>  {
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h
> b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index 8f76990..5a6cef9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -300,6 +300,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
> 
>  int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
>  int i915_ppgtt_init_hw(struct drm_device *dev);
> +int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
>  void i915_ppgtt_release(struct kref *kref);
>  struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
>  					struct drm_i915_file_private *fpriv);
> --
> 1.7.9.5
> 
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Re: [PATCH 08/51] drm/i915: Update alloc_request to return the allocated request

[Daniel Vetter]

On Fri, Feb 13, 2015 at 12:21:29PM +0000, Chris Wilson wrote:
> On Fri, Feb 13, 2015 at 11:48:17AM +0000, John.C.Harrison@Intel.com wrote:
> > From: John Harrison <John.C.Harrison@Intel.com>
> > 
> > The alloc_request() function does not actually return the newly allocated
> > request. Instead, it must be pulled from ring->outstanding_lazy_request. This
> > patch fixes this so that code can create a request and start using it knowing
> > exactly which request it actually owns.
> 
> Why do we have different functions in the first place?

There seems to be a bit a layer fumble going on with the lrc alloc request
also pinning the lrc context. We could pull that out and then share the
function again since there's indeed no reason no to. At least afaics.

Also we should probably assign the ctx (if there is any) right in the
request alloc function so that these two bits are always tied together.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 24/51] drm/i915: Update deferred context creation to do explicit request management

[Daniel Vetter]

On Wed, Feb 18, 2015 at 03:27:38PM +0000, John Harrison wrote:
> On 13/02/2015 12:15, Chris Wilson wrote:
> >On Fri, Feb 13, 2015 at 11:48:33AM +0000, John.C.Harrison@Intel.com wrote:
> >>From: John Harrison <John.C.Harrison@Intel.com>
> >>
> >>In execlist mode, context initialisation is deferred until first use of the
> >>given context. This is because execlist mode has many more contexts than legacy
> >>mode and many are never actually used.
> >That's not correct. There are no more contexts in execlists than legacy.
> >There are more ringbuffers, or rather the contexts have an extra state
> >object associated with them.
> Okay, I should have said sub-contexts. Or context state objects. Or
> something.

per-engine ctx state? Naming stuff is hard ;-)

>> >>Previously, the initialisation commands
> >>were written to the ring and tagged with some random request structure via the
> >>OLR. This seemed to be causing a null pointer deference bug under certain
> >>circumstances (BZ:40112).
> >>
> >>This patch adds explicit request creation and submission to the deferred
> >>initialisation code path. Thus removing any reliance on or randomness caused by
> >>the OLR.
> >This is upside down though. The request should be referencing the
> >context (thus instantiating it on demand) and nothing in the context
> >allocation requires the request. The initialisation here should be during
> >i915_request_switch_context(), since it can be entirely shared with
> >legacy.
> >-Chris
> 
> The request does reference the context - the alloc_reques() function takes a
> context object as a parameter. Thus it is impossible for the request to be
> used/supplied/required during context creation. The issue here is the lazy
> initialisation of the per ring context state which requires sending commands
> to the ring on first usage of the given context object on the given ring.
> 
> One problem is that the initialisation request and the batch buffer request
> cannot be merged at the moment. They both use request->batch_obj for
> tracking the command object. Thus this patch only works due to the deferred
> intialisation occurring during the i915_gem_validate_context() call very
> early on in execbuffer() rather than as part of the context switch within
> the batch buffer execution which is much later.

My request struct doesn't have a batch_obj pointer. Where is that from and
why do we need it? Atm just chasing Chris' comments, haven't read the full
series yet.

> I'm not sure what you mean by i915_request_switch_context(). The existing
> i915_switch_context() does now take just a request structure rather than a
> ring/ringbuf/context mixture. However, it is not really a good idea to do
> the context switch automatically as part of creating the request. The
> request creation and request execution could be quite separated in time,
> especially with a scheduler.
> 
> It should be possible to move the deferred initialisation within the context
> switch if the object tracking can be resolved. Thus they could share the
> same request and there would not be effectively two separate execution calls
> at the hardware level. Again, that's potentially work that could be done as
> a follow up task of improving the context management independent of the
> current task of removing the OLR.

I think the biggest risk with adding a separate request for the lrc
deferred init is in accidentally nesting request when someone moves around
the lrc validation. Atm it's at the top of execbuf but we tend to shuffle
things around a lot.

Is there some simple WARN_ON we could smash into the alloc function to
make sure this never happens? ring->olr would be it, but since we want to
kill that that's not great. Or do I see risks which aren't really there?
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[Daniel Vetter]

On Wed, Feb 18, 2015 at 02:28:16PM +0000, John Harrison wrote:
> On 13/02/2015 17:03, Chris Wilson wrote:
> >On Fri, Feb 13, 2015 at 04:58:24PM +0000, John Harrison wrote:
> >>On 13/02/2015 12:19, Chris Wilson wrote:
> >>>On Fri, Feb 13, 2015 at 11:48:56AM +0000, John.C.Harrison@Intel.com wrote:
> >>>>From: John Harrison <John.C.Harrison@Intel.com>
> >>>>
> >>>>Updated ironlake_enable_rc6() to do explicit request creation and submission.
> >>>If you merged the context here with the common context switching code,
> >>>we don't even need to touch the ring here.
> >>>-Chris
> >>>
> >>It would certainly be preferable to not have any ring commands
> >>written from deep within the power management code. However, I
> >>didn't want to change anything I didn't really need to, especially
> >>in code that I'm not at all sure about. Plus I don't have an
> >>ironlake to test any significant change on.
> >I did and tested extensively.
> >-Chris
> 
> Do you have a patch that just does the move of this from PM code to context
> switch code? Something that I can drop into this series would be great. If
> not, exactly where about in the context switch code should it go? Should it
> be in the start of day initialisation, in the per context intialisation,
> every context switch, only the first switch after a resume, ...?
> 
> Tracing back to where/when this code is currently executed seems to be quite
> complicated. The _enable_rc6() function is called during ring reset but only
> for Gen6+ because Ironlake is broken according to the comment. It is also
> called by a system power management callback but it is unclear when that
> would occur. Finally, it is also called from the display code in
> intel_modeset_init_hw().

ilk rc6 is disabled by default because it crashes machines hard and
doesn't seem to be all that useful really. Compared to gen6+ rc6 which has
a massive impact on idle power consumption, more with each generation.

I've also never heard of anyone managing to make this work reliably. We
could also just rip the entire code out I think, at least I wouldn't be
surprised if it has bitrot completely by now.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 01/51] drm/i915: Rename 'flags' to 'dispatch_flags' for better code reading

[Daniel Vetter]

On Fri, Feb 13, 2015 at 11:48:10AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> There is a flags word that is passed through the execbuffer code path all the
> way from initial decoding of the user parameters down to the very final dispatch
> buffer call. It is simply called 'flags'. Unfortuantely, there are many other
> flags words floating around in the same blocks of code. Even more once the GPU
> scheduler arrives.
> 
> This patch makes it more obvious exactly which flags word is which by renaming
> 'flags' to 'dispatch_flags'. Note that the bit definitions for this flags word
> already have an 'I915_DISPATCH_' prefix on them and so are not quite so
> ambiguous.
> 
> For: VIZ-1587

I've thought we've decided that the tag is OTC-Jira or similar. For:
certainly looks a bit too generic, and a prefix helps in namespacing if
you want to scan with automated tools for this.

> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>

Anyway looks like a good idea, queued for -next, thanks for the patch.
-Daniel
> ---
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   25 ++++++++++----------
>  drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++----
>  drivers/gpu/drm/i915/intel_lrc.h           |    2 +-
>  drivers/gpu/drm/i915/intel_ringbuffer.c    |   35 ++++++++++++++++------------
>  drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ++--
>  5 files changed, 41 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index b773368..ec9ea45 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1138,7 +1138,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>  			       struct drm_i915_gem_execbuffer2 *args,
>  			       struct list_head *vmas,
>  			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 flags)
> +			       u64 exec_start, u32 dispatch_flags)
>  {
>  	struct drm_clip_rect *cliprects = NULL;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -1266,19 +1266,19 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>  
>  			ret = ring->dispatch_execbuffer(ring,
>  							exec_start, exec_len,
> -							flags);
> +							dispatch_flags);
>  			if (ret)
>  				goto error;
>  		}
>  	} else {
>  		ret = ring->dispatch_execbuffer(ring,
>  						exec_start, exec_len,
> -						flags);
> +						dispatch_flags);
>  		if (ret)
>  			return ret;
>  	}
>  
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), flags);
> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
>  
>  	i915_gem_execbuffer_move_to_active(vmas, ring);
>  	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> @@ -1353,7 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  	struct i915_address_space *vm;
>  	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>  	u64 exec_start = args->batch_start_offset;
> -	u32 flags;
> +	u32 dispatch_flags;
>  	int ret;
>  	bool need_relocs;
>  
> @@ -1364,15 +1364,15 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  	if (ret)
>  		return ret;
>  
> -	flags = 0;
> +	dispatch_flags = 0;
>  	if (args->flags & I915_EXEC_SECURE) {
>  		if (!file->is_master || !capable(CAP_SYS_ADMIN))
>  		    return -EPERM;
>  
> -		flags |= I915_DISPATCH_SECURE;
> +		dispatch_flags |= I915_DISPATCH_SECURE;
>  	}
>  	if (args->flags & I915_EXEC_IS_PINNED)
> -		flags |= I915_DISPATCH_PINNED;
> +		dispatch_flags |= I915_DISPATCH_PINNED;
>  
>  	if ((args->flags & I915_EXEC_RING_MASK) > LAST_USER_RING) {
>  		DRM_DEBUG("execbuf with unknown ring: %d\n",
> @@ -1495,7 +1495,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  						      args->batch_start_offset,
>  						      args->batch_len,
>  						      file->is_master,
> -						      &flags);
> +						      &dispatch_flags);
>  		if (IS_ERR(batch_obj)) {
>  			ret = PTR_ERR(batch_obj);
>  			goto err;
> @@ -1507,7 +1507,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
>  	 * batch" bit. Hence we need to pin secure batches into the global gtt.
>  	 * hsw should have this fixed, but bdw mucks it up again. */
> -	if (flags & I915_DISPATCH_SECURE) {
> +	if (dispatch_flags & I915_DISPATCH_SECURE) {
>  		/*
>  		 * So on first glance it looks freaky that we pin the batch here
>  		 * outside of the reservation loop. But:
> @@ -1527,7 +1527,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  		exec_start += i915_gem_obj_offset(batch_obj, vm);
>  
>  	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
> -				      &eb->vmas, batch_obj, exec_start, flags);
> +				      &eb->vmas, batch_obj, exec_start,
> +				      dispatch_flags);
>  
>  	/*
>  	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
> @@ -1535,7 +1536,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  	 * needs to be adjusted to also track the ggtt batch vma properly as
>  	 * active.
>  	 */
> -	if (flags & I915_DISPATCH_SECURE)
> +	if (dispatch_flags & I915_DISPATCH_SECURE)
>  		i915_gem_object_ggtt_unpin(batch_obj);
>  err:
>  	/* the request owns the ref now */
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index a94346f..0376285 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -611,7 +611,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>   * @vmas: list of vmas.
>   * @batch_obj: the batchbuffer to submit.
>   * @exec_start: batchbuffer start virtual address pointer.
> - * @flags: translated execbuffer call flags.
> + * @dispatch_flags: translated execbuffer call flags.
>   *
>   * This is the evil twin version of i915_gem_ringbuffer_submission. It abstracts
>   * away the submission details of the execbuffer ioctl call.
> @@ -624,7 +624,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>  			       struct drm_i915_gem_execbuffer2 *args,
>  			       struct list_head *vmas,
>  			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 flags)
> +			       u64 exec_start, u32 dispatch_flags)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
> @@ -697,7 +697,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>  		dev_priv->relative_constants_mode = instp_mode;
>  	}
>  
> -	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags);
> +	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
>  	if (ret)
>  		return ret;
>  
> @@ -1142,9 +1142,9 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring)
>  
>  static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
>  			      struct intel_context *ctx,
> -			      u64 offset, unsigned flags)
> +			      u64 offset, unsigned dispatch_flags)
>  {
> -	bool ppgtt = !(flags & I915_DISPATCH_SECURE);
> +	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
>  	int ret;
>  
>  	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 6f2d7da..3093836 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -86,7 +86,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>  			       struct drm_i915_gem_execbuffer2 *args,
>  			       struct list_head *vmas,
>  			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 flags);
> +			       u64 exec_start, u32 dispatch_flags);
>  u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
>  
>  void intel_lrc_irq_handler(struct intel_engine_cs *ring);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 0bd3976..d611608 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1611,7 +1611,7 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
>  static int
>  i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>  			 u64 offset, u32 length,
> -			 unsigned flags)
> +			 unsigned dispatch_flags)
>  {
>  	int ret;
>  
> @@ -1622,7 +1622,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>  	intel_ring_emit(ring,
>  			MI_BATCH_BUFFER_START |
>  			MI_BATCH_GTT |
> -			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
> +			(dispatch_flags & I915_DISPATCH_SECURE ?
> +			 0 : MI_BATCH_NON_SECURE_I965));
>  	intel_ring_emit(ring, offset);
>  	intel_ring_advance(ring);
>  
> @@ -1635,8 +1636,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>  #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
>  static int
>  i830_dispatch_execbuffer(struct intel_engine_cs *ring,
> -				u64 offset, u32 len,
> -				unsigned flags)
> +			 u64 offset, u32 len,
> +			 unsigned dispatch_flags)
>  {
>  	u32 cs_offset = ring->scratch.gtt_offset;
>  	int ret;
> @@ -1654,7 +1655,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>  	intel_ring_emit(ring, MI_NOOP);
>  	intel_ring_advance(ring);
>  
> -	if ((flags & I915_DISPATCH_PINNED) == 0) {
> +	if ((dispatch_flags & I915_DISPATCH_PINNED) == 0) {
>  		if (len > I830_BATCH_LIMIT)
>  			return -ENOSPC;
>  
> @@ -1686,7 +1687,8 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>  		return ret;
>  
>  	intel_ring_emit(ring, MI_BATCH_BUFFER);
> -	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
> +	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
> +					0 : MI_BATCH_NON_SECURE));
>  	intel_ring_emit(ring, offset + len - 8);
>  	intel_ring_emit(ring, MI_NOOP);
>  	intel_ring_advance(ring);
> @@ -1697,7 +1699,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>  static int
>  i915_dispatch_execbuffer(struct intel_engine_cs *ring,
>  			 u64 offset, u32 len,
> -			 unsigned flags)
> +			 unsigned dispatch_flags)
>  {
>  	int ret;
>  
> @@ -1706,7 +1708,8 @@ i915_dispatch_execbuffer(struct intel_engine_cs *ring,
>  		return ret;
>  
>  	intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT);
> -	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
> +	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
> +					0 : MI_BATCH_NON_SECURE));
>  	intel_ring_advance(ring);
>  
>  	return 0;
> @@ -2265,9 +2268,10 @@ static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
>  static int
>  gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>  			      u64 offset, u32 len,
> -			      unsigned flags)
> +			      unsigned dispatch_flags)
>  {
> -	bool ppgtt = USES_PPGTT(ring->dev) && !(flags & I915_DISPATCH_SECURE);
> +	bool ppgtt = USES_PPGTT(ring->dev) &&
> +			!(dispatch_flags & I915_DISPATCH_SECURE);
>  	int ret;
>  
>  	ret = intel_ring_begin(ring, 4);
> @@ -2286,8 +2290,8 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>  
>  static int
>  hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> -			      u64 offset, u32 len,
> -			      unsigned flags)
> +			     u64 offset, u32 len,
> +			     unsigned dispatch_flags)
>  {
>  	int ret;
>  
> @@ -2297,7 +2301,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>  
>  	intel_ring_emit(ring,
>  			MI_BATCH_BUFFER_START |
> -			(flags & I915_DISPATCH_SECURE ?
> +			(dispatch_flags & I915_DISPATCH_SECURE ?
>  			 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW));
>  	/* bit0-7 is the length on GEN6+ */
>  	intel_ring_emit(ring, offset);
> @@ -2309,7 +2313,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>  static int
>  gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>  			      u64 offset, u32 len,
> -			      unsigned flags)
> +			      unsigned dispatch_flags)
>  {
>  	int ret;
>  
> @@ -2319,7 +2323,8 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>  
>  	intel_ring_emit(ring,
>  			MI_BATCH_BUFFER_START |
> -			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
> +			(dispatch_flags & I915_DISPATCH_SECURE ?
> +			 0 : MI_BATCH_NON_SECURE_I965));
>  	/* bit0-7 is the length on GEN6+ */
>  	intel_ring_emit(ring, offset);
>  	intel_ring_advance(ring);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 714f3fd..26e5774 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -164,7 +164,7 @@ struct  intel_engine_cs {
>  				     u32 seqno);
>  	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
>  					       u64 offset, u32 length,
> -					       unsigned flags);
> +					       unsigned dispatch_flags);
>  #define I915_DISPATCH_SECURE 0x1
>  #define I915_DISPATCH_PINNED 0x2
>  	void		(*cleanup)(struct intel_engine_cs *ring);
> @@ -242,7 +242,7 @@ struct  intel_engine_cs {
>  				      u32 flush_domains);
>  	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
>  					 struct intel_context *ctx,
> -					 u64 offset, unsigned flags);
> +					 u64 offset, unsigned dispatch_flags);
>  
>  	/**
>  	 * List of objects currently involved in rendering from the
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
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Re: [PATCH 03/51] drm/i915: Cache ringbuf pointer in request structure

[Daniel Vetter]

On Fri, Feb 13, 2015 at 11:48:12AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> In execlist mode, the ringbuf is a function of the ring and context whereas in
> legacy mode, it is derived from the ring alone. Thus the calculation required to
> determine the ringbuf pointer from the ring (and context) also needs to test
> execlist mode or not. This is messy.
> 
> Further, the request structure holds a pointer to both the ring and the context
> for which it was created. Thus, given a request, it is possible to derive the
> ringbuf in either legacy or execlist mode. Hence it is necessary to pass just
> the request in to all the low level functions rather than some combination of
> request, ring, context and ringbuf. However, rather than recalculating it each
> time, it is much simpler to just cache the ringbuf pointer in the request
> structure itself.
> 
> Caching the pointer means the calculation is done one at request creation time

s/one/once/ I guess?

> and all further code and simply read it directly from the request structure.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h         |    3 ++-
>  drivers/gpu/drm/i915/i915_gem.c         |   14 +-------------
>  drivers/gpu/drm/i915/intel_lrc.c        |    6 ++++--
>  drivers/gpu/drm/i915/intel_ringbuffer.c |    1 +
>  4 files changed, 8 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index f2a825e..e90b786 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2137,8 +2137,9 @@ struct drm_i915_gem_request {
>  	/** Position in the ringbuffer of the end of the whole request */
>  	u32 tail;
>  
> -	/** Context related to this request */
> +	/** Context and ring buffer related to this request */
>  	struct intel_context *ctx;
> +	struct intel_ringbuffer *ringbuf;
>  
>  	/** Batch buffer related to this request if any */
>  	struct drm_i915_gem_object *batch_obj;
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index c26d36c..2ebe914 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2758,7 +2758,6 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
>  
>  	while (!list_empty(&ring->request_list)) {
>  		struct drm_i915_gem_request *request;
> -		struct intel_ringbuffer *ringbuf;
>  
>  		request = list_first_entry(&ring->request_list,
>  					   struct drm_i915_gem_request,
> @@ -2769,23 +2768,12 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
>  
>  		trace_i915_gem_request_retire(request);
>  
> -		/* This is one of the few common intersection points
> -		 * between legacy ringbuffer submission and execlists:
> -		 * we need to tell them apart in order to find the correct
> -		 * ringbuffer to which the request belongs to.
> -		 */
> -		if (i915.enable_execlists) {
> -			struct intel_context *ctx = request->ctx;
> -			ringbuf = ctx->engine[ring->id].ringbuf;
> -		} else
> -			ringbuf = ring->buffer;
> -
>  		/* We know the GPU must have read the request to have
>  		 * sent us the seqno + interrupt, so use the position
>  		 * of tail of the request to update the last known position
>  		 * of the GPU head.
>  		 */
> -		ringbuf->last_retired_head = request->postfix;
> +		request->ringbuf->last_retired_head = request->postfix;
>  
>  		i915_gem_free_request(request);
>  	}
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 73c1861..762136b 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -878,12 +878,14 @@ static int logical_ring_alloc_request(struct intel_engine_cs *ring,
>  		return ret;
>  	}
>  
> -	/* Hold a reference to the context this request belongs to
> +	/*
> +	 * Hold a reference to the context this request belongs to
>  	 * (we will need it when the time comes to emit/retire the
> -	 * request).
> +	 * request). Likewise, the ringbuff is useful to keep track of.
>  	 */

Imo this comment is a bit too obvious so I just deleted it ;-)
-Daniel

>  	request->ctx = ctx;
>  	i915_gem_context_reference(request->ctx);
> +	request->ringbuf = ctx->engine[ring->id].ringbuf;
>  
>  	ring->outstanding_lazy_request = request;
>  	return 0;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index d611608..ca9e7e6 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2100,6 +2100,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring)
>  
>  	kref_init(&request->ref);
>  	request->ring = ring;
> +	request->ringbuf = ring->buffer;
>  	request->uniq = dev_private->request_uniq++;
>  
>  	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 04/51] drm/i915: Merged the many do_execbuf() parameters into a structure

[Daniel Vetter]

On Fri, Feb 13, 2015 at 11:48:13AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> The do_execbuf() function takes quite a few parameters. The actual set of
> parameters is going to change with the conversion to passing requests around.
> Further, it is due to grow massively with the arrival of the GPU scheduler.
> 
> This patch simplies the prototype by passing a parameter structure instead.
> Changing the parameter set in the future is then simply a matter of
> adding/removing items to the structure.
> 
> Note that the structure does not contain absolutely everything that is passed
> in. This is because the intention is to use this structure more extensively
> later in this patch series and more especially in the GPU scheduler that is
> coming soon. The latter requires hanging on to the structure as the final
> hardware submission can be delayed until long after the execbuf IOCTL has
> returned to user land. Thus it is unsafe to put anything in the structure that
> is local to the IOCTL call itself - such as the 'args' parameter. All entries
> must be copies of data or pointers to structures that are reference counted in
> someway and guaranteed to exist for the duration of the batch buffer's life.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h            |   27 +++++++-------
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   56 ++++++++++++++++++----------
>  drivers/gpu/drm/i915/intel_lrc.c           |   26 +++++++------
>  drivers/gpu/drm/i915/intel_lrc.h           |    9 ++---
>  4 files changed, 67 insertions(+), 51 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e90b786..e6d616b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1640,6 +1640,16 @@ struct i915_workarounds {
>  	u32 count;
>  };
>  
> +struct i915_execbuffer_params {
> +	struct drm_device               *dev;
> +	struct drm_file                 *file;
> +	uint32_t                        dispatch_flags;
> +	uint32_t                        batch_obj_vm_offset;
> +	struct intel_engine_cs          *ring;
> +	struct drm_i915_gem_object      *batch_obj;
> +	struct intel_context            *ctx;
> +};

tbh I'm not a fan of parameter objects in C. C is verbose and explicit.

If we add the request then we can remove ring and ctx, which already
improves things. We also have the eb structure we use to pass around a
pile of things, which we could somewhat reuse here. What else do you plan
to add? Just want to figure out whether this is really required ...
-Daniel

> +
>  struct drm_i915_private {
>  	struct drm_device *dev;
>  	struct kmem_cache *slab;
> @@ -1891,13 +1901,9 @@ struct drm_i915_private {
>  
>  	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
>  	struct {
> -		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
> -				  struct intel_engine_cs *ring,
> -				  struct intel_context *ctx,
> +		int (*do_execbuf)(struct i915_execbuffer_params *params,
>  				  struct drm_i915_gem_execbuffer2 *args,
> -				  struct list_head *vmas,
> -				  struct drm_i915_gem_object *batch_obj,
> -				  u64 exec_start, u32 flags);
> +				  struct list_head *vmas);
>  		int (*init_rings)(struct drm_device *dev);
>  		void (*cleanup_ring)(struct intel_engine_cs *ring);
>  		void (*stop_ring)(struct intel_engine_cs *ring);
> @@ -2622,14 +2628,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
>  					 struct drm_file *file,
>  					 struct intel_engine_cs *ring,
>  					 struct drm_i915_gem_object *obj);
> -int i915_gem_ringbuffer_submission(struct drm_device *dev,
> -				   struct drm_file *file,
> -				   struct intel_engine_cs *ring,
> -				   struct intel_context *ctx,
> +int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>  				   struct drm_i915_gem_execbuffer2 *args,
> -				   struct list_head *vmas,
> -				   struct drm_i915_gem_object *batch_obj,
> -				   u64 exec_start, u32 flags);
> +				   struct list_head *vmas);
>  int i915_gem_execbuffer(struct drm_device *dev, void *data,
>  			struct drm_file *file_priv);
>  int i915_gem_execbuffer2(struct drm_device *dev, void *data,
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index ec9ea45..93b0ef0 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1132,17 +1132,15 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *ring,
>  }
>  
>  int
> -i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
> -			       struct intel_engine_cs *ring,
> -			       struct intel_context *ctx,
> +i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>  			       struct drm_i915_gem_execbuffer2 *args,
> -			       struct list_head *vmas,
> -			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 dispatch_flags)
> +			       struct list_head *vmas)
>  {
>  	struct drm_clip_rect *cliprects = NULL;
> +	struct drm_device *dev = params->dev;
> +	struct intel_engine_cs *ring = params->ring;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	u64 exec_len;
> +	u64 exec_start, exec_len;
>  	int instp_mode;
>  	u32 instp_mask;
>  	int i, ret = 0;
> @@ -1194,7 +1192,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>  	if (ret)
>  		goto error;
>  
> -	ret = i915_switch_context(ring, ctx);
> +	ret = i915_switch_context(ring, params->ctx);
>  	if (ret)
>  		goto error;
>  
> @@ -1251,12 +1249,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>  	}
>  
>  	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
> -		ret = i915_reset_gen7_sol_offsets(dev, ring);
> +		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
>  		if (ret)
>  			goto error;
>  	}
>  
> -	exec_len = args->batch_len;
> +	exec_len   = args->batch_len;
> +	exec_start = params->batch_obj_vm_offset +
> +		     args->batch_start_offset;
> +
>  	if (cliprects) {
>  		for (i = 0; i < args->num_cliprects; i++) {
>  			ret = i915_emit_box(ring, &cliprects[i],
> @@ -1266,22 +1267,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>  
>  			ret = ring->dispatch_execbuffer(ring,
>  							exec_start, exec_len,
> -							dispatch_flags);
> +							params->dispatch_flags);
>  			if (ret)
>  				goto error;
>  		}
>  	} else {
>  		ret = ring->dispatch_execbuffer(ring,
>  						exec_start, exec_len,
> -						dispatch_flags);
> +						params->dispatch_flags);
>  		if (ret)
>  			return ret;
>  	}
>  
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>  
>  	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
> +					    params->batch_obj);
>  
>  error:
>  	kfree(cliprects);
> @@ -1351,8 +1353,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  	struct intel_engine_cs *ring;
>  	struct intel_context *ctx;
>  	struct i915_address_space *vm;
> +	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
> +	struct i915_execbuffer_params *params = &params_master;
>  	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
> -	u64 exec_start = args->batch_start_offset;
>  	u32 dispatch_flags;
>  	int ret;
>  	bool need_relocs;
> @@ -1445,6 +1448,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  	else
>  		vm = &dev_priv->gtt.base;
>  
> +	memset(&params_master, 0x00, sizeof(params_master));
> +
>  	eb = eb_create(args);
>  	if (eb == NULL) {
>  		i915_gem_context_unreference(ctx);
> @@ -1522,13 +1527,24 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  		if (ret)
>  			goto err;
>  
> -		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
> +		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
>  	} else
> -		exec_start += i915_gem_obj_offset(batch_obj, vm);
> +		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>  
> -	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
> -				      &eb->vmas, batch_obj, exec_start,
> -				      dispatch_flags);
> +	/*
> +	 * Save assorted stuff away to pass through to *_submission().
> +	 * NB: This data should be 'persistent' and not local as it will
> +	 * kept around beyond the duration of the IOCTL once the GPU
> +	 * scheduler arrives.
> +	 */
> +	params->dev                     = dev;
> +	params->file                    = file;
> +	params->ring                    = ring;
> +	params->dispatch_flags          = dispatch_flags;
> +	params->batch_obj               = batch_obj;
> +	params->ctx                     = ctx;
> +
> +	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
>  
>  	/*
>  	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 762136b..ca29290 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -618,16 +618,15 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>   *
>   * Return: non-zero if the submission fails.
>   */
> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> -			       struct intel_engine_cs *ring,
> -			       struct intel_context *ctx,
> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>  			       struct drm_i915_gem_execbuffer2 *args,
> -			       struct list_head *vmas,
> -			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 dispatch_flags)
> +			       struct list_head *vmas)
>  {
> +	struct drm_device       *dev = params->dev;
> +	struct intel_engine_cs  *ring = params->ring;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
> +	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
> +	u64 exec_start;
>  	int instp_mode;
>  	u32 instp_mask;
>  	int ret;
> @@ -678,13 +677,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>  		return -EINVAL;
>  	}
>  
> -	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
> +	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
>  	if (ret)
>  		return ret;
>  
>  	if (ring == &dev_priv->ring[RCS] &&
>  	    instp_mode != dev_priv->relative_constants_mode) {
> -		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
> +		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
>  		if (ret)
>  			return ret;
>  
> @@ -697,14 +696,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>  		dev_priv->relative_constants_mode = instp_mode;
>  	}
>  
> -	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
> +	exec_start = params->batch_obj_vm_offset +
> +		     args->batch_start_offset;
> +
> +	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
>  	if (ret)
>  		return ret;
>  
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>  
>  	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
>  
>  	return 0;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 3093836..ae2f3ed 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -80,13 +80,10 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
>  
>  /* Execlists */
>  int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> -			       struct intel_engine_cs *ring,
> -			       struct intel_context *ctx,
> +struct i915_execbuffer_params;
> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>  			       struct drm_i915_gem_execbuffer2 *args,
> -			       struct list_head *vmas,
> -			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 dispatch_flags);
> +			       struct list_head *vmas);
>  u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
>  
>  void intel_lrc_irq_handler(struct intel_engine_cs *ring);
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[Daniel Vetter]

On Fri, Feb 13, 2015 at 11:48:14AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> For some reason, the i915_add_request() call in
> i915_gem_execbuffer_retire_commands() was explicitly having its return code
> ignored. The _retire_commands() function itself was 'void'. Given that
> _add_request() can fail without dispatching the batch buffer, this seems odd.

I was so convinced we've had a commit somewhere explaining this, but
apparently not.

The deal is that after the dispatch call we have the batch commit and
there's no going back any more, which also means we can't return an error
code from the ioctl. So if you return -EIO or -ENOMEM that's a pretty bad
lie and you really have to ignore that error code.

Again I've tried to dig up the commit for that but that was lost in the
maze of the past 5 years of changes. We've had piles of older approaches
to deal with this issue:
- Don't even emit a request, just mark objects as gpu dirty. Only when
  waiting did we emit flushes and requests, which again again gave us a
  context to return the error. This resulted in horrible latency since
  flushes where wait too late and also all that book-keeping was not worth
  it at all. Don't ask ;-)
- Emit flushes right away, but if we fail to alloc the request set the
  outstanding lazy request bit. The job of the check_olr function used in
  waits was to notice that and retry the allocation.
- Preallocate the request, but that still leaves the possibility that the
  gpu dies. But since we've committed hangcheck will clean this up and we
  can just ignore the -EIO.

Given all that backstory: Why does add_request/retire_commands suddenly
need to fail?

Cheers, Daniel

> Also shrunk the parameter list to a single structure as everything it requires
> is available in the execbuff_params object.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h            |    5 +----
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   16 +++++++---------
>  drivers/gpu/drm/i915/intel_lrc.c           |    3 +--
>  3 files changed, 9 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e6d616b..143bc63 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2624,10 +2624,7 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
>  			     struct drm_file *file_priv);
>  void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
>  					struct intel_engine_cs *ring);
> -void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
> -					 struct drm_file *file,
> -					 struct intel_engine_cs *ring,
> -					 struct drm_i915_gem_object *obj);
> +int i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
>  int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>  				   struct drm_i915_gem_execbuffer2 *args,
>  				   struct list_head *vmas);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 93b0ef0..ca85803 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -989,17 +989,15 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
>  	}
>  }
>  
> -void
> -i915_gem_execbuffer_retire_commands(struct drm_device *dev,
> -				    struct drm_file *file,
> -				    struct intel_engine_cs *ring,
> -				    struct drm_i915_gem_object *obj)
> +int
> +i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
>  {
>  	/* Unconditionally force add_request to emit a full flush. */
> -	ring->gpu_caches_dirty = true;
> +	params->ring->gpu_caches_dirty = true;
>  
>  	/* Add a breadcrumb for the completion of the batch buffer */
> -	(void)__i915_add_request(ring, file, obj);
> +	return __i915_add_request(params->ring, params->file,
> +				  params->batch_obj);
>  }
>  
>  static int
> @@ -1282,8 +1280,8 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>  	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>  
>  	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
> -					    params->batch_obj);
> +
> +	ret = i915_gem_execbuffer_retire_commands(params);
>  
>  error:
>  	kfree(cliprects);
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index ca29290..90400d0d 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -706,9 +706,8 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
>  	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>  
>  	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
>  
> -	return 0;
> +	return i915_gem_execbuffer_retire_commands(params);
>  }
>  
>  void intel_execlists_retire_requests(struct intel_engine_cs *ring)
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 07/51] drm/i915: Early alloc request in execbuff

[Daniel Vetter]

On Fri, Feb 13, 2015 at 11:48:16AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> Start of explicit request management in the execbuffer code path. This patch
> adds a call to allocate a request structure before all the actual hardware work
> is done. Thus guaranteeing that all that work is tagged by a known request. At
> present, nothing further is done with the request, the rest comes later in the
> series.
> 
> The only noticable change is that failure to get a request (e.g. due to lack of
> memory) will be caught earlier in the sequence. It now occurs right at the start
> before any un-undoable work has been done.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index ca85803..61471e9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1356,7 +1356,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>  	u32 dispatch_flags;
>  	int ret;
> -	bool need_relocs;
> +	bool need_relocs, batch_pinned = false;
>  
>  	if (!i915_gem_check_execbuffer(args))
>  		return -EINVAL;
> @@ -1525,10 +1525,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  		if (ret)
>  			goto err;
>  
> +		batch_pinned = true;
>  		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
>  	} else
>  		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>  
> +	/* Allocate a request for this batch buffer nice and early. */
> +	ret = dev_priv->gt.alloc_request(ring, ctx);
> +	if (ret)
> +		goto err;
> +
>  	/*
>  	 * Save assorted stuff away to pass through to *_submission().
>  	 * NB: This data should be 'persistent' and not local as it will
> @@ -1544,15 +1550,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  
>  	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
>  
> +err:
>  	/*
>  	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
>  	 * batch vma for correctness. For less ugly and less fragility this
>  	 * needs to be adjusted to also track the ggtt batch vma properly as
>  	 * active.
>  	 */
> -	if (dispatch_flags & I915_DISPATCH_SECURE)
> +	if (batch_pinned)
>  		i915_gem_object_ggtt_unpin(batch_obj);
> -err:
> +
>  	/* the request owns the ref now */
>  	i915_gem_context_unreference(ctx);
>  	eb_destroy(eb);

This hunk here looks wrong, or maybe the context changed sufficiently
already (but I can't find that in previous patches). Why do we need to
change the pinning for the ggtt batch pin hack when allocating the request
earlier?
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 14/51] drm/i915: Update pin_to_display_plane() to do explicit request management

[Daniel Vetter]

On Fri, Feb 13, 2015 at 11:48:23AM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> Added explicit creation creation and submission of the request structure to the
> display object pinning code. This removes any reliance on the OLR keeping track
> of the request and the unknown randomness that can ensue with other work
> becoming part of the same request.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem.c |   21 ++++++++++++++++++---
>  1 file changed, 18 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 96f9155..ef561e5 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3938,9 +3938,24 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>  	int ret;
>  
>  	if (pipelined != i915_gem_request_get_ring(obj->last_read_req)) {
> -		ret = i915_gem_object_sync(obj, pipelined);
> -		if (ret)
> -			return ret;
> +		if (!pipelined) {
> +			ret = i915_gem_object_wait_rendering(obj, false);
> +		} else {
> +			struct drm_i915_private *dev_priv = pipelined->dev->dev_private;
> +			struct drm_i915_gem_request *req;
> +
> +			ret = dev_priv->gt.alloc_request(pipelined, pipelined->default_context, &req);
> +			if (ret)
> +				return ret;
> +
> +			ret = i915_gem_object_sync(obj, req->ring);
> +			if (ret)
> +				return ret;
> +
> +			ret = i915_add_request_no_flush(req->ring);
> +			if (ret)
> +				return ret;
> +		}

Wrong layer. The only place using pin_and_fence (the caller of this
function) with non-NULL ring is the pageflip code, which also throws other
stuff onto the ring.
-Daniel

>  	}
>  
>  	/* Mark the pin_display early so that we account for the
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[Daniel Vetter]

On Wed, Feb 25, 2015 at 11:17:00PM +0100, Daniel Vetter wrote:
> On Fri, Feb 13, 2015 at 11:48:14AM +0000, John.C.Harrison@Intel.com wrote:
> > From: John Harrison <John.C.Harrison@Intel.com>
> > 
> > For some reason, the i915_add_request() call in
> > i915_gem_execbuffer_retire_commands() was explicitly having its return code
> > ignored. The _retire_commands() function itself was 'void'. Given that
> > _add_request() can fail without dispatching the batch buffer, this seems odd.
> 
> I was so convinced we've had a commit somewhere explaining this, but
> apparently not.
> 
> The deal is that after the dispatch call we have the batch commit and
> there's no going back any more, which also means we can't return an error
> code from the ioctl. So if you return -EIO or -ENOMEM that's a pretty bad
> lie and you really have to ignore that error code.
> 
> Again I've tried to dig up the commit for that but that was lost in the
> maze of the past 5 years of changes. We've had piles of older approaches
> to deal with this issue:
> - Don't even emit a request, just mark objects as gpu dirty. Only when
>   waiting did we emit flushes and requests, which again again gave us a
>   context to return the error. This resulted in horrible latency since
>   flushes where wait too late and also all that book-keeping was not worth
>   it at all. Don't ask ;-)
> - Emit flushes right away, but if we fail to alloc the request set the
>   outstanding lazy request bit. The job of the check_olr function used in
>   waits was to notice that and retry the allocation.
> - Preallocate the request, but that still leaves the possibility that the
>   gpu dies. But since we've committed hangcheck will clean this up and we
>   can just ignore the -EIO.

It's actually worse since it's not just -EIO but also -EINTR, returned by
intel_ring_begin when we're thrashing the gpu a bit too badly with
requests. Which means we really need to guarantee that the request is
completed properly, eventually since it's not just for fatal gpu hangs.

Atm that's done by only clearing outstanding_lazy_request after we've
really emitted the request fully. That guarantees that even when parts of
the request emission to the ringbuf fails we'll retry on the next wait if
needed.

A possible fix to make this infallible would be to reserve some fixed
amount of ringbuf credit at request creation time and then consume it
here. Of course we'd need checks to make sure we never use more ringspace
than what we reserve. To avoid massive churn we could convert
I915_RING_FREE_SPACE into a variable and increase it enough when
allocating the request. And then reduce it again at the start of
add_request.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 01/51] drm/i915: Rename 'flags' to 'dispatch_flags' for better code reading

[John Harrison]

On 25/02/2015 21:34, Daniel Vetter wrote:
> On Fri, Feb 13, 2015 at 11:48:10AM +0000, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> There is a flags word that is passed through the execbuffer code path all the
>> way from initial decoding of the user parameters down to the very final dispatch
>> buffer call. It is simply called 'flags'. Unfortuantely, there are many other
>> flags words floating around in the same blocks of code. Even more once the GPU
>> scheduler arrives.
>>
>> This patch makes it more obvious exactly which flags word is which by renaming
>> 'flags' to 'dispatch_flags'. Note that the bit definitions for this flags word
>> already have an 'I915_DISPATCH_' prefix on them and so are not quite so
>> ambiguous.
>>
>> For: VIZ-1587
> I've thought we've decided that the tag is OTC-Jira or similar. For:
> certainly looks a bit too generic, and a prefix helps in namespacing if
> you want to scan with automated tools for this.

The wiki page about GMIN tagging (which comes from the OTC) very clearly 
says to use 'For:' in the case of multi-patch series or 'Issue:' for 
single patches and talks about automated tools using these tags to 
update and/or close bugs. It also says the tags should be used for linux 
kernel upstreaming as well.


>
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Anyway looks like a good idea, queued for -next, thanks for the patch.
> -Daniel
>> ---
>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   25 ++++++++++----------
>>   drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++----
>>   drivers/gpu/drm/i915/intel_lrc.h           |    2 +-
>>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   35 ++++++++++++++++------------
>>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ++--
>>   5 files changed, 41 insertions(+), 35 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> index b773368..ec9ea45 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> @@ -1138,7 +1138,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>>   			       struct drm_i915_gem_execbuffer2 *args,
>>   			       struct list_head *vmas,
>>   			       struct drm_i915_gem_object *batch_obj,
>> -			       u64 exec_start, u32 flags)
>> +			       u64 exec_start, u32 dispatch_flags)
>>   {
>>   	struct drm_clip_rect *cliprects = NULL;
>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>> @@ -1266,19 +1266,19 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>>   
>>   			ret = ring->dispatch_execbuffer(ring,
>>   							exec_start, exec_len,
>> -							flags);
>> +							dispatch_flags);
>>   			if (ret)
>>   				goto error;
>>   		}
>>   	} else {
>>   		ret = ring->dispatch_execbuffer(ring,
>>   						exec_start, exec_len,
>> -						flags);
>> +						dispatch_flags);
>>   		if (ret)
>>   			return ret;
>>   	}
>>   
>> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), flags);
>> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
>>   
>>   	i915_gem_execbuffer_move_to_active(vmas, ring);
>>   	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
>> @@ -1353,7 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   	struct i915_address_space *vm;
>>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>>   	u64 exec_start = args->batch_start_offset;
>> -	u32 flags;
>> +	u32 dispatch_flags;
>>   	int ret;
>>   	bool need_relocs;
>>   
>> @@ -1364,15 +1364,15 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   	if (ret)
>>   		return ret;
>>   
>> -	flags = 0;
>> +	dispatch_flags = 0;
>>   	if (args->flags & I915_EXEC_SECURE) {
>>   		if (!file->is_master || !capable(CAP_SYS_ADMIN))
>>   		    return -EPERM;
>>   
>> -		flags |= I915_DISPATCH_SECURE;
>> +		dispatch_flags |= I915_DISPATCH_SECURE;
>>   	}
>>   	if (args->flags & I915_EXEC_IS_PINNED)
>> -		flags |= I915_DISPATCH_PINNED;
>> +		dispatch_flags |= I915_DISPATCH_PINNED;
>>   
>>   	if ((args->flags & I915_EXEC_RING_MASK) > LAST_USER_RING) {
>>   		DRM_DEBUG("execbuf with unknown ring: %d\n",
>> @@ -1495,7 +1495,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   						      args->batch_start_offset,
>>   						      args->batch_len,
>>   						      file->is_master,
>> -						      &flags);
>> +						      &dispatch_flags);
>>   		if (IS_ERR(batch_obj)) {
>>   			ret = PTR_ERR(batch_obj);
>>   			goto err;
>> @@ -1507,7 +1507,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
>>   	 * batch" bit. Hence we need to pin secure batches into the global gtt.
>>   	 * hsw should have this fixed, but bdw mucks it up again. */
>> -	if (flags & I915_DISPATCH_SECURE) {
>> +	if (dispatch_flags & I915_DISPATCH_SECURE) {
>>   		/*
>>   		 * So on first glance it looks freaky that we pin the batch here
>>   		 * outside of the reservation loop. But:
>> @@ -1527,7 +1527,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   		exec_start += i915_gem_obj_offset(batch_obj, vm);
>>   
>>   	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
>> -				      &eb->vmas, batch_obj, exec_start, flags);
>> +				      &eb->vmas, batch_obj, exec_start,
>> +				      dispatch_flags);
>>   
>>   	/*
>>   	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
>> @@ -1535,7 +1536,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   	 * needs to be adjusted to also track the ggtt batch vma properly as
>>   	 * active.
>>   	 */
>> -	if (flags & I915_DISPATCH_SECURE)
>> +	if (dispatch_flags & I915_DISPATCH_SECURE)
>>   		i915_gem_object_ggtt_unpin(batch_obj);
>>   err:
>>   	/* the request owns the ref now */
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>> index a94346f..0376285 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> @@ -611,7 +611,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>>    * @vmas: list of vmas.
>>    * @batch_obj: the batchbuffer to submit.
>>    * @exec_start: batchbuffer start virtual address pointer.
>> - * @flags: translated execbuffer call flags.
>> + * @dispatch_flags: translated execbuffer call flags.
>>    *
>>    * This is the evil twin version of i915_gem_ringbuffer_submission. It abstracts
>>    * away the submission details of the execbuffer ioctl call.
>> @@ -624,7 +624,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>>   			       struct drm_i915_gem_execbuffer2 *args,
>>   			       struct list_head *vmas,
>>   			       struct drm_i915_gem_object *batch_obj,
>> -			       u64 exec_start, u32 flags)
>> +			       u64 exec_start, u32 dispatch_flags)
>>   {
>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>>   	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
>> @@ -697,7 +697,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>>   		dev_priv->relative_constants_mode = instp_mode;
>>   	}
>>   
>> -	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags);
>> +	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
>>   	if (ret)
>>   		return ret;
>>   
>> @@ -1142,9 +1142,9 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring)
>>   
>>   static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
>>   			      struct intel_context *ctx,
>> -			      u64 offset, unsigned flags)
>> +			      u64 offset, unsigned dispatch_flags)
>>   {
>> -	bool ppgtt = !(flags & I915_DISPATCH_SECURE);
>> +	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
>>   	int ret;
>>   
>>   	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
>> index 6f2d7da..3093836 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.h
>> +++ b/drivers/gpu/drm/i915/intel_lrc.h
>> @@ -86,7 +86,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>>   			       struct drm_i915_gem_execbuffer2 *args,
>>   			       struct list_head *vmas,
>>   			       struct drm_i915_gem_object *batch_obj,
>> -			       u64 exec_start, u32 flags);
>> +			       u64 exec_start, u32 dispatch_flags);
>>   u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
>>   
>>   void intel_lrc_irq_handler(struct intel_engine_cs *ring);
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index 0bd3976..d611608 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -1611,7 +1611,7 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
>>   static int
>>   i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   			 u64 offset, u32 length,
>> -			 unsigned flags)
>> +			 unsigned dispatch_flags)
>>   {
>>   	int ret;
>>   
>> @@ -1622,7 +1622,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   	intel_ring_emit(ring,
>>   			MI_BATCH_BUFFER_START |
>>   			MI_BATCH_GTT |
>> -			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
>> +			(dispatch_flags & I915_DISPATCH_SECURE ?
>> +			 0 : MI_BATCH_NON_SECURE_I965));
>>   	intel_ring_emit(ring, offset);
>>   	intel_ring_advance(ring);
>>   
>> @@ -1635,8 +1636,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
>>   static int
>>   i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>> -				u64 offset, u32 len,
>> -				unsigned flags)
>> +			 u64 offset, u32 len,
>> +			 unsigned dispatch_flags)
>>   {
>>   	u32 cs_offset = ring->scratch.gtt_offset;
>>   	int ret;
>> @@ -1654,7 +1655,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   	intel_ring_emit(ring, MI_NOOP);
>>   	intel_ring_advance(ring);
>>   
>> -	if ((flags & I915_DISPATCH_PINNED) == 0) {
>> +	if ((dispatch_flags & I915_DISPATCH_PINNED) == 0) {
>>   		if (len > I830_BATCH_LIMIT)
>>   			return -ENOSPC;
>>   
>> @@ -1686,7 +1687,8 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   		return ret;
>>   
>>   	intel_ring_emit(ring, MI_BATCH_BUFFER);
>> -	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
>> +	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
>> +					0 : MI_BATCH_NON_SECURE));
>>   	intel_ring_emit(ring, offset + len - 8);
>>   	intel_ring_emit(ring, MI_NOOP);
>>   	intel_ring_advance(ring);
>> @@ -1697,7 +1699,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   static int
>>   i915_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   			 u64 offset, u32 len,
>> -			 unsigned flags)
>> +			 unsigned dispatch_flags)
>>   {
>>   	int ret;
>>   
>> @@ -1706,7 +1708,8 @@ i915_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   		return ret;
>>   
>>   	intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT);
>> -	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
>> +	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
>> +					0 : MI_BATCH_NON_SECURE));
>>   	intel_ring_advance(ring);
>>   
>>   	return 0;
>> @@ -2265,9 +2268,10 @@ static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
>>   static int
>>   gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   			      u64 offset, u32 len,
>> -			      unsigned flags)
>> +			      unsigned dispatch_flags)
>>   {
>> -	bool ppgtt = USES_PPGTT(ring->dev) && !(flags & I915_DISPATCH_SECURE);
>> +	bool ppgtt = USES_PPGTT(ring->dev) &&
>> +			!(dispatch_flags & I915_DISPATCH_SECURE);
>>   	int ret;
>>   
>>   	ret = intel_ring_begin(ring, 4);
>> @@ -2286,8 +2290,8 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   
>>   static int
>>   hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>> -			      u64 offset, u32 len,
>> -			      unsigned flags)
>> +			     u64 offset, u32 len,
>> +			     unsigned dispatch_flags)
>>   {
>>   	int ret;
>>   
>> @@ -2297,7 +2301,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   
>>   	intel_ring_emit(ring,
>>   			MI_BATCH_BUFFER_START |
>> -			(flags & I915_DISPATCH_SECURE ?
>> +			(dispatch_flags & I915_DISPATCH_SECURE ?
>>   			 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW));
>>   	/* bit0-7 is the length on GEN6+ */
>>   	intel_ring_emit(ring, offset);
>> @@ -2309,7 +2313,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   static int
>>   gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   			      u64 offset, u32 len,
>> -			      unsigned flags)
>> +			      unsigned dispatch_flags)
>>   {
>>   	int ret;
>>   
>> @@ -2319,7 +2323,8 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>>   
>>   	intel_ring_emit(ring,
>>   			MI_BATCH_BUFFER_START |
>> -			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
>> +			(dispatch_flags & I915_DISPATCH_SECURE ?
>> +			 0 : MI_BATCH_NON_SECURE_I965));
>>   	/* bit0-7 is the length on GEN6+ */
>>   	intel_ring_emit(ring, offset);
>>   	intel_ring_advance(ring);
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
>> index 714f3fd..26e5774 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
>> @@ -164,7 +164,7 @@ struct  intel_engine_cs {
>>   				     u32 seqno);
>>   	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
>>   					       u64 offset, u32 length,
>> -					       unsigned flags);
>> +					       unsigned dispatch_flags);
>>   #define I915_DISPATCH_SECURE 0x1
>>   #define I915_DISPATCH_PINNED 0x2
>>   	void		(*cleanup)(struct intel_engine_cs *ring);
>> @@ -242,7 +242,7 @@ struct  intel_engine_cs {
>>   				      u32 flush_domains);
>>   	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
>>   					 struct intel_context *ctx,
>> -					 u64 offset, unsigned flags);
>> +					 u64 offset, unsigned dispatch_flags);
>>   
>>   	/**
>>   	 * List of objects currently involved in rendering from the
>> -- 
>> 1.7.9.5
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

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Re: [PATCH 04/51] drm/i915: Merged the many do_execbuf() parameters into a structure

[John Harrison]

On 25/02/2015 21:52, Daniel Vetter wrote:
> On Fri, Feb 13, 2015 at 11:48:13AM +0000, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> The do_execbuf() function takes quite a few parameters. The actual set of
>> parameters is going to change with the conversion to passing requests around.
>> Further, it is due to grow massively with the arrival of the GPU scheduler.
>>
>> This patch simplies the prototype by passing a parameter structure instead.
>> Changing the parameter set in the future is then simply a matter of
>> adding/removing items to the structure.
>>
>> Note that the structure does not contain absolutely everything that is passed
>> in. This is because the intention is to use this structure more extensively
>> later in this patch series and more especially in the GPU scheduler that is
>> coming soon. The latter requires hanging on to the structure as the final
>> hardware submission can be delayed until long after the execbuf IOCTL has
>> returned to user land. Thus it is unsafe to put anything in the structure that
>> is local to the IOCTL call itself - such as the 'args' parameter. All entries
>> must be copies of data or pointers to structures that are reference counted in
>> someway and guaranteed to exist for the duration of the batch buffer's life.
>>
>> For: VIZ-5115
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.h            |   27 +++++++-------
>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   56 ++++++++++++++++++----------
>>   drivers/gpu/drm/i915/intel_lrc.c           |   26 +++++++------
>>   drivers/gpu/drm/i915/intel_lrc.h           |    9 ++---
>>   4 files changed, 67 insertions(+), 51 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index e90b786..e6d616b 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1640,6 +1640,16 @@ struct i915_workarounds {
>>   	u32 count;
>>   };
>>   
>> +struct i915_execbuffer_params {
>> +	struct drm_device               *dev;
>> +	struct drm_file                 *file;
>> +	uint32_t                        dispatch_flags;
>> +	uint32_t                        batch_obj_vm_offset;
>> +	struct intel_engine_cs          *ring;
>> +	struct drm_i915_gem_object      *batch_obj;
>> +	struct intel_context            *ctx;
>> +};
> tbh I'm not a fan of parameter objects in C. C is verbose and explicit.
>
> If we add the request then we can remove ring and ctx, which already
> improves things. We also have the eb structure we use to pass around a
> pile of things, which we could somewhat reuse here. What else do you plan
> to add? Just want to figure out whether this is really required ...
> -Daniel

The major advantage of this is when the GPU scheduler arrives. It splits 
the execbuffer code path in half - front half is all the software state 
verification and management, back half is the actual hardware writes to 
post the buffer. This structure is used to bridge the two. It contains 
all the state created by the front half that is later used by the back 
half. It is saved away with the request/scheduler node until such a time 
as the back half is called. Hence some kind of structure is required and 
it does not really make sense to add all this information to the generic 
request structure. Also, with the full pre-emptive scheduler, the 
structure grows to about twenty entries and passing that quantity of 
individual parameters to a function is just unwieldly!


>> +
>>   struct drm_i915_private {
>>   	struct drm_device *dev;
>>   	struct kmem_cache *slab;
>> @@ -1891,13 +1901,9 @@ struct drm_i915_private {
>>   
>>   	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
>>   	struct {
>> -		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
>> -				  struct intel_engine_cs *ring,
>> -				  struct intel_context *ctx,
>> +		int (*do_execbuf)(struct i915_execbuffer_params *params,
>>   				  struct drm_i915_gem_execbuffer2 *args,
>> -				  struct list_head *vmas,
>> -				  struct drm_i915_gem_object *batch_obj,
>> -				  u64 exec_start, u32 flags);
>> +				  struct list_head *vmas);
>>   		int (*init_rings)(struct drm_device *dev);
>>   		void (*cleanup_ring)(struct intel_engine_cs *ring);
>>   		void (*stop_ring)(struct intel_engine_cs *ring);
>> @@ -2622,14 +2628,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
>>   					 struct drm_file *file,
>>   					 struct intel_engine_cs *ring,
>>   					 struct drm_i915_gem_object *obj);
>> -int i915_gem_ringbuffer_submission(struct drm_device *dev,
>> -				   struct drm_file *file,
>> -				   struct intel_engine_cs *ring,
>> -				   struct intel_context *ctx,
>> +int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>>   				   struct drm_i915_gem_execbuffer2 *args,
>> -				   struct list_head *vmas,
>> -				   struct drm_i915_gem_object *batch_obj,
>> -				   u64 exec_start, u32 flags);
>> +				   struct list_head *vmas);
>>   int i915_gem_execbuffer(struct drm_device *dev, void *data,
>>   			struct drm_file *file_priv);
>>   int i915_gem_execbuffer2(struct drm_device *dev, void *data,
>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> index ec9ea45..93b0ef0 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> @@ -1132,17 +1132,15 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *ring,
>>   }
>>   
>>   int
>> -i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>> -			       struct intel_engine_cs *ring,
>> -			       struct intel_context *ctx,
>> +i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>>   			       struct drm_i915_gem_execbuffer2 *args,
>> -			       struct list_head *vmas,
>> -			       struct drm_i915_gem_object *batch_obj,
>> -			       u64 exec_start, u32 dispatch_flags)
>> +			       struct list_head *vmas)
>>   {
>>   	struct drm_clip_rect *cliprects = NULL;
>> +	struct drm_device *dev = params->dev;
>> +	struct intel_engine_cs *ring = params->ring;
>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>> -	u64 exec_len;
>> +	u64 exec_start, exec_len;
>>   	int instp_mode;
>>   	u32 instp_mask;
>>   	int i, ret = 0;
>> @@ -1194,7 +1192,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>>   	if (ret)
>>   		goto error;
>>   
>> -	ret = i915_switch_context(ring, ctx);
>> +	ret = i915_switch_context(ring, params->ctx);
>>   	if (ret)
>>   		goto error;
>>   
>> @@ -1251,12 +1249,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>>   	}
>>   
>>   	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
>> -		ret = i915_reset_gen7_sol_offsets(dev, ring);
>> +		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
>>   		if (ret)
>>   			goto error;
>>   	}
>>   
>> -	exec_len = args->batch_len;
>> +	exec_len   = args->batch_len;
>> +	exec_start = params->batch_obj_vm_offset +
>> +		     args->batch_start_offset;
>> +
>>   	if (cliprects) {
>>   		for (i = 0; i < args->num_cliprects; i++) {
>>   			ret = i915_emit_box(ring, &cliprects[i],
>> @@ -1266,22 +1267,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>>   
>>   			ret = ring->dispatch_execbuffer(ring,
>>   							exec_start, exec_len,
>> -							dispatch_flags);
>> +							params->dispatch_flags);
>>   			if (ret)
>>   				goto error;
>>   		}
>>   	} else {
>>   		ret = ring->dispatch_execbuffer(ring,
>>   						exec_start, exec_len,
>> -						dispatch_flags);
>> +						params->dispatch_flags);
>>   		if (ret)
>>   			return ret;
>>   	}
>>   
>> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
>> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>>   
>>   	i915_gem_execbuffer_move_to_active(vmas, ring);
>> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
>> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
>> +					    params->batch_obj);
>>   
>>   error:
>>   	kfree(cliprects);
>> @@ -1351,8 +1353,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   	struct intel_engine_cs *ring;
>>   	struct intel_context *ctx;
>>   	struct i915_address_space *vm;
>> +	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
>> +	struct i915_execbuffer_params *params = &params_master;
>>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>> -	u64 exec_start = args->batch_start_offset;
>>   	u32 dispatch_flags;
>>   	int ret;
>>   	bool need_relocs;
>> @@ -1445,6 +1448,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   	else
>>   		vm = &dev_priv->gtt.base;
>>   
>> +	memset(&params_master, 0x00, sizeof(params_master));
>> +
>>   	eb = eb_create(args);
>>   	if (eb == NULL) {
>>   		i915_gem_context_unreference(ctx);
>> @@ -1522,13 +1527,24 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   		if (ret)
>>   			goto err;
>>   
>> -		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
>> +		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
>>   	} else
>> -		exec_start += i915_gem_obj_offset(batch_obj, vm);
>> +		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>>   
>> -	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
>> -				      &eb->vmas, batch_obj, exec_start,
>> -				      dispatch_flags);
>> +	/*
>> +	 * Save assorted stuff away to pass through to *_submission().
>> +	 * NB: This data should be 'persistent' and not local as it will
>> +	 * kept around beyond the duration of the IOCTL once the GPU
>> +	 * scheduler arrives.
>> +	 */
>> +	params->dev                     = dev;
>> +	params->file                    = file;
>> +	params->ring                    = ring;
>> +	params->dispatch_flags          = dispatch_flags;
>> +	params->batch_obj               = batch_obj;
>> +	params->ctx                     = ctx;
>> +
>> +	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
>>   
>>   	/*
>>   	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>> index 762136b..ca29290 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> @@ -618,16 +618,15 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>>    *
>>    * Return: non-zero if the submission fails.
>>    */
>> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>> -			       struct intel_engine_cs *ring,
>> -			       struct intel_context *ctx,
>> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>>   			       struct drm_i915_gem_execbuffer2 *args,
>> -			       struct list_head *vmas,
>> -			       struct drm_i915_gem_object *batch_obj,
>> -			       u64 exec_start, u32 dispatch_flags)
>> +			       struct list_head *vmas)
>>   {
>> +	struct drm_device       *dev = params->dev;
>> +	struct intel_engine_cs  *ring = params->ring;
>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>> -	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
>> +	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
>> +	u64 exec_start;
>>   	int instp_mode;
>>   	u32 instp_mask;
>>   	int ret;
>> @@ -678,13 +677,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>>   		return -EINVAL;
>>   	}
>>   
>> -	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
>> +	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
>>   	if (ret)
>>   		return ret;
>>   
>>   	if (ring == &dev_priv->ring[RCS] &&
>>   	    instp_mode != dev_priv->relative_constants_mode) {
>> -		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
>> +		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
>>   		if (ret)
>>   			return ret;
>>   
>> @@ -697,14 +696,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>>   		dev_priv->relative_constants_mode = instp_mode;
>>   	}
>>   
>> -	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
>> +	exec_start = params->batch_obj_vm_offset +
>> +		     args->batch_start_offset;
>> +
>> +	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
>>   	if (ret)
>>   		return ret;
>>   
>> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
>> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>>   
>>   	i915_gem_execbuffer_move_to_active(vmas, ring);
>> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
>> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
>>   
>>   	return 0;
>>   }
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
>> index 3093836..ae2f3ed 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.h
>> +++ b/drivers/gpu/drm/i915/intel_lrc.h
>> @@ -80,13 +80,10 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
>>   
>>   /* Execlists */
>>   int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
>> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>> -			       struct intel_engine_cs *ring,
>> -			       struct intel_context *ctx,
>> +struct i915_execbuffer_params;
>> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>>   			       struct drm_i915_gem_execbuffer2 *args,
>> -			       struct list_head *vmas,
>> -			       struct drm_i915_gem_object *batch_obj,
>> -			       u64 exec_start, u32 dispatch_flags);
>> +			       struct list_head *vmas);
>>   u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
>>   
>>   void intel_lrc_irq_handler(struct intel_engine_cs *ring);
>> -- 
>> 1.7.9.5
>>
>> _______________________________________________
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>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

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Re: [PATCH 07/51] drm/i915: Early alloc request in execbuff

[John Harrison]

On 25/02/2015 22:22, Daniel Vetter wrote:
> On Fri, Feb 13, 2015 at 11:48:16AM +0000, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> Start of explicit request management in the execbuffer code path. This patch
>> adds a call to allocate a request structure before all the actual hardware work
>> is done. Thus guaranteeing that all that work is tagged by a known request. At
>> present, nothing further is done with the request, the rest comes later in the
>> series.
>>
>> The only noticable change is that failure to get a request (e.g. due to lack of
>> memory) will be caught earlier in the sequence. It now occurs right at the start
>> before any un-undoable work has been done.
>>
>> For: VIZ-5115
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 ++++++++++---
>>   1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> index ca85803..61471e9 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> @@ -1356,7 +1356,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>>   	u32 dispatch_flags;
>>   	int ret;
>> -	bool need_relocs;
>> +	bool need_relocs, batch_pinned = false;
>>   
>>   	if (!i915_gem_check_execbuffer(args))
>>   		return -EINVAL;
>> @@ -1525,10 +1525,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   		if (ret)
>>   			goto err;
>>   
>> +		batch_pinned = true;
>>   		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
>>   	} else
>>   		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>>   
>> +	/* Allocate a request for this batch buffer nice and early. */
>> +	ret = dev_priv->gt.alloc_request(ring, ctx);
>> +	if (ret)
>> +		goto err;
>> +
>>   	/*
>>   	 * Save assorted stuff away to pass through to *_submission().
>>   	 * NB: This data should be 'persistent' and not local as it will
>> @@ -1544,15 +1550,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   
>>   	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
>>   
>> +err:
>>   	/*
>>   	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
>>   	 * batch vma for correctness. For less ugly and less fragility this
>>   	 * needs to be adjusted to also track the ggtt batch vma properly as
>>   	 * active.
>>   	 */
>> -	if (dispatch_flags & I915_DISPATCH_SECURE)
>> +	if (batch_pinned)
>>   		i915_gem_object_ggtt_unpin(batch_obj);
>> -err:
>> +
>>   	/* the request owns the ref now */
>>   	i915_gem_context_unreference(ctx);
>>   	eb_destroy(eb);
> This hunk here looks wrong, or maybe the context changed sufficiently
> already (but I can't find that in previous patches). Why do we need to
> change the pinning for the ggtt batch pin hack when allocating the request
> earlier?
> -Daniel

It doesn't change the behaviour. It is just coping with the extra error 
path. If the alloc request call fails, we need to jump past the 
do_execbuf() call but not past the batch unpin. Hence the 'err:' tag is 
moved upwards. That means it is now possible to get to the batch unpin 
test from an error that occurred before the pin call actually happened. 
Hence it is no longer safe to just test the dispatch flag. Instead an 
explicit 'did this get pinned yet' boolean is required.

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Re: [PATCH 08/51] drm/i915: Update alloc_request to return the allocated request

[John Harrison]

On 25/02/2015 21:08, Daniel Vetter wrote:
> On Fri, Feb 13, 2015 at 12:21:29PM +0000, Chris Wilson wrote:
>> On Fri, Feb 13, 2015 at 11:48:17AM +0000, John.C.Harrison@Intel.com wrote:
>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>
>>> The alloc_request() function does not actually return the newly allocated
>>> request. Instead, it must be pulled from ring->outstanding_lazy_request. This
>>> patch fixes this so that code can create a request and start using it knowing
>>> exactly which request it actually owns.
>> Why do we have different functions in the first place?
> There seems to be a bit a layer fumble going on with the lrc alloc request
> also pinning the lrc context. We could pull that out and then share the
> function again since there's indeed no reason no to. At least afaics.
>
> Also we should probably assign the ctx (if there is any) right in the
> request alloc function so that these two bits are always tied together.
> -Daniel

See later patch 'set context in request creation...'. That moves the ctx 
assignment out of _i915_add_request() and into alloc_request() for the 
legacy code path. Thus bringing the legacy and lrc versions back into 
alignment. As for the pinning, I am leaving that exactly as is as I 
don't really know the ins and outs of it. One of the execlist experts 
might be able to comment as to whether that is the right place for it or 
not.

Also, I am currently working on the conversion to struct fence. As part 
of that, the request allocation changes quite a bit. Rather than have 
two clones of the code that have to be independently maintained, I have 
a patch to unify the common portion. We then have 
i915_gem_request_alloc() that all the driver calls instead of the 
indirected function pointer. That then does all the common work and 
chains on to the legacy/execlist specific helper at the end (which 
currently only sets the ringbuffer field for legacy mode and also does 
the LRC pinning for execlist mode).

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Re: [PATCH 24/51] drm/i915: Update deferred context creation to do explicit request management

[John Harrison]

On 25/02/2015 21:15, Daniel Vetter wrote:
> On Wed, Feb 18, 2015 at 03:27:38PM +0000, John Harrison wrote:
>> On 13/02/2015 12:15, Chris Wilson wrote:
>>> On Fri, Feb 13, 2015 at 11:48:33AM +0000, John.C.Harrison@Intel.com wrote:
>>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>>
>>>> In execlist mode, context initialisation is deferred until first use of the
>>>> given context. This is because execlist mode has many more contexts than legacy
>>>> mode and many are never actually used.
>>> That's not correct. There are no more contexts in execlists than legacy.
>>> There are more ringbuffers, or rather the contexts have an extra state
>>> object associated with them.
>> Okay, I should have said sub-contexts. Or context state objects. Or
>> something.
> per-engine ctx state? Naming stuff is hard ;-)
>
>>>>> Previously, the initialisation commands
>>>> were written to the ring and tagged with some random request structure via the
>>>> OLR. This seemed to be causing a null pointer deference bug under certain
>>>> circumstances (BZ:40112).
>>>>
>>>> This patch adds explicit request creation and submission to the deferred
>>>> initialisation code path. Thus removing any reliance on or randomness caused by
>>>> the OLR.
>>> This is upside down though. The request should be referencing the
>>> context (thus instantiating it on demand) and nothing in the context
>>> allocation requires the request. The initialisation here should be during
>>> i915_request_switch_context(), since it can be entirely shared with
>>> legacy.
>>> -Chris
>> The request does reference the context - the alloc_reques() function takes a
>> context object as a parameter. Thus it is impossible for the request to be
>> used/supplied/required during context creation. The issue here is the lazy
>> initialisation of the per ring context state which requires sending commands
>> to the ring on first usage of the given context object on the given ring.
>>
>> One problem is that the initialisation request and the batch buffer request
>> cannot be merged at the moment. They both use request->batch_obj for
>> tracking the command object. Thus this patch only works due to the deferred
>> intialisation occurring during the i915_gem_validate_context() call very
>> early on in execbuffer() rather than as part of the context switch within
>> the batch buffer execution which is much later.
> My request struct doesn't have a batch_obj pointer. Where is that from and
> why do we need it? Atm just chasing Chris' comments, haven't read the full
> series yet.
It should do! It was added way back in June 2013 by Mika in 'drm/i915: 
add batch bo to i915_add_request()'. So unless someone has removed it 
again since I last fetched a tree, you should definitely have it.

>> I'm not sure what you mean by i915_request_switch_context(). The existing
>> i915_switch_context() does now take just a request structure rather than a
>> ring/ringbuf/context mixture. However, it is not really a good idea to do
>> the context switch automatically as part of creating the request. The
>> request creation and request execution could be quite separated in time,
>> especially with a scheduler.
>>
>> It should be possible to move the deferred initialisation within the context
>> switch if the object tracking can be resolved. Thus they could share the
>> same request and there would not be effectively two separate execution calls
>> at the hardware level. Again, that's potentially work that could be done as
>> a follow up task of improving the context management independent of the
>> current task of removing the OLR.
> I think the biggest risk with adding a separate request for the lrc
> deferred init is in accidentally nesting request when someone moves around
> the lrc validation. Atm it's at the top of execbuf but we tend to shuffle
> things around a lot.
>
> Is there some simple WARN_ON we could smash into the alloc function to
> make sure this never happens? ring->olr would be it, but since we want to
> kill that that's not great. Or do I see risks which aren't really there?
> -Daniel

There is a WARN_ON that the batch object in the request structure does 
not get overwritten. Although, that could only happen if the lazy setup 
and the batch buffer execution were sharing the same request. Nesting 
multiple requests shouldn't really be a problem. Without the OLR, there 
is no globally shared state. Having multiple requests being created in 
parallel is fine. The lazy context setup must be completed before the 
execbuffer is executed otherwise Bad Things are going to happen 
irrespective of request usage. So even if the execbuffer request is 
created first, the lazy setup will still happen at the right time 
without breaking the execbuffer's request.

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Re: [PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[John Harrison]

On 25/02/2015 21:31, Daniel Vetter wrote:
> On Wed, Feb 18, 2015 at 02:28:16PM +0000, John Harrison wrote:
>> On 13/02/2015 17:03, Chris Wilson wrote:
>>> On Fri, Feb 13, 2015 at 04:58:24PM +0000, John Harrison wrote:
>>>> On 13/02/2015 12:19, Chris Wilson wrote:
>>>>> On Fri, Feb 13, 2015 at 11:48:56AM +0000, John.C.Harrison@Intel.com wrote:
>>>>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>>>>
>>>>>> Updated ironlake_enable_rc6() to do explicit request creation and submission.
>>>>> If you merged the context here with the common context switching code,
>>>>> we don't even need to touch the ring here.
>>>>> -Chris
>>>>>
>>>> It would certainly be preferable to not have any ring commands
>>>> written from deep within the power management code. However, I
>>>> didn't want to change anything I didn't really need to, especially
>>>> in code that I'm not at all sure about. Plus I don't have an
>>>> ironlake to test any significant change on.
>>> I did and tested extensively.
>>> -Chris
>> Do you have a patch that just does the move of this from PM code to context
>> switch code? Something that I can drop into this series would be great. If
>> not, exactly where about in the context switch code should it go? Should it
>> be in the start of day initialisation, in the per context intialisation,
>> every context switch, only the first switch after a resume, ...?
>>
>> Tracing back to where/when this code is currently executed seems to be quite
>> complicated. The _enable_rc6() function is called during ring reset but only
>> for Gen6+ because Ironlake is broken according to the comment. It is also
>> called by a system power management callback but it is unclear when that
>> would occur. Finally, it is also called from the display code in
>> intel_modeset_init_hw().
> ilk rc6 is disabled by default because it crashes machines hard and
> doesn't seem to be all that useful really. Compared to gen6+ rc6 which has
> a massive impact on idle power consumption, more with each generation.
>
> I've also never heard of anyone managing to make this work reliably. We
> could also just rip the entire code out I think, at least I wouldn't be
> surprised if it has bitrot completely by now.
> -Daniel

So just remove the ironlake_enable_rc6() function completely? Or keep it 
as a stub that just says '/* this has never worked so has been removed */'.
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Re: [PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[Ville Syrjälä]

On Wed, Feb 25, 2015 at 10:31:13PM +0100, Daniel Vetter wrote:
> On Wed, Feb 18, 2015 at 02:28:16PM +0000, John Harrison wrote:
> > On 13/02/2015 17:03, Chris Wilson wrote:
> > >On Fri, Feb 13, 2015 at 04:58:24PM +0000, John Harrison wrote:
> > >>On 13/02/2015 12:19, Chris Wilson wrote:
> > >>>On Fri, Feb 13, 2015 at 11:48:56AM +0000, John.C.Harrison@Intel.com wrote:
> > >>>>From: John Harrison <John.C.Harrison@Intel.com>
> > >>>>
> > >>>>Updated ironlake_enable_rc6() to do explicit request creation and submission.
> > >>>If you merged the context here with the common context switching code,
> > >>>we don't even need to touch the ring here.
> > >>>-Chris
> > >>>
> > >>It would certainly be preferable to not have any ring commands
> > >>written from deep within the power management code. However, I
> > >>didn't want to change anything I didn't really need to, especially
> > >>in code that I'm not at all sure about. Plus I don't have an
> > >>ironlake to test any significant change on.
> > >I did and tested extensively.
> > >-Chris
> > 
> > Do you have a patch that just does the move of this from PM code to context
> > switch code? Something that I can drop into this series would be great. If
> > not, exactly where about in the context switch code should it go? Should it
> > be in the start of day initialisation, in the per context intialisation,
> > every context switch, only the first switch after a resume, ...?
> > 
> > Tracing back to where/when this code is currently executed seems to be quite
> > complicated. The _enable_rc6() function is called during ring reset but only
> > for Gen6+ because Ironlake is broken according to the comment. It is also
> > called by a system power management callback but it is unclear when that
> > would occur. Finally, it is also called from the display code in
> > intel_modeset_init_hw().
> 
> ilk rc6 is disabled by default because it crashes machines hard and
> doesn't seem to be all that useful really. Compared to gen6+ rc6 which has
> a massive impact on idle power consumption, more with each generation.
> 
> I've also never heard of anyone managing to make this work reliably. We
> could also just rip the entire code out I think, at least I wouldn't be
> surprised if it has bitrot completely by now.

I was running with it when Ben had those ILK context+rc6 patches flying
around. But I admit that was some time ago.

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH 01/51] drm/i915: Rename 'flags' to 'dispatch_flags' for better code reading

[Daniel Vetter]

On Fri, Feb 27, 2015 at 12:14:06PM +0000, John Harrison wrote:
> On 25/02/2015 21:34, Daniel Vetter wrote:
> >On Fri, Feb 13, 2015 at 11:48:10AM +0000, John.C.Harrison@Intel.com wrote:
> >>From: John Harrison <John.C.Harrison@Intel.com>
> >>
> >>There is a flags word that is passed through the execbuffer code path all the
> >>way from initial decoding of the user parameters down to the very final dispatch
> >>buffer call. It is simply called 'flags'. Unfortuantely, there are many other
> >>flags words floating around in the same blocks of code. Even more once the GPU
> >>scheduler arrives.
> >>
> >>This patch makes it more obvious exactly which flags word is which by renaming
> >>'flags' to 'dispatch_flags'. Note that the bit definitions for this flags word
> >>already have an 'I915_DISPATCH_' prefix on them and so are not quite so
> >>ambiguous.
> >>
> >>For: VIZ-1587
> >I've thought we've decided that the tag is OTC-Jira or similar. For:
> >certainly looks a bit too generic, and a prefix helps in namespacing if
> >you want to scan with automated tools for this.
> 
> The wiki page about GMIN tagging (which comes from the OTC) very clearly
> says to use 'For:' in the case of multi-patch series or 'Issue:' for single
> patches and talks about automated tools using these tags to update and/or
> close bugs. It also says the tags should be used for linux kernel
> upstreaming as well.

Well I guess that wasn't a very nice decision to make without the
namespacing ... Whom do I need to send a mail to to make a fuzz about
this? I really don't think For: and Issue: are really great ideas for tags
to internal tracking when we're supposed to add them to the public git
repo.

Maybe just add them all to cc on this thread.
-Daniel

> 
> 
> >
> >>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >Anyway looks like a good idea, queued for -next, thanks for the patch.
> >-Daniel
> >>---
> >>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   25 ++++++++++----------
> >>  drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++----
> >>  drivers/gpu/drm/i915/intel_lrc.h           |    2 +-
> >>  drivers/gpu/drm/i915/intel_ringbuffer.c    |   35 ++++++++++++++++------------
> >>  drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ++--
> >>  5 files changed, 41 insertions(+), 35 deletions(-)
> >>
> >>diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>index b773368..ec9ea45 100644
> >>--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>@@ -1138,7 +1138,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
> >>  			       struct drm_i915_gem_execbuffer2 *args,
> >>  			       struct list_head *vmas,
> >>  			       struct drm_i915_gem_object *batch_obj,
> >>-			       u64 exec_start, u32 flags)
> >>+			       u64 exec_start, u32 dispatch_flags)
> >>  {
> >>  	struct drm_clip_rect *cliprects = NULL;
> >>  	struct drm_i915_private *dev_priv = dev->dev_private;
> >>@@ -1266,19 +1266,19 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
> >>  			ret = ring->dispatch_execbuffer(ring,
> >>  							exec_start, exec_len,
> >>-							flags);
> >>+							dispatch_flags);
> >>  			if (ret)
> >>  				goto error;
> >>  		}
> >>  	} else {
> >>  		ret = ring->dispatch_execbuffer(ring,
> >>  						exec_start, exec_len,
> >>-						flags);
> >>+						dispatch_flags);
> >>  		if (ret)
> >>  			return ret;
> >>  	}
> >>-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), flags);
> >>+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> >>  	i915_gem_execbuffer_move_to_active(vmas, ring);
> >>  	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> >>@@ -1353,7 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  	struct i915_address_space *vm;
> >>  	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
> >>  	u64 exec_start = args->batch_start_offset;
> >>-	u32 flags;
> >>+	u32 dispatch_flags;
> >>  	int ret;
> >>  	bool need_relocs;
> >>@@ -1364,15 +1364,15 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  	if (ret)
> >>  		return ret;
> >>-	flags = 0;
> >>+	dispatch_flags = 0;
> >>  	if (args->flags & I915_EXEC_SECURE) {
> >>  		if (!file->is_master || !capable(CAP_SYS_ADMIN))
> >>  		    return -EPERM;
> >>-		flags |= I915_DISPATCH_SECURE;
> >>+		dispatch_flags |= I915_DISPATCH_SECURE;
> >>  	}
> >>  	if (args->flags & I915_EXEC_IS_PINNED)
> >>-		flags |= I915_DISPATCH_PINNED;
> >>+		dispatch_flags |= I915_DISPATCH_PINNED;
> >>  	if ((args->flags & I915_EXEC_RING_MASK) > LAST_USER_RING) {
> >>  		DRM_DEBUG("execbuf with unknown ring: %d\n",
> >>@@ -1495,7 +1495,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  						      args->batch_start_offset,
> >>  						      args->batch_len,
> >>  						      file->is_master,
> >>-						      &flags);
> >>+						      &dispatch_flags);
> >>  		if (IS_ERR(batch_obj)) {
> >>  			ret = PTR_ERR(batch_obj);
> >>  			goto err;
> >>@@ -1507,7 +1507,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
> >>  	 * batch" bit. Hence we need to pin secure batches into the global gtt.
> >>  	 * hsw should have this fixed, but bdw mucks it up again. */
> >>-	if (flags & I915_DISPATCH_SECURE) {
> >>+	if (dispatch_flags & I915_DISPATCH_SECURE) {
> >>  		/*
> >>  		 * So on first glance it looks freaky that we pin the batch here
> >>  		 * outside of the reservation loop. But:
> >>@@ -1527,7 +1527,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  		exec_start += i915_gem_obj_offset(batch_obj, vm);
> >>  	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
> >>-				      &eb->vmas, batch_obj, exec_start, flags);
> >>+				      &eb->vmas, batch_obj, exec_start,
> >>+				      dispatch_flags);
> >>  	/*
> >>  	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
> >>@@ -1535,7 +1536,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  	 * needs to be adjusted to also track the ggtt batch vma properly as
> >>  	 * active.
> >>  	 */
> >>-	if (flags & I915_DISPATCH_SECURE)
> >>+	if (dispatch_flags & I915_DISPATCH_SECURE)
> >>  		i915_gem_object_ggtt_unpin(batch_obj);
> >>  err:
> >>  	/* the request owns the ref now */
> >>diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> >>index a94346f..0376285 100644
> >>--- a/drivers/gpu/drm/i915/intel_lrc.c
> >>+++ b/drivers/gpu/drm/i915/intel_lrc.c
> >>@@ -611,7 +611,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
> >>   * @vmas: list of vmas.
> >>   * @batch_obj: the batchbuffer to submit.
> >>   * @exec_start: batchbuffer start virtual address pointer.
> >>- * @flags: translated execbuffer call flags.
> >>+ * @dispatch_flags: translated execbuffer call flags.
> >>   *
> >>   * This is the evil twin version of i915_gem_ringbuffer_submission. It abstracts
> >>   * away the submission details of the execbuffer ioctl call.
> >>@@ -624,7 +624,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> >>  			       struct drm_i915_gem_execbuffer2 *args,
> >>  			       struct list_head *vmas,
> >>  			       struct drm_i915_gem_object *batch_obj,
> >>-			       u64 exec_start, u32 flags)
> >>+			       u64 exec_start, u32 dispatch_flags)
> >>  {
> >>  	struct drm_i915_private *dev_priv = dev->dev_private;
> >>  	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
> >>@@ -697,7 +697,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> >>  		dev_priv->relative_constants_mode = instp_mode;
> >>  	}
> >>-	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags);
> >>+	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
> >>  	if (ret)
> >>  		return ret;
> >>@@ -1142,9 +1142,9 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring)
> >>  static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
> >>  			      struct intel_context *ctx,
> >>-			      u64 offset, unsigned flags)
> >>+			      u64 offset, unsigned dispatch_flags)
> >>  {
> >>-	bool ppgtt = !(flags & I915_DISPATCH_SECURE);
> >>+	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
> >>  	int ret;
> >>  	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
> >>diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> >>index 6f2d7da..3093836 100644
> >>--- a/drivers/gpu/drm/i915/intel_lrc.h
> >>+++ b/drivers/gpu/drm/i915/intel_lrc.h
> >>@@ -86,7 +86,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> >>  			       struct drm_i915_gem_execbuffer2 *args,
> >>  			       struct list_head *vmas,
> >>  			       struct drm_i915_gem_object *batch_obj,
> >>-			       u64 exec_start, u32 flags);
> >>+			       u64 exec_start, u32 dispatch_flags);
> >>  u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
> >>  void intel_lrc_irq_handler(struct intel_engine_cs *ring);
> >>diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >>index 0bd3976..d611608 100644
> >>--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> >>+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >>@@ -1611,7 +1611,7 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
> >>  static int
> >>  i965_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  			 u64 offset, u32 length,
> >>-			 unsigned flags)
> >>+			 unsigned dispatch_flags)
> >>  {
> >>  	int ret;
> >>@@ -1622,7 +1622,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  	intel_ring_emit(ring,
> >>  			MI_BATCH_BUFFER_START |
> >>  			MI_BATCH_GTT |
> >>-			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
> >>+			(dispatch_flags & I915_DISPATCH_SECURE ?
> >>+			 0 : MI_BATCH_NON_SECURE_I965));
> >>  	intel_ring_emit(ring, offset);
> >>  	intel_ring_advance(ring);
> >>@@ -1635,8 +1636,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
> >>  static int
> >>  i830_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>-				u64 offset, u32 len,
> >>-				unsigned flags)
> >>+			 u64 offset, u32 len,
> >>+			 unsigned dispatch_flags)
> >>  {
> >>  	u32 cs_offset = ring->scratch.gtt_offset;
> >>  	int ret;
> >>@@ -1654,7 +1655,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  	intel_ring_emit(ring, MI_NOOP);
> >>  	intel_ring_advance(ring);
> >>-	if ((flags & I915_DISPATCH_PINNED) == 0) {
> >>+	if ((dispatch_flags & I915_DISPATCH_PINNED) == 0) {
> >>  		if (len > I830_BATCH_LIMIT)
> >>  			return -ENOSPC;
> >>@@ -1686,7 +1687,8 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  		return ret;
> >>  	intel_ring_emit(ring, MI_BATCH_BUFFER);
> >>-	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
> >>+	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
> >>+					0 : MI_BATCH_NON_SECURE));
> >>  	intel_ring_emit(ring, offset + len - 8);
> >>  	intel_ring_emit(ring, MI_NOOP);
> >>  	intel_ring_advance(ring);
> >>@@ -1697,7 +1699,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  static int
> >>  i915_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  			 u64 offset, u32 len,
> >>-			 unsigned flags)
> >>+			 unsigned dispatch_flags)
> >>  {
> >>  	int ret;
> >>@@ -1706,7 +1708,8 @@ i915_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  		return ret;
> >>  	intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT);
> >>-	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
> >>+	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
> >>+					0 : MI_BATCH_NON_SECURE));
> >>  	intel_ring_advance(ring);
> >>  	return 0;
> >>@@ -2265,9 +2268,10 @@ static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
> >>  static int
> >>  gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  			      u64 offset, u32 len,
> >>-			      unsigned flags)
> >>+			      unsigned dispatch_flags)
> >>  {
> >>-	bool ppgtt = USES_PPGTT(ring->dev) && !(flags & I915_DISPATCH_SECURE);
> >>+	bool ppgtt = USES_PPGTT(ring->dev) &&
> >>+			!(dispatch_flags & I915_DISPATCH_SECURE);
> >>  	int ret;
> >>  	ret = intel_ring_begin(ring, 4);
> >>@@ -2286,8 +2290,8 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  static int
> >>  hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>-			      u64 offset, u32 len,
> >>-			      unsigned flags)
> >>+			     u64 offset, u32 len,
> >>+			     unsigned dispatch_flags)
> >>  {
> >>  	int ret;
> >>@@ -2297,7 +2301,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  	intel_ring_emit(ring,
> >>  			MI_BATCH_BUFFER_START |
> >>-			(flags & I915_DISPATCH_SECURE ?
> >>+			(dispatch_flags & I915_DISPATCH_SECURE ?
> >>  			 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW));
> >>  	/* bit0-7 is the length on GEN6+ */
> >>  	intel_ring_emit(ring, offset);
> >>@@ -2309,7 +2313,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  static int
> >>  gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  			      u64 offset, u32 len,
> >>-			      unsigned flags)
> >>+			      unsigned dispatch_flags)
> >>  {
> >>  	int ret;
> >>@@ -2319,7 +2323,8 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> >>  	intel_ring_emit(ring,
> >>  			MI_BATCH_BUFFER_START |
> >>-			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
> >>+			(dispatch_flags & I915_DISPATCH_SECURE ?
> >>+			 0 : MI_BATCH_NON_SECURE_I965));
> >>  	/* bit0-7 is the length on GEN6+ */
> >>  	intel_ring_emit(ring, offset);
> >>  	intel_ring_advance(ring);
> >>diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >>index 714f3fd..26e5774 100644
> >>--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> >>+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >>@@ -164,7 +164,7 @@ struct  intel_engine_cs {
> >>  				     u32 seqno);
> >>  	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
> >>  					       u64 offset, u32 length,
> >>-					       unsigned flags);
> >>+					       unsigned dispatch_flags);
> >>  #define I915_DISPATCH_SECURE 0x1
> >>  #define I915_DISPATCH_PINNED 0x2
> >>  	void		(*cleanup)(struct intel_engine_cs *ring);
> >>@@ -242,7 +242,7 @@ struct  intel_engine_cs {
> >>  				      u32 flush_domains);
> >>  	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
> >>  					 struct intel_context *ctx,
> >>-					 u64 offset, unsigned flags);
> >>+					 u64 offset, unsigned dispatch_flags);
> >>  	/**
> >>  	 * List of objects currently involved in rendering from the
> >>-- 
> >>1.7.9.5
> >>
> >>_______________________________________________
> >>Intel-gfx mailing list
> >>Intel-gfx@lists.freedesktop.org
> >>http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 04/51] drm/i915: Merged the many do_execbuf() parameters into a structure

[Daniel Vetter]

On Fri, Feb 27, 2015 at 12:22:42PM +0000, John Harrison wrote:
> On 25/02/2015 21:52, Daniel Vetter wrote:
> >On Fri, Feb 13, 2015 at 11:48:13AM +0000, John.C.Harrison@Intel.com wrote:
> >>From: John Harrison <John.C.Harrison@Intel.com>
> >>
> >>The do_execbuf() function takes quite a few parameters. The actual set of
> >>parameters is going to change with the conversion to passing requests around.
> >>Further, it is due to grow massively with the arrival of the GPU scheduler.
> >>
> >>This patch simplies the prototype by passing a parameter structure instead.
> >>Changing the parameter set in the future is then simply a matter of
> >>adding/removing items to the structure.
> >>
> >>Note that the structure does not contain absolutely everything that is passed
> >>in. This is because the intention is to use this structure more extensively
> >>later in this patch series and more especially in the GPU scheduler that is
> >>coming soon. The latter requires hanging on to the structure as the final
> >>hardware submission can be delayed until long after the execbuf IOCTL has
> >>returned to user land. Thus it is unsafe to put anything in the structure that
> >>is local to the IOCTL call itself - such as the 'args' parameter. All entries
> >>must be copies of data or pointers to structures that are reference counted in
> >>someway and guaranteed to exist for the duration of the batch buffer's life.
> >>
> >>For: VIZ-5115
> >>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >>---
> >>  drivers/gpu/drm/i915/i915_drv.h            |   27 +++++++-------
> >>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   56 ++++++++++++++++++----------
> >>  drivers/gpu/drm/i915/intel_lrc.c           |   26 +++++++------
> >>  drivers/gpu/drm/i915/intel_lrc.h           |    9 ++---
> >>  4 files changed, 67 insertions(+), 51 deletions(-)
> >>
> >>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >>index e90b786..e6d616b 100644
> >>--- a/drivers/gpu/drm/i915/i915_drv.h
> >>+++ b/drivers/gpu/drm/i915/i915_drv.h
> >>@@ -1640,6 +1640,16 @@ struct i915_workarounds {
> >>  	u32 count;
> >>  };
> >>+struct i915_execbuffer_params {
> >>+	struct drm_device               *dev;
> >>+	struct drm_file                 *file;
> >>+	uint32_t                        dispatch_flags;
> >>+	uint32_t                        batch_obj_vm_offset;
> >>+	struct intel_engine_cs          *ring;
> >>+	struct drm_i915_gem_object      *batch_obj;
> >>+	struct intel_context            *ctx;
> >>+};
> >tbh I'm not a fan of parameter objects in C. C is verbose and explicit.
> >
> >If we add the request then we can remove ring and ctx, which already
> >improves things. We also have the eb structure we use to pass around a
> >pile of things, which we could somewhat reuse here. What else do you plan
> >to add? Just want to figure out whether this is really required ...
> >-Daniel
> 
> The major advantage of this is when the GPU scheduler arrives. It splits the
> execbuffer code path in half - front half is all the software state
> verification and management, back half is the actual hardware writes to post
> the buffer. This structure is used to bridge the two. It contains all the
> state created by the front half that is later used by the back half. It is
> saved away with the request/scheduler node until such a time as the back
> half is called. Hence some kind of structure is required and it does not
> really make sense to add all this information to the generic request
> structure. Also, with the full pre-emptive scheduler, the structure grows to
> about twenty entries and passing that quantity of individual parameters to a
> function is just unwieldly!

Well we already have an execbuf tracking structure with eb_vmas. And then
there's requests. So if this is more than just a parameter object I wonder
whether we shouldn't reuse either of these. Adding them all to requests is
imo totally ok.

Oh and a bikeshed aside: imo the ->do_exebuf name is really confusing,
since it clashes with the the various do_execbuf functions we have which
are at a higher level. Also the implementations all have a _submission
postfix. Imo better names would be do_submission or engine_submit or
something simlar. The only caveat is that we need to make sure the
lifetime rules for any pointers are ok. E.g. before we return from the
ioctl we need to clear out drm_i915_gem_execbuffer2 *args pointers if we
store them in the request structure.

Can you please pick a name and insert that rename patch somewhere
convenient (for you) in your series?

Thanks, Daniel
> 
> 
> >>+
> >>  struct drm_i915_private {
> >>  	struct drm_device *dev;
> >>  	struct kmem_cache *slab;
> >>@@ -1891,13 +1901,9 @@ struct drm_i915_private {
> >>  	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
> >>  	struct {
> >>-		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
> >>-				  struct intel_engine_cs *ring,
> >>-				  struct intel_context *ctx,
> >>+		int (*do_execbuf)(struct i915_execbuffer_params *params,
> >>  				  struct drm_i915_gem_execbuffer2 *args,
> >>-				  struct list_head *vmas,
> >>-				  struct drm_i915_gem_object *batch_obj,
> >>-				  u64 exec_start, u32 flags);
> >>+				  struct list_head *vmas);
> >>  		int (*init_rings)(struct drm_device *dev);
> >>  		void (*cleanup_ring)(struct intel_engine_cs *ring);
> >>  		void (*stop_ring)(struct intel_engine_cs *ring);
> >>@@ -2622,14 +2628,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
> >>  					 struct drm_file *file,
> >>  					 struct intel_engine_cs *ring,
> >>  					 struct drm_i915_gem_object *obj);
> >>-int i915_gem_ringbuffer_submission(struct drm_device *dev,
> >>-				   struct drm_file *file,
> >>-				   struct intel_engine_cs *ring,
> >>-				   struct intel_context *ctx,
> >>+int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
> >>  				   struct drm_i915_gem_execbuffer2 *args,
> >>-				   struct list_head *vmas,
> >>-				   struct drm_i915_gem_object *batch_obj,
> >>-				   u64 exec_start, u32 flags);
> >>+				   struct list_head *vmas);
> >>  int i915_gem_execbuffer(struct drm_device *dev, void *data,
> >>  			struct drm_file *file_priv);
> >>  int i915_gem_execbuffer2(struct drm_device *dev, void *data,
> >>diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>index ec9ea45..93b0ef0 100644
> >>--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>@@ -1132,17 +1132,15 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *ring,
> >>  }
> >>  int
> >>-i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
> >>-			       struct intel_engine_cs *ring,
> >>-			       struct intel_context *ctx,
> >>+i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
> >>  			       struct drm_i915_gem_execbuffer2 *args,
> >>-			       struct list_head *vmas,
> >>-			       struct drm_i915_gem_object *batch_obj,
> >>-			       u64 exec_start, u32 dispatch_flags)
> >>+			       struct list_head *vmas)
> >>  {
> >>  	struct drm_clip_rect *cliprects = NULL;
> >>+	struct drm_device *dev = params->dev;
> >>+	struct intel_engine_cs *ring = params->ring;
> >>  	struct drm_i915_private *dev_priv = dev->dev_private;
> >>-	u64 exec_len;
> >>+	u64 exec_start, exec_len;
> >>  	int instp_mode;
> >>  	u32 instp_mask;
> >>  	int i, ret = 0;
> >>@@ -1194,7 +1192,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
> >>  	if (ret)
> >>  		goto error;
> >>-	ret = i915_switch_context(ring, ctx);
> >>+	ret = i915_switch_context(ring, params->ctx);
> >>  	if (ret)
> >>  		goto error;
> >>@@ -1251,12 +1249,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
> >>  	}
> >>  	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
> >>-		ret = i915_reset_gen7_sol_offsets(dev, ring);
> >>+		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
> >>  		if (ret)
> >>  			goto error;
> >>  	}
> >>-	exec_len = args->batch_len;
> >>+	exec_len   = args->batch_len;
> >>+	exec_start = params->batch_obj_vm_offset +
> >>+		     args->batch_start_offset;
> >>+
> >>  	if (cliprects) {
> >>  		for (i = 0; i < args->num_cliprects; i++) {
> >>  			ret = i915_emit_box(ring, &cliprects[i],
> >>@@ -1266,22 +1267,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
> >>  			ret = ring->dispatch_execbuffer(ring,
> >>  							exec_start, exec_len,
> >>-							dispatch_flags);
> >>+							params->dispatch_flags);
> >>  			if (ret)
> >>  				goto error;
> >>  		}
> >>  	} else {
> >>  		ret = ring->dispatch_execbuffer(ring,
> >>  						exec_start, exec_len,
> >>-						dispatch_flags);
> >>+						params->dispatch_flags);
> >>  		if (ret)
> >>  			return ret;
> >>  	}
> >>-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> >>+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
> >>  	i915_gem_execbuffer_move_to_active(vmas, ring);
> >>-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> >>+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
> >>+					    params->batch_obj);
> >>  error:
> >>  	kfree(cliprects);
> >>@@ -1351,8 +1353,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  	struct intel_engine_cs *ring;
> >>  	struct intel_context *ctx;
> >>  	struct i915_address_space *vm;
> >>+	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
> >>+	struct i915_execbuffer_params *params = &params_master;
> >>  	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
> >>-	u64 exec_start = args->batch_start_offset;
> >>  	u32 dispatch_flags;
> >>  	int ret;
> >>  	bool need_relocs;
> >>@@ -1445,6 +1448,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  	else
> >>  		vm = &dev_priv->gtt.base;
> >>+	memset(&params_master, 0x00, sizeof(params_master));
> >>+
> >>  	eb = eb_create(args);
> >>  	if (eb == NULL) {
> >>  		i915_gem_context_unreference(ctx);
> >>@@ -1522,13 +1527,24 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  		if (ret)
> >>  			goto err;
> >>-		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
> >>+		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
> >>  	} else
> >>-		exec_start += i915_gem_obj_offset(batch_obj, vm);
> >>+		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
> >>-	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
> >>-				      &eb->vmas, batch_obj, exec_start,
> >>-				      dispatch_flags);
> >>+	/*
> >>+	 * Save assorted stuff away to pass through to *_submission().
> >>+	 * NB: This data should be 'persistent' and not local as it will
> >>+	 * kept around beyond the duration of the IOCTL once the GPU
> >>+	 * scheduler arrives.
> >>+	 */
> >>+	params->dev                     = dev;
> >>+	params->file                    = file;
> >>+	params->ring                    = ring;
> >>+	params->dispatch_flags          = dispatch_flags;
> >>+	params->batch_obj               = batch_obj;
> >>+	params->ctx                     = ctx;
> >>+
> >>+	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
> >>  	/*
> >>  	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
> >>diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> >>index 762136b..ca29290 100644
> >>--- a/drivers/gpu/drm/i915/intel_lrc.c
> >>+++ b/drivers/gpu/drm/i915/intel_lrc.c
> >>@@ -618,16 +618,15 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
> >>   *
> >>   * Return: non-zero if the submission fails.
> >>   */
> >>-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> >>-			       struct intel_engine_cs *ring,
> >>-			       struct intel_context *ctx,
> >>+int intel_execlists_submission(struct i915_execbuffer_params *params,
> >>  			       struct drm_i915_gem_execbuffer2 *args,
> >>-			       struct list_head *vmas,
> >>-			       struct drm_i915_gem_object *batch_obj,
> >>-			       u64 exec_start, u32 dispatch_flags)
> >>+			       struct list_head *vmas)
> >>  {
> >>+	struct drm_device       *dev = params->dev;
> >>+	struct intel_engine_cs  *ring = params->ring;
> >>  	struct drm_i915_private *dev_priv = dev->dev_private;
> >>-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
> >>+	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
> >>+	u64 exec_start;
> >>  	int instp_mode;
> >>  	u32 instp_mask;
> >>  	int ret;
> >>@@ -678,13 +677,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> >>  		return -EINVAL;
> >>  	}
> >>-	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
> >>+	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
> >>  	if (ret)
> >>  		return ret;
> >>  	if (ring == &dev_priv->ring[RCS] &&
> >>  	    instp_mode != dev_priv->relative_constants_mode) {
> >>-		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
> >>+		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
> >>  		if (ret)
> >>  			return ret;
> >>@@ -697,14 +696,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> >>  		dev_priv->relative_constants_mode = instp_mode;
> >>  	}
> >>-	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
> >>+	exec_start = params->batch_obj_vm_offset +
> >>+		     args->batch_start_offset;
> >>+
> >>+	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
> >>  	if (ret)
> >>  		return ret;
> >>-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> >>+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
> >>  	i915_gem_execbuffer_move_to_active(vmas, ring);
> >>-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> >>+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
> >>  	return 0;
> >>  }
> >>diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> >>index 3093836..ae2f3ed 100644
> >>--- a/drivers/gpu/drm/i915/intel_lrc.h
> >>+++ b/drivers/gpu/drm/i915/intel_lrc.h
> >>@@ -80,13 +80,10 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
> >>  /* Execlists */
> >>  int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
> >>-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> >>-			       struct intel_engine_cs *ring,
> >>-			       struct intel_context *ctx,
> >>+struct i915_execbuffer_params;
> >>+int intel_execlists_submission(struct i915_execbuffer_params *params,
> >>  			       struct drm_i915_gem_execbuffer2 *args,
> >>-			       struct list_head *vmas,
> >>-			       struct drm_i915_gem_object *batch_obj,
> >>-			       u64 exec_start, u32 dispatch_flags);
> >>+			       struct list_head *vmas);
> >>  u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
> >>  void intel_lrc_irq_handler(struct intel_engine_cs *ring);
> >>-- 
> >>1.7.9.5
> >>
> >>_______________________________________________
> >>Intel-gfx mailing list
> >>Intel-gfx@lists.freedesktop.org
> >>http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 07/51] drm/i915: Early alloc request in execbuff

[Daniel Vetter]

On Fri, Feb 27, 2015 at 12:27:15PM +0000, John Harrison wrote:
> On 25/02/2015 22:22, Daniel Vetter wrote:
> >On Fri, Feb 13, 2015 at 11:48:16AM +0000, John.C.Harrison@Intel.com wrote:
> >>From: John Harrison <John.C.Harrison@Intel.com>
> >>
> >>Start of explicit request management in the execbuffer code path. This patch
> >>adds a call to allocate a request structure before all the actual hardware work
> >>is done. Thus guaranteeing that all that work is tagged by a known request. At
> >>present, nothing further is done with the request, the rest comes later in the
> >>series.
> >>
> >>The only noticable change is that failure to get a request (e.g. due to lack of
> >>memory) will be caught earlier in the sequence. It now occurs right at the start
> >>before any un-undoable work has been done.
> >>
> >>For: VIZ-5115
> >>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >>---
> >>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 ++++++++++---
> >>  1 file changed, 10 insertions(+), 3 deletions(-)
> >>
> >>diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>index ca85803..61471e9 100644
> >>--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>@@ -1356,7 +1356,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
> >>  	u32 dispatch_flags;
> >>  	int ret;
> >>-	bool need_relocs;
> >>+	bool need_relocs, batch_pinned = false;
> >>  	if (!i915_gem_check_execbuffer(args))
> >>  		return -EINVAL;
> >>@@ -1525,10 +1525,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  		if (ret)
> >>  			goto err;
> >>+		batch_pinned = true;
> >>  		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
> >>  	} else
> >>  		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
> >>+	/* Allocate a request for this batch buffer nice and early. */
> >>+	ret = dev_priv->gt.alloc_request(ring, ctx);
> >>+	if (ret)
> >>+		goto err;
> >>+
> >>  	/*
> >>  	 * Save assorted stuff away to pass through to *_submission().
> >>  	 * NB: This data should be 'persistent' and not local as it will
> >>@@ -1544,15 +1550,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> >>  	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
> >>+err:
> >>  	/*
> >>  	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
> >>  	 * batch vma for correctness. For less ugly and less fragility this
> >>  	 * needs to be adjusted to also track the ggtt batch vma properly as
> >>  	 * active.
> >>  	 */
> >>-	if (dispatch_flags & I915_DISPATCH_SECURE)
> >>+	if (batch_pinned)
> >>  		i915_gem_object_ggtt_unpin(batch_obj);
> >>-err:
> >>+
> >>  	/* the request owns the ref now */
> >>  	i915_gem_context_unreference(ctx);
> >>  	eb_destroy(eb);
> >This hunk here looks wrong, or maybe the context changed sufficiently
> >already (but I can't find that in previous patches). Why do we need to
> >change the pinning for the ggtt batch pin hack when allocating the request
> >earlier?
> >-Daniel
> 
> It doesn't change the behaviour. It is just coping with the extra error
> path. If the alloc request call fails, we need to jump past the do_execbuf()
> call but not past the batch unpin. Hence the 'err:' tag is moved upwards.
> That means it is now possible to get to the batch unpin test from an error
> that occurred before the pin call actually happened. Hence it is no longer
> safe to just test the dispatch flag. Instead an explicit 'did this get
> pinned yet' boolean is required.

Ah I see what's going on. The usual pattern is to just duplicate goto
targets, i.e. here:

err_batch_unpin:
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
 	 * batch vma for correctness. For less ugly and less fragility this
 	 * needs to be adjusted to also track the ggtt batch vma properly as
 	 * active.
 	 */
	if (dispatch_flags & I915_DISPATCH_SECURE)
 		i915_gem_object_ggtt_unpin(batch_obj);
err:

 	/* the request owns the ref now */
 	i915_gem_context_unreference(ctx);
 	eb_destroy(eb);

Then you can let gcc deal with how to best structure the control flow for
you. It means a bit larger diff since you need to change a pile of goto
err; to goto err_batch_unpin, but imo that also makes it easier for
reviewers to double-check there's no error case with funky requirements
now broken.

Cheers, Daniel
-- 
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Re: [PATCH 08/51] drm/i915: Update alloc_request to return the allocated request

[Daniel Vetter]

On Fri, Feb 27, 2015 at 12:34:29PM +0000, John Harrison wrote:
> On 25/02/2015 21:08, Daniel Vetter wrote:
> >On Fri, Feb 13, 2015 at 12:21:29PM +0000, Chris Wilson wrote:
> >>On Fri, Feb 13, 2015 at 11:48:17AM +0000, John.C.Harrison@Intel.com wrote:
> >>>From: John Harrison <John.C.Harrison@Intel.com>
> >>>
> >>>The alloc_request() function does not actually return the newly allocated
> >>>request. Instead, it must be pulled from ring->outstanding_lazy_request. This
> >>>patch fixes this so that code can create a request and start using it knowing
> >>>exactly which request it actually owns.
> >>Why do we have different functions in the first place?
> >There seems to be a bit a layer fumble going on with the lrc alloc request
> >also pinning the lrc context. We could pull that out and then share the
> >function again since there's indeed no reason no to. At least afaics.
> >
> >Also we should probably assign the ctx (if there is any) right in the
> >request alloc function so that these two bits are always tied together.
> >-Daniel
> 
> See later patch 'set context in request creation...'. That moves the ctx
> assignment out of _i915_add_request() and into alloc_request() for the
> legacy code path. Thus bringing the legacy and lrc versions back into
> alignment. As for the pinning, I am leaving that exactly as is as I don't
> really know the ins and outs of it. One of the execlist experts might be
> able to comment as to whether that is the right place for it or not.
> 
> Also, I am currently working on the conversion to struct fence. As part of
> that, the request allocation changes quite a bit. Rather than have two
> clones of the code that have to be independently maintained, I have a patch
> to unify the common portion. We then have i915_gem_request_alloc() that all
> the driver calls instead of the indirected function pointer. That then does
> all the common work and chains on to the legacy/execlist specific helper at
> the end (which currently only sets the ringbuffer field for legacy mode and
> also does the LRC pinning for execlist mode).

That sounds exactly like what I'd want to see here. So no need for
additional frobbing in the mean time imo.
-Daniel
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Re: [PATCH 24/51] drm/i915: Update deferred context creation to do explicit request management

[Daniel Vetter]

On Fri, Feb 27, 2015 at 12:45:19PM +0000, John Harrison wrote:
> On 25/02/2015 21:15, Daniel Vetter wrote:
> >On Wed, Feb 18, 2015 at 03:27:38PM +0000, John Harrison wrote:
> >>On 13/02/2015 12:15, Chris Wilson wrote:
> >>>On Fri, Feb 13, 2015 at 11:48:33AM +0000, John.C.Harrison@Intel.com wrote:
> >>>>From: John Harrison <John.C.Harrison@Intel.com>
> >>>>
> >>>>In execlist mode, context initialisation is deferred until first use of the
> >>>>given context. This is because execlist mode has many more contexts than legacy
> >>>>mode and many are never actually used.
> >>>That's not correct. There are no more contexts in execlists than legacy.
> >>>There are more ringbuffers, or rather the contexts have an extra state
> >>>object associated with them.
> >>Okay, I should have said sub-contexts. Or context state objects. Or
> >>something.
> >per-engine ctx state? Naming stuff is hard ;-)
> >
> >>>>>Previously, the initialisation commands
> >>>>were written to the ring and tagged with some random request structure via the
> >>>>OLR. This seemed to be causing a null pointer deference bug under certain
> >>>>circumstances (BZ:40112).
> >>>>
> >>>>This patch adds explicit request creation and submission to the deferred
> >>>>initialisation code path. Thus removing any reliance on or randomness caused by
> >>>>the OLR.
> >>>This is upside down though. The request should be referencing the
> >>>context (thus instantiating it on demand) and nothing in the context
> >>>allocation requires the request. The initialisation here should be during
> >>>i915_request_switch_context(), since it can be entirely shared with
> >>>legacy.
> >>>-Chris
> >>The request does reference the context - the alloc_reques() function takes a
> >>context object as a parameter. Thus it is impossible for the request to be
> >>used/supplied/required during context creation. The issue here is the lazy
> >>initialisation of the per ring context state which requires sending commands
> >>to the ring on first usage of the given context object on the given ring.
> >>
> >>One problem is that the initialisation request and the batch buffer request
> >>cannot be merged at the moment. They both use request->batch_obj for
> >>tracking the command object. Thus this patch only works due to the deferred
> >>intialisation occurring during the i915_gem_validate_context() call very
> >>early on in execbuffer() rather than as part of the context switch within
> >>the batch buffer execution which is much later.
> >My request struct doesn't have a batch_obj pointer. Where is that from and
> >why do we need it? Atm just chasing Chris' comments, haven't read the full
> >series yet.
> It should do! It was added way back in June 2013 by Mika in 'drm/i915: add
> batch bo to i915_add_request()'. So unless someone has removed it again
> since I last fetched a tree, you should definitely have it.

I must have been blind. Now I've found both the batch_obj and how it's
used in the renderstate. And that usage looks wrong since
request->batch_obj is used to assign blame to userspace batches for
arb_robustness gpu hang stats. The render state init batch is created by
the kernel, per definition userspace can't be responsible for hangs in
there.

Imo we should replace the batch obj argument in i915_gem_render_state_init
with NULL.

Would this allow you to resolve the inversion Chris brought up? Or is
there something else which would prevent us from putting the deferred
render ring init into the same request as the first execbuf?

> >>I'm not sure what you mean by i915_request_switch_context(). The existing
> >>i915_switch_context() does now take just a request structure rather than a
> >>ring/ringbuf/context mixture. However, it is not really a good idea to do
> >>the context switch automatically as part of creating the request. The
> >>request creation and request execution could be quite separated in time,
> >>especially with a scheduler.
> >>
> >>It should be possible to move the deferred initialisation within the context
> >>switch if the object tracking can be resolved. Thus they could share the
> >>same request and there would not be effectively two separate execution calls
> >>at the hardware level. Again, that's potentially work that could be done as
> >>a follow up task of improving the context management independent of the
> >>current task of removing the OLR.
> >I think the biggest risk with adding a separate request for the lrc
> >deferred init is in accidentally nesting request when someone moves around
> >the lrc validation. Atm it's at the top of execbuf but we tend to shuffle
> >things around a lot.
> >
> >Is there some simple WARN_ON we could smash into the alloc function to
> >make sure this never happens? ring->olr would be it, but since we want to
> >kill that that's not great. Or do I see risks which aren't really there?
> >-Daniel
> 
> There is a WARN_ON that the batch object in the request structure does not
> get overwritten. Although, that could only happen if the lazy setup and the
> batch buffer execution were sharing the same request. Nesting multiple
> requests shouldn't really be a problem. Without the OLR, there is no
> globally shared state. Having multiple requests being created in parallel is
> fine. The lazy context setup must be completed before the execbuffer is
> executed otherwise Bad Things are going to happen irrespective of request
> usage. So even if the execbuffer request is created first, the lazy setup
> will still happen at the right time without breaking the execbuffer's
> request.

Ok, sounds like we'd be covered. I just wanted to make sure we're not
ignoring potential issues here, but if requests are free-standing already
as-is (well after this series) we're hopefully fine.
-Daniel
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Re: [PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[Daniel Vetter]

On Fri, Feb 27, 2015 at 03:03:22PM +0200, Ville Syrjälä wrote:
> On Wed, Feb 25, 2015 at 10:31:13PM +0100, Daniel Vetter wrote:
> > On Wed, Feb 18, 2015 at 02:28:16PM +0000, John Harrison wrote:
> > > On 13/02/2015 17:03, Chris Wilson wrote:
> > > >On Fri, Feb 13, 2015 at 04:58:24PM +0000, John Harrison wrote:
> > > >>On 13/02/2015 12:19, Chris Wilson wrote:
> > > >>>On Fri, Feb 13, 2015 at 11:48:56AM +0000, John.C.Harrison@Intel.com wrote:
> > > >>>>From: John Harrison <John.C.Harrison@Intel.com>
> > > >>>>
> > > >>>>Updated ironlake_enable_rc6() to do explicit request creation and submission.
> > > >>>If you merged the context here with the common context switching code,
> > > >>>we don't even need to touch the ring here.
> > > >>>-Chris
> > > >>>
> > > >>It would certainly be preferable to not have any ring commands
> > > >>written from deep within the power management code. However, I
> > > >>didn't want to change anything I didn't really need to, especially
> > > >>in code that I'm not at all sure about. Plus I don't have an
> > > >>ironlake to test any significant change on.
> > > >I did and tested extensively.
> > > >-Chris
> > > 
> > > Do you have a patch that just does the move of this from PM code to context
> > > switch code? Something that I can drop into this series would be great. If
> > > not, exactly where about in the context switch code should it go? Should it
> > > be in the start of day initialisation, in the per context intialisation,
> > > every context switch, only the first switch after a resume, ...?
> > > 
> > > Tracing back to where/when this code is currently executed seems to be quite
> > > complicated. The _enable_rc6() function is called during ring reset but only
> > > for Gen6+ because Ironlake is broken according to the comment. It is also
> > > called by a system power management callback but it is unclear when that
> > > would occur. Finally, it is also called from the display code in
> > > intel_modeset_init_hw().
> > 
> > ilk rc6 is disabled by default because it crashes machines hard and
> > doesn't seem to be all that useful really. Compared to gen6+ rc6 which has
> > a massive impact on idle power consumption, more with each generation.
> > 
> > I've also never heard of anyone managing to make this work reliably. We
> > could also just rip the entire code out I think, at least I wouldn't be
> > surprised if it has bitrot completely by now.
> 
> I was running with it when Ben had those ILK context+rc6 patches flying
> around. But I admit that was some time ago.

Iirc we've enabled it for a bit with those, it fell to pieces too. And it
seems to be rare enough that testing on a developers machine doesn't cut
it (tried myself to enable it a few times and had to revert again).
-Daniel
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Re: [PATCH 47/51] drm/i915: Update ironlake_enable_rc6() to do explicit request management

[Daniel Vetter]

On Fri, Feb 27, 2015 at 12:49:11PM +0000, John Harrison wrote:
> On 25/02/2015 21:31, Daniel Vetter wrote:
> >On Wed, Feb 18, 2015 at 02:28:16PM +0000, John Harrison wrote:
> >>On 13/02/2015 17:03, Chris Wilson wrote:
> >>>On Fri, Feb 13, 2015 at 04:58:24PM +0000, John Harrison wrote:
> >>>>On 13/02/2015 12:19, Chris Wilson wrote:
> >>>>>On Fri, Feb 13, 2015 at 11:48:56AM +0000, John.C.Harrison@Intel.com wrote:
> >>>>>>From: John Harrison <John.C.Harrison@Intel.com>
> >>>>>>
> >>>>>>Updated ironlake_enable_rc6() to do explicit request creation and submission.
> >>>>>If you merged the context here with the common context switching code,
> >>>>>we don't even need to touch the ring here.
> >>>>>-Chris
> >>>>>
> >>>>It would certainly be preferable to not have any ring commands
> >>>>written from deep within the power management code. However, I
> >>>>didn't want to change anything I didn't really need to, especially
> >>>>in code that I'm not at all sure about. Plus I don't have an
> >>>>ironlake to test any significant change on.
> >>>I did and tested extensively.
> >>>-Chris
> >>Do you have a patch that just does the move of this from PM code to context
> >>switch code? Something that I can drop into this series would be great. If
> >>not, exactly where about in the context switch code should it go? Should it
> >>be in the start of day initialisation, in the per context intialisation,
> >>every context switch, only the first switch after a resume, ...?
> >>
> >>Tracing back to where/when this code is currently executed seems to be quite
> >>complicated. The _enable_rc6() function is called during ring reset but only
> >>for Gen6+ because Ironlake is broken according to the comment. It is also
> >>called by a system power management callback but it is unclear when that
> >>would occur. Finally, it is also called from the display code in
> >>intel_modeset_init_hw().
> >ilk rc6 is disabled by default because it crashes machines hard and
> >doesn't seem to be all that useful really. Compared to gen6+ rc6 which has
> >a massive impact on idle power consumption, more with each generation.
> >
> >I've also never heard of anyone managing to make this work reliably. We
> >could also just rip the entire code out I think, at least I wouldn't be
> >surprised if it has bitrot completely by now.
> >-Daniel
> 
> So just remove the ironlake_enable_rc6() function completely? Or keep it as
> a stub that just says '/* this has never worked so has been removed */'.

Just remove it entirely, together with all the other ironlake rc6 stuff
plus functions only called by it. All the ironlake_*_rc6 stuff
essentially. ironlake_*_drps is the turbo support, that part needs to
stay.
-Daniel
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Re: [PATCH 04/51] drm/i915: Merged the many do_execbuf() parameters into a structure

[John Harrison]

On 27/02/2015 13:35, Daniel Vetter wrote:
> On Fri, Feb 27, 2015 at 12:22:42PM +0000, John Harrison wrote:
>> On 25/02/2015 21:52, Daniel Vetter wrote:
>>> On Fri, Feb 13, 2015 at 11:48:13AM +0000, John.C.Harrison@Intel.com wrote:
>>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>>
>>>> The do_execbuf() function takes quite a few parameters. The actual set of
>>>> parameters is going to change with the conversion to passing requests around.
>>>> Further, it is due to grow massively with the arrival of the GPU scheduler.
>>>>
>>>> This patch simplies the prototype by passing a parameter structure instead.
>>>> Changing the parameter set in the future is then simply a matter of
>>>> adding/removing items to the structure.
>>>>
>>>> Note that the structure does not contain absolutely everything that is passed
>>>> in. This is because the intention is to use this structure more extensively
>>>> later in this patch series and more especially in the GPU scheduler that is
>>>> coming soon. The latter requires hanging on to the structure as the final
>>>> hardware submission can be delayed until long after the execbuf IOCTL has
>>>> returned to user land. Thus it is unsafe to put anything in the structure that
>>>> is local to the IOCTL call itself - such as the 'args' parameter. All entries
>>>> must be copies of data or pointers to structures that are reference counted in
>>>> someway and guaranteed to exist for the duration of the batch buffer's life.
>>>>
>>>> For: VIZ-5115
>>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>>> ---
>>>>   drivers/gpu/drm/i915/i915_drv.h            |   27 +++++++-------
>>>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   56 ++++++++++++++++++----------
>>>>   drivers/gpu/drm/i915/intel_lrc.c           |   26 +++++++------
>>>>   drivers/gpu/drm/i915/intel_lrc.h           |    9 ++---
>>>>   4 files changed, 67 insertions(+), 51 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>>> index e90b786..e6d616b 100644
>>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>>> @@ -1640,6 +1640,16 @@ struct i915_workarounds {
>>>>   	u32 count;
>>>>   };
>>>> +struct i915_execbuffer_params {
>>>> +	struct drm_device               *dev;
>>>> +	struct drm_file                 *file;
>>>> +	uint32_t                        dispatch_flags;
>>>> +	uint32_t                        batch_obj_vm_offset;
>>>> +	struct intel_engine_cs          *ring;
>>>> +	struct drm_i915_gem_object      *batch_obj;
>>>> +	struct intel_context            *ctx;
>>>> +};
>>> tbh I'm not a fan of parameter objects in C. C is verbose and explicit.
>>>
>>> If we add the request then we can remove ring and ctx, which already
>>> improves things. We also have the eb structure we use to pass around a
>>> pile of things, which we could somewhat reuse here. What else do you plan
>>> to add? Just want to figure out whether this is really required ...
>>> -Daniel
>> The major advantage of this is when the GPU scheduler arrives. It splits the
>> execbuffer code path in half - front half is all the software state
>> verification and management, back half is the actual hardware writes to post
>> the buffer. This structure is used to bridge the two. It contains all the
>> state created by the front half that is later used by the back half. It is
>> saved away with the request/scheduler node until such a time as the back
>> half is called. Hence some kind of structure is required and it does not
>> really make sense to add all this information to the generic request
>> structure. Also, with the full pre-emptive scheduler, the structure grows to
>> about twenty entries and passing that quantity of individual parameters to a
>> function is just unwieldly!
> Well we already have an execbuf tracking structure with eb_vmas. And then
> there's requests. So if this is more than just a parameter object I wonder
> whether we shouldn't reuse either of these. Adding them all to requests is
> imo totally ok.
>
> Oh and a bikeshed aside: imo the ->do_exebuf name is really confusing,
> since it clashes with the the various do_execbuf functions we have which
> are at a higher level. Also the implementations all have a _submission
> postfix. Imo better names would be do_submission or engine_submit or
> something simlar. The only caveat is that we need to make sure the
> lifetime rules for any pointers are ok. E.g. before we return from the
> ioctl we need to clear out drm_i915_gem_execbuffer2 *args pointers if we
> store them in the request structure.

The lifetime issues is part of the reason for having a dedicated execbuf 
params structure. Some of the contents of the args block are copied out 
and saved away for future reference and they are only relevant to the 
execbuf code. IMHO, keeping all of these things in one place is much 
more neat and tidy (and thus easier to read and easier to maintain) than 
overloading other structures with large amounts of stuff that isn't 
relevant. The eb_vma structure is freed at the end of the front half and 
not kept around for that back half. Requests are used for stuff that 
isn't an execbuffer call.


> Can you please pick a name and insert that rename patch somewhere
> convenient (for you) in your series?
Can do.

> Thanks, Daniel
>>
>>>> +
>>>>   struct drm_i915_private {
>>>>   	struct drm_device *dev;
>>>>   	struct kmem_cache *slab;
>>>> @@ -1891,13 +1901,9 @@ struct drm_i915_private {
>>>>   	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
>>>>   	struct {
>>>> -		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
>>>> -				  struct intel_engine_cs *ring,
>>>> -				  struct intel_context *ctx,
>>>> +		int (*do_execbuf)(struct i915_execbuffer_params *params,
>>>>   				  struct drm_i915_gem_execbuffer2 *args,
>>>> -				  struct list_head *vmas,
>>>> -				  struct drm_i915_gem_object *batch_obj,
>>>> -				  u64 exec_start, u32 flags);
>>>> +				  struct list_head *vmas);
>>>>   		int (*init_rings)(struct drm_device *dev);
>>>>   		void (*cleanup_ring)(struct intel_engine_cs *ring);
>>>>   		void (*stop_ring)(struct intel_engine_cs *ring);
>>>> @@ -2622,14 +2628,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
>>>>   					 struct drm_file *file,
>>>>   					 struct intel_engine_cs *ring,
>>>>   					 struct drm_i915_gem_object *obj);
>>>> -int i915_gem_ringbuffer_submission(struct drm_device *dev,
>>>> -				   struct drm_file *file,
>>>> -				   struct intel_engine_cs *ring,
>>>> -				   struct intel_context *ctx,
>>>> +int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>>>>   				   struct drm_i915_gem_execbuffer2 *args,
>>>> -				   struct list_head *vmas,
>>>> -				   struct drm_i915_gem_object *batch_obj,
>>>> -				   u64 exec_start, u32 flags);
>>>> +				   struct list_head *vmas);
>>>>   int i915_gem_execbuffer(struct drm_device *dev, void *data,
>>>>   			struct drm_file *file_priv);
>>>>   int i915_gem_execbuffer2(struct drm_device *dev, void *data,
>>>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>> index ec9ea45..93b0ef0 100644
>>>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>> @@ -1132,17 +1132,15 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *ring,
>>>>   }
>>>>   int
>>>> -i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>>>> -			       struct intel_engine_cs *ring,
>>>> -			       struct intel_context *ctx,
>>>> +i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>>>>   			       struct drm_i915_gem_execbuffer2 *args,
>>>> -			       struct list_head *vmas,
>>>> -			       struct drm_i915_gem_object *batch_obj,
>>>> -			       u64 exec_start, u32 dispatch_flags)
>>>> +			       struct list_head *vmas)
>>>>   {
>>>>   	struct drm_clip_rect *cliprects = NULL;
>>>> +	struct drm_device *dev = params->dev;
>>>> +	struct intel_engine_cs *ring = params->ring;
>>>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>>>> -	u64 exec_len;
>>>> +	u64 exec_start, exec_len;
>>>>   	int instp_mode;
>>>>   	u32 instp_mask;
>>>>   	int i, ret = 0;
>>>> @@ -1194,7 +1192,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>>>>   	if (ret)
>>>>   		goto error;
>>>> -	ret = i915_switch_context(ring, ctx);
>>>> +	ret = i915_switch_context(ring, params->ctx);
>>>>   	if (ret)
>>>>   		goto error;
>>>> @@ -1251,12 +1249,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>>>>   	}
>>>>   	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
>>>> -		ret = i915_reset_gen7_sol_offsets(dev, ring);
>>>> +		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
>>>>   		if (ret)
>>>>   			goto error;
>>>>   	}
>>>> -	exec_len = args->batch_len;
>>>> +	exec_len   = args->batch_len;
>>>> +	exec_start = params->batch_obj_vm_offset +
>>>> +		     args->batch_start_offset;
>>>> +
>>>>   	if (cliprects) {
>>>>   		for (i = 0; i < args->num_cliprects; i++) {
>>>>   			ret = i915_emit_box(ring, &cliprects[i],
>>>> @@ -1266,22 +1267,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>>>>   			ret = ring->dispatch_execbuffer(ring,
>>>>   							exec_start, exec_len,
>>>> -							dispatch_flags);
>>>> +							params->dispatch_flags);
>>>>   			if (ret)
>>>>   				goto error;
>>>>   		}
>>>>   	} else {
>>>>   		ret = ring->dispatch_execbuffer(ring,
>>>>   						exec_start, exec_len,
>>>> -						dispatch_flags);
>>>> +						params->dispatch_flags);
>>>>   		if (ret)
>>>>   			return ret;
>>>>   	}
>>>> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
>>>> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>>>>   	i915_gem_execbuffer_move_to_active(vmas, ring);
>>>> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
>>>> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
>>>> +					    params->batch_obj);
>>>>   error:
>>>>   	kfree(cliprects);
>>>> @@ -1351,8 +1353,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>>>   	struct intel_engine_cs *ring;
>>>>   	struct intel_context *ctx;
>>>>   	struct i915_address_space *vm;
>>>> +	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
>>>> +	struct i915_execbuffer_params *params = &params_master;
>>>>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>>>> -	u64 exec_start = args->batch_start_offset;
>>>>   	u32 dispatch_flags;
>>>>   	int ret;
>>>>   	bool need_relocs;
>>>> @@ -1445,6 +1448,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>>>   	else
>>>>   		vm = &dev_priv->gtt.base;
>>>> +	memset(&params_master, 0x00, sizeof(params_master));
>>>> +
>>>>   	eb = eb_create(args);
>>>>   	if (eb == NULL) {
>>>>   		i915_gem_context_unreference(ctx);
>>>> @@ -1522,13 +1527,24 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>>>   		if (ret)
>>>>   			goto err;
>>>> -		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
>>>> +		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
>>>>   	} else
>>>> -		exec_start += i915_gem_obj_offset(batch_obj, vm);
>>>> +		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>>>> -	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
>>>> -				      &eb->vmas, batch_obj, exec_start,
>>>> -				      dispatch_flags);
>>>> +	/*
>>>> +	 * Save assorted stuff away to pass through to *_submission().
>>>> +	 * NB: This data should be 'persistent' and not local as it will
>>>> +	 * kept around beyond the duration of the IOCTL once the GPU
>>>> +	 * scheduler arrives.
>>>> +	 */
>>>> +	params->dev                     = dev;
>>>> +	params->file                    = file;
>>>> +	params->ring                    = ring;
>>>> +	params->dispatch_flags          = dispatch_flags;
>>>> +	params->batch_obj               = batch_obj;
>>>> +	params->ctx                     = ctx;
>>>> +
>>>> +	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
>>>>   	/*
>>>>   	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
>>>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>>>> index 762136b..ca29290 100644
>>>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>>>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>>>> @@ -618,16 +618,15 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>>>>    *
>>>>    * Return: non-zero if the submission fails.
>>>>    */
>>>> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>>>> -			       struct intel_engine_cs *ring,
>>>> -			       struct intel_context *ctx,
>>>> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>>>>   			       struct drm_i915_gem_execbuffer2 *args,
>>>> -			       struct list_head *vmas,
>>>> -			       struct drm_i915_gem_object *batch_obj,
>>>> -			       u64 exec_start, u32 dispatch_flags)
>>>> +			       struct list_head *vmas)
>>>>   {
>>>> +	struct drm_device       *dev = params->dev;
>>>> +	struct intel_engine_cs  *ring = params->ring;
>>>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>>>> -	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
>>>> +	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
>>>> +	u64 exec_start;
>>>>   	int instp_mode;
>>>>   	u32 instp_mask;
>>>>   	int ret;
>>>> @@ -678,13 +677,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>>>>   		return -EINVAL;
>>>>   	}
>>>> -	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
>>>> +	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
>>>>   	if (ret)
>>>>   		return ret;
>>>>   	if (ring == &dev_priv->ring[RCS] &&
>>>>   	    instp_mode != dev_priv->relative_constants_mode) {
>>>> -		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
>>>> +		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
>>>>   		if (ret)
>>>>   			return ret;
>>>> @@ -697,14 +696,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>>>>   		dev_priv->relative_constants_mode = instp_mode;
>>>>   	}
>>>> -	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
>>>> +	exec_start = params->batch_obj_vm_offset +
>>>> +		     args->batch_start_offset;
>>>> +
>>>> +	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
>>>>   	if (ret)
>>>>   		return ret;
>>>> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
>>>> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>>>>   	i915_gem_execbuffer_move_to_active(vmas, ring);
>>>> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
>>>> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
>>>>   	return 0;
>>>>   }
>>>> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
>>>> index 3093836..ae2f3ed 100644
>>>> --- a/drivers/gpu/drm/i915/intel_lrc.h
>>>> +++ b/drivers/gpu/drm/i915/intel_lrc.h
>>>> @@ -80,13 +80,10 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
>>>>   /* Execlists */
>>>>   int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
>>>> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>>>> -			       struct intel_engine_cs *ring,
>>>> -			       struct intel_context *ctx,
>>>> +struct i915_execbuffer_params;
>>>> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>>>>   			       struct drm_i915_gem_execbuffer2 *args,
>>>> -			       struct list_head *vmas,
>>>> -			       struct drm_i915_gem_object *batch_obj,
>>>> -			       u64 exec_start, u32 dispatch_flags);
>>>> +			       struct list_head *vmas);
>>>>   u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
>>>>   void intel_lrc_irq_handler(struct intel_engine_cs *ring);
>>>> -- 
>>>> 1.7.9.5
>>>>
>>>> _______________________________________________
>>>> Intel-gfx mailing list
>>>> Intel-gfx@lists.freedesktop.org
>>>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

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Re: [PATCH 04/51] drm/i915: Merged the many do_execbuf() parameters into a structure

[Daniel Vetter]

On Fri, Feb 27, 2015 at 06:22:43PM +0000, John Harrison wrote:
> On 27/02/2015 13:35, Daniel Vetter wrote:
> >On Fri, Feb 27, 2015 at 12:22:42PM +0000, John Harrison wrote:
> >>On 25/02/2015 21:52, Daniel Vetter wrote:
> >>>On Fri, Feb 13, 2015 at 11:48:13AM +0000, John.C.Harrison@Intel.com wrote:
> >>>>From: John Harrison <John.C.Harrison@Intel.com>
> >>>>
> >>>>The do_execbuf() function takes quite a few parameters. The actual set of
> >>>>parameters is going to change with the conversion to passing requests around.
> >>>>Further, it is due to grow massively with the arrival of the GPU scheduler.
> >>>>
> >>>>This patch simplies the prototype by passing a parameter structure instead.
> >>>>Changing the parameter set in the future is then simply a matter of
> >>>>adding/removing items to the structure.
> >>>>
> >>>>Note that the structure does not contain absolutely everything that is passed
> >>>>in. This is because the intention is to use this structure more extensively
> >>>>later in this patch series and more especially in the GPU scheduler that is
> >>>>coming soon. The latter requires hanging on to the structure as the final
> >>>>hardware submission can be delayed until long after the execbuf IOCTL has
> >>>>returned to user land. Thus it is unsafe to put anything in the structure that
> >>>>is local to the IOCTL call itself - such as the 'args' parameter. All entries
> >>>>must be copies of data or pointers to structures that are reference counted in
> >>>>someway and guaranteed to exist for the duration of the batch buffer's life.
> >>>>
> >>>>For: VIZ-5115
> >>>>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >>>>---
> >>>>  drivers/gpu/drm/i915/i915_drv.h            |   27 +++++++-------
> >>>>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   56 ++++++++++++++++++----------
> >>>>  drivers/gpu/drm/i915/intel_lrc.c           |   26 +++++++------
> >>>>  drivers/gpu/drm/i915/intel_lrc.h           |    9 ++---
> >>>>  4 files changed, 67 insertions(+), 51 deletions(-)
> >>>>
> >>>>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >>>>index e90b786..e6d616b 100644
> >>>>--- a/drivers/gpu/drm/i915/i915_drv.h
> >>>>+++ b/drivers/gpu/drm/i915/i915_drv.h
> >>>>@@ -1640,6 +1640,16 @@ struct i915_workarounds {
> >>>>  	u32 count;
> >>>>  };
> >>>>+struct i915_execbuffer_params {
> >>>>+	struct drm_device               *dev;
> >>>>+	struct drm_file                 *file;
> >>>>+	uint32_t                        dispatch_flags;
> >>>>+	uint32_t                        batch_obj_vm_offset;
> >>>>+	struct intel_engine_cs          *ring;
> >>>>+	struct drm_i915_gem_object      *batch_obj;
> >>>>+	struct intel_context            *ctx;
> >>>>+};
> >>>tbh I'm not a fan of parameter objects in C. C is verbose and explicit.
> >>>
> >>>If we add the request then we can remove ring and ctx, which already
> >>>improves things. We also have the eb structure we use to pass around a
> >>>pile of things, which we could somewhat reuse here. What else do you plan
> >>>to add? Just want to figure out whether this is really required ...
> >>>-Daniel
> >>The major advantage of this is when the GPU scheduler arrives. It splits the
> >>execbuffer code path in half - front half is all the software state
> >>verification and management, back half is the actual hardware writes to post
> >>the buffer. This structure is used to bridge the two. It contains all the
> >>state created by the front half that is later used by the back half. It is
> >>saved away with the request/scheduler node until such a time as the back
> >>half is called. Hence some kind of structure is required and it does not
> >>really make sense to add all this information to the generic request
> >>structure. Also, with the full pre-emptive scheduler, the structure grows to
> >>about twenty entries and passing that quantity of individual parameters to a
> >>function is just unwieldly!
> >Well we already have an execbuf tracking structure with eb_vmas. And then
> >there's requests. So if this is more than just a parameter object I wonder
> >whether we shouldn't reuse either of these. Adding them all to requests is
> >imo totally ok.
> >
> >Oh and a bikeshed aside: imo the ->do_exebuf name is really confusing,
> >since it clashes with the the various do_execbuf functions we have which
> >are at a higher level. Also the implementations all have a _submission
> >postfix. Imo better names would be do_submission or engine_submit or
> >something simlar. The only caveat is that we need to make sure the
> >lifetime rules for any pointers are ok. E.g. before we return from the
> >ioctl we need to clear out drm_i915_gem_execbuffer2 *args pointers if we
> >store them in the request structure.
> 
> The lifetime issues is part of the reason for having a dedicated execbuf
> params structure. Some of the contents of the args block are copied out and
> saved away for future reference and they are only relevant to the execbuf
> code. IMHO, keeping all of these things in one place is much more neat and
> tidy (and thus easier to read and easier to maintain) than overloading other
> structures with large amounts of stuff that isn't relevant. The eb_vma
> structure is freed at the end of the front half and not kept around for that
> back half. Requests are used for stuff that isn't an execbuffer call.

Hm I still think just putting all that stuff into requests makes more
sense. Requests' primary reason for existence is to track execbufs after
all.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[John Harrison]

On 26/02/2015 02:26, Daniel Vetter wrote:
> On Wed, Feb 25, 2015 at 11:17:00PM +0100, Daniel Vetter wrote:
>> On Fri, Feb 13, 2015 at 11:48:14AM +0000, John.C.Harrison@Intel.com wrote:
>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>
>>> For some reason, the i915_add_request() call in
>>> i915_gem_execbuffer_retire_commands() was explicitly having its return code
>>> ignored. The _retire_commands() function itself was 'void'. Given that
>>> _add_request() can fail without dispatching the batch buffer, this seems odd.
>> I was so convinced we've had a commit somewhere explaining this, but
>> apparently not.
>>
>> The deal is that after the dispatch call we have the batch commit and
>> there's no going back any more, which also means we can't return an error
>> code from the ioctl. So if you return -EIO or -ENOMEM that's a pretty bad
>> lie and you really have to ignore that error code.
>>
>> Again I've tried to dig up the commit for that but that was lost in the
>> maze of the past 5 years of changes. We've had piles of older approaches
>> to deal with this issue:
>> - Don't even emit a request, just mark objects as gpu dirty. Only when
>>    waiting did we emit flushes and requests, which again again gave us a
>>    context to return the error. This resulted in horrible latency since
>>    flushes where wait too late and also all that book-keeping was not worth
>>    it at all. Don't ask ;-)
>> - Emit flushes right away, but if we fail to alloc the request set the
>>    outstanding lazy request bit. The job of the check_olr function used in
>>    waits was to notice that and retry the allocation.
>> - Preallocate the request, but that still leaves the possibility that the
>>    gpu dies. But since we've committed hangcheck will clean this up and we
>>    can just ignore the -EIO.
>>
>> Given all that backstory: Why does add_request/retire_commands suddenly
>> need to fail?
The problem is that if add_request() fails and the request is not added 
to ring->request_list then it will be lost. As soon as the execbuff code 
returns, there is no longer a request pointer floating around so it can 
can't have add_request() called on it later. Thus the request will never 
be retired, the objects, context, etc never dereferenced, and basically 
lots of stuff will be leaked. Without the OLR to hoover up the failures, 
the add_request() call really must not be allowed to give up.

> It's actually worse since it's not just -EIO but also -EINTR, returned by
> intel_ring_begin when we're thrashing the gpu a bit too badly with
> requests. Which means we really need to guarantee that the request is
> completed properly, eventually since it's not just for fatal gpu hangs.
>
> Atm that's done by only clearing outstanding_lazy_request after we've
> really emitted the request fully. That guarantees that even when parts of
> the request emission to the ringbuf fails we'll retry on the next wait if
> needed.
>
> A possible fix to make this infallible would be to reserve some fixed
> amount of ringbuf credit at request creation time and then consume it
> here. Of course we'd need checks to make sure we never use more ringspace
> than what we reserve. To avoid massive churn we could convert
> I915_RING_FREE_SPACE into a variable and increase it enough when
> allocating the request. And then reduce it again at the start of
> add_request.
> -Daniel

I don't think you can guarantee to reserve enough space at request 
creation time. You have no idea how much space will be required by what 
ever piece of code is wanting the request. It could be a few words or it 
might be reams and reams of workaround goo. One of the scheduler patches 
does improve this and do a 'large enough' ring_begin() at the start of 
the execbuffer submission path in order to prevent out of space issues 
and other such problems half way through that could lead to a partial 
submission. However, even that is not absoluetely guaranteed 100% 
failure proof.

How about changing add_request() so that it can't fail. As in, the cache 
flush call and the emit request call can still failure due to running 
out of ring space, but add_request() just ignores that and keeps going 
anyway. That way the request is still correctly tracked and will be 
retired eventually. The only issues are unflushed caches and no seqno 
interrupt being generated. However, if the assumption is that another 
request will be submitted shortly (which is extremely likely if the 
system is busy enough to cause a failure during add_request!) then this 
will be fine. The following request will flush the caches and write the 
next seqno along to the ringbuffer. When that pops out, both the broken 
request and the new one will be considered complete and can be retired. 
The only issue is if the broken request is that last one to be submitted 
and is then waited on. In that case, you will get a timeout/hang as the 
request will never complete. Although that could be worked around by 
setting a 'failed request' flag in the ring and having the wait code (or 
even the currently redundant check_olr function) look at that and 
attempt a brand new (but empty) request submission.

Or maybe a simpler solution is to just keep a 'last failed request' 
pointer in the ring. Sort of a not-quite-OLR. If add_request() fails, it 
saves the request pointer here instead of adding it to the request list. 
A subsequent request allocation call starts by checking the 'last 
failed' value and retries the add_request() call if present. At that 
point it is allowed to fail. I guess it still needs to be done by 
check_olr as well to prevent a wait from stalling if no other requests 
are submitted.

John.

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Re: [PATCH 01/53] drm/i915: Rename 'flags' to 'dispatch_flags' for better code reading

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> There is a flags word that is passed through the execbuffer code path all the
> way from initial decoding of the user parameters down to the very final dispatch
> buffer call. It is simply called 'flags'. Unfortuantely, there are many other
> flags words floating around in the same blocks of code. Even more once the GPU
> scheduler arrives.
>
> This patch makes it more obvious exactly which flags word is which by renaming
> 'flags' to 'dispatch_flags'. Note that the bit definitions for this flags word
> already have an 'I915_DISPATCH_' prefix on them and so are not quite so
> ambiguous.
>
> For: VIZ-1587
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   25 ++++++++++----------
>   drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++----
>   drivers/gpu/drm/i915/intel_lrc.h           |    2 +-
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   35 ++++++++++++++++------------
>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ++--
>   5 files changed, 41 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index b773368..ec9ea45 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1138,7 +1138,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>   			       struct drm_i915_gem_execbuffer2 *args,
>   			       struct list_head *vmas,
>   			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 flags)
> +			       u64 exec_start, u32 dispatch_flags)

You didn't change the parameter name in the prototype declaration in 
i915_drv.h .

Thanks,
Tomas

>   {
>   	struct drm_clip_rect *cliprects = NULL;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -1266,19 +1266,19 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>
>   			ret = ring->dispatch_execbuffer(ring,
>   							exec_start, exec_len,
> -							flags);
> +							dispatch_flags);
>   			if (ret)
>   				goto error;
>   		}
>   	} else {
>   		ret = ring->dispatch_execbuffer(ring,
>   						exec_start, exec_len,
> -						flags);
> +						dispatch_flags);
>   		if (ret)
>   			return ret;
>   	}
>
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), flags);
> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
>
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
>   	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> @@ -1353,7 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	struct i915_address_space *vm;
>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>   	u64 exec_start = args->batch_start_offset;
> -	u32 flags;
> +	u32 dispatch_flags;
>   	int ret;
>   	bool need_relocs;
>
> @@ -1364,15 +1364,15 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	if (ret)
>   		return ret;
>
> -	flags = 0;
> +	dispatch_flags = 0;
>   	if (args->flags & I915_EXEC_SECURE) {
>   		if (!file->is_master || !capable(CAP_SYS_ADMIN))
>   		    return -EPERM;
>
> -		flags |= I915_DISPATCH_SECURE;
> +		dispatch_flags |= I915_DISPATCH_SECURE;
>   	}
>   	if (args->flags & I915_EXEC_IS_PINNED)
> -		flags |= I915_DISPATCH_PINNED;
> +		dispatch_flags |= I915_DISPATCH_PINNED;
>
>   	if ((args->flags & I915_EXEC_RING_MASK) > LAST_USER_RING) {
>   		DRM_DEBUG("execbuf with unknown ring: %d\n",
> @@ -1495,7 +1495,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   						      args->batch_start_offset,
>   						      args->batch_len,
>   						      file->is_master,
> -						      &flags);
> +						      &dispatch_flags);
>   		if (IS_ERR(batch_obj)) {
>   			ret = PTR_ERR(batch_obj);
>   			goto err;
> @@ -1507,7 +1507,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
>   	 * batch" bit. Hence we need to pin secure batches into the global gtt.
>   	 * hsw should have this fixed, but bdw mucks it up again. */
> -	if (flags & I915_DISPATCH_SECURE) {
> +	if (dispatch_flags & I915_DISPATCH_SECURE) {
>   		/*
>   		 * So on first glance it looks freaky that we pin the batch here
>   		 * outside of the reservation loop. But:
> @@ -1527,7 +1527,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   		exec_start += i915_gem_obj_offset(batch_obj, vm);
>
>   	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
> -				      &eb->vmas, batch_obj, exec_start, flags);
> +				      &eb->vmas, batch_obj, exec_start,
> +				      dispatch_flags);
>
>   	/*
>   	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
> @@ -1535,7 +1536,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	 * needs to be adjusted to also track the ggtt batch vma properly as
>   	 * active.
>   	 */
> -	if (flags & I915_DISPATCH_SECURE)
> +	if (dispatch_flags & I915_DISPATCH_SECURE)
>   		i915_gem_object_ggtt_unpin(batch_obj);
>   err:
>   	/* the request owns the ref now */
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index aafcef3..f30a8e3 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -620,7 +620,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>    * @vmas: list of vmas.
>    * @batch_obj: the batchbuffer to submit.
>    * @exec_start: batchbuffer start virtual address pointer.
> - * @flags: translated execbuffer call flags.
> + * @dispatch_flags: translated execbuffer call flags.
>    *
>    * This is the evil twin version of i915_gem_ringbuffer_submission. It abstracts
>    * away the submission details of the execbuffer ioctl call.
> @@ -633,7 +633,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>   			       struct drm_i915_gem_execbuffer2 *args,
>   			       struct list_head *vmas,
>   			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 flags)
> +			       u64 exec_start, u32 dispatch_flags)
>   {
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
> @@ -706,7 +706,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>   		dev_priv->relative_constants_mode = instp_mode;
>   	}
>
> -	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags);
> +	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
>   	if (ret)
>   		return ret;
>
> @@ -1163,9 +1163,9 @@ static int gen9_init_render_ring(struct intel_engine_cs *ring)
>
>   static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
>   			      struct intel_context *ctx,
> -			      u64 offset, unsigned flags)
> +			      u64 offset, unsigned dispatch_flags)
>   {
> -	bool ppgtt = !(flags & I915_DISPATCH_SECURE);
> +	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
>   	int ret;
>
>   	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index f635735..b66fc4d 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -82,7 +82,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>   			       struct drm_i915_gem_execbuffer2 *args,
>   			       struct list_head *vmas,
>   			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 flags);
> +			       u64 exec_start, u32 dispatch_flags);
>   u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
>
>   void intel_lrc_irq_handler(struct intel_engine_cs *ring);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index d17e76d..ca7de3d 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1690,7 +1690,7 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
>   static int
>   i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>   			 u64 offset, u32 length,
> -			 unsigned flags)
> +			 unsigned dispatch_flags)
>   {
>   	int ret;
>
> @@ -1701,7 +1701,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>   	intel_ring_emit(ring,
>   			MI_BATCH_BUFFER_START |
>   			MI_BATCH_GTT |
> -			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
> +			(dispatch_flags & I915_DISPATCH_SECURE ?
> +			 0 : MI_BATCH_NON_SECURE_I965));
>   	intel_ring_emit(ring, offset);
>   	intel_ring_advance(ring);
>
> @@ -1714,8 +1715,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>   #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
>   static int
>   i830_dispatch_execbuffer(struct intel_engine_cs *ring,
> -				u64 offset, u32 len,
> -				unsigned flags)
> +			 u64 offset, u32 len,
> +			 unsigned dispatch_flags)
>   {
>   	u32 cs_offset = ring->scratch.gtt_offset;
>   	int ret;
> @@ -1733,7 +1734,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>   	intel_ring_emit(ring, MI_NOOP);
>   	intel_ring_advance(ring);
>
> -	if ((flags & I915_DISPATCH_PINNED) == 0) {
> +	if ((dispatch_flags & I915_DISPATCH_PINNED) == 0) {
>   		if (len > I830_BATCH_LIMIT)
>   			return -ENOSPC;
>
> @@ -1765,7 +1766,8 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>   		return ret;
>
>   	intel_ring_emit(ring, MI_BATCH_BUFFER);
> -	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
> +	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
> +					0 : MI_BATCH_NON_SECURE));
>   	intel_ring_emit(ring, offset + len - 8);
>   	intel_ring_emit(ring, MI_NOOP);
>   	intel_ring_advance(ring);
> @@ -1776,7 +1778,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>   static int
>   i915_dispatch_execbuffer(struct intel_engine_cs *ring,
>   			 u64 offset, u32 len,
> -			 unsigned flags)
> +			 unsigned dispatch_flags)
>   {
>   	int ret;
>
> @@ -1785,7 +1787,8 @@ i915_dispatch_execbuffer(struct intel_engine_cs *ring,
>   		return ret;
>
>   	intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT);
> -	intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE));
> +	intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
> +					0 : MI_BATCH_NON_SECURE));
>   	intel_ring_advance(ring);
>
>   	return 0;
> @@ -2352,9 +2355,10 @@ static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
>   static int
>   gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>   			      u64 offset, u32 len,
> -			      unsigned flags)
> +			      unsigned dispatch_flags)
>   {
> -	bool ppgtt = USES_PPGTT(ring->dev) && !(flags & I915_DISPATCH_SECURE);
> +	bool ppgtt = USES_PPGTT(ring->dev) &&
> +			!(dispatch_flags & I915_DISPATCH_SECURE);
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 4);
> @@ -2373,8 +2377,8 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>
>   static int
>   hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> -			      u64 offset, u32 len,
> -			      unsigned flags)
> +			     u64 offset, u32 len,
> +			     unsigned dispatch_flags)
>   {
>   	int ret;
>
> @@ -2384,7 +2388,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>
>   	intel_ring_emit(ring,
>   			MI_BATCH_BUFFER_START |
> -			(flags & I915_DISPATCH_SECURE ?
> +			(dispatch_flags & I915_DISPATCH_SECURE ?
>   			 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW));
>   	/* bit0-7 is the length on GEN6+ */
>   	intel_ring_emit(ring, offset);
> @@ -2396,7 +2400,7 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>   static int
>   gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>   			      u64 offset, u32 len,
> -			      unsigned flags)
> +			      unsigned dispatch_flags)
>   {
>   	int ret;
>
> @@ -2406,7 +2410,8 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>
>   	intel_ring_emit(ring,
>   			MI_BATCH_BUFFER_START |
> -			(flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965));
> +			(dispatch_flags & I915_DISPATCH_SECURE ?
> +			 0 : MI_BATCH_NON_SECURE_I965));
>   	/* bit0-7 is the length on GEN6+ */
>   	intel_ring_emit(ring, offset);
>   	intel_ring_advance(ring);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index b6c484f..ffa3724 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -164,7 +164,7 @@ struct  intel_engine_cs {
>   				     u32 seqno);
>   	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
>   					       u64 offset, u32 length,
> -					       unsigned flags);
> +					       unsigned dispatch_flags);
>   #define I915_DISPATCH_SECURE 0x1
>   #define I915_DISPATCH_PINNED 0x2
>   	void		(*cleanup)(struct intel_engine_cs *ring);
> @@ -242,7 +242,7 @@ struct  intel_engine_cs {
>   				      u32 flush_domains);
>   	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
>   					 struct intel_context *ctx,
> -					 u64 offset, unsigned flags);
> +					 u64 offset, unsigned dispatch_flags);
>
>   	/**
>   	 * List of objects currently involved in rendering from the
>

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Re: [PATCH 02/53] drm/i915: Add missing trace point to LRC execbuff code path

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> There is a trace point in the legacy execbuffer execution path that is missing
> from the execlist path. Trace points are extremely useful for debugging and are
> used by various automated validation tests. Hence, this patch adds the missing
> trace point back in.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c |    2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f30a8e3..637cbb7 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -710,6 +710,8 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>   	if (ret)
>   		return ret;
>
> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> +
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
>   	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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[PATCH 04/53] drm/i915: Merged the many do_execbuf() parameters into a structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The do_execbuf() function takes quite a few parameters. The actual set of
parameters is going to change with the conversion to passing requests around.
Further, it is due to grow massively with the arrival of the GPU scheduler.

This patch simplies the prototype by passing a parameter structure instead.
Changing the parameter set in the future is then simply a matter of
adding/removing items to the structure.

Note that the structure does not contain absolutely everything that is passed
in. This is because the intention is to use this structure more extensively
later in this patch series and more especially in the GPU scheduler that is
coming soon. The latter requires hanging on to the structure as the final
hardware submission can be delayed until long after the execbuf IOCTL has
returned to user land. Thus it is unsafe to put anything in the structure that
is local to the IOCTL call itself - such as the 'args' parameter. All entries
must be copies of data or pointers to structures that are reference counted in
someway and guaranteed to exist for the duration of the batch buffer's life.

v2: Rebased to newer tree and updated for changes to the command parser.
Specifically, a code shuffle has required saving the batch start address in the
params structure.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |   28 +++++++------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   61 ++++++++++++++++++----------
 drivers/gpu/drm/i915/intel_lrc.c           |   26 ++++++------
 drivers/gpu/drm/i915/intel_lrc.h           |    9 ++--
 4 files changed, 71 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 05f106d..8dc08bc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1525,6 +1525,17 @@ struct i915_virtual_gpu {
 	bool active;
 };
 
+struct i915_execbuffer_params {
+	struct drm_device               *dev;
+	struct drm_file                 *file;
+	uint32_t                        dispatch_flags;
+	uint32_t                        args_batch_start_offset;
+	uint32_t                        batch_obj_vm_offset;
+	struct intel_engine_cs          *ring;
+	struct drm_i915_gem_object      *batch_obj;
+	struct intel_context            *ctx;
+};
+
 struct drm_i915_private {
 	struct drm_device *dev;
 	struct kmem_cache *slab;
@@ -1778,13 +1789,9 @@ struct drm_i915_private {
 
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
-		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
-				  struct intel_engine_cs *ring,
-				  struct intel_context *ctx,
+		int (*do_execbuf)(struct i915_execbuffer_params *params,
 				  struct drm_i915_gem_execbuffer2 *args,
-				  struct list_head *vmas,
-				  struct drm_i915_gem_object *batch_obj,
-				  u64 exec_start, u32 flags);
+				  struct list_head *vmas);
 		int (*init_rings)(struct drm_device *dev);
 		void (*cleanup_ring)(struct intel_engine_cs *ring);
 		void (*stop_ring)(struct intel_engine_cs *ring);
@@ -2531,14 +2538,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 					 struct drm_file *file,
 					 struct intel_engine_cs *ring,
 					 struct drm_i915_gem_object *obj);
-int i915_gem_ringbuffer_submission(struct drm_device *dev,
-				   struct drm_file *file,
-				   struct intel_engine_cs *ring,
-				   struct intel_context *ctx,
+int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
-				   struct list_head *vmas,
-				   struct drm_i915_gem_object *batch_obj,
-				   u64 exec_start, u32 flags);
+				   struct list_head *vmas);
 int i915_gem_execbuffer(struct drm_device *dev, void *data,
 			struct drm_file *file_priv);
 int i915_gem_execbuffer2(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 61fd8fa..2c4176f 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1121,17 +1121,15 @@ err:
 }
 
 int
-i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags)
+			       struct list_head *vmas)
 {
 	struct drm_clip_rect *cliprects = NULL;
+	struct drm_device *dev = params->dev;
+	struct intel_engine_cs *ring = params->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u64 exec_len;
+	u64 exec_start, exec_len;
 	int instp_mode;
 	u32 instp_mask;
 	int i, ret = 0;
@@ -1183,7 +1181,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 	if (ret)
 		goto error;
 
-	ret = i915_switch_context(ring, ctx);
+	ret = i915_switch_context(ring, params->ctx);
 	if (ret)
 		goto error;
 
@@ -1240,12 +1238,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 	}
 
 	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
-		ret = i915_reset_gen7_sol_offsets(dev, ring);
+		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
 		if (ret)
 			goto error;
 	}
 
-	exec_len = args->batch_len;
+	exec_len   = args->batch_len;
+	exec_start = params->batch_obj_vm_offset +
+		     params->args_batch_start_offset;
+
 	if (cliprects) {
 		for (i = 0; i < args->num_cliprects; i++) {
 			ret = i915_emit_box(ring, &cliprects[i],
@@ -1255,22 +1256,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 
 			ret = ring->dispatch_execbuffer(ring,
 							exec_start, exec_len,
-							dispatch_flags);
+							params->dispatch_flags);
 			if (ret)
 				goto error;
 		}
 	} else {
 		ret = ring->dispatch_execbuffer(ring,
 						exec_start, exec_len,
-						dispatch_flags);
+						params->dispatch_flags);
 		if (ret)
 			return ret;
 	}
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
+					    params->batch_obj);
 
 error:
 	kfree(cliprects);
@@ -1340,8 +1342,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct intel_engine_cs *ring;
 	struct intel_context *ctx;
 	struct i915_address_space *vm;
+	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
+	struct i915_execbuffer_params *params = &params_master;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
-	u64 exec_start = args->batch_start_offset;
 	u32 dispatch_flags;
 	int ret;
 	bool need_relocs;
@@ -1434,6 +1437,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	else
 		vm = &dev_priv->gtt.base;
 
+	memset(&params_master, 0x00, sizeof(params_master));
+
 	eb = eb_create(args);
 	if (eb == NULL) {
 		i915_gem_context_unreference(ctx);
@@ -1503,8 +1508,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		if (USES_FULL_PPGTT(dev))
 			dispatch_flags |= I915_DISPATCH_SECURE;
 
-		exec_start = 0;
-	}
+		params->args_batch_start_offset = 0;
+	} else
+		params->args_batch_start_offset = args->batch_start_offset;
 
 	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
 
@@ -1526,13 +1532,24 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		if (ret)
 			goto err;
 
-		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
+		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
 	} else
-		exec_start += i915_gem_obj_offset(batch_obj, vm);
+		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
-	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
-				      &eb->vmas, batch_obj, exec_start,
-				      dispatch_flags);
+	/*
+	 * Save assorted stuff away to pass through to *_submission().
+	 * NB: This data should be 'persistent' and not local as it will
+	 * kept around beyond the duration of the IOCTL once the GPU
+	 * scheduler arrives.
+	 */
+	params->dev                     = dev;
+	params->file                    = file;
+	params->ring                    = ring;
+	params->dispatch_flags          = dispatch_flags;
+	params->batch_obj               = batch_obj;
+	params->ctx                     = ctx;
+
+	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
 
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index fcb074b..32fabbc 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -628,16 +628,15 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
  *
  * Return: non-zero if the submission fails.
  */
-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+int intel_execlists_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags)
+			       struct list_head *vmas)
 {
+	struct drm_device       *dev = params->dev;
+	struct intel_engine_cs  *ring = params->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
+	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
+	u64 exec_start;
 	int instp_mode;
 	u32 instp_mask;
 	int ret;
@@ -688,13 +687,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		return -EINVAL;
 	}
 
-	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
+	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
 	if (ret)
 		return ret;
 
 	if (ring == &dev_priv->ring[RCS] &&
 	    instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
 		if (ret)
 			return ret;
 
@@ -707,14 +706,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		dev_priv->relative_constants_mode = instp_mode;
 	}
 
-	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
+	exec_start = params->batch_obj_vm_offset +
+		     args->batch_start_offset;
+
+	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index adb731e4..a64e344 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -78,13 +78,10 @@ void intel_lr_context_reset(struct drm_device *dev,
 
 /* Execlists */
 int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+struct i915_execbuffer_params;
+int intel_execlists_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags);
+			       struct list_head *vmas);
 u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
 
 void intel_lrc_irq_handler(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 21/53] drm/i915: Set context in request from creation even in legacy mode

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In execlist mode, the context object pointer is written in to the request
structure (and reference counted) at the point of request creation. In legacy
mode, this only happens inside i915_add_request().

This patch updates the legacy code path to match the execlist version. This
allows all the intermediate code between request creation and request submission
to get at the context object given only a request structure. Thus negating the
need to pass context pointers here, there and everywhere.

v2: Moved the context reference so it does not need to be undone if the
get_seqno() fails.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    9 +--------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    3 +++
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 151ddb5..e237aa0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2482,14 +2482,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	WARN_ON(request->batch_obj && obj);
 	request->batch_obj = obj;
 
-	if (!i915.enable_execlists) {
-		/* Hold a reference to the current context so that we can inspect
-		 * it later in case a hangcheck error event fires.
-		 */
-		request->ctx = ring->last_context;
-		if (request->ctx)
-			i915_gem_context_reference(request->ctx);
-	}
+	WARN_ON(request->ctx != ring->last_context);
 
 	request->emitted_jiffies = jiffies;
 	list_add_tail(&request->list, &ring->request_list);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index e7dd3cf..4550676 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2244,6 +2244,9 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
 		return ret;
 	}
 
+	request->ctx = ctx;
+	i915_gem_context_reference(request->ctx);
+
 	*req_out = ring->outstanding_lazy_request = request;
 	return 0;
 }
-- 
1.7.9.5

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Re: [PATCH 03/53] drm/i915: Cache ringbuf pointer in request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> In execlist mode, the ringbuf is a function of the ring and context whereas in
> legacy mode, it is derived from the ring alone. Thus the calculation required to
> determine the ringbuf pointer from the ring (and context) also needs to test
> execlist mode or not. This is messy.
>
> Further, the request structure holds a pointer to both the ring and the context
> for which it was created. Thus, given a request, it is possible to derive the
> ringbuf in either legacy or execlist mode. Hence it is necessary to pass just
> the request in to all the low level functions rather than some combination of
> request, ring, context and ringbuf. However, rather than recalculating it each
> time, it is much simpler to just cache the ringbuf pointer in the request
> structure itself.
>
> Caching the pointer means the calculation is done one at request creation time
> and all further code and simply read it directly from the request structure.
>

"Caching the pointer means the calculation is done one at request 
creation time and all further code and simply read it directly from the 
request structure"

Nitpick: Broken sentence, you might want to fix that. Aside from that, 
no major problems with this patch.

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    3 ++-
>   drivers/gpu/drm/i915/i915_gem.c         |   14 +-------------
>   drivers/gpu/drm/i915/intel_lrc.c        |    6 ++++--
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    1 +
>   4 files changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2dedd43..ba09137 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2144,8 +2144,9 @@ struct drm_i915_gem_request {
>   	/** Position in the ringbuffer of the end of the whole request */
>   	u32 tail;
>
> -	/** Context related to this request */
> +	/** Context and ring buffer related to this request */
>   	struct intel_context *ctx;
> +	struct intel_ringbuffer *ringbuf;
>
>   	/** Batch buffer related to this request if any */
>   	struct drm_i915_gem_object *batch_obj;
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 61134ab..7a0dc7c 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2763,7 +2763,6 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
>
>   	while (!list_empty(&ring->request_list)) {
>   		struct drm_i915_gem_request *request;
> -		struct intel_ringbuffer *ringbuf;
>
>   		request = list_first_entry(&ring->request_list,
>   					   struct drm_i915_gem_request,
> @@ -2774,23 +2773,12 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
>
>   		trace_i915_gem_request_retire(request);
>
> -		/* This is one of the few common intersection points
> -		 * between legacy ringbuffer submission and execlists:
> -		 * we need to tell them apart in order to find the correct
> -		 * ringbuffer to which the request belongs to.
> -		 */
> -		if (i915.enable_execlists) {
> -			struct intel_context *ctx = request->ctx;
> -			ringbuf = ctx->engine[ring->id].ringbuf;
> -		} else
> -			ringbuf = ring->buffer;
> -
>   		/* We know the GPU must have read the request to have
>   		 * sent us the seqno + interrupt, so use the position
>   		 * of tail of the request to update the last known position
>   		 * of the GPU head.
>   		 */
> -		ringbuf->last_retired_head = request->postfix;
> +		request->ringbuf->last_retired_head = request->postfix;
>
>   		i915_gem_free_request(request);
>   	}
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 637cbb7..f14b517 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -888,12 +888,14 @@ static int logical_ring_alloc_request(struct intel_engine_cs *ring,
>   		return ret;
>   	}
>
> -	/* Hold a reference to the context this request belongs to
> +	/*
> +	 * Hold a reference to the context this request belongs to
>   	 * (we will need it when the time comes to emit/retire the
> -	 * request).
> +	 * request). Likewise, the ringbuff is useful to keep track of.
>   	 */
>   	request->ctx = ctx;
>   	i915_gem_context_reference(request->ctx);
> +	request->ringbuf = ctx->engine[ring->id].ringbuf;
>
>   	ring->outstanding_lazy_request = request;
>   	return 0;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index ca7de3d..7fd89e5 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2179,6 +2179,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring)
>
>   	kref_init(&request->ref);
>   	request->ring = ring;
> +	request->ringbuf = ring->buffer;
>   	request->uniq = dev_private->request_uniq++;
>
>   	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
>

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[PATCH 54/56] drm/i915: Rename 'do_execbuf' to 'execbuf_submit'

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The submission portion of the execbuffer code path was abstracted into a
function pointer indirection as part of the legacy vs execlist work. The two
implementation functions are called 'i915_gem_ringbuffer_submission' and
'intel_execlists_submission' but the pointer was called 'do_execbuf'. There is
already a 'i915_gem_do_execbuffer' function (which is what calls the pointer
indirection). The name of the pointer is therefore considered to be backwards
and should be changed.

This patch renames it to 'execbuf_submit' which is hopefully a bit clearer.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    6 +++---
 drivers/gpu/drm/i915/i915_gem.c            |    4 ++--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7c9e569..4e9a350 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1793,9 +1793,9 @@ struct drm_i915_private {
 		int (*alloc_request)(struct intel_engine_cs *ring,
 				     struct intel_context *ctx,
 				     struct drm_i915_gem_request **req_out);
-		int (*do_execbuf)(struct i915_execbuffer_params *params,
-				  struct drm_i915_gem_execbuffer2 *args,
-				  struct list_head *vmas);
+		int (*execbuf_submit)(struct i915_execbuffer_params *params,
+				      struct drm_i915_gem_execbuffer2 *args,
+				      struct list_head *vmas);
 		int (*init_rings)(struct drm_device *dev);
 		void (*cleanup_ring)(struct intel_engine_cs *ring);
 		void (*stop_ring)(struct intel_engine_cs *ring);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ecff3f7..27abc9d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4928,13 +4928,13 @@ int i915_gem_init(struct drm_device *dev)
 
 	if (!i915.enable_execlists) {
 		dev_priv->gt.alloc_request = intel_ring_alloc_request;
-		dev_priv->gt.do_execbuf = i915_gem_ringbuffer_submission;
+		dev_priv->gt.execbuf_submit = i915_gem_ringbuffer_submission;
 		dev_priv->gt.init_rings = i915_gem_init_rings;
 		dev_priv->gt.cleanup_ring = intel_cleanup_ring_buffer;
 		dev_priv->gt.stop_ring = intel_stop_ring_buffer;
 	} else {
 		dev_priv->gt.alloc_request = intel_logical_ring_alloc_request;
-		dev_priv->gt.do_execbuf = intel_execlists_submission;
+		dev_priv->gt.execbuf_submit = intel_execlists_submission;
 		dev_priv->gt.init_rings = intel_logical_rings_init;
 		dev_priv->gt.cleanup_ring = intel_logical_ring_cleanup;
 		dev_priv->gt.stop_ring = intel_logical_ring_stop;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index dfad66a..d969eb5 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1558,7 +1558,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	params->batch_obj               = batch_obj;
 	params->ctx                     = ctx;
 
-	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
+	ret = dev_priv->gt.execbuf_submit(params, args, &eb->vmas);
 
 err:
 	/*
-- 
1.7.9.5

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[PATCH 55/56] drm/i915: Remove 'faked' request from LRC submission

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The LRC submission code requires a request for tracking purposes. It does not
actually require that request to 'complete' it simply uses it for keeping hold
of reference counts on contexts and such like.

In the case where the ring buffer is completely full, the LRC code looks for a
pending request that would free up sufficient space upon completion and waits
for it. If no such request can be found it resorts to simply polling the free
space count until it is big enough. This situation should only occur when the
entire buffer is filled with the request currently being generated. I.e., the
user is trying to submit a single piece of work that is large than the ring
buffer itself (which should be impossible because very large batch buffers don't
consume any more ring buffer space). Before starting to poll, a submit call is
made to make sure that the currently queued up work in the buffer will actually
be submtted and thus the poll will eventually succeed.

The problem here is that the 'official' request cannot be used as that could
lead to multiple LRC submissions being tagged to a single request structure.
Instead, the code fakes up a private request structure and uses that.

This patch moves the faked request allocation higher up in the call stack to the
wait code itself (rather than being at the very lowest submission level). Thus
it is now obvious where the faked request is coming from and why it is
necessary. The patch also replaces it with a call to the official request
allocation code rather than attempting to duplicate that code. This becomes
especially important in the future when the request allocation changes to
accommodate a conversion to struct fence.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   45 ++++++++++++++++++++++----------------
 1 file changed, 26 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 65eea51..1fa36de 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -507,23 +507,11 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
 	if (to != ring->default_context)
 		intel_lr_context_pin(ring, to);
 
-	if (!request) {
-		/*
-		 * If there isn't a request associated with this submission,
-		 * create one as a temporary holder.
-		 */
-		request = kzalloc(sizeof(*request), GFP_KERNEL);
-		if (request == NULL)
-			return -ENOMEM;
-		request->ring = ring;
-		request->ctx = to;
-		kref_init(&request->ref);
-		request->uniq = dev_priv->request_uniq++;
-		i915_gem_context_reference(request->ctx);
-	} else {
-		i915_gem_request_reference(request);
-		WARN_ON(to != request->ctx);
-	}
+	WARN_ON(!request);
+	WARN_ON(to != request->ctx);
+
+	i915_gem_request_reference(request);
+
 	request->tail = tail;
 
 	intel_runtime_pm_get(dev_priv);
@@ -677,6 +665,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 	struct intel_engine_cs *ring = ringbuf->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_i915_gem_request *local_req;
 	unsigned long end;
 	int ret;
 
@@ -684,8 +673,23 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 	if (ret != -ENOSPC)
 		return ret;
 
-	/* Force the context submission in case we have been skipping it */
-	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
+	/*
+	 * Force the context submission in case we have been skipping it.
+	 * This requires creating a place holder request so that the LRC
+	 * submission can be tracked. Note that if this point has been
+	 * reached then it is the current submission that is blocking the
+	 * driver and the only course of action is to do a partial send and
+	 * wait for it to complete.
+	 * Note also that because there is no space left in the ring, it is
+	 * not possible to write the request submission prologue (which does
+	 * things like update seqno values and trigger completion interrupts).
+	 * Thus the request cannot be submitted via i915_add_request() and
+	 * can not be waiting on by i915_gem_wait_request().
+	 */
+	ret = dev_priv->gt.alloc_request(ring, ctx, &local_req);
+	if (ret)
+		return ret;
+	intel_logical_ring_advance_and_submit(ringbuf, ctx, local_req);
 
 	/* With GEM the hangcheck timer should kick us out of the loop,
 	 * leaving it early runs the risk of corrupting GEM state (due
@@ -717,6 +721,9 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 		}
 	} while (1);
 
+	/* This request is now done with and can be disposed of. */
+	i915_gem_request_unreference(local_req);
+
 	return ret;
 }
 
-- 
1.7.9.5

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[PATCH 56/56] drm/i915: Update a bunch of LRC functions to take requests

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

A bunch of the low level LRC functions were passing around ringbuf and
ctx pairs. In a few cases, they took the r/c pair and a request as
well. This is all quite messy and unnecesary.

Updated those functions to just take the request structure.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   61 ++++++++++++++++----------------------
 1 file changed, 26 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 1fa36de..ce5c19a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -494,25 +494,20 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
 		   ((u32)ring->next_context_status_buffer & 0x07) << 8);
 }
 
-static int execlists_context_queue(struct intel_engine_cs *ring,
-				   struct intel_context *to,
-				   u32 tail,
-				   struct drm_i915_gem_request *request)
+static int execlists_context_queue(struct drm_i915_gem_request *request)
 {
+	struct intel_engine_cs *ring = request->ring;
 	struct drm_i915_gem_request *cursor;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	unsigned long flags;
 	int num_elements = 0;
 
-	if (to != ring->default_context)
-		intel_lr_context_pin(ring, to);
-
-	WARN_ON(!request);
-	WARN_ON(to != request->ctx);
+	if (request->ctx != ring->default_context)
+		intel_lr_context_pin(ring, request->ctx);
 
 	i915_gem_request_reference(request);
 
-	request->tail = tail;
+	request->tail = request->ringbuf->tail;
 
 	intel_runtime_pm_get(dev_priv);
 
@@ -529,7 +524,7 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
 					   struct drm_i915_gem_request,
 					   execlist_link);
 
-		if (to == tail_req->ctx) {
+		if (request->ctx == tail_req->ctx) {
 			WARN(tail_req->elsp_submitted != 0,
 				"More than 2 already-submitted reqs queued\n");
 			list_del(&tail_req->execlist_link);
@@ -636,7 +631,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
 
 /*
  * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
- * @ringbuf: Logical Ringbuffer to advance.
+ * @request: Request to advance the logical ringbuffer of.
  *
  * The tail is updated in our logical ringbuffer struct, not in the actual context. What
  * really happens during submission is that the context and current tail will be placed
@@ -644,32 +639,29 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
  * point, the tail *inside* the context is updated and the ELSP written to.
  */
 static void
-intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
-				      struct intel_context *ctx,
-				      struct drm_i915_gem_request *request)
+intel_logical_ring_advance_and_submit(struct drm_i915_gem_request *request)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = request->ring;
 
-	intel_logical_ring_advance(ringbuf);
+	intel_logical_ring_advance(request->ringbuf);
 
 	if (intel_ring_stopped(ring))
 		return;
 
-	execlists_context_queue(ring, ctx, ringbuf->tail, request);
+	execlists_context_queue(request);
 }
 
-static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
-				       struct intel_context *ctx,
+static int logical_ring_wait_for_space(struct drm_i915_gem_request *req,
 				       int bytes)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct drm_i915_gem_request *local_req;
 	unsigned long end;
 	int ret;
 
-	ret = logical_ring_wait_request(ringbuf, bytes);
+	ret = logical_ring_wait_request(req->ringbuf, bytes);
 	if (ret != -ENOSPC)
 		return ret;
 
@@ -686,10 +678,10 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 	 * Thus the request cannot be submitted via i915_add_request() and
 	 * can not be waiting on by i915_gem_wait_request().
 	 */
-	ret = dev_priv->gt.alloc_request(ring, ctx, &local_req);
+	ret = dev_priv->gt.alloc_request(ring, req->ctx, &local_req);
 	if (ret)
 		return ret;
-	intel_logical_ring_advance_and_submit(ringbuf, ctx, local_req);
+	intel_logical_ring_advance_and_submit(local_req);
 
 	/* With GEM the hangcheck timer should kick us out of the loop,
 	 * leaving it early runs the risk of corrupting GEM state (due
@@ -700,7 +692,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 
 	ret = 0;
 	do {
-		if (intel_ring_space(ringbuf) >= bytes)
+		if (intel_ring_space(req->ringbuf) >= bytes)
 			break;
 
 		msleep(1);
@@ -727,14 +719,14 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 	return ret;
 }
 
-static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
-				    struct intel_context *ctx)
+static int logical_ring_wrap_buffer(struct drm_i915_gem_request *req)
 {
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	uint32_t __iomem *virt;
 	int rem = ringbuf->size - ringbuf->tail;
 
 	if (ringbuf->space < rem) {
-		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
+		int ret = logical_ring_wait_for_space(req, rem);
 
 		if (ret)
 			return ret;
@@ -751,19 +743,19 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
-				struct intel_context *ctx, int bytes)
+static int logical_ring_prepare(struct drm_i915_gem_request *req, int bytes)
 {
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	int ret;
 
 	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
-		ret = logical_ring_wrap_buffer(ringbuf, ctx);
+		ret = logical_ring_wrap_buffer(req);
 		if (unlikely(ret))
 			return ret;
 	}
 
 	if (unlikely(ringbuf->space < bytes)) {
-		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
+		ret = logical_ring_wait_for_space(req, bytes);
 		if (unlikely(ret))
 			return ret;
 	}
@@ -799,8 +791,7 @@ static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
 	if (ret)
 		return ret;
 
-	ret = logical_ring_prepare(req->ringbuf, req->ctx,
-				   num_dwords * sizeof(uint32_t));
+	ret = logical_ring_prepare(req, num_dwords * sizeof(uint32_t));
 	if (ret)
 		return ret;
 
@@ -1334,7 +1325,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
 	intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request));
 	intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
 	intel_logical_ring_emit(ringbuf, MI_NOOP);
-	intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
+	intel_logical_ring_advance_and_submit(request);
 
 	return 0;
 }
-- 
1.7.9.5

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[PATCH 01/53] drm/i915: Remove ironlake rc6 support

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Apparently, this has never worked reliably and is currently disabled. Also, the
gains are not particularly impressive. Thus rather than try to keep unused code
from decaying and having to update it for other driver changes, it was decided
to simply remove it.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c  |   12 ---
 drivers/gpu/drm/i915/i915_drv.h      |    3 -
 drivers/gpu/drm/i915/intel_display.c |    2 -
 drivers/gpu/drm/i915/intel_drv.h     |    1 -
 drivers/gpu/drm/i915/intel_pm.c      |  155 ----------------------------------
 5 files changed, 173 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 68a1e6e..18e4900 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1846,18 +1846,6 @@ static int i915_context_status(struct seq_file *m, void *unused)
 	if (ret)
 		return ret;
 
-	if (dev_priv->ips.pwrctx) {
-		seq_puts(m, "power context ");
-		describe_obj(m, dev_priv->ips.pwrctx);
-		seq_putc(m, '\n');
-	}
-
-	if (dev_priv->ips.renderctx) {
-		seq_puts(m, "render context ");
-		describe_obj(m, dev_priv->ips.renderctx);
-		seq_putc(m, '\n');
-	}
-
 	list_for_each_entry(ctx, &dev_priv->context_list, link) {
 		if (!i915.enable_execlists &&
 		    ctx->legacy_hw_ctx.rcs_state == NULL)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 798fa88..05f106d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1053,9 +1053,6 @@ struct intel_ilk_power_mgmt {
 
 	int c_m;
 	int r_t;
-
-	struct drm_i915_gem_object *pwrctx;
-	struct drm_i915_gem_object *renderctx;
 };
 
 struct drm_i915_private;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5c35098..51f7ed4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13904,8 +13904,6 @@ void intel_modeset_cleanup(struct drm_device *dev)
 
 	intel_fbc_disable(dev);
 
-	ironlake_teardown_rc6(dev);
-
 	mutex_unlock(&dev->struct_mutex);
 
 	/* flush any delayed tasks or pending work */
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f4305be..b793558 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1229,7 +1229,6 @@ void intel_enable_gt_powersave(struct drm_device *dev);
 void intel_disable_gt_powersave(struct drm_device *dev);
 void intel_suspend_gt_powersave(struct drm_device *dev);
 void intel_reset_gt_powersave(struct drm_device *dev);
-void ironlake_teardown_rc6(struct drm_device *dev);
 void gen6_update_ring_freq(struct drm_device *dev);
 void gen6_rps_idle(struct drm_i915_private *dev_priv);
 void gen6_rps_boost(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 542cf68..0762572 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3539,41 +3539,6 @@ void intel_update_sprite_watermarks(struct drm_plane *plane,
 						   pixel_size, enabled, scaled);
 }
 
-static struct drm_i915_gem_object *
-intel_alloc_context_page(struct drm_device *dev)
-{
-	struct drm_i915_gem_object *ctx;
-	int ret;
-
-	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
-
-	ctx = i915_gem_alloc_object(dev, 4096);
-	if (!ctx) {
-		DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
-		return NULL;
-	}
-
-	ret = i915_gem_obj_ggtt_pin(ctx, 4096, 0);
-	if (ret) {
-		DRM_ERROR("failed to pin power context: %d\n", ret);
-		goto err_unref;
-	}
-
-	ret = i915_gem_object_set_to_gtt_domain(ctx, 1);
-	if (ret) {
-		DRM_ERROR("failed to set-domain on power context: %d\n", ret);
-		goto err_unpin;
-	}
-
-	return ctx;
-
-err_unpin:
-	i915_gem_object_ggtt_unpin(ctx);
-err_unref:
-	drm_gem_object_unreference(&ctx->base);
-	return NULL;
-}
-
 /**
  * Lock protecting IPS related data structures
  */
@@ -4990,124 +4955,6 @@ static void valleyview_enable_rps(struct drm_device *dev)
 	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 }
 
-void ironlake_teardown_rc6(struct drm_device *dev)
-{
-	struct drm_i915_private *dev_priv = dev->dev_private;
-
-	if (dev_priv->ips.renderctx) {
-		i915_gem_object_ggtt_unpin(dev_priv->ips.renderctx);
-		drm_gem_object_unreference(&dev_priv->ips.renderctx->base);
-		dev_priv->ips.renderctx = NULL;
-	}
-
-	if (dev_priv->ips.pwrctx) {
-		i915_gem_object_ggtt_unpin(dev_priv->ips.pwrctx);
-		drm_gem_object_unreference(&dev_priv->ips.pwrctx->base);
-		dev_priv->ips.pwrctx = NULL;
-	}
-}
-
-static void ironlake_disable_rc6(struct drm_device *dev)
-{
-	struct drm_i915_private *dev_priv = dev->dev_private;
-
-	if (I915_READ(PWRCTXA)) {
-		/* Wake the GPU, prevent RC6, then restore RSTDBYCTL */
-		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) | RCX_SW_EXIT);
-		wait_for(((I915_READ(RSTDBYCTL) & RSX_STATUS_MASK) == RSX_STATUS_ON),
-			 50);
-
-		I915_WRITE(PWRCTXA, 0);
-		POSTING_READ(PWRCTXA);
-
-		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
-		POSTING_READ(RSTDBYCTL);
-	}
-}
-
-static int ironlake_setup_rc6(struct drm_device *dev)
-{
-	struct drm_i915_private *dev_priv = dev->dev_private;
-
-	if (dev_priv->ips.renderctx == NULL)
-		dev_priv->ips.renderctx = intel_alloc_context_page(dev);
-	if (!dev_priv->ips.renderctx)
-		return -ENOMEM;
-
-	if (dev_priv->ips.pwrctx == NULL)
-		dev_priv->ips.pwrctx = intel_alloc_context_page(dev);
-	if (!dev_priv->ips.pwrctx) {
-		ironlake_teardown_rc6(dev);
-		return -ENOMEM;
-	}
-
-	return 0;
-}
-
-static void ironlake_enable_rc6(struct drm_device *dev)
-{
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
-	bool was_interruptible;
-	int ret;
-
-	/* rc6 disabled by default due to repeated reports of hanging during
-	 * boot and resume.
-	 */
-	if (!intel_enable_rc6(dev))
-		return;
-
-	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
-
-	ret = ironlake_setup_rc6(dev);
-	if (ret)
-		return;
-
-	was_interruptible = dev_priv->mm.interruptible;
-	dev_priv->mm.interruptible = false;
-
-	/*
-	 * GPU can automatically power down the render unit if given a page
-	 * to save state.
-	 */
-	ret = intel_ring_begin(ring, 6);
-	if (ret) {
-		ironlake_teardown_rc6(dev);
-		dev_priv->mm.interruptible = was_interruptible;
-		return;
-	}
-
-	intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);
-	intel_ring_emit(ring, MI_SET_CONTEXT);
-	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(dev_priv->ips.renderctx) |
-			MI_MM_SPACE_GTT |
-			MI_SAVE_EXT_STATE_EN |
-			MI_RESTORE_EXT_STATE_EN |
-			MI_RESTORE_INHIBIT);
-	intel_ring_emit(ring, MI_SUSPEND_FLUSH);
-	intel_ring_emit(ring, MI_NOOP);
-	intel_ring_emit(ring, MI_FLUSH);
-	intel_ring_advance(ring);
-
-	/*
-	 * Wait for the command parser to advance past MI_SET_CONTEXT. The HW
-	 * does an implicit flush, combined with MI_FLUSH above, it should be
-	 * safe to assume that renderctx is valid
-	 */
-	ret = intel_ring_idle(ring);
-	dev_priv->mm.interruptible = was_interruptible;
-	if (ret) {
-		DRM_ERROR("failed to enable ironlake power savings\n");
-		ironlake_teardown_rc6(dev);
-		return;
-	}
-
-	I915_WRITE(PWRCTXA, i915_gem_obj_ggtt_offset(dev_priv->ips.pwrctx) | PWRCTX_EN);
-	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
-
-	intel_print_rc6_info(dev, GEN6_RC_CTL_RC6_ENABLE);
-}
-
 static unsigned long intel_pxfreq(u32 vidfreq)
 {
 	unsigned long freq;
@@ -5655,7 +5502,6 @@ void intel_disable_gt_powersave(struct drm_device *dev)
 
 	if (IS_IRONLAKE_M(dev)) {
 		ironlake_disable_drps(dev);
-		ironlake_disable_rc6(dev);
 	} else if (INTEL_INFO(dev)->gen >= 6) {
 		intel_suspend_gt_powersave(dev);
 
@@ -5726,7 +5572,6 @@ void intel_enable_gt_powersave(struct drm_device *dev)
 	if (IS_IRONLAKE_M(dev)) {
 		mutex_lock(&dev->struct_mutex);
 		ironlake_enable_drps(dev);
-		ironlake_enable_rc6(dev);
 		intel_init_emon(dev);
 		mutex_unlock(&dev->struct_mutex);
 	} else if (INTEL_INFO(dev)->gen >= 6) {
-- 
1.7.9.5

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Re: [PATCH 04/53] drm/i915: Merged the many do_execbuf() parameters into a structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The do_execbuf() function takes quite a few parameters. The actual set of
> parameters is going to change with the conversion to passing requests around.
> Further, it is due to grow massively with the arrival of the GPU scheduler.
>
> This patch simplies the prototype by passing a parameter structure instead.

Nitpick: simplies -> simplifies.

> Changing the parameter set in the future is then simply a matter of
> adding/removing items to the structure.
>
> Note that the structure does not contain absolutely everything that is passed
> in. This is because the intention is to use this structure more extensively
> later in this patch series and more especially in the GPU scheduler that is
> coming soon. The latter requires hanging on to the structure as the final
> hardware submission can be delayed until long after the execbuf IOCTL has
> returned to user land. Thus it is unsafe to put anything in the structure that
> is local to the IOCTL call itself - such as the 'args' parameter. All entries
> must be copies of data or pointers to structures that are reference counted in
> someway and guaranteed to exist for the duration of the batch buffer's life.

Nitpick: someway -> some way

>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |   27 +++++++-------
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   56 ++++++++++++++++++----------
>   drivers/gpu/drm/i915/intel_lrc.c           |   26 +++++++------
>   drivers/gpu/drm/i915/intel_lrc.h           |    9 ++---
>   4 files changed, 67 insertions(+), 51 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ba09137..fdd63ab 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1645,6 +1645,16 @@ struct i915_virtual_gpu {
>   	bool active;
>   };
>
> +struct i915_execbuffer_params {
> +	struct drm_device               *dev;
> +	struct drm_file                 *file;
> +	uint32_t                        dispatch_flags;
> +	uint32_t                        batch_obj_vm_offset;
> +	struct intel_engine_cs          *ring;
> +	struct drm_i915_gem_object      *batch_obj;
> +	struct intel_context            *ctx;
> +};
> +
>   struct drm_i915_private {
>   	struct drm_device *dev;
>   	struct kmem_cache *slab;
> @@ -1898,13 +1908,9 @@ struct drm_i915_private {
>
>   	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
>   	struct {
> -		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
> -				  struct intel_engine_cs *ring,
> -				  struct intel_context *ctx,
> +		int (*do_execbuf)(struct i915_execbuffer_params *params,
>   				  struct drm_i915_gem_execbuffer2 *args,
> -				  struct list_head *vmas,
> -				  struct drm_i915_gem_object *batch_obj,
> -				  u64 exec_start, u32 flags);
> +				  struct list_head *vmas);
>   		int (*init_rings)(struct drm_device *dev);
>   		void (*cleanup_ring)(struct intel_engine_cs *ring);
>   		void (*stop_ring)(struct intel_engine_cs *ring);
> @@ -2638,14 +2644,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
>   					 struct drm_file *file,
>   					 struct intel_engine_cs *ring,
>   					 struct drm_i915_gem_object *obj);
> -int i915_gem_ringbuffer_submission(struct drm_device *dev,
> -				   struct drm_file *file,
> -				   struct intel_engine_cs *ring,
> -				   struct intel_context *ctx,
> +int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   				   struct drm_i915_gem_execbuffer2 *args,
> -				   struct list_head *vmas,
> -				   struct drm_i915_gem_object *batch_obj,
> -				   u64 exec_start, u32 flags);
> +				   struct list_head *vmas);
>   int i915_gem_execbuffer(struct drm_device *dev, void *data,
>   			struct drm_file *file_priv);
>   int i915_gem_execbuffer2(struct drm_device *dev, void *data,
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index ec9ea45..93b0ef0 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1132,17 +1132,15 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *ring,
>   }
>
>   int
> -i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
> -			       struct intel_engine_cs *ring,
> -			       struct intel_context *ctx,
> +i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   			       struct drm_i915_gem_execbuffer2 *args,
> -			       struct list_head *vmas,
> -			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 dispatch_flags)
> +			       struct list_head *vmas)
>   {
>   	struct drm_clip_rect *cliprects = NULL;
> +	struct drm_device *dev = params->dev;
> +	struct intel_engine_cs *ring = params->ring;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
> -	u64 exec_len;
> +	u64 exec_start, exec_len;
>   	int instp_mode;
>   	u32 instp_mask;
>   	int i, ret = 0;
> @@ -1194,7 +1192,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>   	if (ret)
>   		goto error;
>
> -	ret = i915_switch_context(ring, ctx);
> +	ret = i915_switch_context(ring, params->ctx);
>   	if (ret)
>   		goto error;
>
> @@ -1251,12 +1249,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>   	}
>
>   	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
> -		ret = i915_reset_gen7_sol_offsets(dev, ring);
> +		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
>   		if (ret)
>   			goto error;
>   	}
>
> -	exec_len = args->batch_len;
> +	exec_len   = args->batch_len;
> +	exec_start = params->batch_obj_vm_offset +
> +		     args->batch_start_offset;
> +
>   	if (cliprects) {
>   		for (i = 0; i < args->num_cliprects; i++) {
>   			ret = i915_emit_box(ring, &cliprects[i],
> @@ -1266,22 +1267,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>
>   			ret = ring->dispatch_execbuffer(ring,
>   							exec_start, exec_len,
> -							dispatch_flags);
> +							params->dispatch_flags);
>   			if (ret)
>   				goto error;
>   		}
>   	} else {
>   		ret = ring->dispatch_execbuffer(ring,
>   						exec_start, exec_len,
> -						dispatch_flags);
> +						params->dispatch_flags);
>   		if (ret)
>   			return ret;
>   	}
>
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
> +					    params->batch_obj);
>
>   error:
>   	kfree(cliprects);
> @@ -1351,8 +1353,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	struct intel_engine_cs *ring;
>   	struct intel_context *ctx;
>   	struct i915_address_space *vm;
> +	struct i915_execbuffer_params params_master; /* XXX: will be removed later */

params_master is not removed anywhere in this patch series. What is the 
plan for this variable?

(Update: John has in later discussions said that it will be dropped once 
the scheduler lands, also it is explained further in comment below where 
the params variable is populated. Still, the comment above could say 
"will be removed once the scheduler lands" or something. Not a big deal, 
though.)

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

> +	struct i915_execbuffer_params *params = &params_master;
>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
> -	u64 exec_start = args->batch_start_offset;
>   	u32 dispatch_flags;
>   	int ret;
>   	bool need_relocs;
> @@ -1445,6 +1448,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	else
>   		vm = &dev_priv->gtt.base;
>
> +	memset(&params_master, 0x00, sizeof(params_master));
> +
>   	eb = eb_create(args);
>   	if (eb == NULL) {
>   		i915_gem_context_unreference(ctx);
> @@ -1522,13 +1527,24 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   		if (ret)
>   			goto err;
>
> -		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
> +		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
>   	} else
> -		exec_start += i915_gem_obj_offset(batch_obj, vm);
> +		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>
> -	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
> -				      &eb->vmas, batch_obj, exec_start,
> -				      dispatch_flags);
> +	/*
> +	 * Save assorted stuff away to pass through to *_submission().
> +	 * NB: This data should be 'persistent' and not local as it will
> +	 * kept around beyond the duration of the IOCTL once the GPU
> +	 * scheduler arrives.
> +	 */
> +	params->dev                     = dev;
> +	params->file                    = file;
> +	params->ring                    = ring;
> +	params->dispatch_flags          = dispatch_flags;
> +	params->batch_obj               = batch_obj;
> +	params->ctx                     = ctx;
> +
> +	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
>
>   	/*
>   	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f14b517..f6a24e8a2 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -627,16 +627,15 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>    *
>    * Return: non-zero if the submission fails.
>    */
> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> -			       struct intel_engine_cs *ring,
> -			       struct intel_context *ctx,
> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>   			       struct drm_i915_gem_execbuffer2 *args,
> -			       struct list_head *vmas,
> -			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 dispatch_flags)
> +			       struct list_head *vmas)
>   {
> +	struct drm_device       *dev = params->dev;
> +	struct intel_engine_cs  *ring = params->ring;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
> +	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
> +	u64 exec_start;
>   	int instp_mode;
>   	u32 instp_mask;
>   	int ret;
> @@ -687,13 +686,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>   		return -EINVAL;
>   	}
>
> -	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
> +	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
>   	if (ret)
>   		return ret;
>
>   	if (ring == &dev_priv->ring[RCS] &&
>   	    instp_mode != dev_priv->relative_constants_mode) {
> -		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
> +		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
>   		if (ret)
>   			return ret;
>
> @@ -706,14 +705,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>   		dev_priv->relative_constants_mode = instp_mode;
>   	}
>
> -	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
> +	exec_start = params->batch_obj_vm_offset +
> +		     args->batch_start_offset;
> +
> +	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
>   	if (ret)
>   		return ret;
>
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
>
>   	return 0;
>   }
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index b66fc4d..3a6abce 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -76,13 +76,10 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
>
>   /* Execlists */
>   int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> -			       struct intel_engine_cs *ring,
> -			       struct intel_context *ctx,
> +struct i915_execbuffer_params;
> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>   			       struct drm_i915_gem_execbuffer2 *args,
> -			       struct list_head *vmas,
> -			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 dispatch_flags);
> +			       struct list_head *vmas);
>   u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
>
>   void intel_lrc_irq_handler(struct intel_engine_cs *ring);
>

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Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[Daniel Vetter]

On Thu, Mar 05, 2015 at 01:06:10PM +0000, John Harrison wrote:
> On 26/02/2015 02:26, Daniel Vetter wrote:
> >On Wed, Feb 25, 2015 at 11:17:00PM +0100, Daniel Vetter wrote:
> >>On Fri, Feb 13, 2015 at 11:48:14AM +0000, John.C.Harrison@Intel.com wrote:
> >>>From: John Harrison <John.C.Harrison@Intel.com>
> >>>
> >>>For some reason, the i915_add_request() call in
> >>>i915_gem_execbuffer_retire_commands() was explicitly having its return code
> >>>ignored. The _retire_commands() function itself was 'void'. Given that
> >>>_add_request() can fail without dispatching the batch buffer, this seems odd.
> >>I was so convinced we've had a commit somewhere explaining this, but
> >>apparently not.
> >>
> >>The deal is that after the dispatch call we have the batch commit and
> >>there's no going back any more, which also means we can't return an error
> >>code from the ioctl. So if you return -EIO or -ENOMEM that's a pretty bad
> >>lie and you really have to ignore that error code.
> >>
> >>Again I've tried to dig up the commit for that but that was lost in the
> >>maze of the past 5 years of changes. We've had piles of older approaches
> >>to deal with this issue:
> >>- Don't even emit a request, just mark objects as gpu dirty. Only when
> >>   waiting did we emit flushes and requests, which again again gave us a
> >>   context to return the error. This resulted in horrible latency since
> >>   flushes where wait too late and also all that book-keeping was not worth
> >>   it at all. Don't ask ;-)
> >>- Emit flushes right away, but if we fail to alloc the request set the
> >>   outstanding lazy request bit. The job of the check_olr function used in
> >>   waits was to notice that and retry the allocation.
> >>- Preallocate the request, but that still leaves the possibility that the
> >>   gpu dies. But since we've committed hangcheck will clean this up and we
> >>   can just ignore the -EIO.
> >>
> >>Given all that backstory: Why does add_request/retire_commands suddenly
> >>need to fail?
> The problem is that if add_request() fails and the request is not added to
> ring->request_list then it will be lost. As soon as the execbuff code
> returns, there is no longer a request pointer floating around so it can
> can't have add_request() called on it later. Thus the request will never be
> retired, the objects, context, etc never dereferenced, and basically lots of
> stuff will be leaked. Without the OLR to hoover up the failures, the
> add_request() call really must not be allowed to give up.

That's exactly what I mean, add_request can't fail. The other issue is
that you can't fail execbuf at the point you call add_request either any
more since we've already (at least potentially) started executing the
batch.

> >It's actually worse since it's not just -EIO but also -EINTR, returned by
> >intel_ring_begin when we're thrashing the gpu a bit too badly with
> >requests. Which means we really need to guarantee that the request is
> >completed properly, eventually since it's not just for fatal gpu hangs.
> >
> >Atm that's done by only clearing outstanding_lazy_request after we've
> >really emitted the request fully. That guarantees that even when parts of
> >the request emission to the ringbuf fails we'll retry on the next wait if
> >needed.
> >
> >A possible fix to make this infallible would be to reserve some fixed
> >amount of ringbuf credit at request creation time and then consume it
> >here. Of course we'd need checks to make sure we never use more ringspace
> >than what we reserve. To avoid massive churn we could convert
> >I915_RING_FREE_SPACE into a variable and increase it enough when
> >allocating the request. And then reduce it again at the start of
> >add_request.
> >-Daniel
> 
> I don't think you can guarantee to reserve enough space at request creation
> time. You have no idea how much space will be required by what ever piece of
> code is wanting the request. It could be a few words or it might be reams
> and reams of workaround goo. One of the scheduler patches does improve this
> and do a 'large enough' ring_begin() at the start of the execbuffer
> submission path in order to prevent out of space issues and other such
> problems half way through that could lead to a partial submission. However,
> even that is not absoluetely guaranteed 100% failure proof.
> 
> How about changing add_request() so that it can't fail. As in, the cache
> flush call and the emit request call can still failure due to running out of
> ring space, but add_request() just ignores that and keeps going anyway. That
> way the request is still correctly tracked and will be retired eventually.
> The only issues are unflushed caches and no seqno interrupt being generated.
> However, if the assumption is that another request will be submitted shortly
> (which is extremely likely if the system is busy enough to cause a failure
> during add_request!) then this will be fine. The following request will
> flush the caches and write the next seqno along to the ringbuffer. When that
> pops out, both the broken request and the new one will be considered
> complete and can be retired. The only issue is if the broken request is that
> last one to be submitted and is then waited on. In that case, you will get a
> timeout/hang as the request will never complete. Although that could be
> worked around by setting a 'failed request' flag in the ring and having the
> wait code (or even the currently redundant check_olr function) look at that
> and attempt a brand new (but empty) request submission.
> 
> Or maybe a simpler solution is to just keep a 'last failed request' pointer
> in the ring. Sort of a not-quite-OLR. If add_request() fails, it saves the
> request pointer here instead of adding it to the request list. A subsequent
> request allocation call starts by checking the 'last failed' value and
> retries the add_request() call if present. At that point it is allowed to
> fail. I guess it still needs to be done by check_olr as well to prevent a
> wait from stalling if no other requests are submitted.

Imo reserving a bit of ring space for each add_request should be solid.
Userspace uses the exact same reservation logic for adding end-of-batch
workarounds. The only thing needed to make this solid is to WARN if
add_request ends up using more ring space than what we've reserved (not
just when it actually runs out, that obviously doesn't happen often
enough for testing).

Everything else just readds olr through the backdoor, which is kinda what
we wanted to avoid from an accounting pov. Because then you have again
some random request outstanding which scoops up everything it encounters.

For the ringbuf interface itself I think we only need 3 pieces:
- ringbuf_reserve(space): Ensures there's @space available in the ring and
  then sets that as ring->reserved_space. ring_free_space needs to
  subtract that ofc. This would be in the alloc_request function.

- rinbuf_use_reserve(): sets ring->reserve_space to 0 so that
  intel_ring_begin can start eating into reserves. This would be at the
  top of add_request.

- ringbuf_check_reserve(): This would be called at the end of add_request
  and WARNs if we've used more ring space than what we've promised.
  Obviously needs some boo-keeping between use and check but that's just a
  detail. If you go with a flag instead of clearing ->reserve_space you
  can even enforce that these three functions are always called in this
  order and don't end up being nested wrongly.

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 05/53] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> For some reason, the i915_add_request() call in
> i915_gem_execbuffer_retire_commands() was explicitly having its return code
> ignored. The _retire_commands() function itself was 'void'. Given that
> _add_request() can fail without dispatching the batch buffer, this seems odd.
>
> Also shrunk the parameter list to a single structure as everything it requires
> is available in the execbuff_params object.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    5 +----
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   16 +++++++---------
>   drivers/gpu/drm/i915/intel_lrc.c           |    3 +--
>   3 files changed, 9 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index fdd63ab..b350910 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2640,10 +2640,7 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
>   			     struct drm_file *file_priv);
>   void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
>   					struct intel_engine_cs *ring);
> -void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
> -					 struct drm_file *file,
> -					 struct intel_engine_cs *ring,
> -					 struct drm_i915_gem_object *obj);
> +int i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
>   int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   				   struct drm_i915_gem_execbuffer2 *args,
>   				   struct list_head *vmas);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 93b0ef0..ca85803 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -989,17 +989,15 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
>   	}
>   }
>
> -void
> -i915_gem_execbuffer_retire_commands(struct drm_device *dev,
> -				    struct drm_file *file,
> -				    struct intel_engine_cs *ring,
> -				    struct drm_i915_gem_object *obj)
> +int
> +i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
>   {
>   	/* Unconditionally force add_request to emit a full flush. */
> -	ring->gpu_caches_dirty = true;
> +	params->ring->gpu_caches_dirty = true;
>
>   	/* Add a breadcrumb for the completion of the batch buffer */
> -	(void)__i915_add_request(ring, file, obj);
> +	return __i915_add_request(params->ring, params->file,
> +				  params->batch_obj);
>   }
>
>   static int
> @@ -1282,8 +1280,8 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
> -					    params->batch_obj);
> +
> +	ret = i915_gem_execbuffer_retire_commands(params);
>
>   error:
>   	kfree(cliprects);
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f6a24e8a2..dc474b4 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -715,9 +715,8 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
>   	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
>
> -	return 0;
> +	return i915_gem_execbuffer_retire_commands(params);
>   }
>
>   void intel_execlists_retire_requests(struct intel_engine_cs *ring)
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 55/56] drm/i915: Remove 'faked' request from LRC submission

[Daniel Vetter]

On Thu, Mar 05, 2015 at 01:57:31PM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> The LRC submission code requires a request for tracking purposes. It does not
> actually require that request to 'complete' it simply uses it for keeping hold
> of reference counts on contexts and such like.
> 
> In the case where the ring buffer is completely full, the LRC code looks for a
> pending request that would free up sufficient space upon completion and waits
> for it. If no such request can be found it resorts to simply polling the free
> space count until it is big enough. This situation should only occur when the
> entire buffer is filled with the request currently being generated. I.e., the
> user is trying to submit a single piece of work that is large than the ring
> buffer itself (which should be impossible because very large batch buffers don't
> consume any more ring buffer space). Before starting to poll, a submit call is
> made to make sure that the currently queued up work in the buffer will actually
> be submtted and thus the poll will eventually succeed.
> 
> The problem here is that the 'official' request cannot be used as that could
> lead to multiple LRC submissions being tagged to a single request structure.
> Instead, the code fakes up a private request structure and uses that.
> 
> This patch moves the faked request allocation higher up in the call stack to the
> wait code itself (rather than being at the very lowest submission level). Thus
> it is now obvious where the faked request is coming from and why it is
> necessary. The patch also replaces it with a call to the official request
> allocation code rather than attempting to duplicate that code. This becomes
> especially important in the future when the request allocation changes to
> accommodate a conversion to struct fence.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>

This is only possible if you pile up tons of olr. Since your patch series
fixes this design issue by removing olr I think we can just put a WARN_ON
in here if this ever happens and bail out with -ELOSTMYMARBLES or
something. And then rip out all this complexity.

Or do I miss something important?
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_lrc.c |   45 ++++++++++++++++++++++----------------
>  1 file changed, 26 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 65eea51..1fa36de 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -507,23 +507,11 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
>  	if (to != ring->default_context)
>  		intel_lr_context_pin(ring, to);
>  
> -	if (!request) {
> -		/*
> -		 * If there isn't a request associated with this submission,
> -		 * create one as a temporary holder.
> -		 */
> -		request = kzalloc(sizeof(*request), GFP_KERNEL);
> -		if (request == NULL)
> -			return -ENOMEM;
> -		request->ring = ring;
> -		request->ctx = to;
> -		kref_init(&request->ref);
> -		request->uniq = dev_priv->request_uniq++;
> -		i915_gem_context_reference(request->ctx);
> -	} else {
> -		i915_gem_request_reference(request);
> -		WARN_ON(to != request->ctx);
> -	}
> +	WARN_ON(!request);
> +	WARN_ON(to != request->ctx);
> +
> +	i915_gem_request_reference(request);
> +
>  	request->tail = tail;
>  
>  	intel_runtime_pm_get(dev_priv);
> @@ -677,6 +665,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>  	struct intel_engine_cs *ring = ringbuf->ring;
>  	struct drm_device *dev = ring->dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct drm_i915_gem_request *local_req;
>  	unsigned long end;
>  	int ret;
>  
> @@ -684,8 +673,23 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>  	if (ret != -ENOSPC)
>  		return ret;
>  
> -	/* Force the context submission in case we have been skipping it */
> -	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
> +	/*
> +	 * Force the context submission in case we have been skipping it.
> +	 * This requires creating a place holder request so that the LRC
> +	 * submission can be tracked. Note that if this point has been
> +	 * reached then it is the current submission that is blocking the
> +	 * driver and the only course of action is to do a partial send and
> +	 * wait for it to complete.
> +	 * Note also that because there is no space left in the ring, it is
> +	 * not possible to write the request submission prologue (which does
> +	 * things like update seqno values and trigger completion interrupts).
> +	 * Thus the request cannot be submitted via i915_add_request() and
> +	 * can not be waiting on by i915_gem_wait_request().
> +	 */
> +	ret = dev_priv->gt.alloc_request(ring, ctx, &local_req);
> +	if (ret)
> +		return ret;
> +	intel_logical_ring_advance_and_submit(ringbuf, ctx, local_req);
>  
>  	/* With GEM the hangcheck timer should kick us out of the loop,
>  	 * leaving it early runs the risk of corrupting GEM state (due
> @@ -717,6 +721,9 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>  		}
>  	} while (1);
>  
> +	/* This request is now done with and can be disposed of. */
> +	i915_gem_request_unreference(local_req);
> +
>  	return ret;
>  }
>  
> -- 
> 1.7.9.5
> 
> _______________________________________________
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Re: [PATCH 06/53] drm/i915: Wrap request allocation with a function pointer

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> In order to explicitly manage requests from creation to submission, it is
> necessary to be able to explicitly create them in the first place. This patch
> adds an indirection wrapper to the request creation function so that it can be
> called from generic code without having to worry about execlist vs legacy mode.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    2 ++
>   drivers/gpu/drm/i915/i915_gem.c         |    2 ++
>   drivers/gpu/drm/i915/intel_lrc.c        |    6 +++---
>   drivers/gpu/drm/i915/intel_lrc.h        |    2 ++
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    6 +++---
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    2 ++
>   6 files changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index b350910..87a4a2e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1908,6 +1908,8 @@ struct drm_i915_private {
>
>   	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
>   	struct {
> +		int (*alloc_request)(struct intel_engine_cs *ring,
> +				     struct intel_context *ctx);
>   		int (*do_execbuf)(struct i915_execbuffer_params *params,
>   				  struct drm_i915_gem_execbuffer2 *args,
>   				  struct list_head *vmas);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 7a0dc7c..cf959e3 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4860,11 +4860,13 @@ int i915_gem_init(struct drm_device *dev)
>   	}
>
>   	if (!i915.enable_execlists) {
> +		dev_priv->gt.alloc_request = intel_ring_alloc_request;
>   		dev_priv->gt.do_execbuf = i915_gem_ringbuffer_submission;
>   		dev_priv->gt.init_rings = i915_gem_init_rings;
>   		dev_priv->gt.cleanup_ring = intel_cleanup_ring_buffer;
>   		dev_priv->gt.stop_ring = intel_stop_ring_buffer;
>   	} else {
> +		dev_priv->gt.alloc_request = intel_logical_ring_alloc_request;
>   		dev_priv->gt.do_execbuf = intel_execlists_submission;
>   		dev_priv->gt.init_rings = intel_logical_rings_init;
>   		dev_priv->gt.cleanup_ring = intel_logical_ring_cleanup;
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index dc474b4..8628abf 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -856,8 +856,8 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
>   	}
>   }
>
> -static int logical_ring_alloc_request(struct intel_engine_cs *ring,
> -				      struct intel_context *ctx)
> +int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
> +				     struct intel_context *ctx)
>   {
>   	struct drm_i915_gem_request *request;
>   	struct drm_i915_private *dev_private = ring->dev->dev_private;
> @@ -1066,7 +1066,7 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>   		return ret;
>
>   	/* Preallocate the olr before touching the ring */
> -	ret = logical_ring_alloc_request(ring, ctx);
> +	ret = intel_logical_ring_alloc_request(ring, ctx);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 3a6abce..3cc38bd 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -36,6 +36,8 @@
>   #define RING_CONTEXT_STATUS_PTR(ring)	((ring)->mmio_base+0x3a0)
>
>   /* Logical Rings */
> +int __must_check intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
> +						  struct intel_context *ctx);
>   void intel_logical_ring_stop(struct intel_engine_cs *ring);
>   void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
>   int intel_logical_rings_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 7fd89e5..635707a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2163,8 +2163,8 @@ int intel_ring_idle(struct intel_engine_cs *ring)
>   	return i915_wait_request(req);
>   }
>
> -static int
> -intel_ring_alloc_request(struct intel_engine_cs *ring)
> +int
> +intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx)
>   {
>   	int ret;
>   	struct drm_i915_gem_request *request;
> @@ -2229,7 +2229,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>   		return ret;
>
>   	/* Preallocate the olr before touching the ring */
> -	ret = intel_ring_alloc_request(ring);
> +	ret = intel_ring_alloc_request(ring, NULL);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index ffa3724..2fd960a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -392,6 +392,8 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
>
>   int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
>   int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
> +int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
> +					  struct intel_context *ctx);
>   static inline void intel_ring_emit(struct intel_engine_cs *ring,
>   				   u32 data)
>   {
>

I find the whole idea of having virtual functions pointing to public 
functions kind of strange since it allows for two ways of accessing the 
function. If you look at the way we set up the virtual ring buffer 
functions those virtual functions are static and the set up is done in 
intel_ringbuffer.c without exposing the functions to the outside world. 
Having the set up take place in i915_gem.c forces the virtual functions 
to be public, which is not very nice. It would've been a better idea to 
pass the virtual function struct for initialization inside intel_lrc.c 
and intel_ringbuffer.c, which would have avoided making those functions 
public.

I'd like to hear some input from someone else on this on this, like e.g. 
Daniel Vetter (since he was a strong proponent of the legacy/execlist 
split, which was the underlying reason for this construct in the first 
place - not saying that it couldn't have been done in some other way, 
though).

Obviously, this is not the fault of the patch at hand and you're just 
following the already established pattern of setting up these virtual 
functions so I can't fault you for that.

Therefore I'm ok with this change (but not the construct as a whole):

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[John Harrison]

On 05/03/2015 14:44, Daniel Vetter wrote:
> On Thu, Mar 05, 2015 at 01:06:10PM +0000, John Harrison wrote:
>> On 26/02/2015 02:26, Daniel Vetter wrote:
>>> On Wed, Feb 25, 2015 at 11:17:00PM +0100, Daniel Vetter wrote:
>>>> On Fri, Feb 13, 2015 at 11:48:14AM +0000, John.C.Harrison@Intel.com wrote:
>>>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>>>
>>>>> For some reason, the i915_add_request() call in
>>>>> i915_gem_execbuffer_retire_commands() was explicitly having its return code
>>>>> ignored. The _retire_commands() function itself was 'void'. Given that
>>>>> _add_request() can fail without dispatching the batch buffer, this seems odd.
>>>> I was so convinced we've had a commit somewhere explaining this, but
>>>> apparently not.
>>>>
>>>> The deal is that after the dispatch call we have the batch commit and
>>>> there's no going back any more, which also means we can't return an error
>>>> code from the ioctl. So if you return -EIO or -ENOMEM that's a pretty bad
>>>> lie and you really have to ignore that error code.
>>>>
>>>> Again I've tried to dig up the commit for that but that was lost in the
>>>> maze of the past 5 years of changes. We've had piles of older approaches
>>>> to deal with this issue:
>>>> - Don't even emit a request, just mark objects as gpu dirty. Only when
>>>>    waiting did we emit flushes and requests, which again again gave us a
>>>>    context to return the error. This resulted in horrible latency since
>>>>    flushes where wait too late and also all that book-keeping was not worth
>>>>    it at all. Don't ask ;-)
>>>> - Emit flushes right away, but if we fail to alloc the request set the
>>>>    outstanding lazy request bit. The job of the check_olr function used in
>>>>    waits was to notice that and retry the allocation.
>>>> - Preallocate the request, but that still leaves the possibility that the
>>>>    gpu dies. But since we've committed hangcheck will clean this up and we
>>>>    can just ignore the -EIO.
>>>>
>>>> Given all that backstory: Why does add_request/retire_commands suddenly
>>>> need to fail?
>> The problem is that if add_request() fails and the request is not added to
>> ring->request_list then it will be lost. As soon as the execbuff code
>> returns, there is no longer a request pointer floating around so it can
>> can't have add_request() called on it later. Thus the request will never be
>> retired, the objects, context, etc never dereferenced, and basically lots of
>> stuff will be leaked. Without the OLR to hoover up the failures, the
>> add_request() call really must not be allowed to give up.
> That's exactly what I mean, add_request can't fail. The other issue is
> that you can't fail execbuf at the point you call add_request either any
> more since we've already (at least potentially) started executing the
> batch.
>
>>> It's actually worse since it's not just -EIO but also -EINTR, returned by
>>> intel_ring_begin when we're thrashing the gpu a bit too badly with
>>> requests. Which means we really need to guarantee that the request is
>>> completed properly, eventually since it's not just for fatal gpu hangs.
>>>
>>> Atm that's done by only clearing outstanding_lazy_request after we've
>>> really emitted the request fully. That guarantees that even when parts of
>>> the request emission to the ringbuf fails we'll retry on the next wait if
>>> needed.
>>>
>>> A possible fix to make this infallible would be to reserve some fixed
>>> amount of ringbuf credit at request creation time and then consume it
>>> here. Of course we'd need checks to make sure we never use more ringspace
>>> than what we reserve. To avoid massive churn we could convert
>>> I915_RING_FREE_SPACE into a variable and increase it enough when
>>> allocating the request. And then reduce it again at the start of
>>> add_request.
>>> -Daniel
>> I don't think you can guarantee to reserve enough space at request creation
>> time. You have no idea how much space will be required by what ever piece of
>> code is wanting the request. It could be a few words or it might be reams
>> and reams of workaround goo. One of the scheduler patches does improve this
>> and do a 'large enough' ring_begin() at the start of the execbuffer
>> submission path in order to prevent out of space issues and other such
>> problems half way through that could lead to a partial submission. However,
>> even that is not absoluetely guaranteed 100% failure proof.
>>
>> How about changing add_request() so that it can't fail. As in, the cache
>> flush call and the emit request call can still failure due to running out of
>> ring space, but add_request() just ignores that and keeps going anyway. That
>> way the request is still correctly tracked and will be retired eventually.
>> The only issues are unflushed caches and no seqno interrupt being generated.
>> However, if the assumption is that another request will be submitted shortly
>> (which is extremely likely if the system is busy enough to cause a failure
>> during add_request!) then this will be fine. The following request will
>> flush the caches and write the next seqno along to the ringbuffer. When that
>> pops out, both the broken request and the new one will be considered
>> complete and can be retired. The only issue is if the broken request is that
>> last one to be submitted and is then waited on. In that case, you will get a
>> timeout/hang as the request will never complete. Although that could be
>> worked around by setting a 'failed request' flag in the ring and having the
>> wait code (or even the currently redundant check_olr function) look at that
>> and attempt a brand new (but empty) request submission.
>>
>> Or maybe a simpler solution is to just keep a 'last failed request' pointer
>> in the ring. Sort of a not-quite-OLR. If add_request() fails, it saves the
>> request pointer here instead of adding it to the request list. A subsequent
>> request allocation call starts by checking the 'last failed' value and
>> retries the add_request() call if present. At that point it is allowed to
>> fail. I guess it still needs to be done by check_olr as well to prevent a
>> wait from stalling if no other requests are submitted.
> Imo reserving a bit of ring space for each add_request should be solid.
> Userspace uses the exact same reservation logic for adding end-of-batch
> workarounds. The only thing needed to make this solid is to WARN if
> add_request ends up using more ring space than what we've reserved (not
> just when it actually runs out, that obviously doesn't happen often
> enough for testing).
The problem is that there could be multiple requests being processed in 
parallel. This is especially true with the scheduler. Userland could 
submit a whole stream of batches that all get queued up in the 
scheduler. Only later do they get submitted to the hardware. The request 
must be allocated up front because there is no other means of tracking 
them. But reserving space at that point won't work because you either 
end up reserving massive amounts of space if the reserve is cumulative, 
or not enough if only one slot is reserved.

> Everything else just readds olr through the backdoor, which is kinda what
> we wanted to avoid from an accounting pov. Because then you have again
> some random request outstanding which scoops up everything it encounters.
Not quite.  The difference is that with something like an outstanding 
failed request rather than a lazy one, there is still the segregation of 
work. The failed request will be posted and added to the request list in 
its entirety before a new request is allocated and used for the new work.


> For the ringbuf interface itself I think we only need 3 pieces:
> - ringbuf_reserve(space): Ensures there's @space available in the ring and
>    then sets that as ring->reserved_space. ring_free_space needs to
>    subtract that ofc. This would be in the alloc_request function.
>
> - rinbuf_use_reserve(): sets ring->reserve_space to 0 so that
>    intel_ring_begin can start eating into reserves. This would be at the
>    top of add_request.
>
> - ringbuf_check_reserve(): This would be called at the end of add_request
>    and WARNs if we've used more ring space than what we've promised.
>    Obviously needs some boo-keeping between use and check but that's just a
>    detail. If you go with a flag instead of clearing ->reserve_space you
>    can even enforce that these three functions are always called in this
>    order and don't end up being nested wrongly.
>
> Cheers, Daniel

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Re: [PATCH 07/53] drm/i915: Early alloc request in execbuff

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Start of explicit request management in the execbuffer code path. This patch
> adds a call to allocate a request structure before all the actual hardware work
> is done. Thus guaranteeing that all that work is tagged by a known request. At
> present, nothing further is done with the request, the rest comes later in the
> series.
>
> The only noticable change is that failure to get a request (e.g. due to lack of
> memory) will be caught earlier in the sequence. It now occurs right at the start
> before any un-undoable work has been done.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 ++++++++++---
>   1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index ca85803..61471e9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1356,7 +1356,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>   	u32 dispatch_flags;
>   	int ret;
> -	bool need_relocs;
> +	bool need_relocs, batch_pinned = false;
>
>   	if (!i915_gem_check_execbuffer(args))
>   		return -EINVAL;
> @@ -1525,10 +1525,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   		if (ret)
>   			goto err;
>
> +		batch_pinned = true;
>   		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
>   	} else
>   		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>
> +	/* Allocate a request for this batch buffer nice and early. */
> +	ret = dev_priv->gt.alloc_request(ring, ctx);
> +	if (ret)
> +		goto err;
> +
>   	/*
>   	 * Save assorted stuff away to pass through to *_submission().
>   	 * NB: This data should be 'persistent' and not local as it will
> @@ -1544,15 +1550,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>
>   	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
>
> +err:
>   	/*
>   	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
>   	 * batch vma for correctness. For less ugly and less fragility this
>   	 * needs to be adjusted to also track the ggtt batch vma properly as
>   	 * active.
>   	 */
> -	if (dispatch_flags & I915_DISPATCH_SECURE)
> +	if (batch_pinned)
>   		i915_gem_object_ggtt_unpin(batch_obj);
> -err:
> +
>   	/* the request owns the ref now */
>   	i915_gem_context_unreference(ctx);
>   	eb_destroy(eb);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 01/53] drm/i915: Remove ironlake rc6 support

[Daniel Vetter]

On Thu, Mar 05, 2015 at 02:03:03PM +0000, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> Apparently, this has never worked reliably and is currently disabled. Also, the
> gains are not particularly impressive. Thus rather than try to keep unused code
> from decaying and having to update it for other driver changes, it was decided
> to simply remove it.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>

Queued for -next, thanks for the patch.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c  |   12 ---
>  drivers/gpu/drm/i915/i915_drv.h      |    3 -
>  drivers/gpu/drm/i915/intel_display.c |    2 -
>  drivers/gpu/drm/i915/intel_drv.h     |    1 -
>  drivers/gpu/drm/i915/intel_pm.c      |  155 ----------------------------------
>  5 files changed, 173 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 68a1e6e..18e4900 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1846,18 +1846,6 @@ static int i915_context_status(struct seq_file *m, void *unused)
>  	if (ret)
>  		return ret;
>  
> -	if (dev_priv->ips.pwrctx) {
> -		seq_puts(m, "power context ");
> -		describe_obj(m, dev_priv->ips.pwrctx);
> -		seq_putc(m, '\n');
> -	}
> -
> -	if (dev_priv->ips.renderctx) {
> -		seq_puts(m, "render context ");
> -		describe_obj(m, dev_priv->ips.renderctx);
> -		seq_putc(m, '\n');
> -	}
> -
>  	list_for_each_entry(ctx, &dev_priv->context_list, link) {
>  		if (!i915.enable_execlists &&
>  		    ctx->legacy_hw_ctx.rcs_state == NULL)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 798fa88..05f106d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1053,9 +1053,6 @@ struct intel_ilk_power_mgmt {
>  
>  	int c_m;
>  	int r_t;
> -
> -	struct drm_i915_gem_object *pwrctx;
> -	struct drm_i915_gem_object *renderctx;
>  };
>  
>  struct drm_i915_private;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5c35098..51f7ed4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13904,8 +13904,6 @@ void intel_modeset_cleanup(struct drm_device *dev)
>  
>  	intel_fbc_disable(dev);
>  
> -	ironlake_teardown_rc6(dev);
> -
>  	mutex_unlock(&dev->struct_mutex);
>  
>  	/* flush any delayed tasks or pending work */
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index f4305be..b793558 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1229,7 +1229,6 @@ void intel_enable_gt_powersave(struct drm_device *dev);
>  void intel_disable_gt_powersave(struct drm_device *dev);
>  void intel_suspend_gt_powersave(struct drm_device *dev);
>  void intel_reset_gt_powersave(struct drm_device *dev);
> -void ironlake_teardown_rc6(struct drm_device *dev);
>  void gen6_update_ring_freq(struct drm_device *dev);
>  void gen6_rps_idle(struct drm_i915_private *dev_priv);
>  void gen6_rps_boost(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 542cf68..0762572 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3539,41 +3539,6 @@ void intel_update_sprite_watermarks(struct drm_plane *plane,
>  						   pixel_size, enabled, scaled);
>  }
>  
> -static struct drm_i915_gem_object *
> -intel_alloc_context_page(struct drm_device *dev)
> -{
> -	struct drm_i915_gem_object *ctx;
> -	int ret;
> -
> -	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
> -
> -	ctx = i915_gem_alloc_object(dev, 4096);
> -	if (!ctx) {
> -		DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
> -		return NULL;
> -	}
> -
> -	ret = i915_gem_obj_ggtt_pin(ctx, 4096, 0);
> -	if (ret) {
> -		DRM_ERROR("failed to pin power context: %d\n", ret);
> -		goto err_unref;
> -	}
> -
> -	ret = i915_gem_object_set_to_gtt_domain(ctx, 1);
> -	if (ret) {
> -		DRM_ERROR("failed to set-domain on power context: %d\n", ret);
> -		goto err_unpin;
> -	}
> -
> -	return ctx;
> -
> -err_unpin:
> -	i915_gem_object_ggtt_unpin(ctx);
> -err_unref:
> -	drm_gem_object_unreference(&ctx->base);
> -	return NULL;
> -}
> -
>  /**
>   * Lock protecting IPS related data structures
>   */
> @@ -4990,124 +4955,6 @@ static void valleyview_enable_rps(struct drm_device *dev)
>  	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
>  }
>  
> -void ironlake_teardown_rc6(struct drm_device *dev)
> -{
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -
> -	if (dev_priv->ips.renderctx) {
> -		i915_gem_object_ggtt_unpin(dev_priv->ips.renderctx);
> -		drm_gem_object_unreference(&dev_priv->ips.renderctx->base);
> -		dev_priv->ips.renderctx = NULL;
> -	}
> -
> -	if (dev_priv->ips.pwrctx) {
> -		i915_gem_object_ggtt_unpin(dev_priv->ips.pwrctx);
> -		drm_gem_object_unreference(&dev_priv->ips.pwrctx->base);
> -		dev_priv->ips.pwrctx = NULL;
> -	}
> -}
> -
> -static void ironlake_disable_rc6(struct drm_device *dev)
> -{
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -
> -	if (I915_READ(PWRCTXA)) {
> -		/* Wake the GPU, prevent RC6, then restore RSTDBYCTL */
> -		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) | RCX_SW_EXIT);
> -		wait_for(((I915_READ(RSTDBYCTL) & RSX_STATUS_MASK) == RSX_STATUS_ON),
> -			 50);
> -
> -		I915_WRITE(PWRCTXA, 0);
> -		POSTING_READ(PWRCTXA);
> -
> -		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
> -		POSTING_READ(RSTDBYCTL);
> -	}
> -}
> -
> -static int ironlake_setup_rc6(struct drm_device *dev)
> -{
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -
> -	if (dev_priv->ips.renderctx == NULL)
> -		dev_priv->ips.renderctx = intel_alloc_context_page(dev);
> -	if (!dev_priv->ips.renderctx)
> -		return -ENOMEM;
> -
> -	if (dev_priv->ips.pwrctx == NULL)
> -		dev_priv->ips.pwrctx = intel_alloc_context_page(dev);
> -	if (!dev_priv->ips.pwrctx) {
> -		ironlake_teardown_rc6(dev);
> -		return -ENOMEM;
> -	}
> -
> -	return 0;
> -}
> -
> -static void ironlake_enable_rc6(struct drm_device *dev)
> -{
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
> -	bool was_interruptible;
> -	int ret;
> -
> -	/* rc6 disabled by default due to repeated reports of hanging during
> -	 * boot and resume.
> -	 */
> -	if (!intel_enable_rc6(dev))
> -		return;
> -
> -	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
> -
> -	ret = ironlake_setup_rc6(dev);
> -	if (ret)
> -		return;
> -
> -	was_interruptible = dev_priv->mm.interruptible;
> -	dev_priv->mm.interruptible = false;
> -
> -	/*
> -	 * GPU can automatically power down the render unit if given a page
> -	 * to save state.
> -	 */
> -	ret = intel_ring_begin(ring, 6);
> -	if (ret) {
> -		ironlake_teardown_rc6(dev);
> -		dev_priv->mm.interruptible = was_interruptible;
> -		return;
> -	}
> -
> -	intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);
> -	intel_ring_emit(ring, MI_SET_CONTEXT);
> -	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(dev_priv->ips.renderctx) |
> -			MI_MM_SPACE_GTT |
> -			MI_SAVE_EXT_STATE_EN |
> -			MI_RESTORE_EXT_STATE_EN |
> -			MI_RESTORE_INHIBIT);
> -	intel_ring_emit(ring, MI_SUSPEND_FLUSH);
> -	intel_ring_emit(ring, MI_NOOP);
> -	intel_ring_emit(ring, MI_FLUSH);
> -	intel_ring_advance(ring);
> -
> -	/*
> -	 * Wait for the command parser to advance past MI_SET_CONTEXT. The HW
> -	 * does an implicit flush, combined with MI_FLUSH above, it should be
> -	 * safe to assume that renderctx is valid
> -	 */
> -	ret = intel_ring_idle(ring);
> -	dev_priv->mm.interruptible = was_interruptible;
> -	if (ret) {
> -		DRM_ERROR("failed to enable ironlake power savings\n");
> -		ironlake_teardown_rc6(dev);
> -		return;
> -	}
> -
> -	I915_WRITE(PWRCTXA, i915_gem_obj_ggtt_offset(dev_priv->ips.pwrctx) | PWRCTX_EN);
> -	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
> -
> -	intel_print_rc6_info(dev, GEN6_RC_CTL_RC6_ENABLE);
> -}
> -
>  static unsigned long intel_pxfreq(u32 vidfreq)
>  {
>  	unsigned long freq;
> @@ -5655,7 +5502,6 @@ void intel_disable_gt_powersave(struct drm_device *dev)
>  
>  	if (IS_IRONLAKE_M(dev)) {
>  		ironlake_disable_drps(dev);
> -		ironlake_disable_rc6(dev);
>  	} else if (INTEL_INFO(dev)->gen >= 6) {
>  		intel_suspend_gt_powersave(dev);
>  
> @@ -5726,7 +5572,6 @@ void intel_enable_gt_powersave(struct drm_device *dev)
>  	if (IS_IRONLAKE_M(dev)) {
>  		mutex_lock(&dev->struct_mutex);
>  		ironlake_enable_drps(dev);
> -		ironlake_enable_rc6(dev);
>  		intel_init_emon(dev);
>  		mutex_unlock(&dev->struct_mutex);
>  	} else if (INTEL_INFO(dev)->gen >= 6) {
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 08/53] drm/i915: Update alloc_request to return the allocated request

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The alloc_request() function does not actually return the newly allocated
> request. Instead, it must be pulled from ring->outstanding_lazy_request. This
> patch fixes this so that code can create a request and start using it knowing
> exactly which request it actually owns.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
>   drivers/gpu/drm/i915/intel_lrc.c           |   13 +++++++++----
>   drivers/gpu/drm/i915/intel_lrc.h           |    3 ++-
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   14 ++++++++++----
>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    3 ++-
>   6 files changed, 27 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 87a4a2e..90223f208 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1909,7 +1909,8 @@ struct drm_i915_private {
>   	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
>   	struct {
>   		int (*alloc_request)(struct intel_engine_cs *ring,
> -				     struct intel_context *ctx);
> +				     struct intel_context *ctx,
> +				     struct drm_i915_gem_request **req_out);
>   		int (*do_execbuf)(struct i915_execbuffer_params *params,
>   				  struct drm_i915_gem_execbuffer2 *args,
>   				  struct list_head *vmas);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 61471e9..37dcc6f 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1353,6 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	struct i915_address_space *vm;
>   	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
>   	struct i915_execbuffer_params *params = &params_master;
> +	struct drm_i915_gem_request *request;

Please initialize request to NULL. If you accidentally dereference it 
before it is allocated (seeing as the allocation is several pages down 
from here) you get a null pointer exception, which is a clear indication 
that you did something stupid. Otherwise it's not clear what will happen 
(sure, page fault, but null pointer exception is a better failure 
indication).

Thanks,
Tomas

>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>   	u32 dispatch_flags;
>   	int ret;
> @@ -1531,7 +1532,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>
>   	/* Allocate a request for this batch buffer nice and early. */
> -	ret = dev_priv->gt.alloc_request(ring, ctx);
> +	ret = dev_priv->gt.alloc_request(ring, ctx, &request);
>   	if (ret)
>   		goto err;
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 8628abf..c3c783f 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -857,13 +857,17 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
>   }
>
>   int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
> -				     struct intel_context *ctx)
> +				     struct intel_context *ctx,
> +				     struct drm_i915_gem_request **req_out)
>   {
>   	struct drm_i915_gem_request *request;
>   	struct drm_i915_private *dev_private = ring->dev->dev_private;
>   	int ret;
>
> -	if (ring->outstanding_lazy_request)
> +	if (!req_out)
> +		return -EINVAL;
> +
> +	if ((*req_out = ring->outstanding_lazy_request) != NULL)
>   		return 0;
>
>   	request = kzalloc(sizeof(*request), GFP_KERNEL);
> @@ -898,7 +902,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
>   	i915_gem_context_reference(request->ctx);
>   	request->ringbuf = ctx->engine[ring->id].ringbuf;
>
> -	ring->outstanding_lazy_request = request;
> +	*req_out = ring->outstanding_lazy_request = request;
>   	return 0;
>   }
>
> @@ -1051,6 +1055,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
>   int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>   			     struct intel_context *ctx, int num_dwords)
>   {
> +	struct drm_i915_gem_request *req;
>   	struct intel_engine_cs *ring = ringbuf->ring;
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -1066,7 +1071,7 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>   		return ret;
>
>   	/* Preallocate the olr before touching the ring */
> -	ret = intel_logical_ring_alloc_request(ring, ctx);
> +	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 3cc38bd..77de8ac 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -37,7 +37,8 @@
>
>   /* Logical Rings */
>   int __must_check intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
> -						  struct intel_context *ctx);
> +						  struct intel_context *ctx,
> +						  struct drm_i915_gem_request **req_out);
>   void intel_logical_ring_stop(struct intel_engine_cs *ring);
>   void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
>   int intel_logical_rings_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 635707a..1a9f884 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2164,13 +2164,18 @@ int intel_ring_idle(struct intel_engine_cs *ring)
>   }
>
>   int
> -intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx)
> +intel_ring_alloc_request(struct intel_engine_cs *ring,
> +			 struct intel_context *ctx,
> +			 struct drm_i915_gem_request **req_out)
>   {
>   	int ret;
>   	struct drm_i915_gem_request *request;
>   	struct drm_i915_private *dev_private = ring->dev->dev_private;
>
> -	if (ring->outstanding_lazy_request)
> +	if (!req_out)
> +		return -EINVAL;
> +
> +	if ((*req_out = ring->outstanding_lazy_request) != NULL)
>   		return 0;
>
>   	request = kzalloc(sizeof(*request), GFP_KERNEL);
> @@ -2188,7 +2193,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx
>   		return ret;
>   	}
>
> -	ring->outstanding_lazy_request = request;
> +	*req_out = ring->outstanding_lazy_request = request;
>   	return 0;
>   }
>
> @@ -2216,6 +2221,7 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring,
>   int intel_ring_begin(struct intel_engine_cs *ring,
>   		     int num_dwords)
>   {
> +	struct drm_i915_gem_request *req;
>   	struct drm_i915_private *dev_priv = ring->dev->dev_private;
>   	int ret;
>
> @@ -2229,7 +2235,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>   		return ret;
>
>   	/* Preallocate the olr before touching the ring */
> -	ret = intel_ring_alloc_request(ring, NULL);
> +	ret = intel_ring_alloc_request(ring, NULL, &req);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 2fd960a..4f8a14a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -393,7 +393,8 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
>   int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
>   int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
>   int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
> -					  struct intel_context *ctx);
> +					  struct intel_context *ctx,
> +					  struct drm_i915_gem_request **req_out);
>   static inline void intel_ring_emit(struct intel_engine_cs *ring,
>   				   u32 data)
>   {
>

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Re: [PATCH 01/53] drm/i915: Remove ironlake rc6 support

[John Harrison]

On 05/03/2015 15:22, Daniel Vetter wrote:
> On Thu, Mar 05, 2015 at 02:03:03PM +0000, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> Apparently, this has never worked reliably and is currently disabled. Also, the
>> gains are not particularly impressive. Thus rather than try to keep unused code
>> from decaying and having to update it for other driver changes, it was decided
>> to simply remove it.
>>
>> For: VIZ-5115
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Queued for -next, thanks for the patch.
> -Daniel

Can you hold off merging any of the other patches in the series for the 
moment. Tomas Elf is currently posting review comments, some with R-B 
some with change requests. Some of the re-work either for his comments 
or for yours causes changes which ripple through a number of the patches 
in the series. So I would like to repost the whole set once all the 
comments have been addressed. Otherwise, it all just gets far too messy 
as to which patches have or haven't been updated, what needs re-merging, 
which version is which, etc.

Thanks,
John.

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Re: [PATCH 09/53] drm/i915: Add request to execbuf params and add explicit cleanup

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Rather than just having a local request variable in the execbuff code, the
> request pointer is now stored in the execbuff params structure. Also added
> explicit cleanup of the request (plus wiping the OLR to match) in the error
> case. This means that the execbuff code is no longer dependent upon the OLR
> keeping track of the request so as to not leak it when things do go wrong. Note
> that in the success case, the i915_add_request() at the end of the submission
> function will tidy up the request and clear the OLR.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    1 +
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 +++++++++++--
>   2 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 90223f208..678b190 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1653,6 +1653,7 @@ struct i915_execbuffer_params {
>   	struct intel_engine_cs          *ring;
>   	struct drm_i915_gem_object      *batch_obj;
>   	struct intel_context            *ctx;
> +	struct drm_i915_gem_request     *request;
>   };
>
>   struct drm_i915_private {
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 37dcc6f..10462f6 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1353,7 +1353,6 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	struct i915_address_space *vm;
>   	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
>   	struct i915_execbuffer_params *params = &params_master;
> -	struct drm_i915_gem_request *request;
>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>   	u32 dispatch_flags;
>   	int ret;
> @@ -1532,7 +1531,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>
>   	/* Allocate a request for this batch buffer nice and early. */
> -	ret = dev_priv->gt.alloc_request(ring, ctx, &request);
> +	ret = dev_priv->gt.alloc_request(ring, ctx, &params->request);
>   	if (ret)
>   		goto err;
>
> @@ -1565,6 +1564,16 @@ err:
>   	i915_gem_context_unreference(ctx);
>   	eb_destroy(eb);
>
> +	/*
> +	 * If the request was created but not successfully submitted then it
> +	 * must be freed again. If it was submitted then it is being tracked
> +	 * on the active request list and no clean up is required here.
> +	 */
> +	if (ret && params->request) {
> +		i915_gem_request_unreference(params->request);
> +		ring->outstanding_lazy_request = NULL;
> +	}
> +
>   	mutex_unlock(&dev->struct_mutex);
>
>   pre_mutex_err:
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 10/53] drm/i915: Update the dispatch tracepoint to use params->request

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated a couple of trace points to use the now cached request pointer rather
> than extracting it from the ring.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 10462f6..883cabd 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1277,7 +1277,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   			return ret;
>   	}
>
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
> +	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
>
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index c3c783f..c42af08 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -712,7 +712,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
>   	if (ret)
>   		return ret;
>
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
> +	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
>
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 08/53] drm/i915: Update alloc_request to return the allocated request

[John Harrison]

On 05/03/2015 15:27, Tomas Elf wrote:
> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> The alloc_request() function does not actually return the newly 
>> allocated
>> request. Instead, it must be pulled from 
>> ring->outstanding_lazy_request. This
>> patch fixes this so that code can create a request and start using it 
>> knowing
>> exactly which request it actually owns.
>>
>> For: VIZ-5115
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
>>   drivers/gpu/drm/i915/intel_lrc.c           |   13 +++++++++----
>>   drivers/gpu/drm/i915/intel_lrc.h           |    3 ++-
>>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   14 ++++++++++----
>>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    3 ++-
>>   6 files changed, 27 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index 87a4a2e..90223f208 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1909,7 +1909,8 @@ struct drm_i915_private {
>>       /* Abstract the submission mechanism (legacy ringbuffer or 
>> execlists) away */
>>       struct {
>>           int (*alloc_request)(struct intel_engine_cs *ring,
>> -                     struct intel_context *ctx);
>> +                     struct intel_context *ctx,
>> +                     struct drm_i915_gem_request **req_out);
>>           int (*do_execbuf)(struct i915_execbuffer_params *params,
>>                     struct drm_i915_gem_execbuffer2 *args,
>>                     struct list_head *vmas);
>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
>> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> index 61471e9..37dcc6f 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> @@ -1353,6 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, 
>> void *data,
>>       struct i915_address_space *vm;
>>       struct i915_execbuffer_params params_master; /* XXX: will be 
>> removed later */
>>       struct i915_execbuffer_params *params = &params_master;
>> +    struct drm_i915_gem_request *request;
>
> Please initialize request to NULL. If you accidentally dereference it 
> before it is allocated (seeing as the allocation is several pages down 
> from here) you get a null pointer exception, which is a clear 
> indication that you did something stupid. Otherwise it's not clear 
> what will happen (sure, page fault, but null pointer exception is a 
> better failure indication).

That should generate a 'use before assignment' compiler warning.

>
> Thanks,
> Tomas
>
>>       const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>>       u32 dispatch_flags;
>>       int ret;
>> @@ -1531,7 +1532,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, 
>> void *data,
>>           params->batch_obj_vm_offset = 
>> i915_gem_obj_offset(batch_obj, vm);
>>
>>       /* Allocate a request for this batch buffer nice and early. */
>> -    ret = dev_priv->gt.alloc_request(ring, ctx);
>> +    ret = dev_priv->gt.alloc_request(ring, ctx, &request);
>>       if (ret)
>>           goto err;
>>
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
>> b/drivers/gpu/drm/i915/intel_lrc.c
>> index 8628abf..c3c783f 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> @@ -857,13 +857,17 @@ void intel_lr_context_unpin(struct 
>> intel_engine_cs *ring,
>>   }
>>
>>   int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
>> -                     struct intel_context *ctx)
>> +                     struct intel_context *ctx,
>> +                     struct drm_i915_gem_request **req_out)
>>   {
>>       struct drm_i915_gem_request *request;
>>       struct drm_i915_private *dev_private = ring->dev->dev_private;
>>       int ret;
>>
>> -    if (ring->outstanding_lazy_request)
>> +    if (!req_out)
>> +        return -EINVAL;
>> +
>> +    if ((*req_out = ring->outstanding_lazy_request) != NULL)
>>           return 0;
>>
>>       request = kzalloc(sizeof(*request), GFP_KERNEL);
>> @@ -898,7 +902,7 @@ int intel_logical_ring_alloc_request(struct 
>> intel_engine_cs *ring,
>>       i915_gem_context_reference(request->ctx);
>>       request->ringbuf = ctx->engine[ring->id].ringbuf;
>>
>> -    ring->outstanding_lazy_request = request;
>> +    *req_out = ring->outstanding_lazy_request = request;
>>       return 0;
>>   }
>>
>> @@ -1051,6 +1055,7 @@ static int logical_ring_prepare(struct 
>> intel_ringbuffer *ringbuf,
>>   int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>>                    struct intel_context *ctx, int num_dwords)
>>   {
>> +    struct drm_i915_gem_request *req;
>>       struct intel_engine_cs *ring = ringbuf->ring;
>>       struct drm_device *dev = ring->dev;
>>       struct drm_i915_private *dev_priv = dev->dev_private;
>> @@ -1066,7 +1071,7 @@ int intel_logical_ring_begin(struct 
>> intel_ringbuffer *ringbuf,
>>           return ret;
>>
>>       /* Preallocate the olr before touching the ring */
>> -    ret = intel_logical_ring_alloc_request(ring, ctx);
>> +    ret = intel_logical_ring_alloc_request(ring, ctx, &req);
>>       if (ret)
>>           return ret;
>>
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.h 
>> b/drivers/gpu/drm/i915/intel_lrc.h
>> index 3cc38bd..77de8ac 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.h
>> +++ b/drivers/gpu/drm/i915/intel_lrc.h
>> @@ -37,7 +37,8 @@
>>
>>   /* Logical Rings */
>>   int __must_check intel_logical_ring_alloc_request(struct 
>> intel_engine_cs *ring,
>> -                          struct intel_context *ctx);
>> +                          struct intel_context *ctx,
>> +                          struct drm_i915_gem_request **req_out);
>>   void intel_logical_ring_stop(struct intel_engine_cs *ring);
>>   void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
>>   int intel_logical_rings_init(struct drm_device *dev);
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
>> b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index 635707a..1a9f884 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -2164,13 +2164,18 @@ int intel_ring_idle(struct intel_engine_cs 
>> *ring)
>>   }
>>
>>   int
>> -intel_ring_alloc_request(struct intel_engine_cs *ring, struct 
>> intel_context *ctx)
>> +intel_ring_alloc_request(struct intel_engine_cs *ring,
>> +             struct intel_context *ctx,
>> +             struct drm_i915_gem_request **req_out)
>>   {
>>       int ret;
>>       struct drm_i915_gem_request *request;
>>       struct drm_i915_private *dev_private = ring->dev->dev_private;
>>
>> -    if (ring->outstanding_lazy_request)
>> +    if (!req_out)
>> +        return -EINVAL;
>> +
>> +    if ((*req_out = ring->outstanding_lazy_request) != NULL)
>>           return 0;
>>
>>       request = kzalloc(sizeof(*request), GFP_KERNEL);
>> @@ -2188,7 +2193,7 @@ intel_ring_alloc_request(struct intel_engine_cs 
>> *ring, struct intel_context *ctx
>>           return ret;
>>       }
>>
>> -    ring->outstanding_lazy_request = request;
>> +    *req_out = ring->outstanding_lazy_request = request;
>>       return 0;
>>   }
>>
>> @@ -2216,6 +2221,7 @@ static int __intel_ring_prepare(struct 
>> intel_engine_cs *ring,
>>   int intel_ring_begin(struct intel_engine_cs *ring,
>>                int num_dwords)
>>   {
>> +    struct drm_i915_gem_request *req;
>>       struct drm_i915_private *dev_priv = ring->dev->dev_private;
>>       int ret;
>>
>> @@ -2229,7 +2235,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>>           return ret;
>>
>>       /* Preallocate the olr before touching the ring */
>> -    ret = intel_ring_alloc_request(ring, NULL);
>> +    ret = intel_ring_alloc_request(ring, NULL, &req);
>>       if (ret)
>>           return ret;
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
>> b/drivers/gpu/drm/i915/intel_ringbuffer.h
>> index 2fd960a..4f8a14a 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
>> @@ -393,7 +393,8 @@ void intel_cleanup_ring_buffer(struct 
>> intel_engine_cs *ring);
>>   int __must_check intel_ring_begin(struct intel_engine_cs *ring, int 
>> n);
>>   int __must_check intel_ring_cacheline_align(struct intel_engine_cs 
>> *ring);
>>   int __must_check intel_ring_alloc_request(struct intel_engine_cs 
>> *ring,
>> -                      struct intel_context *ctx);
>> +                      struct intel_context *ctx,
>> +                      struct drm_i915_gem_request **req_out);
>>   static inline void intel_ring_emit(struct intel_engine_cs *ring,
>>                      u32 data)
>>   {
>>
>

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Re: [PATCH 11/53] drm/i915: Update move_to_gpu() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The plan is to pass requests around as the basic submission tracking structure
> rather than rings and contexts. This patch updates the move_to_gpu() code paths.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   10 +++++-----
>   drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++------
>   2 files changed, 9 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 883cabd..da1e232 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -828,7 +828,7 @@ err:
>   }
>
>   static int
> -i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
> +i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
>   				struct list_head *vmas)
>   {
>   	struct i915_vma *vma;
> @@ -838,7 +838,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
>
>   	list_for_each_entry(vma, vmas, exec_list) {
>   		struct drm_i915_gem_object *obj = vma->obj;
> -		ret = i915_gem_object_sync(obj, ring);
> +		ret = i915_gem_object_sync(obj, req->ring);
>   		if (ret)
>   			return ret;
>
> @@ -849,7 +849,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
>   	}
>
>   	if (flush_chipset)
> -		i915_gem_chipset_flush(ring->dev);
> +		i915_gem_chipset_flush(req->ring->dev);
>
>   	if (flush_domains & I915_GEM_DOMAIN_GTT)
>   		wmb();
> @@ -857,7 +857,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
>   	/* Unconditionally invalidate gpu caches and ensure that we do flush
>   	 * any residual writes from the previous batch.
>   	 */
> -	return intel_ring_invalidate_all_caches(ring);
> +	return intel_ring_invalidate_all_caches(req->ring);
>   }
>
>   static bool
> @@ -1186,7 +1186,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   		}
>   	}
>
> -	ret = i915_gem_execbuffer_move_to_gpu(ring, vmas);
> +	ret = i915_gem_execbuffer_move_to_gpu(params->request, vmas);
>   	if (ret)
>   		goto error;
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index c42af08..efe970f 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -578,11 +578,9 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
>   	return 0;
>   }
>
> -static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
> -				 struct intel_context *ctx,
> +static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
>   				 struct list_head *vmas)
>   {
> -	struct intel_engine_cs *ring = ringbuf->ring;
>   	struct i915_vma *vma;
>   	uint32_t flush_domains = 0;
>   	bool flush_chipset = false;
> @@ -591,7 +589,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>   	list_for_each_entry(vma, vmas, exec_list) {
>   		struct drm_i915_gem_object *obj = vma->obj;
>
> -		ret = i915_gem_object_sync(obj, ring);
> +		ret = i915_gem_object_sync(obj, req->ring);
>   		if (ret)
>   			return ret;
>
> @@ -607,7 +605,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>   	/* Unconditionally invalidate gpu caches and ensure that we do flush
>   	 * any residual writes from the previous batch.
>   	 */
> -	return logical_ring_invalidate_all_caches(ringbuf, ctx);
> +	return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx);
>   }
>
>   /**
> @@ -686,7 +684,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
>   		return -EINVAL;
>   	}
>
> -	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
> +	ret = execlists_move_to_gpu(params->request, vmas);
>   	if (ret)
>   		return ret;
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 12/53] drm/i915: Update execbuffer_move_to_active() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The plan is to pass requests around as the basic submission tracking structure
> rather than rings and contexts. This patch updates the
> execbuffer_move_to_active() code path.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    2 +-
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    6 +++---
>   drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
>   3 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 678b190..68d6dec 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2643,7 +2643,7 @@ int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
>   int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
>   			     struct drm_file *file_priv);
>   void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
> -					struct intel_engine_cs *ring);
> +					struct drm_i915_gem_request *req);
>   int i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
>   int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   				   struct drm_i915_gem_execbuffer2 *args,
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index da1e232..f7c19bc 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -950,9 +950,9 @@ i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
>
>   void
>   i915_gem_execbuffer_move_to_active(struct list_head *vmas,
> -				   struct intel_engine_cs *ring)
> +				   struct drm_i915_gem_request *req)
>   {
> -	struct drm_i915_gem_request *req = intel_ring_get_request(ring);
> +	struct intel_engine_cs *ring = i915_gem_request_get_ring(req);
>   	struct i915_vma *vma;
>
>   	list_for_each_entry(vma, vmas, exec_list) {
> @@ -1279,7 +1279,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>
>   	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
>
> -	i915_gem_execbuffer_move_to_active(vmas, ring);
> +	i915_gem_execbuffer_move_to_active(vmas, params->request);
>
>   	ret = i915_gem_execbuffer_retire_commands(params);
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index efe970f..bc3809e 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -712,7 +712,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
>
>   	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
>
> -	i915_gem_execbuffer_move_to_active(vmas, ring);
> +	i915_gem_execbuffer_move_to_active(vmas, params->request);
>
>   	return i915_gem_execbuffer_retire_commands(params);
>   }
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[Daniel Vetter]

On Thu, Mar 05, 2015 at 03:06:42PM +0000, John Harrison wrote:
> On 05/03/2015 14:44, Daniel Vetter wrote:
> >Imo reserving a bit of ring space for each add_request should be solid.
> >Userspace uses the exact same reservation logic for adding end-of-batch
> >workarounds. The only thing needed to make this solid is to WARN if
> >add_request ends up using more ring space than what we've reserved (not
> >just when it actually runs out, that obviously doesn't happen often
> >enough for testing).
> The problem is that there could be multiple requests being processed in
> parallel. This is especially true with the scheduler. Userland could submit
> a whole stream of batches that all get queued up in the scheduler. Only
> later do they get submitted to the hardware. The request must be allocated
> up front because there is no other means of tracking them. But reserving
> space at that point won't work because you either end up reserving massive
> amounts of space if the reserve is cumulative, or not enough if only one
> slot is reserved.

At least with execlist we don't have that problem really since writing the
ringbuffer is done synchronously and directly.

For the legacy scheduler I expect that we won't do any of the ringbuf
writes directly and instead that's all done by the scheduler
asynchronously.

So this should just be an issue while we are converting to the scheduler
or on platforms that will never have one. And imo the request ringbuf
reservation is the solution with the simplest impact on the design.

> >Everything else just readds olr through the backdoor, which is kinda what
> >we wanted to avoid from an accounting pov. Because then you have again
> >some random request outstanding which scoops up everything it encounters.
> Not quite.  The difference is that with something like an outstanding failed
> request rather than a lazy one, there is still the segregation of work. The
> failed request will be posted and added to the request list in its entirety
> before a new request is allocated and used for the new work.

Well history lesson, but that's exactly how olr started out. Then the
hydra grew heads to no end. That's why I don't want to go down this road
again, since I've been on that trip the past 3 years ;-) And since your
motivation for olr light is exactly the one I provided 3 years ago to get
my patch in I think history repeating is likely.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 06/53] drm/i915: Wrap request allocation with a function pointer

[Daniel Vetter]

On Thu, Mar 05, 2015 at 03:01:21PM +0000, Tomas Elf wrote:
> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> >From: John Harrison <John.C.Harrison@Intel.com>
> >
> >In order to explicitly manage requests from creation to submission, it is
> >necessary to be able to explicitly create them in the first place. This patch
> >adds an indirection wrapper to the request creation function so that it can be
> >called from generic code without having to worry about execlist vs legacy mode.
> >
> >For: VIZ-5115
> >Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >---
> >  drivers/gpu/drm/i915/i915_drv.h         |    2 ++
> >  drivers/gpu/drm/i915/i915_gem.c         |    2 ++
> >  drivers/gpu/drm/i915/intel_lrc.c        |    6 +++---
> >  drivers/gpu/drm/i915/intel_lrc.h        |    2 ++
> >  drivers/gpu/drm/i915/intel_ringbuffer.c |    6 +++---
> >  drivers/gpu/drm/i915/intel_ringbuffer.h |    2 ++
> >  6 files changed, 14 insertions(+), 6 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >index b350910..87a4a2e 100644
> >--- a/drivers/gpu/drm/i915/i915_drv.h
> >+++ b/drivers/gpu/drm/i915/i915_drv.h
> >@@ -1908,6 +1908,8 @@ struct drm_i915_private {
> >
> >  	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
> >  	struct {
> >+		int (*alloc_request)(struct intel_engine_cs *ring,
> >+				     struct intel_context *ctx);
> >  		int (*do_execbuf)(struct i915_execbuffer_params *params,
> >  				  struct drm_i915_gem_execbuffer2 *args,
> >  				  struct list_head *vmas);
> >diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> >index 7a0dc7c..cf959e3 100644
> >--- a/drivers/gpu/drm/i915/i915_gem.c
> >+++ b/drivers/gpu/drm/i915/i915_gem.c
> >@@ -4860,11 +4860,13 @@ int i915_gem_init(struct drm_device *dev)
> >  	}
> >
> >  	if (!i915.enable_execlists) {
> >+		dev_priv->gt.alloc_request = intel_ring_alloc_request;
> >  		dev_priv->gt.do_execbuf = i915_gem_ringbuffer_submission;
> >  		dev_priv->gt.init_rings = i915_gem_init_rings;
> >  		dev_priv->gt.cleanup_ring = intel_cleanup_ring_buffer;
> >  		dev_priv->gt.stop_ring = intel_stop_ring_buffer;
> >  	} else {
> >+		dev_priv->gt.alloc_request = intel_logical_ring_alloc_request;
> >  		dev_priv->gt.do_execbuf = intel_execlists_submission;
> >  		dev_priv->gt.init_rings = intel_logical_rings_init;
> >  		dev_priv->gt.cleanup_ring = intel_logical_ring_cleanup;
> >diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> >index dc474b4..8628abf 100644
> >--- a/drivers/gpu/drm/i915/intel_lrc.c
> >+++ b/drivers/gpu/drm/i915/intel_lrc.c
> >@@ -856,8 +856,8 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
> >  	}
> >  }
> >
> >-static int logical_ring_alloc_request(struct intel_engine_cs *ring,
> >-				      struct intel_context *ctx)
> >+int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
> >+				     struct intel_context *ctx)
> >  {
> >  	struct drm_i915_gem_request *request;
> >  	struct drm_i915_private *dev_private = ring->dev->dev_private;
> >@@ -1066,7 +1066,7 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
> >  		return ret;
> >
> >  	/* Preallocate the olr before touching the ring */
> >-	ret = logical_ring_alloc_request(ring, ctx);
> >+	ret = intel_logical_ring_alloc_request(ring, ctx);
> >  	if (ret)
> >  		return ret;
> >
> >diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> >index 3a6abce..3cc38bd 100644
> >--- a/drivers/gpu/drm/i915/intel_lrc.h
> >+++ b/drivers/gpu/drm/i915/intel_lrc.h
> >@@ -36,6 +36,8 @@
> >  #define RING_CONTEXT_STATUS_PTR(ring)	((ring)->mmio_base+0x3a0)
> >
> >  /* Logical Rings */
> >+int __must_check intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
> >+						  struct intel_context *ctx);
> >  void intel_logical_ring_stop(struct intel_engine_cs *ring);
> >  void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
> >  int intel_logical_rings_init(struct drm_device *dev);
> >diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >index 7fd89e5..635707a 100644
> >--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> >+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >@@ -2163,8 +2163,8 @@ int intel_ring_idle(struct intel_engine_cs *ring)
> >  	return i915_wait_request(req);
> >  }
> >
> >-static int
> >-intel_ring_alloc_request(struct intel_engine_cs *ring)
> >+int
> >+intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx)
> >  {
> >  	int ret;
> >  	struct drm_i915_gem_request *request;
> >@@ -2229,7 +2229,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
> >  		return ret;
> >
> >  	/* Preallocate the olr before touching the ring */
> >-	ret = intel_ring_alloc_request(ring);
> >+	ret = intel_ring_alloc_request(ring, NULL);
> >  	if (ret)
> >  		return ret;
> >
> >diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >index ffa3724..2fd960a 100644
> >--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> >+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >@@ -392,6 +392,8 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
> >
> >  int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
> >  int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
> >+int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
> >+					  struct intel_context *ctx);
> >  static inline void intel_ring_emit(struct intel_engine_cs *ring,
> >  				   u32 data)
> >  {
> >
> 
> I find the whole idea of having virtual functions pointing to public
> functions kind of strange since it allows for two ways of accessing the
> function. If you look at the way we set up the virtual ring buffer functions
> those virtual functions are static and the set up is done in
> intel_ringbuffer.c without exposing the functions to the outside world.
> Having the set up take place in i915_gem.c forces the virtual functions to
> be public, which is not very nice. It would've been a better idea to pass
> the virtual function struct for initialization inside intel_lrc.c and
> intel_ringbuffer.c, which would have avoided making those functions public.
> 
> I'd like to hear some input from someone else on this on this, like e.g.
> Daniel Vetter (since he was a strong proponent of the legacy/execlist split,
> which was the underlying reason for this construct in the first place - not
> saying that it couldn't have been done in some other way, though).

Yeah generally the pattern is to have one public _init function per file
which sets up the vfunc tables as needed. Follow-up patches would be
really nice though indeed.
-Daniel

> 
> Obviously, this is not the fault of the patch at hand and you're just
> following the already established pattern of setting up these virtual
> functions so I can't fault you for that.
> 
> Therefore I'm ok with this change (but not the construct as a whole):
> 
> Reviewed-by: Tomas Elf <tomas.elf@intel.com>
> 
> Thanks,
> Tomas
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 14/53] drm/i915: Update pin_to_display_plane() to do explicit request management

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Added explicit creation creation and submission of the request structure to the

Nitpick: "creation creation"

> display object pinning code. This removes any reliance on the OLR keeping track
> of the request and the unknown randomness that can ensue with other work
> becoming part of the same request.
>
> v2: Added semaphore enabled check to prevent allocating a pointless request
> structure in the case where the sync just calls wait_rendering().
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c |   21 ++++++++++++++++++---
>   1 file changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4c29177..5897d54 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3943,9 +3943,24 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>   	int ret;
>
>   	if (pipelined != i915_gem_request_get_ring(obj->last_read_req)) {
> -		ret = i915_gem_object_sync(obj, pipelined);
> -		if (ret)
> -			return ret;
> +		if (!pipelined || !i915_semaphore_is_enabled(obj->base.dev)) {
> +			ret = i915_gem_object_wait_rendering(obj, false);
> +		} else {

The call to i915_gem_object_wait_rendering() was taken from the 
implementation of i915_gem_object_sync() below. Ripping out code from 
the function you're calling just to do it in advance is not very nice. 
Just imagine a scenario where the i915_gem_object_sync() implementation 
were to change but the code outside the function would not. We need to 
figure out a better way of doing this. In fact, allocating and managing 
a request that never gets to be used inside the i915_gem_object_sync() 
function could be a better way to go since it poses less potential 
future problem even though it's more wasteful. But there are probably 
better ways of doing this.

Thanks,
Tomas

> +			struct drm_i915_private *dev_priv = pipelined->dev->dev_private;
> +			struct drm_i915_gem_request *req;
> +
> +			ret = dev_priv->gt.alloc_request(pipelined, pipelined->default_context, &req);
> +			if (ret)
> +				return ret;
> +
> +			ret = i915_gem_object_sync(obj, req->ring);
> +			if (ret)
> +				return ret;
> +
> +			ret = i915_add_request_no_flush(req->ring);
> +			if (ret)
> +				return ret;
> +		}
>   	}
>
>   	/* Mark the pin_display early so that we account for the
>
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Re: [PATCH 14/53] drm/i915: Update pin_to_display_plane() to do explicit request management

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Added explicit creation creation and submission of the request structure to the
> display object pinning code. This removes any reliance on the OLR keeping track
> of the request and the unknown randomness that can ensue with other work
> becoming part of the same request.
>
> v2: Added semaphore enabled check to prevent allocating a pointless request
> structure in the case where the sync just calls wait_rendering().
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c |   21 ++++++++++++++++++---
>   1 file changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4c29177..5897d54 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3943,9 +3943,24 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>   	int ret;
>
>   	if (pipelined != i915_gem_request_get_ring(obj->last_read_req)) {
> -		ret = i915_gem_object_sync(obj, pipelined);
> -		if (ret)
> -			return ret;
> +		if (!pipelined || !i915_semaphore_is_enabled(obj->base.dev)) {
> +			ret = i915_gem_object_wait_rendering(obj, false);

... Also, the ret value here is never checked and returned. It's 
overwritten a few lines further down.

Thanks,
Tomas

> +		} else {
> +			struct drm_i915_private *dev_priv = pipelined->dev->dev_private;
> +			struct drm_i915_gem_request *req;
> +
> +			ret = dev_priv->gt.alloc_request(pipelined, pipelined->default_context, &req);
> +			if (ret)
> +				return ret;
> +
> +			ret = i915_gem_object_sync(obj, req->ring);
> +			if (ret)
> +				return ret;
> +
> +			ret = i915_add_request_no_flush(req->ring);
> +			if (ret)
> +				return ret;
> +		}
>   	}
>
>   	/* Mark the pin_display early so that we account for the
>

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Re: [PATCH 15/53] drm/i915: Update i915_gem_object_sync() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The plan is to pass requests around as the basic submission tracking structure
> rather than rings and contexts. This patch updates the i915_gem_object_sync()
> code path.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    2 +-
>   drivers/gpu/drm/i915/i915_gem.c            |    7 ++++---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
>   4 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 375d4f9..bfd7b47 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2744,7 +2744,7 @@ static inline void i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
>
>   int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
>   int i915_gem_object_sync(struct drm_i915_gem_object *obj,
> -			 struct intel_engine_cs *to);
> +			 struct drm_i915_gem_request *to_req);
>   void i915_vma_move_to_active(struct i915_vma *vma,
>   			     struct intel_engine_cs *ring);
>   int i915_gem_dumb_create(struct drm_file *file_priv,
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 5897d54..c5b9bc7 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2956,7 +2956,7 @@ out:
>    * i915_gem_object_sync - sync an object to a ring.
>    *
>    * @obj: object which may be in use on another ring.
> - * @to: ring we wish to use the object on. May be NULL.
> + * @to_req: request we wish to use the object for. May be NULL.
>    *
>    * This code is meant to abstract object synchronization with the GPU.
>    * Calling with NULL implies synchronizing the object with the CPU
> @@ -2966,8 +2966,9 @@ out:
>    */
>   int
>   i915_gem_object_sync(struct drm_i915_gem_object *obj,
> -		     struct intel_engine_cs *to)
> +		     struct drm_i915_gem_request *to_req)
>   {
> +	struct intel_engine_cs *to = to_req ? to_req->ring : NULL;
>   	struct intel_engine_cs *from;
>   	u32 seqno;
>   	int ret, idx;
> @@ -3953,7 +3954,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>   			if (ret)
>   				return ret;
>
> -			ret = i915_gem_object_sync(obj, req->ring);
> +			ret = i915_gem_object_sync(obj, req);
>   			if (ret)
>   				return ret;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 76f6dcf..2cd0579 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -838,7 +838,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
>
>   	list_for_each_entry(vma, vmas, exec_list) {
>   		struct drm_i915_gem_object *obj = vma->obj;
> -		ret = i915_gem_object_sync(obj, req->ring);
> +		ret = i915_gem_object_sync(obj, req);
>   		if (ret)
>   			return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 4b42346..0d88e9c 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -589,7 +589,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
>   	list_for_each_entry(vma, vmas, exec_list) {
>   		struct drm_i915_gem_object *obj = vma->obj;
>
> -		ret = i915_gem_object_sync(obj, req->ring);
> +		ret = i915_gem_object_sync(obj, req);
>   		if (ret)
>   			return ret;
>
>

This seems to be just fine but if the requests of any of the existing 
i915_gem_object_sync() call sites were to be null they would cause local 
null pointer exceptions in the calling functions even though 
i915_gem_object_sync() itself supports an incoming null request. There 
does not seem to be any call sites in the driver that actually passes or 
supports passing null requests into i915_gem_object_sync(). Does the 
driver do that anywhere today or how does that fit in?

Aside from that open question:

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 16/53] drm/i915: Update i915_gpu_idle() to manage its own request

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Added explicit request creation and submission to the GPU idle code path.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c |   18 +++++++++++++++++-
>   1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index c5b9bc7..51f719c 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3114,11 +3114,27 @@ int i915_gpu_idle(struct drm_device *dev)
>   	/* Flush everything onto the inactive list. */
>   	for_each_ring(ring, dev_priv, i) {
>   		if (!i915.enable_execlists) {
> -			ret = i915_switch_context(ring, ring->default_context);
> +			struct drm_i915_gem_request *req;
> +
> +			ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
>   			if (ret)
>   				return ret;
> +
> +			ret = i915_switch_context(req->ring, ring->default_context);
> +			if (ret) {
> +				i915_gem_request_unreference(req);
> +				return ret;
> +			}
> +
> +			ret = i915_add_request_no_flush(req->ring);
> +			if (ret) {
> +				i915_gem_request_unreference(req);
> +				return ret;
> +			}
>   		}
>
> +		WARN_ON(ring->outstanding_lazy_request);
> +
>   		ret = intel_ring_idle(ring);
>   		if (ret)
>   			return ret;
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 17/53] drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The i915_gem_init_hw() function calls a bunch of smaller initialisation
> functions. Multiple of which have generic sections and per ring sections. This
> means multiple passes are done over the rings. Each pass writes data to the ring
> which floats around in that ring's OLR until some random point in the future
> when an add_request() is done by some random other piece of code.
>
> This patch breaks i915_ppgtt_init_hw() in two with the per ring initialisation
> now being done in i915_ppgtt_init_ring(). The ring looping is now done at the
> top level in i915_gem_init_hw().
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c     |   25 +++++++++++++++++++------
>   drivers/gpu/drm/i915/i915_gem_gtt.c |   25 ++++++++++++-------------
>   drivers/gpu/drm/i915/i915_gem_gtt.h |    1 +
>   3 files changed, 32 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 51f719c..9bc60d7 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4844,19 +4844,32 @@ i915_gem_init_hw(struct drm_device *dev)
>   	 */
>   	init_unused_rings(dev);
>
> +	ret = i915_ppgtt_init_hw(dev);
> +	if (ret) {
> +		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
> +		return ret;
> +	}
> +
> +	/* Need to do basic initialisation of all rings first: */

Nitpick: No need for trailing colon in comment

>   	for_each_ring(ring, dev_priv, i) {
>   		ret = ring->init_hw(ring);
>   		if (ret)
>   			return ret;
>   	}
>
> -	for (i = 0; i < NUM_L3_SLICES(dev); i++)
> -		i915_gem_l3_remap(&dev_priv->ring[RCS], i);
> +	/* Now it is safe to go back round and do everything else: */

Nitpick: No need for trailing colon in comment

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas


> +	for_each_ring(ring, dev_priv, i) {
> +		if (ring->id == RCS) {
> +			for (i = 0; i < NUM_L3_SLICES(dev); i++)
> +				i915_gem_l3_remap(ring, i);
> +		}
>
> -	ret = i915_ppgtt_init_hw(dev);
> -	if (ret && ret != -EIO) {
> -		DRM_ERROR("PPGTT enable failed %d\n", ret);
> -		i915_gem_cleanup_ringbuffer(dev);
> +		ret = i915_ppgtt_init_ring(ring);
> +		if (ret && ret != -EIO) {
> +			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
> +			i915_gem_cleanup_ringbuffer(dev);
> +			return ret;
> +		}
>   	}
>
>   	ret = i915_gem_context_enable(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index e54b2a0..428d2f6 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1206,11 +1206,6 @@ int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
>
>   int i915_ppgtt_init_hw(struct drm_device *dev)
>   {
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_engine_cs *ring;
> -	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
> -	int i, ret = 0;
> -
>   	/* In the case of execlists, PPGTT is enabled by the context descriptor
>   	 * and the PDPs are contained within the context itself.  We don't
>   	 * need to do anything here. */
> @@ -1229,16 +1224,20 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
>   	else
>   		MISSING_CASE(INTEL_INFO(dev)->gen);
>
> -	if (ppgtt) {
> -		for_each_ring(ring, dev_priv, i) {
> -			ret = ppgtt->switch_mm(ppgtt, ring);
> -			if (ret != 0)
> -				return ret;
> -		}
> -	}
> +	return 0;
> +}
>
> -	return ret;
> +int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
> +{
> +	struct drm_i915_private *dev_priv = ring->dev->dev_private;
> +	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
> +
> +	if (!ppgtt)
> +		return 0;
> +
> +	return ppgtt->switch_mm(ppgtt, ring);
>   }
> +
>   struct i915_hw_ppgtt *
>   i915_ppgtt_create(struct drm_device *dev, struct drm_i915_file_private *fpriv)
>   {
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index 8f76990..5a6cef9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -300,6 +300,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
>
>   int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
>   int i915_ppgtt_init_hw(struct drm_device *dev);
> +int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
>   void i915_ppgtt_release(struct kref *kref);
>   struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
>   					struct drm_i915_file_private *fpriv);
>

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Re: [PATCH 18/53] drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The start of day context initialisation code in i915_gem_context_enable() loops
> over each ring and calls the legacy switch context or the execlist init context
> code as appropriate.
>
> This patch moves the ring looping out of that function in to the top level
> caller i915_gem_init_hw(). This means the a single pass can be made over all
> rings doing the PPGTT, L3 remap and context initialisation of each ring
> altogether.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    2 +-
>   drivers/gpu/drm/i915/i915_gem.c         |   18 ++++++++++-------
>   drivers/gpu/drm/i915/i915_gem_context.c |   32 +++++++++++--------------------
>   3 files changed, 23 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index bfd7b47..653c82d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2989,7 +2989,7 @@ int __must_check i915_gem_context_init(struct drm_device *dev);
>   void i915_gem_context_fini(struct drm_device *dev);
>   void i915_gem_context_reset(struct drm_device *dev);
>   int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
> -int i915_gem_context_enable(struct drm_i915_private *dev_priv);
> +int i915_gem_context_enable(struct intel_engine_cs *ring);
>   void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
>   int i915_switch_context(struct intel_engine_cs *ring,
>   			struct intel_context *to);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 9bc60d7..5850991 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4844,6 +4844,8 @@ i915_gem_init_hw(struct drm_device *dev)
>   	 */
>   	init_unused_rings(dev);
>
> +	BUG_ON(!dev_priv->ring[RCS].default_context);
> +
>   	ret = i915_ppgtt_init_hw(dev);
>   	if (ret) {
>   		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
> @@ -4859,6 +4861,8 @@ i915_gem_init_hw(struct drm_device *dev)
>
>   	/* Now it is safe to go back round and do everything else: */
>   	for_each_ring(ring, dev_priv, i) {
> +		WARN_ON(!ring->default_context);
> +
>   		if (ring->id == RCS) {
>   			for (i = 0; i < NUM_L3_SLICES(dev); i++)
>   				i915_gem_l3_remap(ring, i);
> @@ -4870,17 +4874,17 @@ i915_gem_init_hw(struct drm_device *dev)
>   			i915_gem_cleanup_ringbuffer(dev);
>   			return ret;
>   		}
> -	}
>
> -	ret = i915_gem_context_enable(dev_priv);
> -	if (ret && ret != -EIO) {
> -		DRM_ERROR("Context enable failed %d\n", ret);
> -		i915_gem_cleanup_ringbuffer(dev);
> +		ret = i915_gem_context_enable(ring);
> +		if (ret && ret != -EIO) {
> +			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
> +			i915_gem_cleanup_ringbuffer(dev);
>
> -		return ret;
> +			return ret;
> +		}
>   	}
>
> -	return ret;
> +	return 0;
>   }
>
>   int i915_gem_init(struct drm_device *dev)
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 8603bf4..dd83d61 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -403,32 +403,22 @@ void i915_gem_context_fini(struct drm_device *dev)
>   	i915_gem_context_unreference(dctx);
>   }
>
> -int i915_gem_context_enable(struct drm_i915_private *dev_priv)
> +int i915_gem_context_enable(struct intel_engine_cs *ring)
>   {
> -	struct intel_engine_cs *ring;
> -	int ret, i;
> -
> -	BUG_ON(!dev_priv->ring[RCS].default_context);
> +	int ret;
>
>   	if (i915.enable_execlists) {
> -		for_each_ring(ring, dev_priv, i) {
> -			if (ring->init_context) {
> -				ret = ring->init_context(ring,
> -						ring->default_context);
> -				if (ret) {
> -					DRM_ERROR("ring init context: %d\n",
> -							ret);
> -					return ret;
> -				}
> -			}
> -		}
> +		if (ring->init_context == NULL)
> +			return 0;
>
> +		ret = ring->init_context(ring, ring->default_context);
>   	} else
> -		for_each_ring(ring, dev_priv, i) {
> -			ret = i915_switch_context(ring, ring->default_context);
> -			if (ret)
> -				return ret;
> -		}
> +		ret = i915_switch_context(ring, ring->default_context);
> +
> +	if (ret) {
> +		DRM_ERROR("ring init context: %d\n", ret);
> +		return ret;
> +	}
>
>   	return 0;
>   }
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 19/53] drm/i915: Add explicit request management to i915_gem_init_hw()

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that a single per ring loop is being done for all the different
> intialisation steps in i915_gem_init_hw(), it is possible to add proper request
> management as well. The last remaining issue is that the context enable call
> eventually ends up within *_render_state_init() and this does it's own private
> _i915_add_request() call.
>
> This patch adds explicit request creation and submission to the top level loop
> and removes the add_request() from deep within the sub-functions. Note that the
> old add_request() call was being passed a batch object. This is now explicitly
> written to the request object instead. A warning has also been added to
> i915_add_request() to ensure that there is never an attempt to add two batch
> objects to a single request - e.g. because render_state_init() was called during
> execbuffer processing.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h              |    3 ++-
>   drivers/gpu/drm/i915/i915_gem.c              |   18 ++++++++++++++++++
>   drivers/gpu/drm/i915/i915_gem_render_state.c |    3 ++-
>   drivers/gpu/drm/i915/intel_lrc.c             |    8 +++-----
>   4 files changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 653c82d..ea0da6b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2158,7 +2158,8 @@ struct drm_i915_gem_request {
>   	struct intel_context *ctx;
>   	struct intel_ringbuffer *ringbuf;
>
> -	/** Batch buffer related to this request if any */
> +	/** Batch buffer related to this request if any (used for
> +	    error state dump only) */
>   	struct drm_i915_gem_object *batch_obj;
>
>   	/** Time at which this request was emitted, in jiffies. */
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 5850991..efed49a 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2467,6 +2467,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
>   	 * inactive_list and lose its active reference. Hence we do not need
>   	 * to explicitly hold another reference here.
>   	 */
> +	WARN_ON(request->batch_obj && obj);
>   	request->batch_obj = obj;
>
>   	if (!i915.enable_execlists) {
> @@ -4861,8 +4862,16 @@ i915_gem_init_hw(struct drm_device *dev)
>
>   	/* Now it is safe to go back round and do everything else: */
>   	for_each_ring(ring, dev_priv, i) {
> +		struct drm_i915_gem_request *req;
> +
>   		WARN_ON(!ring->default_context);
>
> +		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
> +		if (ret) {
> +			i915_gem_cleanup_ringbuffer(dev);
> +			return ret;
> +		}
> +
>   		if (ring->id == RCS) {
>   			for (i = 0; i < NUM_L3_SLICES(dev); i++)
>   				i915_gem_l3_remap(ring, i);
> @@ -4871,6 +4880,7 @@ i915_gem_init_hw(struct drm_device *dev)
>   		ret = i915_ppgtt_init_ring(ring);
>   		if (ret && ret != -EIO) {
>   			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
> +			i915_gem_request_unreference(req);
>   			i915_gem_cleanup_ringbuffer(dev);
>   			return ret;
>   		}
> @@ -4878,8 +4888,16 @@ i915_gem_init_hw(struct drm_device *dev)
>   		ret = i915_gem_context_enable(ring);
>   		if (ret && ret != -EIO) {
>   			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
> +			i915_gem_request_unreference(req);
>   			i915_gem_cleanup_ringbuffer(dev);
> +			return ret;
> +		}
>
> +		ret = i915_add_request_no_flush(ring);
> +		if (ret) {
> +			DRM_ERROR("Add request ring #%d failed: %d\n", i, ret);
> +			i915_gem_request_unreference(req);
> +			i915_gem_cleanup_ringbuffer(dev);
>   			return ret;
>   		}
>   	}
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index aba39c3..989476e 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -173,7 +173,8 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
>
>   	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
>
> -	ret = __i915_add_request(ring, NULL, so.obj, true);
> +	WARN_ON(ring->outstanding_lazy_request->batch_obj);
> +	ring->outstanding_lazy_request->batch_obj = so.obj;
>   	/* __i915_add_request moves object to inactive if it fails */
>   out:
>   	i915_gem_render_state_fini(&so);
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 0d88e9c..dff7829 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1350,8 +1350,6 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
>   {
>   	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
>   	struct render_state so;
> -	struct drm_i915_file_private *file_priv = ctx->file_priv;
> -	struct drm_file *file = file_priv ? file_priv->file : NULL;
>   	int ret;
>
>   	ret = i915_gem_render_state_prepare(ring, &so);
> @@ -1370,9 +1368,9 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
>
>   	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
>
> -	ret = __i915_add_request(ring, file, so.obj, true);
> -	/* intel_logical_ring_add_request moves object to inactive if it
> -	 * fails */
> +	WARN_ON(ring->outstanding_lazy_request->batch_obj);
> +	ring->outstanding_lazy_request->batch_obj = so.obj;
> +	/* __i915_add_request moves object to inactive if it fails */
>   out:
>   	i915_gem_render_state_fini(&so);
>   	return ret;
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 20/53] drm/i915: Update ppgtt_init_ring() & context_enable() to take requests

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The final step in removing the OLR from i915_gem_init_hw() is to pass the newly
> allocated request structure in to each step rather than passing a ring
> structure. This patch updates both i915_ppgtt_init_ring() and
> i915_gem_context_enable() to take request pointers.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    2 +-
>   drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
>   drivers/gpu/drm/i915/i915_gem_context.c |    7 ++++---
>   drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
>   drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
>   5 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ea0da6b..618a841 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2990,7 +2990,7 @@ int __must_check i915_gem_context_init(struct drm_device *dev);
>   void i915_gem_context_fini(struct drm_device *dev);
>   void i915_gem_context_reset(struct drm_device *dev);
>   int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
> -int i915_gem_context_enable(struct intel_engine_cs *ring);
> +int i915_gem_context_enable(struct drm_i915_gem_request *req);
>   void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
>   int i915_switch_context(struct intel_engine_cs *ring,
>   			struct intel_context *to);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index efed49a..379bf44 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4877,7 +4877,7 @@ i915_gem_init_hw(struct drm_device *dev)
>   				i915_gem_l3_remap(ring, i);
>   		}
>
> -		ret = i915_ppgtt_init_ring(ring);
> +		ret = i915_ppgtt_init_ring(req);
>   		if (ret && ret != -EIO) {
>   			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
>   			i915_gem_request_unreference(req);
> @@ -4885,7 +4885,7 @@ i915_gem_init_hw(struct drm_device *dev)
>   			return ret;
>   		}
>
> -		ret = i915_gem_context_enable(ring);
> +		ret = i915_gem_context_enable(req);
>   		if (ret && ret != -EIO) {
>   			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
>   			i915_gem_request_unreference(req);
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index dd83d61..04d2a20 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -403,17 +403,18 @@ void i915_gem_context_fini(struct drm_device *dev)
>   	i915_gem_context_unreference(dctx);
>   }
>
> -int i915_gem_context_enable(struct intel_engine_cs *ring)
> +int i915_gem_context_enable(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	if (i915.enable_execlists) {
>   		if (ring->init_context == NULL)
>   			return 0;
>
> -		ret = ring->init_context(ring, ring->default_context);
> +		ret = ring->init_context(req->ring, ring->default_context);
>   	} else
> -		ret = i915_switch_context(ring, ring->default_context);
> +		ret = i915_switch_context(req->ring, ring->default_context);

You don't have to make any more changes to this function aside from 
setting up the ring variable at the top. ring = req->ring and if you 
don't change these lines the will by default use ring like they always did.

>
>   	if (ret) {
>   		DRM_ERROR("ring init context: %d\n", ret);
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 428d2f6..cd00080 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1227,15 +1227,15 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
>   	return 0;
>   }
>
> -int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
> +int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
>   {
> -	struct drm_i915_private *dev_priv = ring->dev->dev_private;
> +	struct drm_i915_private *dev_priv = req->ring->dev->dev_private;
>   	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
>
>   	if (!ppgtt)
>   		return 0;
>
> -	return ppgtt->switch_mm(ppgtt, ring);
> +	return ppgtt->switch_mm(ppgtt, req->ring);
>   }
>

If you want to uphold a pattern that you've already established you 
could just make a single change in the function above by setting up ring 
= req->ring and then make no more changes to the function body. In this 
case it's one new line vs. two changes of existing code so it's doesn't 
make that much of a difference but it is nice to stick to patterns. 
Also, you wouldn't have to make a 4-level indirection 
(req->ring->dev->dev_private), only a 3-level one.

>   struct i915_hw_ppgtt *
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index 5a6cef9..e7e202f 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -300,7 +300,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
>
>   int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
>   int i915_ppgtt_init_hw(struct drm_device *dev);
> -int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
> +int i915_ppgtt_init_ring(struct drm_i915_gem_request *req);
>   void i915_ppgtt_release(struct kref *kref);
>   struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
>   					struct drm_i915_file_private *fpriv);
>

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Re: [PATCH 21/53] drm/i915: Set context in request from creation even in legacy mode

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> In execlist mode, the context object pointer is written in to the request
> structure (and reference counted) at the point of request creation. In legacy
> mode, this only happens inside i915_add_request().
>
> This patch updates the legacy code path to match the execlist version. This
> allows all the intermediate code between request creation and request submission
> to get at the context object given only a request structure. Thus negating the
> need to pass context pointers here, there and everywhere.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c         |    9 +--------
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    2 ++
>   2 files changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 379bf44..64288e3 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2470,14 +2470,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
>   	WARN_ON(request->batch_obj && obj);
>   	request->batch_obj = obj;
>
> -	if (!i915.enable_execlists) {
> -		/* Hold a reference to the current context so that we can inspect
> -		 * it later in case a hangcheck error event fires.
> -		 */
> -		request->ctx = ring->last_context;
> -		if (request->ctx)
> -			i915_gem_context_reference(request->ctx);
> -	}
> +	WARN_ON(request->ctx != ring->last_context);

__i915_add_request is gen agnostic but ring->last_context is only used 
in legacy mode. Maybe you want to check for !i915.enable_execlists just 
like in the block you removed above?

>
>   	request->emitted_jiffies = jiffies;
>   	list_add_tail(&request->list, &ring->request_list);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 1a9f884..05a7e33 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2186,6 +2186,8 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
>   	request->ring = ring;
>   	request->ringbuf = ring->buffer;
>   	request->uniq = dev_private->request_uniq++;
> +	request->ctx = ctx;
> +	i915_gem_context_reference(request->ctx);
>
>   	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
>   	if (ret) {
>

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Re: [PATCH 22/53] drm/i915: Update i915_switch_context() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that the request is guaranteed to specify the context, it is possible to
> update the context switch code to use requests rather than ring and context
> pairs. This patch updates i915_switch_context() accordingly.
>
> Also removed the warning that the request's context must match the last context
> switch's context. As the context switch now gets the context object from the
> request structure, there is no longer any scope for the two to become out of
> step.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    3 +--
>   drivers/gpu/drm/i915/i915_gem.c            |    4 +---
>   drivers/gpu/drm/i915/i915_gem_context.c    |   19 +++++++++----------
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
>   4 files changed, 12 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 618a841..e9cc343 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2992,8 +2992,7 @@ void i915_gem_context_reset(struct drm_device *dev);
>   int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
>   int i915_gem_context_enable(struct drm_i915_gem_request *req);
>   void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
> -int i915_switch_context(struct intel_engine_cs *ring,
> -			struct intel_context *to);
> +int i915_switch_context(struct drm_i915_gem_request *req);
>   struct intel_context *
>   i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
>   void i915_gem_context_free(struct kref *ctx_ref);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 64288e3..0c7e1bd 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2470,8 +2470,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
>   	WARN_ON(request->batch_obj && obj);
>   	request->batch_obj = obj;
>
> -	WARN_ON(request->ctx != ring->last_context);
> -
>   	request->emitted_jiffies = jiffies;
>   	list_add_tail(&request->list, &ring->request_list);
>   	request->file_priv = NULL;
> @@ -3114,7 +3112,7 @@ int i915_gpu_idle(struct drm_device *dev)
>   			if (ret)
>   				return ret;
>
> -			ret = i915_switch_context(req->ring, ring->default_context);
> +			ret = i915_switch_context(req);
>   			if (ret) {
>   				i915_gem_request_unreference(req);
>   				return ret;
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 04d2a20..b326f8d 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -414,7 +414,7 @@ int i915_gem_context_enable(struct drm_i915_gem_request *req)
>
>   		ret = ring->init_context(req->ring, ring->default_context);
>   	} else
> -		ret = i915_switch_context(req->ring, ring->default_context);
> +		ret = i915_switch_context(req);
>
>   	if (ret) {
>   		DRM_ERROR("ring init context: %d\n", ret);
> @@ -693,8 +693,7 @@ unpin_out:
>
>   /**
>    * i915_switch_context() - perform a GPU context switch.
> - * @ring: ring for which we'll execute the context switch
> - * @to: the context to switch to
> + * @req: request for which we'll execute the context switch
>    *
>    * The context life cycle is simple. The context refcount is incremented and
>    * decremented by 1 and create and destroy. If the context is in use by the GPU,
> @@ -705,25 +704,25 @@ unpin_out:
>    * switched by writing to the ELSP and requests keep a reference to their
>    * context.
>    */
> -int i915_switch_context(struct intel_engine_cs *ring,
> -			struct intel_context *to)
> +int i915_switch_context(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = ring->dev->dev_private;
>
>   	WARN_ON(i915.enable_execlists);
>   	WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
>
> -	if (to->legacy_hw_ctx.rcs_state == NULL) { /* We have the fake context */
> -		if (to != ring->last_context) {
> -			i915_gem_context_reference(to);
> +	if (req->ctx->legacy_hw_ctx.rcs_state == NULL) { /* We have the fake context */
> +		if (req->ctx != ring->last_context) {
> +			i915_gem_context_reference(req->ctx);
>   			if (ring->last_context)
>   				i915_gem_context_unreference(ring->last_context);
> -			ring->last_context = to;
> +			ring->last_context = req->ctx;
>   		}
>   		return 0;
>   	}
>
> -	return do_switch(ring, to);
> +	return do_switch(req->ring, req->ctx);
>   }
>
>   static bool contexts_enabled(struct drm_device *dev)
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 2cd0579..1e2fc80 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1190,7 +1190,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   	if (ret)
>   		goto error;
>
> -	ret = i915_switch_context(ring, params->ctx);
> +	ret = i915_switch_context(params->request);
>   	if (ret)
>   		goto error;
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 23/53] drm/i915: Update do_switch() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated do_switch() to take a request pointer instead of a ring/context pair.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_context.c |   17 +++++++++--------
>   1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index b326f8d..eedb994 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -556,9 +556,10 @@ mi_set_context(struct intel_engine_cs *ring,
>   	return ret;
>   }
>
> -static int do_switch(struct intel_engine_cs *ring,
> -		     struct intel_context *to)
> +static int do_switch(struct drm_i915_gem_request *req)
>   {
> +	struct intel_context *to = req->ctx;
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = ring->dev->dev_private;
>   	struct intel_context *from = ring->last_context;
>   	u32 hw_flags = 0;
> @@ -591,7 +592,7 @@ static int do_switch(struct intel_engine_cs *ring,
>
>   	if (to->ppgtt) {
>   		trace_switch_mm(ring, to);
> -		ret = to->ppgtt->switch_mm(to->ppgtt, ring);
> +		ret = to->ppgtt->switch_mm(to->ppgtt, req->ring);

No need for this change, ring = req->ring has already been set up. Just 
leave the code as it was.

>   		if (ret)
>   			goto unpin_out;
>   	}
> @@ -627,7 +628,7 @@ static int do_switch(struct intel_engine_cs *ring,
>   	if (!to->legacy_hw_ctx.initialized || i915_gem_context_is_default(to))
>   		hw_flags |= MI_RESTORE_INHIBIT;
>
> -	ret = mi_set_context(ring, to, hw_flags);
> +	ret = mi_set_context(req->ring, to, hw_flags);

No need for this change, ring = req->ring has already been set up. Just 
leave the code as it was.

>   	if (ret)
>   		goto unpin_out;
>
> @@ -635,7 +636,7 @@ static int do_switch(struct intel_engine_cs *ring,
>   		if (!(to->remap_slice & (1<<i)))
>   			continue;
>
> -		ret = i915_gem_l3_remap(ring, i);
> +		ret = i915_gem_l3_remap(req->ring, i);

No need for this change, ring = req->ring has already been set up. Just 
leave the code as it was.

>   		/* If it failed, try again next round */
>   		if (ret)
>   			DRM_DEBUG_DRIVER("L3 remapping failed\n");
> @@ -651,7 +652,7 @@ static int do_switch(struct intel_engine_cs *ring,
>   	 */
>   	if (from != NULL) {
>   		from->legacy_hw_ctx.rcs_state->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
> -		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), ring);
> +		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req->ring);

No need for this change, ring = req->ring has already been set up. Just 
leave the code as it was.

>   		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
>   		 * whole damn pipeline, we don't need to explicitly mark the
>   		 * object dirty. The only exception is that the context must be
> @@ -677,7 +678,7 @@ done:
>
>   	if (uninitialized) {
>   		if (ring->init_context) {
> -			ret = ring->init_context(ring, to);
> +			ret = ring->init_context(req->ring, to);

No need for this change, ring = req->ring has already been set up. Just 
leave the code as it was.

>   			if (ret)
>   				DRM_ERROR("ring init context: %d\n", ret);
>   		}
> @@ -722,7 +723,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
>   		return 0;
>   	}
>
> -	return do_switch(req->ring, req->ctx);
> +	return do_switch(req);
>   }
>
>   static bool contexts_enabled(struct drm_device *dev)
>

Thanks,
Tomas
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Re: [PATCH 24/53] drm/i915: Update deferred context creation to do explicit request management

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> In execlist mode, context initialisation is deferred until first use of the
> given context. This is because execlist mode has many more contexts than legacy
> mode and many are never actually used. Previously, the initialisation commands
> were written to the ring and tagged with some random request structure via the
> OLR. This seemed to be causing a null pointer deference bug under certain
> circumstances (BZ:40112).
>
> This patch adds explicit request creation and submission to the deferred
> initialisation code path. Thus removing any reliance on or randomness caused by
> the OLR.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c |   17 ++++++++++++++++-
>   1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index dff7829..4bcb70e 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1849,6 +1849,7 @@ static void lrc_setup_hardware_status_page(struct intel_engine_cs *ring,
>   int intel_lr_context_deferred_create(struct intel_context *ctx,
>   				     struct intel_engine_cs *ring)
>   {
> +	struct drm_i915_private *dev_priv = ring->dev->dev_private;
>   	const bool is_global_default_ctx = (ctx == ring->default_context);
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_gem_object *ctx_obj;
> @@ -1929,13 +1930,27 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
>   		lrc_setup_hardware_status_page(ring, ctx_obj);
>   	else if (ring->id == RCS && !ctx->rcs_initialized) {
>   		if (ring->init_context) {
> -			ret = ring->init_context(ring, ctx);
> +			struct drm_i915_gem_request *req;
> +
> +			ret = dev_priv->gt.alloc_request(ring, ctx, &req);
> +			if (ret)
> +				return ret;
> +
> +			ret = ring->init_context(req->ring, ctx);
>   			if (ret) {
>   				DRM_ERROR("ring init context: %d\n", ret);
> +				i915_gem_request_unreference(req);
>   				ctx->engine[ring->id].ringbuf = NULL;
>   				ctx->engine[ring->id].state = NULL;
>   				goto error;
>   			}
> +
> +			ret = i915_add_request_no_flush(req->ring);
> +			if (ret) {
> +				DRM_ERROR("ring init context: %d\n", ret);
> +				i915_gem_request_unreference(req);
> +				goto error;
> +			}
>   		}
>
>   		ctx->rcs_initialized = true;
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas


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Re: [PATCH 25/53] drm/i915: Update init_context() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that everything above has been converted to use requests, it is possible to
> update init_context() to take a request pointer instead of a ring/context pair.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_context.c |    4 ++--
>   drivers/gpu/drm/i915/intel_lrc.c        |    9 ++++-----
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    7 +++----
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
>   4 files changed, 10 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index eedb994..938cd26 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -412,7 +412,7 @@ int i915_gem_context_enable(struct drm_i915_gem_request *req)
>   		if (ring->init_context == NULL)
>   			return 0;
>
> -		ret = ring->init_context(req->ring, ring->default_context);
> +		ret = ring->init_context(req);
>   	} else
>   		ret = i915_switch_context(req);
>
> @@ -678,7 +678,7 @@ done:
>
>   	if (uninitialized) {
>   		if (ring->init_context) {
> -			ret = ring->init_context(req->ring, to);
> +			ret = ring->init_context(req);
>   			if (ret)
>   				DRM_ERROR("ring init context: %d\n", ret);
>   		}
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 4bcb70e..cbec056 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1376,16 +1376,15 @@ out:
>   	return ret;
>   }
>
> -static int gen8_init_rcs_context(struct intel_engine_cs *ring,
> -		       struct intel_context *ctx)
> +static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
>   {
>   	int ret;
>
> -	ret = intel_logical_ring_workarounds_emit(ring, ctx);
> +	ret = intel_logical_ring_workarounds_emit(req->ring, req->ctx);
>   	if (ret)
>   		return ret;
>
> -	return intel_lr_context_render_state_init(ring, ctx);
> +	return intel_lr_context_render_state_init(req->ring, req->ctx);
>   }
>
>   /**
> @@ -1936,7 +1935,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
>   			if (ret)
>   				return ret;
>
> -			ret = ring->init_context(req->ring, ctx);
> +			ret = ring->init_context(req);
>   			if (ret) {
>   				DRM_ERROR("ring init context: %d\n", ret);
>   				i915_gem_request_unreference(req);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 05a7e33..26964a2 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -775,16 +775,15 @@ static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
>   	return 0;
>   }
>
> -static int intel_rcs_ctx_init(struct intel_engine_cs *ring,
> -			      struct intel_context *ctx)
> +static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
>   {
>   	int ret;
>
> -	ret = intel_ring_workarounds_emit(ring, ctx);
> +	ret = intel_ring_workarounds_emit(req->ring, req->ctx);
>   	if (ret != 0)
>   		return ret;
>
> -	ret = i915_gem_render_state_init(ring);
> +	ret = i915_gem_render_state_init(req->ring);
>   	if (ret)
>   		DRM_ERROR("init render state: %d\n", ret);
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 4f8a14a..c32f5a1 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -143,8 +143,7 @@ struct  intel_engine_cs {
>
>   	int		(*init_hw)(struct intel_engine_cs *ring);
>
> -	int		(*init_context)(struct intel_engine_cs *ring,
> -					struct intel_context *ctx);
> +	int		(*init_context)(struct drm_i915_gem_request *req);
>
>   	void		(*write_tail)(struct intel_engine_cs *ring,
>   				      u32 value);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas


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Re: [PATCH 26/53] drm/i915: Update render_state_init() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the two render_state_init() functions to take a request pointer instead
> of a ring. This removes their reliance on the OLR.
>
> v2: Rebased to newer tree.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_render_state.c |   18 +++++++++---------
>   drivers/gpu/drm/i915/i915_gem_render_state.h |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c             |   22 ++++++++++------------
>   drivers/gpu/drm/i915/intel_ringbuffer.c      |    2 +-
>   4 files changed, 21 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index 989476e..85cc746 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -152,29 +152,29 @@ int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
>   	return 0;
>   }
>
> -int i915_gem_render_state_init(struct intel_engine_cs *ring)
> +int i915_gem_render_state_init(struct drm_i915_gem_request *req)
>   {
>   	struct render_state so;
>   	int ret;
>
> -	ret = i915_gem_render_state_prepare(ring, &so);
> +	ret = i915_gem_render_state_prepare(req->ring, &so);
>   	if (ret)
>   		return ret;
>
>   	if (so.rodata == NULL)
>   		return 0;
>
> -	ret = ring->dispatch_execbuffer(ring,
> -					so.ggtt_offset,
> -					so.rodata->batch_items * 4,
> -					I915_DISPATCH_SECURE);
> +	ret = req->ring->dispatch_execbuffer(req->ring,
> +					     so.ggtt_offset,
> +					     so.rodata->batch_items * 4,
> +					     I915_DISPATCH_SECURE);
>   	if (ret)
>   		goto out;
>
> -	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
> +	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
>
> -	WARN_ON(ring->outstanding_lazy_request->batch_obj);
> -	ring->outstanding_lazy_request->batch_obj = so.obj;
> +	WARN_ON(req->batch_obj);
> +	req->batch_obj = so.obj;
>   	/* __i915_add_request moves object to inactive if it fails */
>   out:
>   	i915_gem_render_state_fini(&so);
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.h b/drivers/gpu/drm/i915/i915_gem_render_state.h
> index c44961e..7aa7372 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.h
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.h
> @@ -39,7 +39,7 @@ struct render_state {
>   	int gen;
>   };
>
> -int i915_gem_render_state_init(struct intel_engine_cs *ring);
> +int i915_gem_render_state_init(struct drm_i915_gem_request *req);
>   void i915_gem_render_state_fini(struct render_state *so);
>   int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
>   				  struct render_state *so);
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index cbec056..f0bb98a 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1345,31 +1345,29 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
>   	return 0;
>   }
>
> -static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
> -					      struct intel_context *ctx)
> +static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
>   {
> -	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
>   	struct render_state so;
>   	int ret;
>
> -	ret = i915_gem_render_state_prepare(ring, &so);
> +	ret = i915_gem_render_state_prepare(req->ring, &so);
>   	if (ret)
>   		return ret;
>
>   	if (so.rodata == NULL)
>   		return 0;
>
> -	ret = ring->emit_bb_start(ringbuf,
> -			ctx,
> -			so.ggtt_offset,
> -			I915_DISPATCH_SECURE);
> +	ret = req->ring->emit_bb_start(req->ringbuf,
> +				       req->ctx,
> +				       so.ggtt_offset,
> +				       I915_DISPATCH_SECURE);
>   	if (ret)
>   		goto out;
>
> -	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
> +	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
>
> -	WARN_ON(ring->outstanding_lazy_request->batch_obj);
> -	ring->outstanding_lazy_request->batch_obj = so.obj;
> +	WARN_ON(req->batch_obj);
> +	req->batch_obj = so.obj;
>   	/* __i915_add_request moves object to inactive if it fails */
>   out:
>   	i915_gem_render_state_fini(&so);
> @@ -1384,7 +1382,7 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
>   	if (ret)
>   		return ret;
>
> -	return intel_lr_context_render_state_init(req->ring, req->ctx);
> +	return intel_lr_context_render_state_init(req);
>   }
>
>   /**
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 26964a2..efb1729 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -783,7 +783,7 @@ static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
>   	if (ret != 0)
>   		return ret;
>
> -	ret = i915_gem_render_state_init(req->ring);
> +	ret = i915_gem_render_state_init(req);
>   	if (ret)
>   		DRM_ERROR("init render state: %d\n", ret);
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 27/53] drm/i915: Update overlay code to do explicit request management

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The overlay update code path to do explicit request creation and submission
> rather than relying on the OLR to do the right thing.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_overlay.c |   64 +++++++++++++++++++++++++---------
>   1 file changed, 48 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index f93dfc1..dc209bf 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -209,19 +209,19 @@ static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
>   }
>
>   static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
> +					 struct drm_i915_gem_request *req,
>   					 void (*tail)(struct intel_overlay *))
>   {
>   	struct drm_device *dev = overlay->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
>   	int ret;
>
>   	BUG_ON(overlay->last_flip_req);
> -	i915_gem_request_assign(&overlay->last_flip_req,
> -					     ring->outstanding_lazy_request);
> -	ret = i915_add_request(ring);
> -	if (ret)
> +	i915_gem_request_assign(&overlay->last_flip_req, req);
> +	ret = i915_add_request(req->ring);
> +	if (ret) {
> +		i915_gem_request_unreference(req);
>   		return ret;
> +	}
>
>   	overlay->flip_tail = tail;
>   	ret = i915_wait_request(overlay->last_flip_req);
> @@ -239,6 +239,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
>   	struct drm_device *dev = overlay->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
> +	struct drm_i915_gem_request *req;
>   	int ret;
>
>   	BUG_ON(overlay->active);
> @@ -246,17 +247,23 @@ static int intel_overlay_on(struct intel_overlay *overlay)
>
>   	WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
>   	if (ret)
>   		return ret;
>
> +	ret = intel_ring_begin(ring, 4);
> +	if (ret) {
> +		i915_gem_request_unreference(req);
> +		return ret;
> +	}
> +
>   	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_ON);
>   	intel_ring_emit(ring, overlay->flip_addr | OFC_UPDATE);
>   	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
>   	intel_ring_emit(ring, MI_NOOP);
>   	intel_ring_advance(ring);
>
> -	return intel_overlay_do_wait_request(overlay, NULL);
> +	return intel_overlay_do_wait_request(overlay, req, NULL);
>   }
>
>   /* overlay needs to be enabled in OCMD reg */
> @@ -266,6 +273,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
>   	struct drm_device *dev = overlay->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
> +	struct drm_i915_gem_request *req;
>   	u32 flip_addr = overlay->flip_addr;
>   	u32 tmp;
>   	int ret;
> @@ -280,18 +288,27 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
>   	if (tmp & (1 << 17))
>   		DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp);
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
>   	if (ret)
>   		return ret;
>
> +	ret = intel_ring_begin(ring, 2);
> +	if (ret) {
> +		i915_gem_request_unreference(req);
> +		return ret;
> +	}
> +
>   	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
>   	intel_ring_emit(ring, flip_addr);
>   	intel_ring_advance(ring);
>
>   	WARN_ON(overlay->last_flip_req);
> -	i915_gem_request_assign(&overlay->last_flip_req,
> -					     ring->outstanding_lazy_request);
> -	return i915_add_request(ring);
> +	i915_gem_request_assign(&overlay->last_flip_req, req);
> +	ret = i915_add_request(req->ring);
> +	if (ret)
> +		i915_gem_request_unreference(req);
> +
> +	return ret;
>   }
>
>   static void intel_overlay_release_old_vid_tail(struct intel_overlay *overlay)
> @@ -326,6 +343,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
>   	struct drm_device *dev = overlay->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
> +	struct drm_i915_gem_request *req;
>   	u32 flip_addr = overlay->flip_addr;
>   	int ret;
>
> @@ -337,10 +355,16 @@ static int intel_overlay_off(struct intel_overlay *overlay)
>   	 * of the hw. Do it in both cases */
>   	flip_addr |= OFC_UPDATE;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req);
>   	if (ret)
>   		return ret;
>
> +	ret = intel_ring_begin(ring, 6);
> +	if (ret) {
> +		i915_gem_request_unreference(req);
> +		return ret;
> +	}
> +
>   	/* wait for overlay to go idle */
>   	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
>   	intel_ring_emit(ring, flip_addr);
> @@ -359,7 +383,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
>   	}
>   	intel_ring_advance(ring);
>
> -	return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail);
> +	return intel_overlay_do_wait_request(overlay, req, intel_overlay_off_tail);
>   }
>
>   /* recover from an interruption due to a signal
> @@ -404,15 +428,23 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
>
>   	if (I915_READ(ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT) {
>   		/* synchronous slowpath */
> -		ret = intel_ring_begin(ring, 2);
> +		struct drm_i915_gem_request *req;
> +
> +		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &req)
>   		if (ret)
>   			return ret;
>
> +		ret = intel_ring_begin(ring, 2);
> +		if (ret) {
> +			i915_gem_request_unreference(req);
> +			return ret;
> +		}
> +
>   		intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
>   		intel_ring_emit(ring, MI_NOOP);
>   		intel_ring_advance(ring);
>
> -		ret = intel_overlay_do_wait_request(overlay,
> +		ret = intel_overlay_do_wait_request(overlay, req,
>   						    intel_overlay_release_old_vid_tail);
>   		if (ret)
>   			return ret;
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas


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Re: [PATCH 28/53] drm/i915: Update queue_flip() to do explicit request management

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the display page flip code to do explicit request creation and
> submission rather than relying on the OLR and just hoping that the request
> actually gets submitted at some random point.
>
> The sequence is now to create a request, queue the work to the ring, assign the
> known request to the flip queue work item then actually submit the work and post
> the request.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    2 +-
>   drivers/gpu/drm/i915/intel_display.c    |   43 ++++++++++++++++++++-----------
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    2 +-
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    1 -
>   4 files changed, 30 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e9cc343..34fd338 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -560,7 +560,7 @@ struct drm_i915_display_funcs {
>   	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
>   			  struct drm_framebuffer *fb,
>   			  struct drm_i915_gem_object *obj,
> -			  struct intel_engine_cs *ring,
> +			  struct drm_i915_gem_request *req,
>   			  uint32_t flags);
>   	void (*update_primary_plane)(struct drm_crtc *crtc,
>   				     struct drm_framebuffer *fb,
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 3b0fe9f..c32bc0c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9251,9 +9251,10 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	u32 flip_mask;
>   	int ret;
> @@ -9278,7 +9279,6 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, 0); /* aux display base address, unused */
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9286,9 +9286,10 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	u32 flip_mask;
>   	int ret;
> @@ -9310,7 +9311,6 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, MI_NOOP);
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9318,9 +9318,10 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	uint32_t pf, pipesrc;
> @@ -9349,7 +9350,6 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, pf | pipesrc);
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9357,9 +9357,10 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	uint32_t pf, pipesrc;
> @@ -9385,7 +9386,6 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, pf | pipesrc);
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9393,9 +9393,10 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	uint32_t plane_bit = 0;
>   	int len, ret;
> @@ -9480,7 +9481,6 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, (MI_NOOP));
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9636,7 +9636,7 @@ static int intel_default_queue_flip(struct drm_device *dev,
>   				    struct drm_crtc *crtc,
>   				    struct drm_framebuffer *fb,
>   				    struct drm_i915_gem_object *obj,
> -				    struct intel_engine_cs *ring,
> +				    struct drm_i915_gem_request *req,
>   				    uint32_t flags)
>   {
>   	return -ENODEV;
> @@ -9715,6 +9715,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>   	enum pipe pipe = intel_crtc->pipe;
>   	struct intel_unpin_work *work;
>   	struct intel_engine_cs *ring;
> +	struct drm_i915_gem_request *request;
>   	int ret;
>
>   	/*
> @@ -9828,13 +9829,20 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>   		i915_gem_request_assign(&work->flip_queued_req,
>   					obj->last_write_req);
>   	} else {
> -		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, ring,
> -						   page_flip_flags);
> +		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &request);
>   		if (ret)
>   			goto cleanup_unpin;
>
> -		i915_gem_request_assign(&work->flip_queued_req,
> -					intel_ring_get_request(ring));
> +		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, request,
> +						   page_flip_flags);
> +		if (ret)
> +			goto cleanup_request;
> +
> +		i915_gem_request_assign(&work->flip_queued_req, request);
> +
> +		ret = i915_add_request_no_flush(request->ring);
> +		if (ret)
> +			goto cleanup_request_assign;
>   	}
>
>   	work->flip_queued_vblank = drm_vblank_count(dev, intel_crtc->pipe);
> @@ -9851,6 +9859,11 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>
>   	return 0;
>
> +cleanup_request_assign:
> +	i915_gem_request_assign(&work->flip_queued_req, NULL);
> +cleanup_request:
> +	i915_gem_request_unreference(request);
> +
>   cleanup_unpin:
>   	intel_unpin_fb_obj(obj);
>   cleanup_pending:
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index efb1729..18d12a5 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -81,7 +81,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring)
>   	return dev_priv->gpu_error.stop_rings & intel_ring_flag(ring);
>   }
>
> -void __intel_ring_advance(struct intel_engine_cs *ring)
> +static void __intel_ring_advance(struct intel_engine_cs *ring)
>   {
>   	struct intel_ringbuffer *ringbuf = ring->buffer;
>   	ringbuf->tail &= ringbuf->size - 1;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index c32f5a1..25d5ede 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -410,7 +410,6 @@ int __intel_ring_space(int head, int tail, int size);
>   void intel_ring_update_space(struct intel_ringbuffer *ringbuf);
>   int intel_ring_space(struct intel_ringbuffer *ringbuf);
>   bool intel_ring_stopped(struct intel_engine_cs *ring);
> -void __intel_ring_advance(struct intel_engine_cs *ring);
>
>   int __must_check intel_ring_idle(struct intel_engine_cs *ring);
>   void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
>

Could you perhaps make a small note in the commit message to clarify why 
you remove __intel_ring_advance everywhere? After discussing it with you 
I understood that it's because we already do the corresponding operation 
in i915_add_request_no_flush that is added to intel_crtc_page_flip but 
since these pieces of code are so far from each other it's not entirely 
obvious from the start that they have something to do with each other.

Or am I the only one who thinks this is not trivial?

Thanks,
Tomas

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Re: [PATCH 29/53] drm/i915: Update add_request() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that all callers of i915_add_request() have a request pointer to hand, it is
> possible to update the add request function to take a request pointer rather
> than pulling it out of the OLR.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |   10 +++++-----
>   drivers/gpu/drm/i915/i915_gem.c            |   24 ++++++++++++------------
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
>   drivers/gpu/drm/i915/intel_display.c       |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
>   drivers/gpu/drm/i915/intel_overlay.c       |    4 ++--
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
>   7 files changed, 24 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 34fd338..9206328 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2830,14 +2830,14 @@ void i915_gem_init_swizzling(struct drm_device *dev);
>   void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
>   int __must_check i915_gpu_idle(struct drm_device *dev);
>   int __must_check i915_gem_suspend(struct drm_device *dev);
> -int __i915_add_request(struct intel_engine_cs *ring,
> +int __i915_add_request(struct drm_i915_gem_request *req,
>   		       struct drm_file *file,
>   		       struct drm_i915_gem_object *batch_obj,
>   		       bool flush_caches);
> -#define i915_add_request(ring) \
> -	__i915_add_request(ring, NULL, NULL, true)
> -#define i915_add_request_no_flush(ring) \
> -	__i915_add_request(ring, NULL, NULL, false)
> +#define i915_add_request(req) \
> +	__i915_add_request(req, NULL, NULL, true)
> +#define i915_add_request_no_flush(req) \
> +	__i915_add_request(req, NULL, NULL, false)
>   int __i915_wait_request(struct drm_i915_gem_request *req,
>   			unsigned reset_counter,
>   			bool interruptible,
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 0c7e1bd..24fb7b9 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1162,7 +1162,7 @@ i915_gem_check_olr(struct drm_i915_gem_request *req)
>
>   	ret = 0;
>   	if (req == req->ring->outstanding_lazy_request)
> -		ret = i915_add_request(req->ring);
> +		ret = i915_add_request(req);
>
>   	return ret;
>   }
> @@ -2407,25 +2407,25 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
>   	return 0;
>   }
>
> -int __i915_add_request(struct intel_engine_cs *ring,
> +int __i915_add_request(struct drm_i915_gem_request *request,
>   		       struct drm_file *file,
>   		       struct drm_i915_gem_object *obj,
>   		       bool flush_caches)
>   {
> -	struct drm_i915_private *dev_priv = ring->dev->dev_private;
> -	struct drm_i915_gem_request *request;
> +	struct intel_engine_cs *ring;
> +	struct drm_i915_private *dev_priv;
>   	struct intel_ringbuffer *ringbuf;
>   	u32 request_start;
>   	int ret;
>
> -	request = ring->outstanding_lazy_request;
>   	if (WARN_ON(request == NULL))
>   		return -ENOMEM;
>
> -	if (i915.enable_execlists) {
> -		ringbuf = request->ctx->engine[ring->id].ringbuf;
> -	} else
> -		ringbuf = ring->buffer;
> +	ring = request->ring;
> +	dev_priv = ring->dev->dev_private;
> +	ringbuf = request->ringbuf;
> +
> +	WARN_ON(request != ring->outstanding_lazy_request);
>
>   	request_start = intel_ring_get_tail(ringbuf);
>   	/*
> @@ -3118,7 +3118,7 @@ int i915_gpu_idle(struct drm_device *dev)
>   				return ret;
>   			}
>
> -			ret = i915_add_request_no_flush(req->ring);
> +			ret = i915_add_request_no_flush(req);
>   			if (ret) {
>   				i915_gem_request_unreference(req);
>   				return ret;
> @@ -3966,7 +3966,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>   			if (ret)
>   				return ret;
>
> -			ret = i915_add_request_no_flush(req->ring);
> +			ret = i915_add_request_no_flush(req);
>   			if (ret)
>   				return ret;
>   		}
> @@ -4884,7 +4884,7 @@ i915_gem_init_hw(struct drm_device *dev)
>   			return ret;
>   		}
>
> -		ret = i915_add_request_no_flush(ring);
> +		ret = i915_add_request_no_flush(req);
>   		if (ret) {
>   			DRM_ERROR("Add request ring #%d failed: %d\n", i, ret);
>   			i915_gem_request_unreference(req);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 1e2fc80..15e33a9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -996,7 +996,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
>   	params->ring->gpu_caches_dirty = true;
>
>   	/* Add a breadcrumb for the completion of the batch buffer */
> -	return __i915_add_request(params->ring, params->file,
> +	return __i915_add_request(params->request, params->file,
>   				  params->batch_obj, true);
>   }
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c32bc0c..9cbfb93 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9840,7 +9840,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>
>   		i915_gem_request_assign(&work->flip_queued_req, request);
>
> -		ret = i915_add_request_no_flush(request->ring);
> +		ret = i915_add_request_no_flush(request);
>   		if (ret)
>   			goto cleanup_request_assign;
>   	}
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f0bb98a..3b4393c 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1942,7 +1942,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
>   				goto error;
>   			}
>
> -			ret = i915_add_request_no_flush(req->ring);
> +			ret = i915_add_request_no_flush(req);
>   			if (ret) {
>   				DRM_ERROR("ring init context: %d\n", ret);
>   				i915_gem_request_unreference(req);
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index dc209bf..228c9d1 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -217,7 +217,7 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
>
>   	BUG_ON(overlay->last_flip_req);
>   	i915_gem_request_assign(&overlay->last_flip_req, req);
> -	ret = i915_add_request(req->ring);
> +	ret = i915_add_request(req);
>   	if (ret) {
>   		i915_gem_request_unreference(req);
>   		return ret;
> @@ -304,7 +304,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
>
>   	WARN_ON(overlay->last_flip_req);
>   	i915_gem_request_assign(&overlay->last_flip_req, req);
> -	ret = i915_add_request(req->ring);
> +	ret = i915_add_request(req);
>   	if (ret)
>   		i915_gem_request_unreference(req);
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 18d12a5..508d7d8 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2145,8 +2145,9 @@ int intel_ring_idle(struct intel_engine_cs *ring)
>   	int ret;
>
>   	/* We need to add any requests required to flush the objects and ring */
> +	WARN_ON(ring->outstanding_lazy_request);
>   	if (ring->outstanding_lazy_request) {
> -		ret = i915_add_request(ring);
> +		ret = i915_add_request(ring->outstanding_lazy_request);
>   		if (ret)
>   			return ret;
>   	}
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 30/53] drm/i915: Update [vma|object]_move_to_active() to take request structures

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that everything above has been converted to use request structures, it is
> possible to update the lower level move_to_active() functions to be request
> based as well.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h              |    2 +-
>   drivers/gpu/drm/i915/i915_gem.c              |   17 ++++++++---------
>   drivers/gpu/drm/i915/i915_gem_context.c      |    2 +-
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    2 +-
>   drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
>   6 files changed, 13 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 9206328..e9fef4c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2747,7 +2747,7 @@ int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
>   int i915_gem_object_sync(struct drm_i915_gem_object *obj,
>   			 struct drm_i915_gem_request *to_req);
>   void i915_vma_move_to_active(struct i915_vma *vma,
> -			     struct intel_engine_cs *ring);
> +			     struct drm_i915_gem_request *req);
>   int i915_gem_dumb_create(struct drm_file *file_priv,
>   			 struct drm_device *dev,
>   			 struct drm_mode_create_dumb *args);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 24fb7b9..0ae9be2 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2265,17 +2265,16 @@ i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
>
>   static void
>   i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
> -			       struct intel_engine_cs *ring)
> +			       struct drm_i915_gem_request *req)
>   {
> -	struct drm_i915_gem_request *req;
> -	struct intel_engine_cs *old_ring;
> +	struct intel_engine_cs *new_ring, *old_ring;
>
> -	BUG_ON(ring == NULL);
> +	BUG_ON(req == NULL);
>
> -	req = intel_ring_get_request(ring);
> +	new_ring = i915_gem_request_get_ring(req);
>   	old_ring = i915_gem_request_get_ring(obj->last_read_req);
>
> -	if (old_ring != ring && obj->last_write_req) {
> +	if (old_ring != new_ring && obj->last_write_req) {
>   		/* Keep the request relative to the current ring */
>   		i915_gem_request_assign(&obj->last_write_req, req);
>   	}
> @@ -2286,16 +2285,16 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
>   		obj->active = 1;
>   	}
>
> -	list_move_tail(&obj->ring_list, &ring->active_list);
> +	list_move_tail(&obj->ring_list, &new_ring->active_list);
>
>   	i915_gem_request_assign(&obj->last_read_req, req);
>   }
>
>   void i915_vma_move_to_active(struct i915_vma *vma,
> -			     struct intel_engine_cs *ring)
> +			     struct drm_i915_gem_request *req)
>   {
>   	list_move_tail(&vma->mm_list, &vma->vm->active_list);
> -	return i915_gem_object_move_to_active(vma->obj, ring);
> +	return i915_gem_object_move_to_active(vma->obj, req);
>   }
>
>   static void
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 938cd26..e4d75be 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -652,7 +652,7 @@ static int do_switch(struct drm_i915_gem_request *req)
>   	 */
>   	if (from != NULL) {
>   		from->legacy_hw_ctx.rcs_state->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
> -		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req->ring);
> +		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req);
>   		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
>   		 * whole damn pipeline, we don't need to explicitly mark the
>   		 * object dirty. The only exception is that the context must be
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 15e33a9..dc13751 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -966,7 +966,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
>   			obj->base.pending_read_domains |= obj->base.read_domains;
>   		obj->base.read_domains = obj->base.pending_read_domains;
>
> -		i915_vma_move_to_active(vma, ring);
> +		i915_vma_move_to_active(vma, req);
>   		if (obj->base.write_domain) {
>   			obj->dirty = 1;
>   			i915_gem_request_assign(&obj->last_write_req, req);
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index 85cc746..866274c 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -171,7 +171,7 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
>   	if (ret)
>   		goto out;
>
> -	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
> +	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
>
>   	WARN_ON(req->batch_obj);
>   	req->batch_obj = so.obj;
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 3b4393c..479365e 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1364,7 +1364,7 @@ static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
>   	if (ret)
>   		goto out;
>
> -	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
> +	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
>
>   	WARN_ON(req->batch_obj);
>   	req->batch_obj = so.obj;
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 31/53] drm/i915: Update l3_remap to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Converted i915_gem_l3_remap() to take a request structure instead of a ring.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    2 +-
>   drivers/gpu/drm/i915/i915_gem.c         |    5 +++--
>   drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
>   3 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e9fef4c..3955bef 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2825,7 +2825,7 @@ int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
>   int __must_check i915_gem_init(struct drm_device *dev);
>   int i915_gem_init_rings(struct drm_device *dev);
>   int __must_check i915_gem_init_hw(struct drm_device *dev);
> -int i915_gem_l3_remap(struct intel_engine_cs *ring, int slice);
> +int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice);
>   void i915_gem_init_swizzling(struct drm_device *dev);
>   void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
>   int __must_check i915_gpu_idle(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 0ae9be2..043933b 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4644,8 +4644,9 @@ err:
>   	return ret;
>   }
>
> -int i915_gem_l3_remap(struct intel_engine_cs *ring, int slice)
> +int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	u32 reg_base = GEN7_L3LOG_BASE + (slice * 0x200);
> @@ -4864,7 +4865,7 @@ i915_gem_init_hw(struct drm_device *dev)
>
>   		if (ring->id == RCS) {
>   			for (i = 0; i < NUM_L3_SLICES(dev); i++)
> -				i915_gem_l3_remap(ring, i);
> +				i915_gem_l3_remap(req, i);
>   		}
>
>   		ret = i915_ppgtt_init_ring(req);
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index e4d75be..475d1fd 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -636,7 +636,7 @@ static int do_switch(struct drm_i915_gem_request *req)
>   		if (!(to->remap_slice & (1<<i)))
>   			continue;
>
> -		ret = i915_gem_l3_remap(req->ring, i);
> +		ret = i915_gem_l3_remap(req, i);
>   		/* If it failed, try again next round */
>   		if (ret)
>   			DRM_DEBUG_DRIVER("L3 remapping failed\n");
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 32/53] drm/i915: Update mi_set_context() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated mi_set_context() to take a request structure instead of a ring and
> context pair.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_context.c |    9 ++++-----
>   1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 475d1fd..9e66fac 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -472,10 +472,9 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
>   }
>
>   static inline int
> -mi_set_context(struct intel_engine_cs *ring,
> -	       struct intel_context *new_context,
> -	       u32 hw_flags)
> +mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 flags = hw_flags | MI_MM_SPACE_GTT;
>   	const int num_rings =
>   		/* Use an extended w/a on ivb+ if signalling from other rings */
> @@ -527,7 +526,7 @@ mi_set_context(struct intel_engine_cs *ring,
>
>   	intel_ring_emit(ring, MI_NOOP);
>   	intel_ring_emit(ring, MI_SET_CONTEXT);
> -	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->legacy_hw_ctx.rcs_state) |
> +	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(req->ctx->legacy_hw_ctx.rcs_state) |
>   			flags);
>   	/*
>   	 * w/a: MI_SET_CONTEXT must always be followed by MI_NOOP
> @@ -628,7 +627,7 @@ static int do_switch(struct drm_i915_gem_request *req)
>   	if (!to->legacy_hw_ctx.initialized || i915_gem_context_is_default(to))
>   		hw_flags |= MI_RESTORE_INHIBIT;
>
> -	ret = mi_set_context(req->ring, to, hw_flags);
> +	ret = mi_set_context(req, hw_flags);
>   	if (ret)
>   		goto unpin_out;
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 33/53] drm/i915: Update a bunch of execbuffer heplers to take request structures

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated *_ring_invalidate_all_caches(), i915_reset_gen7_sol_offsets() and
> i915_emit_box() to take request structures instead of ring or ringbuf/context
> pairs.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   12 +++++++-----
>   drivers/gpu/drm/i915/intel_lrc.c           |    9 ++++-----
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
>   4 files changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index dc13751..a79c893 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -857,7 +857,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
>   	/* Unconditionally invalidate gpu caches and ensure that we do flush
>   	 * any residual writes from the previous batch.
>   	 */
> -	return intel_ring_invalidate_all_caches(req->ring);
> +	return intel_ring_invalidate_all_caches(req);
>   }
>
>   static bool
> @@ -1002,8 +1002,9 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
>
>   static int
>   i915_reset_gen7_sol_offsets(struct drm_device *dev,
> -			    struct intel_engine_cs *ring)
> +			    struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	int ret, i;
>
> @@ -1028,10 +1029,11 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
>   }
>
>   static int
> -i915_emit_box(struct intel_engine_cs *ring,
> +i915_emit_box(struct drm_i915_gem_request *req,
>   	      struct drm_clip_rect *box,
>   	      int DR1, int DR4)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	if (box->y2 <= box->y1 || box->x2 <= box->x1 ||
> @@ -1247,7 +1249,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   	}
>
>   	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
> -		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
> +		ret = i915_reset_gen7_sol_offsets(params->dev, params->request);
>   		if (ret)
>   			goto error;
>   	}
> @@ -1258,7 +1260,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>
>   	if (cliprects) {
>   		for (i = 0; i < args->num_cliprects; i++) {
> -			ret = i915_emit_box(ring, &cliprects[i],
> +			ret = i915_emit_box(params->request, &cliprects[i],
>   					    args->DR1, args->DR4);
>   			if (ret)
>   				goto error;
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 479365e..fab9269 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -558,10 +558,9 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
>   	return 0;
>   }
>
> -static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
> -					      struct intel_context *ctx)
> +static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
>   {
> -	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct intel_engine_cs *ring = req->ring;
>   	uint32_t flush_domains;
>   	int ret;
>
> @@ -569,7 +568,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
>   	if (ring->gpu_caches_dirty)
>   		flush_domains = I915_GEM_GPU_DOMAINS;
>
> -	ret = ring->emit_flush(ringbuf, ctx,
> +	ret = ring->emit_flush(req->ringbuf, req->ctx,
>   			       I915_GEM_GPU_DOMAINS, flush_domains);
>   	if (ret)
>   		return ret;
> @@ -605,7 +604,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
>   	/* Unconditionally invalidate gpu caches and ensure that we do flush
>   	 * any residual writes from the previous batch.
>   	 */
> -	return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx);
> +	return logical_ring_invalidate_all_caches(req);
>   }
>
>   /**
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 508d7d8..efa44db 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2864,8 +2864,9 @@ intel_ring_flush_all_caches(struct intel_engine_cs *ring)
>   }
>
>   int
> -intel_ring_invalidate_all_caches(struct intel_engine_cs *ring)
> +intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	uint32_t flush_domains;
>   	int ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 25d5ede..b817725 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -414,7 +414,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring);
>   int __must_check intel_ring_idle(struct intel_engine_cs *ring);
>   void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
>   int intel_ring_flush_all_caches(struct intel_engine_cs *ring);
> -int intel_ring_invalidate_all_caches(struct intel_engine_cs *ring);
> +int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);
>
>   void intel_fini_pipe_control(struct intel_engine_cs *ring);
>   int intel_init_pipe_control(struct intel_engine_cs *ring);
>

Nitpick: "Update a bunch of execbuffer >>> heplers <<< "

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas



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Re: [PATCH 08/53] drm/i915: Update alloc_request to return the allocated request

[Tomas Elf]

On 05/03/2015 15:46, John Harrison wrote:
> On 05/03/2015 15:27, Tomas Elf wrote:
>> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>
>>> The alloc_request() function does not actually return the newly
>>> allocated
>>> request. Instead, it must be pulled from
>>> ring->outstanding_lazy_request. This
>>> patch fixes this so that code can create a request and start using it
>>> knowing
>>> exactly which request it actually owns.
>>>
>>> For: VIZ-5115
>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
>>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
>>>   drivers/gpu/drm/i915/intel_lrc.c           |   13 +++++++++----
>>>   drivers/gpu/drm/i915/intel_lrc.h           |    3 ++-
>>>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   14 ++++++++++----
>>>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    3 ++-
>>>   6 files changed, 27 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>>> b/drivers/gpu/drm/i915/i915_drv.h
>>> index 87a4a2e..90223f208 100644
>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>> @@ -1909,7 +1909,8 @@ struct drm_i915_private {
>>>       /* Abstract the submission mechanism (legacy ringbuffer or
>>> execlists) away */
>>>       struct {
>>>           int (*alloc_request)(struct intel_engine_cs *ring,
>>> -                     struct intel_context *ctx);
>>> +                     struct intel_context *ctx,
>>> +                     struct drm_i915_gem_request **req_out);
>>>           int (*do_execbuf)(struct i915_execbuffer_params *params,
>>>                     struct drm_i915_gem_execbuffer2 *args,
>>>                     struct list_head *vmas);
>>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>> index 61471e9..37dcc6f 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>> @@ -1353,6 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>>> void *data,
>>>       struct i915_address_space *vm;
>>>       struct i915_execbuffer_params params_master; /* XXX: will be
>>> removed later */
>>>       struct i915_execbuffer_params *params = &params_master;
>>> +    struct drm_i915_gem_request *request;
>>
>> Please initialize request to NULL. If you accidentally dereference it
>> before it is allocated (seeing as the allocation is several pages down
>> from here) you get a null pointer exception, which is a clear
>> indication that you did something stupid. Otherwise it's not clear
>> what will happen (sure, page fault, but null pointer exception is a
>> better failure indication).
>
> That should generate a 'use before assignment' compiler warning.

That assumes that the developer in question isn't too busy hacking to 
check for warnings (in all honesty that developer probably would've been 
me ;)). Sure, you should always check for warnings but if we can save 
this developer some time by giving them a clear run-time indication 
aside from the compile-time warning then that would not be a bad thing. 
I've been there myself a few times and I know times in the past where 
this would've saved me the time it takes to rebuild and redeploy the 
kernel once.

Thanks,
Tomas


>
>>
>> Thanks,
>> Tomas
>>
>>>       const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>>>       u32 dispatch_flags;
>>>       int ret;
>>> @@ -1531,7 +1532,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>>> void *data,
>>>           params->batch_obj_vm_offset =
>>> i915_gem_obj_offset(batch_obj, vm);
>>>
>>>       /* Allocate a request for this batch buffer nice and early. */
>>> -    ret = dev_priv->gt.alloc_request(ring, ctx);
>>> +    ret = dev_priv->gt.alloc_request(ring, ctx, &request);
>>>       if (ret)
>>>           goto err;
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c
>>> b/drivers/gpu/drm/i915/intel_lrc.c
>>> index 8628abf..c3c783f 100644
>>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>>> @@ -857,13 +857,17 @@ void intel_lr_context_unpin(struct
>>> intel_engine_cs *ring,
>>>   }
>>>
>>>   int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
>>> -                     struct intel_context *ctx)
>>> +                     struct intel_context *ctx,
>>> +                     struct drm_i915_gem_request **req_out)
>>>   {
>>>       struct drm_i915_gem_request *request;
>>>       struct drm_i915_private *dev_private = ring->dev->dev_private;
>>>       int ret;
>>>
>>> -    if (ring->outstanding_lazy_request)
>>> +    if (!req_out)
>>> +        return -EINVAL;
>>> +
>>> +    if ((*req_out = ring->outstanding_lazy_request) != NULL)
>>>           return 0;
>>>
>>>       request = kzalloc(sizeof(*request), GFP_KERNEL);
>>> @@ -898,7 +902,7 @@ int intel_logical_ring_alloc_request(struct
>>> intel_engine_cs *ring,
>>>       i915_gem_context_reference(request->ctx);
>>>       request->ringbuf = ctx->engine[ring->id].ringbuf;
>>>
>>> -    ring->outstanding_lazy_request = request;
>>> +    *req_out = ring->outstanding_lazy_request = request;
>>>       return 0;
>>>   }
>>>
>>> @@ -1051,6 +1055,7 @@ static int logical_ring_prepare(struct
>>> intel_ringbuffer *ringbuf,
>>>   int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>>>                    struct intel_context *ctx, int num_dwords)
>>>   {
>>> +    struct drm_i915_gem_request *req;
>>>       struct intel_engine_cs *ring = ringbuf->ring;
>>>       struct drm_device *dev = ring->dev;
>>>       struct drm_i915_private *dev_priv = dev->dev_private;
>>> @@ -1066,7 +1071,7 @@ int intel_logical_ring_begin(struct
>>> intel_ringbuffer *ringbuf,
>>>           return ret;
>>>
>>>       /* Preallocate the olr before touching the ring */
>>> -    ret = intel_logical_ring_alloc_request(ring, ctx);
>>> +    ret = intel_logical_ring_alloc_request(ring, ctx, &req);
>>>       if (ret)
>>>           return ret;
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_lrc.h
>>> b/drivers/gpu/drm/i915/intel_lrc.h
>>> index 3cc38bd..77de8ac 100644
>>> --- a/drivers/gpu/drm/i915/intel_lrc.h
>>> +++ b/drivers/gpu/drm/i915/intel_lrc.h
>>> @@ -37,7 +37,8 @@
>>>
>>>   /* Logical Rings */
>>>   int __must_check intel_logical_ring_alloc_request(struct
>>> intel_engine_cs *ring,
>>> -                          struct intel_context *ctx);
>>> +                          struct intel_context *ctx,
>>> +                          struct drm_i915_gem_request **req_out);
>>>   void intel_logical_ring_stop(struct intel_engine_cs *ring);
>>>   void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
>>>   int intel_logical_rings_init(struct drm_device *dev);
>>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> index 635707a..1a9f884 100644
>>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> @@ -2164,13 +2164,18 @@ int intel_ring_idle(struct intel_engine_cs
>>> *ring)
>>>   }
>>>
>>>   int
>>> -intel_ring_alloc_request(struct intel_engine_cs *ring, struct
>>> intel_context *ctx)
>>> +intel_ring_alloc_request(struct intel_engine_cs *ring,
>>> +             struct intel_context *ctx,
>>> +             struct drm_i915_gem_request **req_out)
>>>   {
>>>       int ret;
>>>       struct drm_i915_gem_request *request;
>>>       struct drm_i915_private *dev_private = ring->dev->dev_private;
>>>
>>> -    if (ring->outstanding_lazy_request)
>>> +    if (!req_out)
>>> +        return -EINVAL;
>>> +
>>> +    if ((*req_out = ring->outstanding_lazy_request) != NULL)
>>>           return 0;
>>>
>>>       request = kzalloc(sizeof(*request), GFP_KERNEL);
>>> @@ -2188,7 +2193,7 @@ intel_ring_alloc_request(struct intel_engine_cs
>>> *ring, struct intel_context *ctx
>>>           return ret;
>>>       }
>>>
>>> -    ring->outstanding_lazy_request = request;
>>> +    *req_out = ring->outstanding_lazy_request = request;
>>>       return 0;
>>>   }
>>>
>>> @@ -2216,6 +2221,7 @@ static int __intel_ring_prepare(struct
>>> intel_engine_cs *ring,
>>>   int intel_ring_begin(struct intel_engine_cs *ring,
>>>                int num_dwords)
>>>   {
>>> +    struct drm_i915_gem_request *req;
>>>       struct drm_i915_private *dev_priv = ring->dev->dev_private;
>>>       int ret;
>>>
>>> @@ -2229,7 +2235,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>>>           return ret;
>>>
>>>       /* Preallocate the olr before touching the ring */
>>> -    ret = intel_ring_alloc_request(ring, NULL);
>>> +    ret = intel_ring_alloc_request(ring, NULL, &req);
>>>       if (ret)
>>>           return ret;
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
>>> b/drivers/gpu/drm/i915/intel_ringbuffer.h
>>> index 2fd960a..4f8a14a 100644
>>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
>>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
>>> @@ -393,7 +393,8 @@ void intel_cleanup_ring_buffer(struct
>>> intel_engine_cs *ring);
>>>   int __must_check intel_ring_begin(struct intel_engine_cs *ring, int
>>> n);
>>>   int __must_check intel_ring_cacheline_align(struct intel_engine_cs
>>> *ring);
>>>   int __must_check intel_ring_alloc_request(struct intel_engine_cs
>>> *ring,
>>> -                      struct intel_context *ctx);
>>> +                      struct intel_context *ctx,
>>> +                      struct drm_i915_gem_request **req_out);
>>>   static inline void intel_ring_emit(struct intel_engine_cs *ring,
>>>                      u32 data)
>>>   {
>>>
>>
>

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Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[John Harrison]

On 05/03/2015 16:14, Daniel Vetter wrote:
> On Thu, Mar 05, 2015 at 03:06:42PM +0000, John Harrison wrote:
>> On 05/03/2015 14:44, Daniel Vetter wrote:
>>> Imo reserving a bit of ring space for each add_request should be solid.
>>> Userspace uses the exact same reservation logic for adding end-of-batch
>>> workarounds. The only thing needed to make this solid is to WARN if
>>> add_request ends up using more ring space than what we've reserved (not
>>> just when it actually runs out, that obviously doesn't happen often
>>> enough for testing).
>> The problem is that there could be multiple requests being processed in
>> parallel. This is especially true with the scheduler. Userland could submit
>> a whole stream of batches that all get queued up in the scheduler. Only
>> later do they get submitted to the hardware. The request must be allocated
>> up front because there is no other means of tracking them. But reserving
>> space at that point won't work because you either end up reserving massive
>> amounts of space if the reserve is cumulative, or not enough if only one
>> slot is reserved.
> At least with execlist we don't have that problem really since writing the
> ringbuffer is done synchronously and directly.
>
> For the legacy scheduler I expect that we won't do any of the ringbuf
> writes directly and instead that's all done by the scheduler
> asynchronously.
>
> So this should just be an issue while we are converting to the scheduler
> or on platforms that will never have one. And imo the request ringbuf
> reservation is the solution with the simplest impact on the design.
I don't understand what you mean here. The scheduler decouples the 
submission of a batch buffer to the driver with the submission of that 
batch buffer to the hardware. The submission code path itself is 
identical. The scheduler does not do any hardware writes - it merely 
adds an extra layer between the user interface code and the hardware 
access code. The request creation must be done at driver submission 
time. The hardware submission could be an arbitrary amount of time 
later. In the intervening time, any number of new batch buffers may be 
submitted to the driver and thus new requests be created. This is true 
for both legacy and execlist mode.

The space reserve would have to be done at the start of the hardware 
submission process not at driver submission time. I.e. it would need to 
be a separate and new i915_gem_request_reserve_space() call at the start 
of the back half of the exec buffer code. It could not be done during 
request creation.


>>> Everything else just readds olr through the backdoor, which is kinda what
>>> we wanted to avoid from an accounting pov. Because then you have again
>>> some random request outstanding which scoops up everything it encounters.
>> Not quite.  The difference is that with something like an outstanding failed
>> request rather than a lazy one, there is still the segregation of work. The
>> failed request will be posted and added to the request list in its entirety
>> before a new request is allocated and used for the new work.
> Well history lesson, but that's exactly how olr started out. Then the
> hydra grew heads to no end. That's why I don't want to go down this road
> again, since I've been on that trip the past 3 years ;-) And since your
> motivation for olr light is exactly the one I provided 3 years ago to get
> my patch in I think history repeating is likely.
> -Daniel
Fair enough. Let's stay away from the evil hydra.

John.

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Re: [PATCH 03/53] drm/i915: Cache ringbuf pointer in request structure

[John Harrison]

On 05/03/2015 13:56, Tomas Elf wrote:
> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> In execlist mode, the ringbuf is a function of the ring and context 
>> whereas in
>> legacy mode, it is derived from the ring alone. Thus the calculation 
>> required to
>> determine the ringbuf pointer from the ring (and context) also needs 
>> to test
>> execlist mode or not. This is messy.
>>
>> Further, the request structure holds a pointer to both the ring and 
>> the context
>> for which it was created. Thus, given a request, it is possible to 
>> derive the
>> ringbuf in either legacy or execlist mode. Hence it is necessary to 
>> pass just
>> the request in to all the low level functions rather than some 
>> combination of
>> request, ring, context and ringbuf. However, rather than 
>> recalculating it each
>> time, it is much simpler to just cache the ringbuf pointer in the 
>> request
>> structure itself.
>>
>> Caching the pointer means the calculation is done one at request 
>> creation time
>> and all further code and simply read it directly from the request 
>> structure.
>>
>
> "Caching the pointer means the calculation is done one at request 
> creation time and all further code and simply read it directly from 
> the request structure"
>
> Nitpick: Broken sentence, you might want to fix that. Aside from that, 
> no major problems with this patch.
Bit late now, it has already been merged as is.

>
> Reviewed-by: Tomas Elf <tomas.elf@intel.com>
>
> Thanks,
> Tomas
>
>> For: VIZ-5115
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.h         |    3 ++-
>>   drivers/gpu/drm/i915/i915_gem.c         |   14 +-------------
>>   drivers/gpu/drm/i915/intel_lrc.c        |    6 ++++--
>>   drivers/gpu/drm/i915/intel_ringbuffer.c |    1 +
>>   4 files changed, 8 insertions(+), 16 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index 2dedd43..ba09137 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2144,8 +2144,9 @@ struct drm_i915_gem_request {
>>       /** Position in the ringbuffer of the end of the whole request */
>>       u32 tail;
>>
>> -    /** Context related to this request */
>> +    /** Context and ring buffer related to this request */
>>       struct intel_context *ctx;
>> +    struct intel_ringbuffer *ringbuf;
>>
>>       /** Batch buffer related to this request if any */
>>       struct drm_i915_gem_object *batch_obj;
>> diff --git a/drivers/gpu/drm/i915/i915_gem.c 
>> b/drivers/gpu/drm/i915/i915_gem.c
>> index 61134ab..7a0dc7c 100644
>> --- a/drivers/gpu/drm/i915/i915_gem.c
>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>> @@ -2763,7 +2763,6 @@ i915_gem_retire_requests_ring(struct 
>> intel_engine_cs *ring)
>>
>>       while (!list_empty(&ring->request_list)) {
>>           struct drm_i915_gem_request *request;
>> -        struct intel_ringbuffer *ringbuf;
>>
>>           request = list_first_entry(&ring->request_list,
>>                          struct drm_i915_gem_request,
>> @@ -2774,23 +2773,12 @@ i915_gem_retire_requests_ring(struct 
>> intel_engine_cs *ring)
>>
>>           trace_i915_gem_request_retire(request);
>>
>> -        /* This is one of the few common intersection points
>> -         * between legacy ringbuffer submission and execlists:
>> -         * we need to tell them apart in order to find the correct
>> -         * ringbuffer to which the request belongs to.
>> -         */
>> -        if (i915.enable_execlists) {
>> -            struct intel_context *ctx = request->ctx;
>> -            ringbuf = ctx->engine[ring->id].ringbuf;
>> -        } else
>> -            ringbuf = ring->buffer;
>> -
>>           /* We know the GPU must have read the request to have
>>            * sent us the seqno + interrupt, so use the position
>>            * of tail of the request to update the last known position
>>            * of the GPU head.
>>            */
>> -        ringbuf->last_retired_head = request->postfix;
>> +        request->ringbuf->last_retired_head = request->postfix;
>>
>>           i915_gem_free_request(request);
>>       }
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
>> b/drivers/gpu/drm/i915/intel_lrc.c
>> index 637cbb7..f14b517 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> @@ -888,12 +888,14 @@ static int logical_ring_alloc_request(struct 
>> intel_engine_cs *ring,
>>           return ret;
>>       }
>>
>> -    /* Hold a reference to the context this request belongs to
>> +    /*
>> +     * Hold a reference to the context this request belongs to
>>        * (we will need it when the time comes to emit/retire the
>> -     * request).
>> +     * request). Likewise, the ringbuff is useful to keep track of.
>>        */
>>       request->ctx = ctx;
>>       i915_gem_context_reference(request->ctx);
>> +    request->ringbuf = ctx->engine[ring->id].ringbuf;
>>
>>       ring->outstanding_lazy_request = request;
>>       return 0;
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
>> b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index ca7de3d..7fd89e5 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -2179,6 +2179,7 @@ intel_ring_alloc_request(struct intel_engine_cs 
>> *ring)
>>
>>       kref_init(&request->ref);
>>       request->ring = ring;
>> +    request->ringbuf = ring->buffer;
>>       request->uniq = dev_private->request_uniq++;
>>
>>       ret = i915_gem_get_seqno(ring->dev, &request->seqno);
>>
>

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Re: [PATCH 01/53] drm/i915: Rename 'flags' to 'dispatch_flags' for better code reading

[John Harrison]

On 05/03/2015 13:21, Tomas Elf wrote:
> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> There is a flags word that is passed through the execbuffer code path 
>> all the
>> way from initial decoding of the user parameters down to the very 
>> final dispatch
>> buffer call. It is simply called 'flags'. Unfortuantely, there are 
>> many other
>> flags words floating around in the same blocks of code. Even more 
>> once the GPU
>> scheduler arrives.
>>
>> This patch makes it more obvious exactly which flags word is which by 
>> renaming
>> 'flags' to 'dispatch_flags'. Note that the bit definitions for this 
>> flags word
>> already have an 'I915_DISPATCH_' prefix on them and so are not quite so
>> ambiguous.
>>
>> For: VIZ-1587
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   25 ++++++++++----------
>>   drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++----
>>   drivers/gpu/drm/i915/intel_lrc.h           |    2 +-
>>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   35 
>> ++++++++++++++++------------
>>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ++--
>>   5 files changed, 41 insertions(+), 35 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
>> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> index b773368..ec9ea45 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> @@ -1138,7 +1138,7 @@ i915_gem_ringbuffer_submission(struct 
>> drm_device *dev, struct drm_file *file,
>>                      struct drm_i915_gem_execbuffer2 *args,
>>                      struct list_head *vmas,
>>                      struct drm_i915_gem_object *batch_obj,
>> -                   u64 exec_start, u32 flags)
>> +                   u64 exec_start, u32 dispatch_flags)
>
> You didn't change the parameter name in the prototype declaration in 
> i915_drv.h .
Bit late now, this patch has already been merged. Also, it isn't really 
worth following up with an extra fix patch as those parameters get 
removed in a later patch in this series anyway (albeit one that is being 
discussed as contentious).

>
> Thanks,
> Tomas
>
>>   {
>>       struct drm_clip_rect *cliprects = NULL;
>>       struct drm_i915_private *dev_priv = dev->dev_private;
>> @@ -1266,19 +1266,19 @@ i915_gem_ringbuffer_submission(struct 
>> drm_device *dev, struct drm_file *file,
>>
>>               ret = ring->dispatch_execbuffer(ring,
>>                               exec_start, exec_len,
>> -                            flags);
>> +                            dispatch_flags);
>>               if (ret)
>>                   goto error;
>>           }
>>       } else {
>>           ret = ring->dispatch_execbuffer(ring,
>>                           exec_start, exec_len,
>> -                        flags);
>> +                        dispatch_flags);
>>           if (ret)
>>               return ret;
>>       }
>>
>> -    trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), flags);
>> +    trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), 
>> dispatch_flags);
>>
>>       i915_gem_execbuffer_move_to_active(vmas, ring);
>>       i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
>> @@ -1353,7 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, 
>> void *data,
>>       struct i915_address_space *vm;
>>       const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>>       u64 exec_start = args->batch_start_offset;
>> -    u32 flags;
>> +    u32 dispatch_flags;
>>       int ret;
>>       bool need_relocs;
>>
>> @@ -1364,15 +1364,15 @@ i915_gem_do_execbuffer(struct drm_device 
>> *dev, void *data,
>>       if (ret)
>>           return ret;
>>
>> -    flags = 0;
>> +    dispatch_flags = 0;
>>       if (args->flags & I915_EXEC_SECURE) {
>>           if (!file->is_master || !capable(CAP_SYS_ADMIN))
>>               return -EPERM;
>>
>> -        flags |= I915_DISPATCH_SECURE;
>> +        dispatch_flags |= I915_DISPATCH_SECURE;
>>       }
>>       if (args->flags & I915_EXEC_IS_PINNED)
>> -        flags |= I915_DISPATCH_PINNED;
>> +        dispatch_flags |= I915_DISPATCH_PINNED;
>>
>>       if ((args->flags & I915_EXEC_RING_MASK) > LAST_USER_RING) {
>>           DRM_DEBUG("execbuf with unknown ring: %d\n",
>> @@ -1495,7 +1495,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, 
>> void *data,
>>                                 args->batch_start_offset,
>>                                 args->batch_len,
>>                                 file->is_master,
>> -                              &flags);
>> +                              &dispatch_flags);
>>           if (IS_ERR(batch_obj)) {
>>               ret = PTR_ERR(batch_obj);
>>               goto err;
>> @@ -1507,7 +1507,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, 
>> void *data,
>>       /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the 
>> "non-secure
>>        * batch" bit. Hence we need to pin secure batches into the 
>> global gtt.
>>        * hsw should have this fixed, but bdw mucks it up again. */
>> -    if (flags & I915_DISPATCH_SECURE) {
>> +    if (dispatch_flags & I915_DISPATCH_SECURE) {
>>           /*
>>            * So on first glance it looks freaky that we pin the batch 
>> here
>>            * outside of the reservation loop. But:
>> @@ -1527,7 +1527,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, 
>> void *data,
>>           exec_start += i915_gem_obj_offset(batch_obj, vm);
>>
>>       ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
>> -                      &eb->vmas, batch_obj, exec_start, flags);
>> +                      &eb->vmas, batch_obj, exec_start,
>> +                      dispatch_flags);
>>
>>       /*
>>        * FIXME: We crucially rely upon the active tracking for the 
>> (ppgtt)
>> @@ -1535,7 +1536,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, 
>> void *data,
>>        * needs to be adjusted to also track the ggtt batch vma 
>> properly as
>>        * active.
>>        */
>> -    if (flags & I915_DISPATCH_SECURE)
>> +    if (dispatch_flags & I915_DISPATCH_SECURE)
>>           i915_gem_object_ggtt_unpin(batch_obj);
>>   err:
>>       /* the request owns the ref now */
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
>> b/drivers/gpu/drm/i915/intel_lrc.c
>> index aafcef3..f30a8e3 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> @@ -620,7 +620,7 @@ static int execlists_move_to_gpu(struct 
>> intel_ringbuffer *ringbuf,
>>    * @vmas: list of vmas.
>>    * @batch_obj: the batchbuffer to submit.
>>    * @exec_start: batchbuffer start virtual address pointer.
>> - * @flags: translated execbuffer call flags.
>> + * @dispatch_flags: translated execbuffer call flags.
>>    *
>>    * This is the evil twin version of i915_gem_ringbuffer_submission. 
>> It abstracts
>>    * away the submission details of the execbuffer ioctl call.
>> @@ -633,7 +633,7 @@ int intel_execlists_submission(struct drm_device 
>> *dev, struct drm_file *file,
>>                      struct drm_i915_gem_execbuffer2 *args,
>>                      struct list_head *vmas,
>>                      struct drm_i915_gem_object *batch_obj,
>> -                   u64 exec_start, u32 flags)
>> +                   u64 exec_start, u32 dispatch_flags)
>>   {
>>       struct drm_i915_private *dev_priv = dev->dev_private;
>>       struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
>> @@ -706,7 +706,7 @@ int intel_execlists_submission(struct drm_device 
>> *dev, struct drm_file *file,
>>           dev_priv->relative_constants_mode = instp_mode;
>>       }
>>
>> -    ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags);
>> +    ret = ring->emit_bb_start(ringbuf, ctx, exec_start, 
>> dispatch_flags);
>>       if (ret)
>>           return ret;
>>
>> @@ -1163,9 +1163,9 @@ static int gen9_init_render_ring(struct 
>> intel_engine_cs *ring)
>>
>>   static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
>>                     struct intel_context *ctx,
>> -                  u64 offset, unsigned flags)
>> +                  u64 offset, unsigned dispatch_flags)
>>   {
>> -    bool ppgtt = !(flags & I915_DISPATCH_SECURE);
>> +    bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
>>       int ret;
>>
>>       ret = intel_logical_ring_begin(ringbuf, ctx, 4);
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.h 
>> b/drivers/gpu/drm/i915/intel_lrc.h
>> index f635735..b66fc4d 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.h
>> +++ b/drivers/gpu/drm/i915/intel_lrc.h
>> @@ -82,7 +82,7 @@ int intel_execlists_submission(struct drm_device 
>> *dev, struct drm_file *file,
>>                      struct drm_i915_gem_execbuffer2 *args,
>>                      struct list_head *vmas,
>>                      struct drm_i915_gem_object *batch_obj,
>> -                   u64 exec_start, u32 flags);
>> +                   u64 exec_start, u32 dispatch_flags);
>>   u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
>>
>>   void intel_lrc_irq_handler(struct intel_engine_cs *ring);
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
>> b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index d17e76d..ca7de3d 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -1690,7 +1690,7 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
>>   static int
>>   i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>>                u64 offset, u32 length,
>> -             unsigned flags)
>> +             unsigned dispatch_flags)
>>   {
>>       int ret;
>>
>> @@ -1701,7 +1701,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs 
>> *ring,
>>       intel_ring_emit(ring,
>>               MI_BATCH_BUFFER_START |
>>               MI_BATCH_GTT |
>> -            (flags & I915_DISPATCH_SECURE ? 0 : 
>> MI_BATCH_NON_SECURE_I965));
>> +            (dispatch_flags & I915_DISPATCH_SECURE ?
>> +             0 : MI_BATCH_NON_SECURE_I965));
>>       intel_ring_emit(ring, offset);
>>       intel_ring_advance(ring);
>>
>> @@ -1714,8 +1715,8 @@ i965_dispatch_execbuffer(struct intel_engine_cs 
>> *ring,
>>   #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
>>   static int
>>   i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>> -                u64 offset, u32 len,
>> -                unsigned flags)
>> +             u64 offset, u32 len,
>> +             unsigned dispatch_flags)
>>   {
>>       u32 cs_offset = ring->scratch.gtt_offset;
>>       int ret;
>> @@ -1733,7 +1734,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs 
>> *ring,
>>       intel_ring_emit(ring, MI_NOOP);
>>       intel_ring_advance(ring);
>>
>> -    if ((flags & I915_DISPATCH_PINNED) == 0) {
>> +    if ((dispatch_flags & I915_DISPATCH_PINNED) == 0) {
>>           if (len > I830_BATCH_LIMIT)
>>               return -ENOSPC;
>>
>> @@ -1765,7 +1766,8 @@ i830_dispatch_execbuffer(struct intel_engine_cs 
>> *ring,
>>           return ret;
>>
>>       intel_ring_emit(ring, MI_BATCH_BUFFER);
>> -    intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 
>> : MI_BATCH_NON_SECURE));
>> +    intel_ring_emit(ring, offset | (dispatch_flags & 
>> I915_DISPATCH_SECURE ?
>> +                    0 : MI_BATCH_NON_SECURE));
>>       intel_ring_emit(ring, offset + len - 8);
>>       intel_ring_emit(ring, MI_NOOP);
>>       intel_ring_advance(ring);
>> @@ -1776,7 +1778,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs 
>> *ring,
>>   static int
>>   i915_dispatch_execbuffer(struct intel_engine_cs *ring,
>>                u64 offset, u32 len,
>> -             unsigned flags)
>> +             unsigned dispatch_flags)
>>   {
>>       int ret;
>>
>> @@ -1785,7 +1787,8 @@ i915_dispatch_execbuffer(struct intel_engine_cs 
>> *ring,
>>           return ret;
>>
>>       intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT);
>> -    intel_ring_emit(ring, offset | (flags & I915_DISPATCH_SECURE ? 0 
>> : MI_BATCH_NON_SECURE));
>> +    intel_ring_emit(ring, offset | (dispatch_flags & 
>> I915_DISPATCH_SECURE ?
>> +                    0 : MI_BATCH_NON_SECURE));
>>       intel_ring_advance(ring);
>>
>>       return 0;
>> @@ -2352,9 +2355,10 @@ static int gen6_bsd_ring_flush(struct 
>> intel_engine_cs *ring,
>>   static int
>>   gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>>                     u64 offset, u32 len,
>> -                  unsigned flags)
>> +                  unsigned dispatch_flags)
>>   {
>> -    bool ppgtt = USES_PPGTT(ring->dev) && !(flags & 
>> I915_DISPATCH_SECURE);
>> +    bool ppgtt = USES_PPGTT(ring->dev) &&
>> +            !(dispatch_flags & I915_DISPATCH_SECURE);
>>       int ret;
>>
>>       ret = intel_ring_begin(ring, 4);
>> @@ -2373,8 +2377,8 @@ gen8_ring_dispatch_execbuffer(struct 
>> intel_engine_cs *ring,
>>
>>   static int
>>   hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>> -                  u64 offset, u32 len,
>> -                  unsigned flags)
>> +                 u64 offset, u32 len,
>> +                 unsigned dispatch_flags)
>>   {
>>       int ret;
>>
>> @@ -2384,7 +2388,7 @@ hsw_ring_dispatch_execbuffer(struct 
>> intel_engine_cs *ring,
>>
>>       intel_ring_emit(ring,
>>               MI_BATCH_BUFFER_START |
>> -            (flags & I915_DISPATCH_SECURE ?
>> +            (dispatch_flags & I915_DISPATCH_SECURE ?
>>                0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW));
>>       /* bit0-7 is the length on GEN6+ */
>>       intel_ring_emit(ring, offset);
>> @@ -2396,7 +2400,7 @@ hsw_ring_dispatch_execbuffer(struct 
>> intel_engine_cs *ring,
>>   static int
>>   gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>>                     u64 offset, u32 len,
>> -                  unsigned flags)
>> +                  unsigned dispatch_flags)
>>   {
>>       int ret;
>>
>> @@ -2406,7 +2410,8 @@ gen6_ring_dispatch_execbuffer(struct 
>> intel_engine_cs *ring,
>>
>>       intel_ring_emit(ring,
>>               MI_BATCH_BUFFER_START |
>> -            (flags & I915_DISPATCH_SECURE ? 0 : 
>> MI_BATCH_NON_SECURE_I965));
>> +            (dispatch_flags & I915_DISPATCH_SECURE ?
>> +             0 : MI_BATCH_NON_SECURE_I965));
>>       /* bit0-7 is the length on GEN6+ */
>>       intel_ring_emit(ring, offset);
>>       intel_ring_advance(ring);
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
>> b/drivers/gpu/drm/i915/intel_ringbuffer.h
>> index b6c484f..ffa3724 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
>> @@ -164,7 +164,7 @@ struct  intel_engine_cs {
>>                        u32 seqno);
>>       int        (*dispatch_execbuffer)(struct intel_engine_cs *ring,
>>                              u64 offset, u32 length,
>> -                           unsigned flags);
>> +                           unsigned dispatch_flags);
>>   #define I915_DISPATCH_SECURE 0x1
>>   #define I915_DISPATCH_PINNED 0x2
>>       void        (*cleanup)(struct intel_engine_cs *ring);
>> @@ -242,7 +242,7 @@ struct  intel_engine_cs {
>>                         u32 flush_domains);
>>       int        (*emit_bb_start)(struct intel_ringbuffer *ringbuf,
>>                        struct intel_context *ctx,
>> -                     u64 offset, unsigned flags);
>> +                     u64 offset, unsigned dispatch_flags);
>>
>>       /**
>>        * List of objects currently involved in rendering from the
>>
>

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Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[Daniel Vetter]

On Fri, Mar 06, 2015 at 11:38:44AM +0000, John Harrison wrote:
> On 05/03/2015 16:14, Daniel Vetter wrote:
> >On Thu, Mar 05, 2015 at 03:06:42PM +0000, John Harrison wrote:
> >>On 05/03/2015 14:44, Daniel Vetter wrote:
> >>>Imo reserving a bit of ring space for each add_request should be solid.
> >>>Userspace uses the exact same reservation logic for adding end-of-batch
> >>>workarounds. The only thing needed to make this solid is to WARN if
> >>>add_request ends up using more ring space than what we've reserved (not
> >>>just when it actually runs out, that obviously doesn't happen often
> >>>enough for testing).
> >>The problem is that there could be multiple requests being processed in
> >>parallel. This is especially true with the scheduler. Userland could submit
> >>a whole stream of batches that all get queued up in the scheduler. Only
> >>later do they get submitted to the hardware. The request must be allocated
> >>up front because there is no other means of tracking them. But reserving
> >>space at that point won't work because you either end up reserving massive
> >>amounts of space if the reserve is cumulative, or not enough if only one
> >>slot is reserved.
> >At least with execlist we don't have that problem really since writing the
> >ringbuffer is done synchronously and directly.
> >
> >For the legacy scheduler I expect that we won't do any of the ringbuf
> >writes directly and instead that's all done by the scheduler
> >asynchronously.
> >
> >So this should just be an issue while we are converting to the scheduler
> >or on platforms that will never have one. And imo the request ringbuf
> >reservation is the solution with the simplest impact on the design.
> I don't understand what you mean here. The scheduler decouples the
> submission of a batch buffer to the driver with the submission of that batch
> buffer to the hardware. The submission code path itself is identical. The
> scheduler does not do any hardware writes - it merely adds an extra layer
> between the user interface code and the hardware access code. The request
> creation must be done at driver submission time. The hardware submission
> could be an arbitrary amount of time later. In the intervening time, any
> number of new batch buffers may be submitted to the driver and thus new
> requests be created. This is true for both legacy and execlist mode.
> 
> The space reserve would have to be done at the start of the hardware
> submission process not at driver submission time. I.e. it would need to be a
> separate and new i915_gem_request_reserve_space() call at the start of the
> back half of the exec buffer code. It could not be done during request
> creation.

Yeah with the scheduler we need to take out the reservation again since it
doesn't make a lot of sense - the scheduler is the safety net that
guarantees execution (barring gpu death ofc as always) when the execbuf
ioctl returns 0. Maybe in the end we need a special alloc_request function
for execbuf to only reserve when the scheduler isn't around.

That additional work is just part of the prize we have to pay to never
break things while refactoring code. And since we'll get the execlist
scheduler in first that reservation code will probably stick around for a
while (or maybe forever even if we decide against upstreaming the gen7
scheduler).

Does this make sense?

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 05/53] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[Daniel Vetter]

On Thu, Mar 05, 2015 at 02:45:11PM +0000, Tomas Elf wrote:
> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> >From: John Harrison <John.C.Harrison@Intel.com>
> >
> >For some reason, the i915_add_request() call in
> >i915_gem_execbuffer_retire_commands() was explicitly having its return code
> >ignored. The _retire_commands() function itself was 'void'. Given that
> >_add_request() can fail without dispatching the batch buffer, this seems odd.
> >
> >Also shrunk the parameter list to a single structure as everything it requires
> >is available in the execbuff_params object.
> >
> >For: VIZ-5115
> >Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >---
> >  drivers/gpu/drm/i915/i915_drv.h            |    5 +----
> >  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   16 +++++++---------
> >  drivers/gpu/drm/i915/intel_lrc.c           |    3 +--
> >  3 files changed, 9 insertions(+), 15 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >index fdd63ab..b350910 100644
> >--- a/drivers/gpu/drm/i915/i915_drv.h
> >+++ b/drivers/gpu/drm/i915/i915_drv.h
> >@@ -2640,10 +2640,7 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
> >  			     struct drm_file *file_priv);
> >  void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
> >  					struct intel_engine_cs *ring);
> >-void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
> >-					 struct drm_file *file,
> >-					 struct intel_engine_cs *ring,
> >-					 struct drm_i915_gem_object *obj);
> >+int i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
> >  int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
> >  				   struct drm_i915_gem_execbuffer2 *args,
> >  				   struct list_head *vmas);
> >diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >index 93b0ef0..ca85803 100644
> >--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >@@ -989,17 +989,15 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
> >  	}
> >  }
> >
> >-void
> >-i915_gem_execbuffer_retire_commands(struct drm_device *dev,
> >-				    struct drm_file *file,
> >-				    struct intel_engine_cs *ring,
> >-				    struct drm_i915_gem_object *obj)
> >+int
> >+i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
> >  {
> >  	/* Unconditionally force add_request to emit a full flush. */
> >-	ring->gpu_caches_dirty = true;
> >+	params->ring->gpu_caches_dirty = true;
> >
> >  	/* Add a breadcrumb for the completion of the batch buffer */
> >-	(void)__i915_add_request(ring, file, obj);
> >+	return __i915_add_request(params->ring, params->file,
> >+				  params->batch_obj);
> >  }
> >
> >  static int
> >@@ -1282,8 +1280,8 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
> >  	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
> >
> >  	i915_gem_execbuffer_move_to_active(vmas, ring);
> >-	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
> >-					    params->batch_obj);
> >+
> >+	ret = i915_gem_execbuffer_retire_commands(params);
> >
> >  error:
> >  	kfree(cliprects);
> >diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> >index f6a24e8a2..dc474b4 100644
> >--- a/drivers/gpu/drm/i915/intel_lrc.c
> >+++ b/drivers/gpu/drm/i915/intel_lrc.c
> >@@ -715,9 +715,8 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
> >  	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
> >
> >  	i915_gem_execbuffer_move_to_active(vmas, ring);
> >-	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
> >
> >-	return 0;
> >+	return i915_gem_execbuffer_retire_commands(params);
> >  }
> >
> >  void intel_execlists_retire_requests(struct intel_engine_cs *ring)
> >
> 
> Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Patch discussion unfortunately split since I've made all my comments on
the earlier iteration. Anyway there's a big discussion there, you might
want to look into that and reconsder your r-b ;-)
-Daniel
-- 
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Software Engineer, Intel Corporation
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Re: [PATCH 08/53] drm/i915: Update alloc_request to return the allocated request

[Daniel Vetter]

On Thu, Mar 05, 2015 at 08:13:07PM +0000, Tomas Elf wrote:
> On 05/03/2015 15:46, John Harrison wrote:
> >On 05/03/2015 15:27, Tomas Elf wrote:
> >>On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> >>>From: John Harrison <John.C.Harrison@Intel.com>
> >>>
> >>>The alloc_request() function does not actually return the newly
> >>>allocated
> >>>request. Instead, it must be pulled from
> >>>ring->outstanding_lazy_request. This
> >>>patch fixes this so that code can create a request and start using it
> >>>knowing
> >>>exactly which request it actually owns.
> >>>
> >>>For: VIZ-5115
> >>>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >>>---
> >>>  drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
> >>>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
> >>>  drivers/gpu/drm/i915/intel_lrc.c           |   13 +++++++++----
> >>>  drivers/gpu/drm/i915/intel_lrc.h           |    3 ++-
> >>>  drivers/gpu/drm/i915/intel_ringbuffer.c    |   14 ++++++++++----
> >>>  drivers/gpu/drm/i915/intel_ringbuffer.h    |    3 ++-
> >>>  6 files changed, 27 insertions(+), 12 deletions(-)
> >>>
> >>>diff --git a/drivers/gpu/drm/i915/i915_drv.h
> >>>b/drivers/gpu/drm/i915/i915_drv.h
> >>>index 87a4a2e..90223f208 100644
> >>>--- a/drivers/gpu/drm/i915/i915_drv.h
> >>>+++ b/drivers/gpu/drm/i915/i915_drv.h
> >>>@@ -1909,7 +1909,8 @@ struct drm_i915_private {
> >>>      /* Abstract the submission mechanism (legacy ringbuffer or
> >>>execlists) away */
> >>>      struct {
> >>>          int (*alloc_request)(struct intel_engine_cs *ring,
> >>>-                     struct intel_context *ctx);
> >>>+                     struct intel_context *ctx,
> >>>+                     struct drm_i915_gem_request **req_out);
> >>>          int (*do_execbuf)(struct i915_execbuffer_params *params,
> >>>                    struct drm_i915_gem_execbuffer2 *args,
> >>>                    struct list_head *vmas);
> >>>diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>>b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>>index 61471e9..37dcc6f 100644
> >>>--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>>+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >>>@@ -1353,6 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
> >>>void *data,
> >>>      struct i915_address_space *vm;
> >>>      struct i915_execbuffer_params params_master; /* XXX: will be
> >>>removed later */
> >>>      struct i915_execbuffer_params *params = &params_master;
> >>>+    struct drm_i915_gem_request *request;
> >>
> >>Please initialize request to NULL. If you accidentally dereference it
> >>before it is allocated (seeing as the allocation is several pages down
> >>from here) you get a null pointer exception, which is a clear
> >>indication that you did something stupid. Otherwise it's not clear
> >>what will happen (sure, page fault, but null pointer exception is a
> >>better failure indication).
> >
> >That should generate a 'use before assignment' compiler warning.
> 
> That assumes that the developer in question isn't too busy hacking to check
> for warnings (in all honesty that developer probably would've been me ;)).
> Sure, you should always check for warnings but if we can save this developer
> some time by giving them a clear run-time indication aside from the
> compile-time warning then that would not be a bad thing. I've been there
> myself a few times and I know times in the past where this would've saved me
> the time it takes to rebuild and redeploy the kernel once.

kbuild is _very_ good at catching and reporting these. And the linux
kernel generally has a 0 warnings rule, which means even when it slips
through a lot of developers will get mad at me for not spotting it.

I think relying upon gcc to do its job here is safe enough. We only
initialize stack variables if it's really needed, or if gcc is too dense
to figure it out itself.
-Daniel
-- 
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Software Engineer, Intel Corporation
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Re: [PATCH 28/53] drm/i915: Update queue_flip() to do explicit request management

[Daniel Vetter]

On Thu, Mar 05, 2015 at 07:29:27PM +0000, Tomas Elf wrote:
> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> >From: John Harrison <John.C.Harrison@Intel.com>
> >
> >Updated the display page flip code to do explicit request creation and
> >submission rather than relying on the OLR and just hoping that the request
> >actually gets submitted at some random point.
> >
> >The sequence is now to create a request, queue the work to the ring, assign the
> >known request to the flip queue work item then actually submit the work and post
> >the request.
> >
> >For: VIZ-5115
> >Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >---
> >  drivers/gpu/drm/i915/i915_drv.h         |    2 +-
> >  drivers/gpu/drm/i915/intel_display.c    |   43 ++++++++++++++++++++-----------
> >  drivers/gpu/drm/i915/intel_ringbuffer.c |    2 +-
> >  drivers/gpu/drm/i915/intel_ringbuffer.h |    1 -
> >  4 files changed, 30 insertions(+), 18 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >index e9cc343..34fd338 100644
> >--- a/drivers/gpu/drm/i915/i915_drv.h
> >+++ b/drivers/gpu/drm/i915/i915_drv.h
> >@@ -560,7 +560,7 @@ struct drm_i915_display_funcs {
> >  	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
> >  			  struct drm_framebuffer *fb,
> >  			  struct drm_i915_gem_object *obj,
> >-			  struct intel_engine_cs *ring,
> >+			  struct drm_i915_gem_request *req,
> >  			  uint32_t flags);
> >  	void (*update_primary_plane)(struct drm_crtc *crtc,
> >  				     struct drm_framebuffer *fb,
> >diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >index 3b0fe9f..c32bc0c 100644
> >--- a/drivers/gpu/drm/i915/intel_display.c
> >+++ b/drivers/gpu/drm/i915/intel_display.c
> >@@ -9251,9 +9251,10 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
> >  				 struct drm_crtc *crtc,
> >  				 struct drm_framebuffer *fb,
> >  				 struct drm_i915_gem_object *obj,
> >-				 struct intel_engine_cs *ring,
> >+				 struct drm_i915_gem_request *req,
> >  				 uint32_t flags)
> >  {
> >+	struct intel_engine_cs *ring = req->ring;
> >  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >  	u32 flip_mask;
> >  	int ret;
> >@@ -9278,7 +9279,6 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
> >  	intel_ring_emit(ring, 0); /* aux display base address, unused */
> >
> >  	intel_mark_page_flip_active(intel_crtc);
> >-	__intel_ring_advance(ring);
> >  	return 0;
> >  }
> >
> >@@ -9286,9 +9286,10 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
> >  				 struct drm_crtc *crtc,
> >  				 struct drm_framebuffer *fb,
> >  				 struct drm_i915_gem_object *obj,
> >-				 struct intel_engine_cs *ring,
> >+				 struct drm_i915_gem_request *req,
> >  				 uint32_t flags)
> >  {
> >+	struct intel_engine_cs *ring = req->ring;
> >  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >  	u32 flip_mask;
> >  	int ret;
> >@@ -9310,7 +9311,6 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
> >  	intel_ring_emit(ring, MI_NOOP);
> >
> >  	intel_mark_page_flip_active(intel_crtc);
> >-	__intel_ring_advance(ring);
> >  	return 0;
> >  }
> >
> >@@ -9318,9 +9318,10 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
> >  				 struct drm_crtc *crtc,
> >  				 struct drm_framebuffer *fb,
> >  				 struct drm_i915_gem_object *obj,
> >-				 struct intel_engine_cs *ring,
> >+				 struct drm_i915_gem_request *req,
> >  				 uint32_t flags)
> >  {
> >+	struct intel_engine_cs *ring = req->ring;
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >  	uint32_t pf, pipesrc;
> >@@ -9349,7 +9350,6 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
> >  	intel_ring_emit(ring, pf | pipesrc);
> >
> >  	intel_mark_page_flip_active(intel_crtc);
> >-	__intel_ring_advance(ring);
> >  	return 0;
> >  }
> >
> >@@ -9357,9 +9357,10 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
> >  				 struct drm_crtc *crtc,
> >  				 struct drm_framebuffer *fb,
> >  				 struct drm_i915_gem_object *obj,
> >-				 struct intel_engine_cs *ring,
> >+				 struct drm_i915_gem_request *req,
> >  				 uint32_t flags)
> >  {
> >+	struct intel_engine_cs *ring = req->ring;
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >  	uint32_t pf, pipesrc;
> >@@ -9385,7 +9386,6 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
> >  	intel_ring_emit(ring, pf | pipesrc);
> >
> >  	intel_mark_page_flip_active(intel_crtc);
> >-	__intel_ring_advance(ring);
> >  	return 0;
> >  }
> >
> >@@ -9393,9 +9393,10 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
> >  				 struct drm_crtc *crtc,
> >  				 struct drm_framebuffer *fb,
> >  				 struct drm_i915_gem_object *obj,
> >-				 struct intel_engine_cs *ring,
> >+				 struct drm_i915_gem_request *req,
> >  				 uint32_t flags)
> >  {
> >+	struct intel_engine_cs *ring = req->ring;
> >  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >  	uint32_t plane_bit = 0;
> >  	int len, ret;
> >@@ -9480,7 +9481,6 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
> >  	intel_ring_emit(ring, (MI_NOOP));
> >
> >  	intel_mark_page_flip_active(intel_crtc);
> >-	__intel_ring_advance(ring);
> >  	return 0;
> >  }
> >
> >@@ -9636,7 +9636,7 @@ static int intel_default_queue_flip(struct drm_device *dev,
> >  				    struct drm_crtc *crtc,
> >  				    struct drm_framebuffer *fb,
> >  				    struct drm_i915_gem_object *obj,
> >-				    struct intel_engine_cs *ring,
> >+				    struct drm_i915_gem_request *req,
> >  				    uint32_t flags)
> >  {
> >  	return -ENODEV;
> >@@ -9715,6 +9715,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
> >  	enum pipe pipe = intel_crtc->pipe;
> >  	struct intel_unpin_work *work;
> >  	struct intel_engine_cs *ring;
> >+	struct drm_i915_gem_request *request;
> >  	int ret;
> >
> >  	/*
> >@@ -9828,13 +9829,20 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
> >  		i915_gem_request_assign(&work->flip_queued_req,
> >  					obj->last_write_req);
> >  	} else {
> >-		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, ring,
> >-						   page_flip_flags);
> >+		ret = dev_priv->gt.alloc_request(ring, ring->default_context, &request);
> >  		if (ret)
> >  			goto cleanup_unpin;
> >
> >-		i915_gem_request_assign(&work->flip_queued_req,
> >-					intel_ring_get_request(ring));
> >+		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, request,
> >+						   page_flip_flags);
> >+		if (ret)
> >+			goto cleanup_request;
> >+
> >+		i915_gem_request_assign(&work->flip_queued_req, request);
> >+
> >+		ret = i915_add_request_no_flush(request->ring);
> >+		if (ret)
> >+			goto cleanup_request_assign;
> >  	}
> >
> >  	work->flip_queued_vblank = drm_vblank_count(dev, intel_crtc->pipe);
> >@@ -9851,6 +9859,11 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
> >
> >  	return 0;
> >
> >+cleanup_request_assign:
> >+	i915_gem_request_assign(&work->flip_queued_req, NULL);
> >+cleanup_request:
> >+	i915_gem_request_unreference(request);
> >+
> >  cleanup_unpin:
> >  	intel_unpin_fb_obj(obj);
> >  cleanup_pending:
> >diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >index efb1729..18d12a5 100644
> >--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> >+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >@@ -81,7 +81,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring)
> >  	return dev_priv->gpu_error.stop_rings & intel_ring_flag(ring);
> >  }
> >
> >-void __intel_ring_advance(struct intel_engine_cs *ring)
> >+static void __intel_ring_advance(struct intel_engine_cs *ring)
> >  {
> >  	struct intel_ringbuffer *ringbuf = ring->buffer;
> >  	ringbuf->tail &= ringbuf->size - 1;
> >diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >index c32f5a1..25d5ede 100644
> >--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> >+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >@@ -410,7 +410,6 @@ int __intel_ring_space(int head, int tail, int size);
> >  void intel_ring_update_space(struct intel_ringbuffer *ringbuf);
> >  int intel_ring_space(struct intel_ringbuffer *ringbuf);
> >  bool intel_ring_stopped(struct intel_engine_cs *ring);
> >-void __intel_ring_advance(struct intel_engine_cs *ring);
> >
> >  int __must_check intel_ring_idle(struct intel_engine_cs *ring);
> >  void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
> >
> 
> Could you perhaps make a small note in the commit message to clarify why you
> remove __intel_ring_advance everywhere? After discussing it with you I
> understood that it's because we already do the corresponding operation in
> i915_add_request_no_flush that is added to intel_crtc_page_flip but since
> these pieces of code are so far from each other it's not entirely obvious
> from the start that they have something to do with each other.
> 
> Or am I the only one who thinks this is not trivial?

I concur, the commit message should explain this.
-Daniel
-- 
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Software Engineer, Intel Corporation
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Re: [PATCH 01/53] drm/i915: Remove ironlake rc6 support

[Daniel Vetter]

On Thu, Mar 05, 2015 at 03:36:03PM +0000, John Harrison wrote:
> On 05/03/2015 15:22, Daniel Vetter wrote:
> >On Thu, Mar 05, 2015 at 02:03:03PM +0000, John.C.Harrison@Intel.com wrote:
> >>From: John Harrison <John.C.Harrison@Intel.com>
> >>
> >>Apparently, this has never worked reliably and is currently disabled. Also, the
> >>gains are not particularly impressive. Thus rather than try to keep unused code
> >>from decaying and having to update it for other driver changes, it was decided
> >>to simply remove it.
> >>
> >>For: VIZ-5115
> >>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >Queued for -next, thanks for the patch.
> >-Daniel
> 
> Can you hold off merging any of the other patches in the series for the
> moment. Tomas Elf is currently posting review comments, some with R-B some
> with change requests. Some of the re-work either for his comments or for
> yours causes changes which ripple through a number of the patches in the
> series. So I would like to repost the whole set once all the comments have
> been addressed. Otherwise, it all just gets far too messy as to which
> patches have or haven't been updated, what needs re-merging, which version
> is which, etc.

Fully agreed since that was my plan. I specifically pulled this one here
in since it should be otherwise free-standing and would likely cause
needless conflicts. For all the other patches it's better to first
converge on the review a bit more before proceeding with merging.
-Daniel
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Re: [PATCH 08/53] drm/i915: Update alloc_request to return the allocated request

[John Harrison]

On 06/03/2015 16:18, Daniel Vetter wrote:
> On Thu, Mar 05, 2015 at 08:13:07PM +0000, Tomas Elf wrote:
>> On 05/03/2015 15:46, John Harrison wrote:
>>> On 05/03/2015 15:27, Tomas Elf wrote:
>>>> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
>>>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>>>
>>>>> The alloc_request() function does not actually return the newly
>>>>> allocated
>>>>> request. Instead, it must be pulled from
>>>>> ring->outstanding_lazy_request. This
>>>>> patch fixes this so that code can create a request and start using it
>>>>> knowing
>>>>> exactly which request it actually owns.
>>>>>
>>>>> For: VIZ-5115
>>>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>>>> ---
>>>>>   drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
>>>>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
>>>>>   drivers/gpu/drm/i915/intel_lrc.c           |   13 +++++++++----
>>>>>   drivers/gpu/drm/i915/intel_lrc.h           |    3 ++-
>>>>>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   14 ++++++++++----
>>>>>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    3 ++-
>>>>>   6 files changed, 27 insertions(+), 12 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>>>>> b/drivers/gpu/drm/i915/i915_drv.h
>>>>> index 87a4a2e..90223f208 100644
>>>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>>>> @@ -1909,7 +1909,8 @@ struct drm_i915_private {
>>>>>       /* Abstract the submission mechanism (legacy ringbuffer or
>>>>> execlists) away */
>>>>>       struct {
>>>>>           int (*alloc_request)(struct intel_engine_cs *ring,
>>>>> -                     struct intel_context *ctx);
>>>>> +                     struct intel_context *ctx,
>>>>> +                     struct drm_i915_gem_request **req_out);
>>>>>           int (*do_execbuf)(struct i915_execbuffer_params *params,
>>>>>                     struct drm_i915_gem_execbuffer2 *args,
>>>>>                     struct list_head *vmas);
>>>>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>>> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>>> index 61471e9..37dcc6f 100644
>>>>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>>> @@ -1353,6 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>>>>> void *data,
>>>>>       struct i915_address_space *vm;
>>>>>       struct i915_execbuffer_params params_master; /* XXX: will be
>>>>> removed later */
>>>>>       struct i915_execbuffer_params *params = &params_master;
>>>>> +    struct drm_i915_gem_request *request;
>>>> Please initialize request to NULL. If you accidentally dereference it
>>>> before it is allocated (seeing as the allocation is several pages down
>>> >from here) you get a null pointer exception, which is a clear
>>>> indication that you did something stupid. Otherwise it's not clear
>>>> what will happen (sure, page fault, but null pointer exception is a
>>>> better failure indication).
>>> That should generate a 'use before assignment' compiler warning.
>> That assumes that the developer in question isn't too busy hacking to check
>> for warnings (in all honesty that developer probably would've been me ;)).
>> Sure, you should always check for warnings but if we can save this developer
>> some time by giving them a clear run-time indication aside from the
>> compile-time warning then that would not be a bad thing. I've been there
>> myself a few times and I know times in the past where this would've saved me
>> the time it takes to rebuild and redeploy the kernel once.
> kbuild is _very_ good at catching and reporting these. And the linux
> kernel generally has a 0 warnings rule, which means even when it slips
> through a lot of developers will get mad at me for not spotting it.
>
> I think relying upon gcc to do its job here is safe enough. We only
> initialize stack variables if it's really needed, or if gcc is too dense
> to figure it out itself.
> -Daniel

I agree with Daniel. If you ignore warnings in your own test builds, you 
get what you deserve. If you check warnings into the tree then you 
should be shot. Or worse.


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Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[Dave Gordon]

On 06/03/15 15:57, Daniel Vetter wrote:
> On Fri, Mar 06, 2015 at 11:38:44AM +0000, John Harrison wrote:
>> On 05/03/2015 16:14, Daniel Vetter wrote:
>>> On Thu, Mar 05, 2015 at 03:06:42PM +0000, John Harrison wrote:
>>>> On 05/03/2015 14:44, Daniel Vetter wrote:
>>>>> Imo reserving a bit of ring space for each add_request should be solid.
>>>>> Userspace uses the exact same reservation logic for adding end-of-batch
>>>>> workarounds. The only thing needed to make this solid is to WARN if
>>>>> add_request ends up using more ring space than what we've reserved (not
>>>>> just when it actually runs out, that obviously doesn't happen often
>>>>> enough for testing).
>>>> The problem is that there could be multiple requests being processed in
>>>> parallel. This is especially true with the scheduler. Userland could submit
>>>> a whole stream of batches that all get queued up in the scheduler. Only
>>>> later do they get submitted to the hardware. The request must be allocated
>>>> up front because there is no other means of tracking them. But reserving
>>>> space at that point won't work because you either end up reserving massive
>>>> amounts of space if the reserve is cumulative, or not enough if only one
>>>> slot is reserved.
>>> At least with execlist we don't have that problem really since writing the
>>> ringbuffer is done synchronously and directly.
>>>
>>> For the legacy scheduler I expect that we won't do any of the ringbuf
>>> writes directly and instead that's all done by the scheduler
>>> asynchronously.
>>>
>>> So this should just be an issue while we are converting to the scheduler
>>> or on platforms that will never have one. And imo the request ringbuf
>>> reservation is the solution with the simplest impact on the design.
>> I don't understand what you mean here. The scheduler decouples the
>> submission of a batch buffer to the driver with the submission of that batch
>> buffer to the hardware. The submission code path itself is identical. The
>> scheduler does not do any hardware writes - it merely adds an extra layer
>> between the user interface code and the hardware access code. The request
>> creation must be done at driver submission time. The hardware submission
>> could be an arbitrary amount of time later. In the intervening time, any
>> number of new batch buffers may be submitted to the driver and thus new
>> requests be created. This is true for both legacy and execlist mode.
>>
>> The space reserve would have to be done at the start of the hardware
>> submission process not at driver submission time. I.e. it would need to be a
>> separate and new i915_gem_request_reserve_space() call at the start of the
>> back half of the exec buffer code. It could not be done during request
>> creation.
> 
> Yeah with the scheduler we need to take out the reservation again since it
> doesn't make a lot of sense - the scheduler is the safety net that
> guarantees execution (barring gpu death ofc as always) when the execbuf
> ioctl returns 0. Maybe in the end we need a special alloc_request function
> for execbuf to only reserve when the scheduler isn't around.
> 
> That additional work is just part of the prize we have to pay to never
> break things while refactoring code. And since we'll get the execlist
> scheduler in first that reservation code will probably stick around for a
> while (or maybe forever even if we decide against upstreaming the gen7
> scheduler).
> 
> Does this make sense?
> 
> Thanks, Daniel

I already put a pre-reservation in the preemptive version of the
scheduler. It won't start to write anything in the ringbuffer unless
it's guaranteed there's enough space to write the whole set of commands
to run a batch, from preamble to finalisation. That means that none of
the ring_begin() commands can fail, and we won't leave a partial set of
commands in the ring to confuse any subsequent (successful) submissions.

And yes, I added warnings if the commands emitted to the ring overran
the amount of reserved space, so that developers would know if they'd
increased the total ringspace requirement.

If there are any other failure modes while writing to the ring, we
should simply back up to the start of the sequence (i.e. rewind the
software copy of TAIL to where it was after we checked for space -- easy
because we haven't updated h/w TAIL yet), and we can leave the request
queued for subsequent retry (or fail it as though it had been submitted
and then killed by TDR, if the failure mode suggests it's not retryable).

[aside] One version of this was posted as
http://lists.freedesktop.org/archives/intel-gfx/2014-December/057247.html but
that re-used intel_ring_begin() as a reserve-space call, whereas another
version has a separate nonblocking function intel_ring_test_space() for
prechecking available space [/aside]

.Dave.
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Re: [PATCH 08/53] drm/i915: Update alloc_request to return the allocated request

[Tomas Elf]

On 06/03/2015 17:36, John Harrison wrote:
> On 06/03/2015 16:18, Daniel Vetter wrote:
>> On Thu, Mar 05, 2015 at 08:13:07PM +0000, Tomas Elf wrote:
>>> On 05/03/2015 15:46, John Harrison wrote:
>>>> On 05/03/2015 15:27, Tomas Elf wrote:
>>>>> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
>>>>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>>>>
>>>>>> The alloc_request() function does not actually return the newly
>>>>>> allocated
>>>>>> request. Instead, it must be pulled from
>>>>>> ring->outstanding_lazy_request. This
>>>>>> patch fixes this so that code can create a request and start using it
>>>>>> knowing
>>>>>> exactly which request it actually owns.
>>>>>>
>>>>>> For: VIZ-5115
>>>>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>>>>> ---
>>>>>>   drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
>>>>>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
>>>>>>   drivers/gpu/drm/i915/intel_lrc.c           |   13 +++++++++----
>>>>>>   drivers/gpu/drm/i915/intel_lrc.h           |    3 ++-
>>>>>>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   14 ++++++++++----
>>>>>>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    3 ++-
>>>>>>   6 files changed, 27 insertions(+), 12 deletions(-)
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>>>>>> b/drivers/gpu/drm/i915/i915_drv.h
>>>>>> index 87a4a2e..90223f208 100644
>>>>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>>>>> @@ -1909,7 +1909,8 @@ struct drm_i915_private {
>>>>>>       /* Abstract the submission mechanism (legacy ringbuffer or
>>>>>> execlists) away */
>>>>>>       struct {
>>>>>>           int (*alloc_request)(struct intel_engine_cs *ring,
>>>>>> -                     struct intel_context *ctx);
>>>>>> +                     struct intel_context *ctx,
>>>>>> +                     struct drm_i915_gem_request **req_out);
>>>>>>           int (*do_execbuf)(struct i915_execbuffer_params *params,
>>>>>>                     struct drm_i915_gem_execbuffer2 *args,
>>>>>>                     struct list_head *vmas);
>>>>>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>>>> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>>>> index 61471e9..37dcc6f 100644
>>>>>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>>>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>>>>> @@ -1353,6 +1353,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>>>>>> void *data,
>>>>>>       struct i915_address_space *vm;
>>>>>>       struct i915_execbuffer_params params_master; /* XXX: will be
>>>>>> removed later */
>>>>>>       struct i915_execbuffer_params *params = &params_master;
>>>>>> +    struct drm_i915_gem_request *request;
>>>>> Please initialize request to NULL. If you accidentally dereference it
>>>>> before it is allocated (seeing as the allocation is several pages down
>>>> >from here) you get a null pointer exception, which is a clear
>>>>> indication that you did something stupid. Otherwise it's not clear
>>>>> what will happen (sure, page fault, but null pointer exception is a
>>>>> better failure indication).
>>>> That should generate a 'use before assignment' compiler warning.
>>> That assumes that the developer in question isn't too busy hacking to
>>> check
>>> for warnings (in all honesty that developer probably would've been me
>>> ;)).
>>> Sure, you should always check for warnings but if we can save this
>>> developer
>>> some time by giving them a clear run-time indication aside from the
>>> compile-time warning then that would not be a bad thing. I've been there
>>> myself a few times and I know times in the past where this would've
>>> saved me
>>> the time it takes to rebuild and redeploy the kernel once.
>> kbuild is _very_ good at catching and reporting these. And the linux
>> kernel generally has a 0 warnings rule, which means even when it slips
>> through a lot of developers will get mad at me for not spotting it.
>>
>> I think relying upon gcc to do its job here is safe enough. We only
>> initialize stack variables if it's really needed, or if gcc is too dense
>> to figure it out itself.
>> -Daniel
>
> I agree with Daniel. If you ignore warnings in your own test builds, you
> get what you deserve. If you check warnings into the tree then you
> should be shot. Or worse.
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 05/51] drm/i915: Add return code check to i915_gem_execbuffer_retire_commands()

[Daniel Vetter]

On Fri, Mar 06, 2015 at 05:40:50PM +0000, Dave Gordon wrote:
> On 06/03/15 15:57, Daniel Vetter wrote:
> > On Fri, Mar 06, 2015 at 11:38:44AM +0000, John Harrison wrote:
> >> On 05/03/2015 16:14, Daniel Vetter wrote:
> >>> On Thu, Mar 05, 2015 at 03:06:42PM +0000, John Harrison wrote:
> >>>> On 05/03/2015 14:44, Daniel Vetter wrote:
> >>>>> Imo reserving a bit of ring space for each add_request should be solid.
> >>>>> Userspace uses the exact same reservation logic for adding end-of-batch
> >>>>> workarounds. The only thing needed to make this solid is to WARN if
> >>>>> add_request ends up using more ring space than what we've reserved (not
> >>>>> just when it actually runs out, that obviously doesn't happen often
> >>>>> enough for testing).
> >>>> The problem is that there could be multiple requests being processed in
> >>>> parallel. This is especially true with the scheduler. Userland could submit
> >>>> a whole stream of batches that all get queued up in the scheduler. Only
> >>>> later do they get submitted to the hardware. The request must be allocated
> >>>> up front because there is no other means of tracking them. But reserving
> >>>> space at that point won't work because you either end up reserving massive
> >>>> amounts of space if the reserve is cumulative, or not enough if only one
> >>>> slot is reserved.
> >>> At least with execlist we don't have that problem really since writing the
> >>> ringbuffer is done synchronously and directly.
> >>>
> >>> For the legacy scheduler I expect that we won't do any of the ringbuf
> >>> writes directly and instead that's all done by the scheduler
> >>> asynchronously.
> >>>
> >>> So this should just be an issue while we are converting to the scheduler
> >>> or on platforms that will never have one. And imo the request ringbuf
> >>> reservation is the solution with the simplest impact on the design.
> >> I don't understand what you mean here. The scheduler decouples the
> >> submission of a batch buffer to the driver with the submission of that batch
> >> buffer to the hardware. The submission code path itself is identical. The
> >> scheduler does not do any hardware writes - it merely adds an extra layer
> >> between the user interface code and the hardware access code. The request
> >> creation must be done at driver submission time. The hardware submission
> >> could be an arbitrary amount of time later. In the intervening time, any
> >> number of new batch buffers may be submitted to the driver and thus new
> >> requests be created. This is true for both legacy and execlist mode.
> >>
> >> The space reserve would have to be done at the start of the hardware
> >> submission process not at driver submission time. I.e. it would need to be a
> >> separate and new i915_gem_request_reserve_space() call at the start of the
> >> back half of the exec buffer code. It could not be done during request
> >> creation.
> > 
> > Yeah with the scheduler we need to take out the reservation again since it
> > doesn't make a lot of sense - the scheduler is the safety net that
> > guarantees execution (barring gpu death ofc as always) when the execbuf
> > ioctl returns 0. Maybe in the end we need a special alloc_request function
> > for execbuf to only reserve when the scheduler isn't around.
> > 
> > That additional work is just part of the prize we have to pay to never
> > break things while refactoring code. And since we'll get the execlist
> > scheduler in first that reservation code will probably stick around for a
> > while (or maybe forever even if we decide against upstreaming the gen7
> > scheduler).
> > 
> > Does this make sense?
> > 
> > Thanks, Daniel
> 
> I already put a pre-reservation in the preemptive version of the
> scheduler. It won't start to write anything in the ringbuffer unless
> it's guaranteed there's enough space to write the whole set of commands
> to run a batch, from preamble to finalisation. That means that none of
> the ring_begin() commands can fail, and we won't leave a partial set of
> commands in the ring to confuse any subsequent (successful) submissions.
> 
> And yes, I added warnings if the commands emitted to the ring overran
> the amount of reserved space, so that developers would know if they'd
> increased the total ringspace requirement.
> 
> If there are any other failure modes while writing to the ring, we
> should simply back up to the start of the sequence (i.e. rewind the
> software copy of TAIL to where it was after we checked for space -- easy
> because we haven't updated h/w TAIL yet), and we can leave the request
> queued for subsequent retry (or fail it as though it had been submitted
> and then killed by TDR, if the failure mode suggests it's not retryable).

Sounds good.

> [aside] One version of this was posted as
> http://lists.freedesktop.org/archives/intel-gfx/2014-December/057247.html but
> that re-used intel_ring_begin() as a reserve-space call, whereas another
> version has a separate nonblocking function intel_ring_test_space() for
> prechecking available space [/aside]

I prefer the explicit reservation over allowing nesting. Allowing nesting
gives us a lot more rope than we need I think, so much room for "creative
abuse" (i.e. really hard to understand bugs).
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 34/53] drm/i915: Update workarounds_emit() to take request structures

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the *_ring_workarounds_emit() functions to take requests instead of
> ring/context pairs.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c        |   14 +++++++-------
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    6 +++---
>   2 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index fab9269..08ed800 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1076,11 +1076,11 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>   	return 0;
>   }
>
> -static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
> -					       struct intel_context *ctx)
> +static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   {
>   	int ret, i;
> -	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
> +	struct intel_engine_cs *ring = req->ring;
> +	struct intel_ringbuffer *ringbuf = req->ringbuf;
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct i915_workarounds *w = &dev_priv->workarounds;
> @@ -1089,11 +1089,11 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
>   		return 0;
>
>   	ring->gpu_caches_dirty = true;
> -	ret = logical_ring_flush_all_caches(ringbuf, ctx);
> +	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
>   	if (ret)
>   		return ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, ctx, w->count * 2 + 2);
> +	ret = intel_logical_ring_begin(ringbuf, req->ctx, w->count * 2 + 2);
>   	if (ret)
>   		return ret;
>
> @@ -1107,7 +1107,7 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
>   	intel_logical_ring_advance(ringbuf);
>
>   	ring->gpu_caches_dirty = true;
> -	ret = logical_ring_flush_all_caches(ringbuf, ctx);
> +	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
>   	if (ret)
>   		return ret;
>
> @@ -1377,7 +1377,7 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
>   {
>   	int ret;
>
> -	ret = intel_logical_ring_workarounds_emit(req->ring, req->ctx);
> +	ret = intel_logical_ring_workarounds_emit(req);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index efa44db..d147ffa 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -736,10 +736,10 @@ err:
>   	return ret;
>   }
>
> -static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
> -				       struct intel_context *ctx)
> +static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   {
>   	int ret, i;
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct i915_workarounds *w = &dev_priv->workarounds;
> @@ -779,7 +779,7 @@ static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
>   {
>   	int ret;
>
> -	ret = intel_ring_workarounds_emit(req->ring, req->ctx);
> +	ret = intel_ring_workarounds_emit(req);
>   	if (ret != 0)
>   		return ret;
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 35/53] drm/i915: Update flush_all_caches() to take request structures

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the *_ring_flush_all_caches() functions to take requests instead of
> rings or ringbuf/context pairs.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
>   drivers/gpu/drm/i915/intel_lrc.c        |   11 +++++------
>   drivers/gpu/drm/i915/intel_lrc.h        |    3 +--
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    7 ++++---
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
>   5 files changed, 13 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 043933b..e8577d7 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2436,9 +2436,9 @@ int __i915_add_request(struct drm_i915_gem_request *request,
>   	 */
>   	if (flush_caches) {
>   		if (i915.enable_execlists)
> -			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
> +			ret = logical_ring_flush_all_caches(request);
>   		else
> -			ret = intel_ring_flush_all_caches(ring);
> +			ret = intel_ring_flush_all_caches(request);
>   		if (ret)
>   			return ret;
>   	}
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 08ed800..d8084a1 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -768,16 +768,15 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring)
>   	I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));
>   }
>
> -int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
> -				  struct intel_context *ctx)
> +int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
>   {
> -	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	if (!ring->gpu_caches_dirty)
>   		return 0;
>
> -	ret = ring->emit_flush(ringbuf, ctx, 0, I915_GEM_GPU_DOMAINS);
> +	ret = ring->emit_flush(req->ringbuf, req->ctx, 0, I915_GEM_GPU_DOMAINS);
>   	if (ret)
>   		return ret;
>
> @@ -1089,7 +1088,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   		return 0;
>
>   	ring->gpu_caches_dirty = true;
> -	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
> +	ret = logical_ring_flush_all_caches(req);
>   	if (ret)
>   		return ret;
>
> @@ -1107,7 +1106,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   	intel_logical_ring_advance(ringbuf);
>
>   	ring->gpu_caches_dirty = true;
> -	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
> +	ret = logical_ring_flush_all_caches(req);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 77de8ac..40848b0 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -43,8 +43,7 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring);
>   void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
>   int intel_logical_rings_init(struct drm_device *dev);
>
> -int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
> -				  struct intel_context *ctx);
> +int logical_ring_flush_all_caches(struct drm_i915_gem_request *req);
>   /**
>    * intel_logical_ring_advance() - advance the ringbuffer tail
>    * @ringbuf: Ringbuffer to advance.
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index d147ffa..91a9131 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -748,7 +748,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   		return 0;
>
>   	ring->gpu_caches_dirty = true;
> -	ret = intel_ring_flush_all_caches(ring);
> +	ret = intel_ring_flush_all_caches(req);
>   	if (ret)
>   		return ret;
>
> @@ -766,7 +766,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   	intel_ring_advance(ring);
>
>   	ring->gpu_caches_dirty = true;
> -	ret = intel_ring_flush_all_caches(ring);
> +	ret = intel_ring_flush_all_caches(req);
>   	if (ret)
>   		return ret;
>
> @@ -2846,8 +2846,9 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
>   }
>
>   int
> -intel_ring_flush_all_caches(struct intel_engine_cs *ring)
> +intel_ring_flush_all_caches(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	if (!ring->gpu_caches_dirty)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index b817725..0ef29fb 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -413,7 +413,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring);
>
>   int __must_check intel_ring_idle(struct intel_engine_cs *ring);
>   void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
> -int intel_ring_flush_all_caches(struct intel_engine_cs *ring);
> +int intel_ring_flush_all_caches(struct drm_i915_gem_request *req);
>   int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);
>
>   void intel_fini_pipe_control(struct intel_engine_cs *ring);
>


Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 36/53] drm/i915: Update switch_mm() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the switch_mm() code paths to take a request instead of a ring.
>

This commit message could be slightly clearer by saying specifically 
what you changed rather than using the blanket expression "paths". You 
could e.g. say that you changed the mm_switch virtual function 
implementations and the gen8_write_pdp helper function to take requests 
rather than rings.

> v2: Rebased to newer tree.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
>   drivers/gpu/drm/i915/i915_gem_gtt.c     |   23 ++++++++++++++---------
>   drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
>   3 files changed, 16 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 9e66fac..816a442 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -591,7 +591,7 @@ static int do_switch(struct drm_i915_gem_request *req)
>
>   	if (to->ppgtt) {
>   		trace_switch_mm(ring, to);
> -		ret = to->ppgtt->switch_mm(to->ppgtt, req->ring);
> +		ret = to->ppgtt->switch_mm(to->ppgtt, req);
>   		if (ret)
>   			goto unpin_out;
>   	}
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index cd00080..c3408f2 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -280,9 +280,10 @@ static gen6_gtt_pte_t iris_pte_encode(dma_addr_t addr,
>   }
>
>   /* Broadwell Page Directory Pointer Descriptors */
> -static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
> -			   uint64_t val)
> +static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
> +			  uint64_t val)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	BUG_ON(entry >= 4);
> @@ -303,7 +304,7 @@ static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
>   }
>
>   static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			  struct intel_engine_cs *ring)
> +			  struct drm_i915_gem_request *req)
>   {
>   	int i, ret;
>
> @@ -312,7 +313,7 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
>
>   	for (i = used_pd - 1; i >= 0; i--) {
>   		dma_addr_t addr = ppgtt->pd_dma_addr[i];
> -		ret = gen8_write_pdp(ring, i, addr);
> +		ret = gen8_write_pdp(req, i, addr);
>   		if (ret)
>   			return ret;
>   	}
> @@ -777,8 +778,9 @@ static uint32_t get_pd_offset(struct i915_hw_ppgtt *ppgtt)
>   }
>
>   static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			 struct intel_engine_cs *ring)
> +			 struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	/* NB: TLBs must be flushed and invalidated before a switch */
> @@ -802,8 +804,9 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   }
>
>   static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			  struct intel_engine_cs *ring)
> +			  struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev);
>
>   	I915_WRITE(RING_PP_DIR_DCLV(ring), PP_DIR_DCLV_2G);
> @@ -812,8 +815,9 @@ static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   }
>
>   static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			  struct intel_engine_cs *ring)
> +			  struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	/* NB: TLBs must be flushed and invalidated before a switch */
> @@ -844,8 +848,9 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   }
>
>   static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			  struct intel_engine_cs *ring)
> +			  struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_device *dev = ppgtt->base.dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>
> @@ -1235,7 +1240,7 @@ int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
>   	if (!ppgtt)
>   		return 0;
>
> -	return ppgtt->switch_mm(ppgtt, req->ring);
> +	return ppgtt->switch_mm(ppgtt, req);
>   }
>
>   struct i915_hw_ppgtt *
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index e7e202f..073be7f 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -289,7 +289,7 @@ struct i915_hw_ppgtt {
>
>   	int (*enable)(struct i915_hw_ppgtt *ppgtt);
>   	int (*switch_mm)(struct i915_hw_ppgtt *ppgtt,
> -			 struct intel_engine_cs *ring);
> +			 struct drm_i915_gem_request *req);
>   	void (*debug_dump)(struct i915_hw_ppgtt *ppgtt, struct seq_file *m);
>   };
>
>

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Re: [PATCH 37/53] drm/i915: Update ring->flush() to take a requests structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Udpated the various ring->flush() functions to take a request instead of a ring.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
>   drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   30 +++++++++++++++++++-----------
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
>   4 files changed, 24 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 816a442..384f481 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -489,7 +489,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
>   	 * itlb_before_ctx_switch.
>   	 */
>   	if (IS_GEN6(ring->dev)) {
> -		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
> +		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, 0);
>   		if (ret)
>   			return ret;
>   	}
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index c3408f2..a1af644 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -784,7 +784,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	int ret;
>
>   	/* NB: TLBs must be flushed and invalidated before a switch */
> -	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
> +	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
>   	if (ret)
>   		return ret;
>
> @@ -821,7 +821,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	int ret;
>
>   	/* NB: TLBs must be flushed and invalidated before a switch */
> -	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
> +	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
>   	if (ret)
>   		return ret;
>
> @@ -839,7 +839,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
>
>   	/* XXX: RCS is the only one to auto invalidate the TLBs? */
>   	if (ring->id != RCS) {
> -		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
> +		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
>   		if (ret)
>   			return ret;
>   	}
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 91a9131..ca8f039 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -91,10 +91,11 @@ static void __intel_ring_advance(struct intel_engine_cs *ring)
>   }
>
>   static int
> -gen2_render_ring_flush(struct intel_engine_cs *ring,
> +gen2_render_ring_flush(struct drm_i915_gem_request *req,
>   		       u32	invalidate_domains,
>   		       u32	flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 cmd;
>   	int ret;
>
> @@ -117,10 +118,11 @@ gen2_render_ring_flush(struct intel_engine_cs *ring,
>   }
>
>   static int
> -gen4_render_ring_flush(struct intel_engine_cs *ring,
> +gen4_render_ring_flush(struct drm_i915_gem_request *req,
>   		       u32	invalidate_domains,
>   		       u32	flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_device *dev = ring->dev;
>   	u32 cmd;
>   	int ret;
> @@ -247,9 +249,10 @@ intel_emit_post_sync_nonzero_flush(struct intel_engine_cs *ring)
>   }
>
>   static int
> -gen6_render_ring_flush(struct intel_engine_cs *ring,
> -                         u32 invalidate_domains, u32 flush_domains)
> +gen6_render_ring_flush(struct drm_i915_gem_request *req,
> +		       u32 invalidate_domains, u32 flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 flags = 0;
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
> @@ -341,9 +344,10 @@ static int gen7_ring_fbc_flush(struct intel_engine_cs *ring, u32 value)
>   }
>
>   static int
> -gen7_render_ring_flush(struct intel_engine_cs *ring,
> +gen7_render_ring_flush(struct drm_i915_gem_request *req,
>   		       u32 invalidate_domains, u32 flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 flags = 0;
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
> @@ -426,9 +430,10 @@ gen8_emit_pipe_control(struct intel_engine_cs *ring,
>   }
>
>   static int
> -gen8_render_ring_flush(struct intel_engine_cs *ring,
> +gen8_render_ring_flush(struct drm_i915_gem_request *req,
>   		       u32 invalidate_domains, u32 flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 flags = 0;
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
> @@ -1527,10 +1532,11 @@ i8xx_ring_put_irq(struct intel_engine_cs *ring)
>   }
>
>   static int
> -bsd_ring_flush(struct intel_engine_cs *ring,
> +bsd_ring_flush(struct drm_i915_gem_request *req,
>   	       u32     invalidate_domains,
>   	       u32     flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 2);
> @@ -2318,9 +2324,10 @@ static void gen6_bsd_ring_write_tail(struct intel_engine_cs *ring,
>   		   _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
>   }
>
> -static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
> +static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
>   			       u32 invalidate, u32 flush)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	uint32_t cmd;
>   	int ret;
>
> @@ -2430,9 +2437,10 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>
>   /* Blitter support (SandyBridge+) */
>
> -static int gen6_ring_flush(struct intel_engine_cs *ring,
> +static int gen6_ring_flush(struct drm_i915_gem_request *req,
>   			   u32 invalidate, u32 flush)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	uint32_t cmd;
> @@ -2854,7 +2862,7 @@ intel_ring_flush_all_caches(struct drm_i915_gem_request *req)
>   	if (!ring->gpu_caches_dirty)
>   		return 0;
>
> -	ret = ring->flush(ring, 0, I915_GEM_GPU_DOMAINS);
> +	ret = ring->flush(req, 0, I915_GEM_GPU_DOMAINS);
>   	if (ret)
>   		return ret;
>
> @@ -2875,7 +2883,7 @@ intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
>   	if (ring->gpu_caches_dirty)
>   		flush_domains = I915_GEM_GPU_DOMAINS;
>
> -	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, flush_domains);
> +	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 0ef29fb..c08e2dc 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -147,7 +147,7 @@ struct  intel_engine_cs {
>
>   	void		(*write_tail)(struct intel_engine_cs *ring,
>   				      u32 value);
> -	int __must_check (*flush)(struct intel_engine_cs *ring,
> +	int __must_check (*flush)(struct drm_i915_gem_request *req,
>   				  u32	invalidate_domains,
>   				  u32	flush_domains);
>   	int		(*add_request)(struct intel_engine_cs *ring);
>

trace_i915_gem_ring_flush still takes a ring as input argument. Do you 
feel like updating it to reflect your changes?

Thanks,
Tomas
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Re: [PATCH 38/53] drm/i915: Update some flush helpers to take request structures

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated intel_emit_post_sync_nonzero_flush(), gen7_render_ring_cs_stall_wa(),
> gen7_ring_fbc_flush() and gen8_emit_pipe_control() to take requests instead of
> rings.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   29 ++++++++++++++++-------------
>   1 file changed, 16 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index ca8f039..470fa93 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -214,8 +214,9 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
>    * really our business.  That leaves only stall at scoreboard.
>    */
>   static int
> -intel_emit_post_sync_nonzero_flush(struct intel_engine_cs *ring)
> +intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
>
> @@ -258,7 +259,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
>   	int ret;
>
>   	/* Force SNB workarounds for PIPE_CONTROL flushes */
> -	ret = intel_emit_post_sync_nonzero_flush(ring);
> +	ret = intel_emit_post_sync_nonzero_flush(req);
>   	if (ret)
>   		return ret;
>
> @@ -302,8 +303,9 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
>   }
>
>   static int
> -gen7_render_ring_cs_stall_wa(struct intel_engine_cs *ring)
> +gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 4);
> @@ -320,8 +322,9 @@ gen7_render_ring_cs_stall_wa(struct intel_engine_cs *ring)
>   	return 0;
>   }
>
> -static int gen7_ring_fbc_flush(struct intel_engine_cs *ring, u32 value)
> +static int gen7_ring_fbc_flush(struct drm_i915_gem_request *req, u32 value)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	if (!ring->fbc_dirty)
> @@ -389,7 +392,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
>   		/* Workaround: we must issue a pipe_control with CS-stall bit
>   		 * set before a pipe_control command that has the state cache
>   		 * invalidate bit set. */
> -		gen7_render_ring_cs_stall_wa(ring);
> +		gen7_render_ring_cs_stall_wa(req);
>   	}
>
>   	ret = intel_ring_begin(ring, 4);
> @@ -403,15 +406,16 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
>   	intel_ring_advance(ring);
>
>   	if (!invalidate_domains && flush_domains)
> -		return gen7_ring_fbc_flush(ring, FBC_REND_NUKE);
> +		return gen7_ring_fbc_flush(req, FBC_REND_NUKE);
>
>   	return 0;
>   }
>
>   static int
> -gen8_emit_pipe_control(struct intel_engine_cs *ring,
> +gen8_emit_pipe_control(struct drm_i915_gem_request *req,
>   		       u32 flags, u32 scratch_addr)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 6);
> @@ -433,9 +437,8 @@ static int
>   gen8_render_ring_flush(struct drm_i915_gem_request *req,
>   		       u32 invalidate_domains, u32 flush_domains)
>   {
> -	struct intel_engine_cs *ring = req->ring;
>   	u32 flags = 0;
> -	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
> +	u32 scratch_addr = req->ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
>
>   	flags |= PIPE_CONTROL_CS_STALL;
> @@ -455,7 +458,7 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req,
>   		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
>
>   		/* WaCsStallBeforeStateCacheInvalidate:bdw,chv */
> -		ret = gen8_emit_pipe_control(ring,
> +		ret = gen8_emit_pipe_control(req,
>   					     PIPE_CONTROL_CS_STALL |
>   					     PIPE_CONTROL_STALL_AT_SCOREBOARD,
>   					     0);
> @@ -463,12 +466,12 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req,
>   			return ret;
>   	}
>
> -	ret = gen8_emit_pipe_control(ring, flags, scratch_addr);
> +	ret = gen8_emit_pipe_control(req, flags, scratch_addr);
>   	if (ret)
>   		return ret;
>
>   	if (!invalidate_domains && flush_domains)
> -		return gen7_ring_fbc_flush(ring, FBC_REND_NUKE);
> +		return gen7_ring_fbc_flush(req, FBC_REND_NUKE);
>
>   	return 0;
>   }
> @@ -2482,7 +2485,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req,
>
>   	if (!invalidate && flush) {
>   		if (IS_GEN7(dev))
> -			return gen7_ring_fbc_flush(ring, FBC_REND_CACHE_CLEAN);
> +			return gen7_ring_fbc_flush(req, FBC_REND_CACHE_CLEAN);
>   		else if (IS_BROADWELL(dev))
>   			dev_priv->fbc.need_sw_cache_clean = true;
>   	}
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 39/53] drm/i915: Update ring->emit_flush() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the various ring->emit_flush() implementations to take a request instead
> of a ringbuf/context pair.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c        |   17 ++++++++---------
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
>   2 files changed, 9 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index d8084a1..f3bf2cc 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -568,8 +568,7 @@ static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
>   	if (ring->gpu_caches_dirty)
>   		flush_domains = I915_GEM_GPU_DOMAINS;
>
> -	ret = ring->emit_flush(req->ringbuf, req->ctx,
> -			       I915_GEM_GPU_DOMAINS, flush_domains);
> +	ret = ring->emit_flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
>   	if (ret)
>   		return ret;
>
> @@ -776,7 +775,7 @@ int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
>   	if (!ring->gpu_caches_dirty)
>   		return 0;
>
> -	ret = ring->emit_flush(req->ringbuf, req->ctx, 0, I915_GEM_GPU_DOMAINS);
> +	ret = ring->emit_flush(req, 0, I915_GEM_GPU_DOMAINS);
>   	if (ret)
>   		return ret;
>
> @@ -1221,18 +1220,18 @@ static void gen8_logical_ring_put_irq(struct intel_engine_cs *ring)
>   	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
>   }
>
> -static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
> -			   struct intel_context *ctx,
> +static int gen8_emit_flush(struct drm_i915_gem_request *request,
>   			   u32 invalidate_domains,
>   			   u32 unused)
>   {
> +	struct intel_ringbuffer *ringbuf = request->ringbuf;
>   	struct intel_engine_cs *ring = ringbuf->ring;
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	uint32_t cmd;
>   	int ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
> +	ret = intel_logical_ring_begin(ringbuf, request->ctx, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1262,11 +1261,11 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
>   	return 0;
>   }
>
> -static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
> -				  struct intel_context *ctx,
> +static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
>   				  u32 invalidate_domains,
>   				  u32 flush_domains)
>   {
> +	struct intel_ringbuffer *ringbuf = request->ringbuf;
>   	struct intel_engine_cs *ring = ringbuf->ring;
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	u32 flags = 0;
> @@ -1290,7 +1289,7 @@ static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
>   		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
>   	}
>
> -	ret = intel_logical_ring_begin(ringbuf, ctx, 6);
> +	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index c08e2dc..6f7c79c 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -235,8 +235,7 @@ struct  intel_engine_cs {
>   	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
>   	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
>   					struct drm_i915_gem_request *request);
> -	int		(*emit_flush)(struct intel_ringbuffer *ringbuf,
> -				      struct intel_context *ctx,
> +	int		(*emit_flush)(struct drm_i915_gem_request *request,
>   				      u32 invalidate_domains,
>   				      u32 flush_domains);
>   	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 40/53] drm/i915: Update ring->add_request() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the various ring->add_request() implementations to take a request
> instead of a ring. This removes their reliance on the OLR to obtain the seqno
> value that the request should be tagged with.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c         |    2 +-
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   26 ++++++++++++--------------
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
>   3 files changed, 14 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index e8577d7..4357cd3 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2453,7 +2453,7 @@ int __i915_add_request(struct drm_i915_gem_request *request,
>   	if (i915.enable_execlists)
>   		ret = ring->emit_request(ringbuf, request);
>   	else
> -		ret = ring->add_request(ring);
> +		ret = ring->add_request(request);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 470fa93..99f0dd1 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1222,16 +1222,16 @@ static int gen6_signal(struct intel_engine_cs *signaller,
>
>   /**
>    * gen6_add_request - Update the semaphore mailbox registers
> - *
> - * @ring - ring that is adding a request
> - * @seqno - return seqno stuck into the ring
> + *
> + * @request - request to write to the ring
>    *
>    * Update the mailbox registers in the *other* rings with the current seqno.
>    * This acts like a signal in the canonical semaphore.
>    */
>   static int
> -gen6_add_request(struct intel_engine_cs *ring)
> +gen6_add_request(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	if (ring->semaphore.signal)
> @@ -1244,8 +1244,7 @@ gen6_add_request(struct intel_engine_cs *ring)
>
>   	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
>   	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
> -	intel_ring_emit(ring,
> -		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
> +	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
>   	intel_ring_emit(ring, MI_USER_INTERRUPT);
>   	__intel_ring_advance(ring);
>
> @@ -1342,8 +1341,9 @@ do {									\
>   } while (0)
>
>   static int
> -pc_render_add_request(struct intel_engine_cs *ring)
> +pc_render_add_request(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
>
> @@ -1363,8 +1363,7 @@ pc_render_add_request(struct intel_engine_cs *ring)
>   			PIPE_CONTROL_WRITE_FLUSH |
>   			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
>   	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
> -	intel_ring_emit(ring,
> -		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
> +	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
>   	intel_ring_emit(ring, 0);
>   	PIPE_CONTROL_FLUSH(ring, scratch_addr);
>   	scratch_addr += 2 * CACHELINE_BYTES; /* write to separate cachelines */
> @@ -1383,8 +1382,7 @@ pc_render_add_request(struct intel_engine_cs *ring)
>   			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
>   			PIPE_CONTROL_NOTIFY);
>   	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
> -	intel_ring_emit(ring,
> -		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
> +	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
>   	intel_ring_emit(ring, 0);
>   	__intel_ring_advance(ring);
>
> @@ -1553,8 +1551,9 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
>   }
>
>   static int
> -i9xx_add_request(struct intel_engine_cs *ring)
> +i9xx_add_request(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 4);
> @@ -1563,8 +1562,7 @@ i9xx_add_request(struct intel_engine_cs *ring)
>
>   	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
>   	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
> -	intel_ring_emit(ring,
> -		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
> +	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
>   	intel_ring_emit(ring, MI_USER_INTERRUPT);
>   	__intel_ring_advance(ring);
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 6f7c79c..d2391a9 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -150,7 +150,7 @@ struct  intel_engine_cs {
>   	int __must_check (*flush)(struct drm_i915_gem_request *req,
>   				  u32	invalidate_domains,
>   				  u32	flush_domains);
> -	int		(*add_request)(struct intel_engine_cs *ring);
> +	int		(*add_request)(struct drm_i915_gem_request *req);
>   	/* Some chipsets are not quite as coherent as advertised and need
>   	 * an expensive kick to force a true read of the up-to-date seqno.
>   	 * However, the up-to-date seqno is not always required and the last
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 41/53] drm/i915: Update ring->emit_request() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the ring->emit_request() implementation to take a request instead of a
> ringbuf/request pair. Also removed it's use of the OLR for obtaining the
> request's seqno.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c         |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c        |    7 +++----
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
>   3 files changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4357cd3..4f6e9ad 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2451,7 +2451,7 @@ int __i915_add_request(struct drm_i915_gem_request *request,
>   	request->postfix = intel_ring_get_tail(ringbuf);
>
>   	if (i915.enable_execlists)
> -		ret = ring->emit_request(ringbuf, request);
> +		ret = ring->emit_request(request);
>   	else
>   		ret = ring->add_request(request);
>   	if (ret)
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f3bf2cc..f4661ec 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1314,9 +1314,9 @@ static void gen8_set_seqno(struct intel_engine_cs *ring, u32 seqno)
>   	intel_write_status_page(ring, I915_GEM_HWS_INDEX, seqno);
>   }
>
> -static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
> -			     struct drm_i915_gem_request *request)
> +static int gen8_emit_request(struct drm_i915_gem_request *request)
>   {
> +	struct intel_ringbuffer *ringbuf = request->ringbuf;
>   	struct intel_engine_cs *ring = ringbuf->ring;
>   	u32 cmd;
>   	int ret;
> @@ -1333,8 +1333,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
>   				(ring->status_page.gfx_addr +
>   				(I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT)));
>   	intel_logical_ring_emit(ringbuf, 0);
> -	intel_logical_ring_emit(ringbuf,
> -		i915_gem_request_get_seqno(ring->outstanding_lazy_request));
> +	intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request));
>   	intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
>   	intel_logical_ring_emit(ringbuf, MI_NOOP);
>   	intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index d2391a9..d8300f2 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -233,8 +233,7 @@ struct  intel_engine_cs {
>   	struct list_head execlist_retired_req_list;
>   	u8 next_context_status_buffer;
>   	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
> -	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
> -					struct drm_i915_gem_request *request);
> +	int		(*emit_request)(struct drm_i915_gem_request *request);
>   	int		(*emit_flush)(struct drm_i915_gem_request *request,
>   				      u32 invalidate_domains,
>   				      u32 flush_domains);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 42/53] drm/i915: Update ring->dispatch_execbuffer() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the various ring->dispatch_execbuffer() implementations to take a
> request instead of a ring.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    4 ++--
>   drivers/gpu/drm/i915/i915_gem_render_state.c |    3 +--
>   drivers/gpu/drm/i915/intel_ringbuffer.c      |   18 ++++++++++++------
>   drivers/gpu/drm/i915/intel_ringbuffer.h      |    2 +-
>   4 files changed, 16 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index a79c893..8b4f8a9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1265,14 +1265,14 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   			if (ret)
>   				goto error;
>
> -			ret = ring->dispatch_execbuffer(ring,
> +			ret = ring->dispatch_execbuffer(params->request,
>   							exec_start, exec_len,
>   							params->dispatch_flags);
>   			if (ret)
>   				goto error;
>   		}
>   	} else {
> -		ret = ring->dispatch_execbuffer(ring,
> +		ret = ring->dispatch_execbuffer(params->request,
>   						exec_start, exec_len,
>   						params->dispatch_flags);
>   		if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index 866274c..cdf2fee 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -164,8 +164,7 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
>   	if (so.rodata == NULL)
>   		return 0;
>
> -	ret = req->ring->dispatch_execbuffer(req->ring,
> -					     so.ggtt_offset,
> +	ret = req->ring->dispatch_execbuffer(req, so.ggtt_offset,
>   					     so.rodata->batch_items * 4,
>   					     I915_DISPATCH_SECURE);
>   	if (ret)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 99f0dd1..87612f1 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1694,10 +1694,11 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
>   }
>
>   static int
> -i965_dispatch_execbuffer(struct intel_engine_cs *ring,
> +i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   			 u64 offset, u32 length,
>   			 unsigned dispatch_flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 2);
> @@ -1720,10 +1721,11 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
>   #define I830_TLB_ENTRIES (2)
>   #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
>   static int
> -i830_dispatch_execbuffer(struct intel_engine_cs *ring,
> +i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   			 u64 offset, u32 len,
>   			 unsigned dispatch_flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 cs_offset = ring->scratch.gtt_offset;
>   	int ret;
>
> @@ -1782,10 +1784,11 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
>   }
>
>   static int
> -i915_dispatch_execbuffer(struct intel_engine_cs *ring,
> +i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   			 u64 offset, u32 len,
>   			 unsigned dispatch_flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 2);
> @@ -2370,10 +2373,11 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
>   }
>
>   static int
> -gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> +gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   			      u64 offset, u32 len,
>   			      unsigned dispatch_flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	bool ppgtt = USES_PPGTT(ring->dev) &&
>   			!(dispatch_flags & I915_DISPATCH_SECURE);
>   	int ret;
> @@ -2393,10 +2397,11 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>   }
>
>   static int
> -hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> +hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   			     u64 offset, u32 len,
>   			     unsigned dispatch_flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 2);
> @@ -2415,10 +2420,11 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>   }
>
>   static int
> -gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
> +gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   			      u64 offset, u32 len,
>   			      unsigned dispatch_flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 2);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index d8300f2..0b03b3a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -161,7 +161,7 @@ struct  intel_engine_cs {
>   				     bool lazy_coherency);
>   	void		(*set_seqno)(struct intel_engine_cs *ring,
>   				     u32 seqno);
> -	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
> +	int		(*dispatch_execbuffer)(struct drm_i915_gem_request *req,
>   					       u64 offset, u32 length,
>   					       unsigned dispatch_flags);
>   #define I915_DISPATCH_SECURE 0x1
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 43/53] drm/i915: Update ring->emit_bb_start() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the ring->emit_bb_start() implementation to take a request instead of a
> ringbuf/context pair.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c        |   12 +++++-------
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
>   2 files changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f4661ec..5212b54 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -704,7 +704,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
>   	exec_start = params->batch_obj_vm_offset +
>   		     args->batch_start_offset;
>
> -	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
> +	ret = ring->emit_bb_start(params->request, exec_start, params->dispatch_flags);
>   	if (ret)
>   		return ret;
>
> @@ -1166,14 +1166,14 @@ static int gen9_init_render_ring(struct intel_engine_cs *ring)
>   	return init_workarounds_ring(ring);
>   }
>
> -static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
> -			      struct intel_context *ctx,
> +static int gen8_emit_bb_start(struct drm_i915_gem_request *req,
>   			      u64 offset, unsigned dispatch_flags)
>   {
> +	struct intel_ringbuffer *ringbuf = req->ringbuf;
>   	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
>   	int ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
> +	ret = intel_logical_ring_begin(ringbuf, req->ctx, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1353,9 +1353,7 @@ static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
>   	if (so.rodata == NULL)
>   		return 0;
>
> -	ret = req->ring->emit_bb_start(req->ringbuf,
> -				       req->ctx,
> -				       so.ggtt_offset,
> +	ret = req->ring->emit_bb_start(req, so.ggtt_offset,
>   				       I915_DISPATCH_SECURE);
>   	if (ret)
>   		goto out;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 0b03b3a..1ff0ad1 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -237,8 +237,7 @@ struct  intel_engine_cs {
>   	int		(*emit_flush)(struct drm_i915_gem_request *request,
>   				      u32 invalidate_domains,
>   				      u32 flush_domains);
> -	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
> -					 struct intel_context *ctx,
> +	int		(*emit_bb_start)(struct drm_i915_gem_request *req,
>   					 u64 offset, unsigned dispatch_flags);
>
>   	/**
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 44/53] drm/i915: Update ring->sync_to() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the ring->sync_to() implementations to take a request instead of a ring.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c         |    2 +-
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    6 ++++--
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    4 ++--
>   3 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4f6e9ad..b5613ff 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2985,7 +2985,7 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
>   		return ret;
>
>   	trace_i915_gem_ring_sync_to(from, to, obj->last_read_req);

trace_i915_gem_ring_sync_to() still takes a ring as argument instead of 
a request. Do you want to change the trace function to reflect your changes?

Thanks,
Tomas

> -	ret = to->semaphore.sync_to(to, from, seqno);
> +	ret = to->semaphore.sync_to(to_req, from, seqno);
>   	if (!ret)
>   		/* We use last_read_req because sync_to()
>   		 * might have just caused seqno wrap under
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 87612f1..767bab1 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1267,10 +1267,11 @@ static inline bool i915_gem_has_seqno_wrapped(struct drm_device *dev,
>    */
>
>   static int
> -gen8_ring_sync(struct intel_engine_cs *waiter,
> +gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
>   	       struct intel_engine_cs *signaller,
>   	       u32 seqno)
>   {
> +	struct intel_engine_cs *waiter = waiter_req->ring;
>   	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
>   	int ret;
>
> @@ -1292,10 +1293,11 @@ gen8_ring_sync(struct intel_engine_cs *waiter,
>   }
>
>   static int
> -gen6_ring_sync(struct intel_engine_cs *waiter,
> +gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
>   	       struct intel_engine_cs *signaller,
>   	       u32 seqno)
>   {
> +	struct intel_engine_cs *waiter = waiter_req->ring;
>   	u32 dw1 = MI_SEMAPHORE_MBOX |
>   		  MI_SEMAPHORE_COMPARE |
>   		  MI_SEMAPHORE_REGISTER;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 1ff0ad1..65fe151 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -219,8 +219,8 @@ struct  intel_engine_cs {
>   		};
>
>   		/* AKA wait() */
> -		int	(*sync_to)(struct intel_engine_cs *ring,
> -				   struct intel_engine_cs *to,
> +		int	(*sync_to)(struct drm_i915_gem_request *to_req,
> +				   struct intel_engine_cs *from,
>   				   u32 seqno);
>   		int	(*signal)(struct intel_engine_cs *signaller,
>   				  /* num_dwords needed by caller */
>

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Re: [PATCH 45/53] drm/i915: Update ring->signal() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the various ring->signal() implementations to take a request instead of
> a ring. This removes their reliance on the OLR to obtain the seqno value that
> should be used for the signal.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   20 ++++++++++----------
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
>   2 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 767bab1..440356d 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1105,10 +1105,11 @@ static void render_ring_cleanup(struct intel_engine_cs *ring)
>   	intel_fini_pipe_control(ring);
>   }
>
> -static int gen8_rcs_signal(struct intel_engine_cs *signaller,
> +static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
>   			   unsigned int num_dwords)
>   {
>   #define MBOX_UPDATE_DWORDS 8
> +	struct intel_engine_cs *signaller = signaller_req->ring;
>   	struct drm_device *dev = signaller->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_engine_cs *waiter;
> @@ -1128,8 +1129,7 @@ static int gen8_rcs_signal(struct intel_engine_cs *signaller,
>   		if (gtt_offset == MI_SEMAPHORE_SYNC_INVALID)
>   			continue;
>
> -		seqno = i915_gem_request_get_seqno(
> -					   signaller->outstanding_lazy_request);
> +		seqno = i915_gem_request_get_seqno(signaller_req);
>   		intel_ring_emit(signaller, GFX_OP_PIPE_CONTROL(6));
>   		intel_ring_emit(signaller, PIPE_CONTROL_GLOBAL_GTT_IVB |
>   					   PIPE_CONTROL_QW_WRITE |
> @@ -1146,10 +1146,11 @@ static int gen8_rcs_signal(struct intel_engine_cs *signaller,
>   	return 0;
>   }
>
> -static int gen8_xcs_signal(struct intel_engine_cs *signaller,
> +static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
>   			   unsigned int num_dwords)
>   {
>   #define MBOX_UPDATE_DWORDS 6
> +	struct intel_engine_cs *signaller = signaller_req->ring;
>   	struct drm_device *dev = signaller->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_engine_cs *waiter;
> @@ -1169,8 +1170,7 @@ static int gen8_xcs_signal(struct intel_engine_cs *signaller,
>   		if (gtt_offset == MI_SEMAPHORE_SYNC_INVALID)
>   			continue;
>
> -		seqno = i915_gem_request_get_seqno(
> -					   signaller->outstanding_lazy_request);
> +		seqno = i915_gem_request_get_seqno(signaller_req);
>   		intel_ring_emit(signaller, (MI_FLUSH_DW + 1) |
>   					   MI_FLUSH_DW_OP_STOREDW);
>   		intel_ring_emit(signaller, lower_32_bits(gtt_offset) |
> @@ -1185,9 +1185,10 @@ static int gen8_xcs_signal(struct intel_engine_cs *signaller,
>   	return 0;
>   }
>
> -static int gen6_signal(struct intel_engine_cs *signaller,
> +static int gen6_signal(struct drm_i915_gem_request *signaller_req,
>   		       unsigned int num_dwords)
>   {
> +	struct intel_engine_cs *signaller = signaller_req->ring;
>   	struct drm_device *dev = signaller->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_engine_cs *useless;
> @@ -1205,8 +1206,7 @@ static int gen6_signal(struct intel_engine_cs *signaller,
>   	for_each_ring(useless, dev_priv, i) {
>   		u32 mbox_reg = signaller->semaphore.mbox.signal[i];
>   		if (mbox_reg != GEN6_NOSYNC) {
> -			u32 seqno = i915_gem_request_get_seqno(
> -					   signaller->outstanding_lazy_request);
> +			u32 seqno = i915_gem_request_get_seqno(signaller_req);
>   			intel_ring_emit(signaller, MI_LOAD_REGISTER_IMM(1));
>   			intel_ring_emit(signaller, mbox_reg);
>   			intel_ring_emit(signaller, seqno);
> @@ -1235,7 +1235,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
>   	int ret;
>
>   	if (ring->semaphore.signal)
> -		ret = ring->semaphore.signal(ring, 4);
> +		ret = ring->semaphore.signal(req, 4);
>   	else
>   		ret = intel_ring_begin(ring, 4);
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 65fe151..7c1e0f5 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -222,7 +222,7 @@ struct  intel_engine_cs {
>   		int	(*sync_to)(struct drm_i915_gem_request *to_req,
>   				   struct intel_engine_cs *from,
>   				   u32 seqno);
> -		int	(*signal)(struct intel_engine_cs *signaller,
> +		int	(*signal)(struct drm_i915_gem_request *signaller_req,
>   				  /* num_dwords needed by caller */
>   				  unsigned int num_dwords);
>   	} semaphore;
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 46/53] drm/i915: Update cacheline_align() to take a request structure

[Tomas Elf]

On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated intel_ring_cacheline_align() to take a request instead of a ring.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_display.c    |    2 +-
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    3 ++-
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
>   3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 9cbfb93..7962946 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9438,7 +9438,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
>   	 * then do the cacheline alignment, and finally emit the
>   	 * MI_DISPLAY_FLIP.
>   	 */
> -	ret = intel_ring_cacheline_align(ring);
> +	ret = intel_ring_cacheline_align(req);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 440356d..109f283 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2258,8 +2258,9 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>   }
>
>   /* Align the ring tail to a cacheline boundary */
> -int intel_ring_cacheline_align(struct intel_engine_cs *ring)
> +int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int num_dwords = (ring->buffer->tail & (CACHELINE_BYTES - 1)) / sizeof(uint32_t);
>   	int ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 7c1e0f5..80eb399 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -387,7 +387,7 @@ void intel_stop_ring_buffer(struct intel_engine_cs *ring);
>   void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
>
>   int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
> -int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
> +int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
>   int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
>   					  struct intel_context *ctx,
>   					  struct drm_i915_gem_request **req_out);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 48/53] drm/i915: Update intel_ring_begin() to take a request structure

[Tomas Elf]

On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that everything above has been converted to use requests, intel_ring_begin()
> can be updated to take a request instead of a ring. This also means that it no
> longer needs to lazily allocate a request if no-one happens to have done it
> earlier.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c            |    2 +-
>   drivers/gpu/drm/i915/i915_gem_context.c    |    2 +-
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    8 ++--
>   drivers/gpu/drm/i915/i915_gem_gtt.c        |    6 +--
>   drivers/gpu/drm/i915/intel_display.c       |   10 ++--
>   drivers/gpu/drm/i915/intel_overlay.c       |    8 ++--
>   drivers/gpu/drm/i915/intel_pm.c            |    2 +-
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   72 +++++++++++++---------------
>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
>   9 files changed, 54 insertions(+), 58 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index b5613ff..60f6671 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4656,7 +4656,7 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
>   	if (!HAS_L3_DPF(dev) || !remap_info)
>   		return 0;
>
> -	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
> +	ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 384f481..e348424 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -503,7 +503,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
>   	if (INTEL_INFO(ring->dev)->gen >= 7)
>   		len += 2 + (num_rings ? 4*num_rings + 2 : 0);
>
> -	ret = intel_ring_begin(ring, len);
> +	ret = intel_ring_begin(req, len);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 8b4f8a9..6a703e6 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1013,7 +1013,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
>   		return -EINVAL;
>   	}
>
> -	ret = intel_ring_begin(ring, 4 * 3);
> +	ret = intel_ring_begin(req, 4 * 3);
>   	if (ret)
>   		return ret;
>
> @@ -1044,7 +1044,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
>   	}
>
>   	if (INTEL_INFO(ring->dev)->gen >= 4) {
> -		ret = intel_ring_begin(ring, 4);
> +		ret = intel_ring_begin(req, 4);
>   		if (ret)
>   			return ret;
>
> @@ -1053,7 +1053,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
>   		intel_ring_emit(ring, ((box->x2 - 1) & 0xffff) | (box->y2 - 1) << 16);
>   		intel_ring_emit(ring, DR4);
>   	} else {
> -		ret = intel_ring_begin(ring, 6);
> +		ret = intel_ring_begin(req, 6);
>   		if (ret)
>   			return ret;
>
> @@ -1235,7 +1235,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>
>   	if (ring == &dev_priv->ring[RCS] &&
>   			instp_mode != dev_priv->relative_constants_mode) {
> -		ret = intel_ring_begin(ring, 4);
> +		ret = intel_ring_begin(params->request, 4);
>   		if (ret)
>   			goto error;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index a1af644..0445278 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -288,7 +288,7 @@ static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
>
>   	BUG_ON(entry >= 4);
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -788,7 +788,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -825,7 +825,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7962946..6901e9a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9259,7 +9259,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
>   	u32 flip_mask;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -9294,7 +9294,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
>   	u32 flip_mask;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -9327,7 +9327,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
>   	uint32_t pf, pipesrc;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -9366,7 +9366,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
>   	uint32_t pf, pipesrc;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -9442,7 +9442,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, len);
> +	ret = intel_ring_begin(req, len);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index 228c9d1..1fb7653 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -251,7 +251,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret) {
>   		i915_gem_request_unreference(req);
>   		return ret;
> @@ -292,7 +292,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret) {
>   		i915_gem_request_unreference(req);
>   		return ret;
> @@ -359,7 +359,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret) {
>   		i915_gem_request_unreference(req);
>   		return ret;
> @@ -434,7 +434,7 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
>   		if (ret)
>   			return ret;
>
> -		ret = intel_ring_begin(ring, 2);
> +		ret = intel_ring_begin(req, 2);
>   		if (ret) {
>   			i915_gem_request_unreference(req);
>   			return ret;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 6594a52..cc22536 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5012,7 +5012,7 @@ static void ironlake_enable_rc6(struct drm_device *dev)
>   	 * GPU can automatically power down the render unit if given a page
>   	 * to save state.
>   	 */
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		goto err;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 109f283..5eef02e 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -106,7 +106,7 @@ gen2_render_ring_flush(struct drm_i915_gem_request *req,
>   	if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER)
>   		cmd |= MI_READ_FLUSH;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -165,7 +165,7 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
>   	    (IS_G4X(dev) || IS_GEN5(dev)))
>   		cmd |= MI_INVALIDATE_ISP;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -220,8 +220,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
>
> -
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -234,7 +233,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
>   	intel_ring_emit(ring, MI_NOOP);
>   	intel_ring_advance(ring);
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -289,7 +288,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
>   		flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL;
>   	}
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -308,7 +307,7 @@ gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -330,7 +329,7 @@ static int gen7_ring_fbc_flush(struct drm_i915_gem_request *req, u32 value)
>   	if (!ring->fbc_dirty)
>   		return 0;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>   	/* WaFbcNukeOn3DBlt:ivb/hsw */
> @@ -395,7 +394,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
>   		gen7_render_ring_cs_stall_wa(req);
>   	}
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -418,7 +417,7 @@ gen8_emit_pipe_control(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -760,7 +759,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, (w->count * 2 + 2));
> +	ret = intel_ring_begin(req, (w->count * 2 + 2));
>   	if (ret)
>   		return ret;
>
> @@ -1119,7 +1118,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
>   	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
>   #undef MBOX_UPDATE_DWORDS
>
> -	ret = intel_ring_begin(signaller, num_dwords);
> +	ret = intel_ring_begin(signaller_req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -1160,7 +1159,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
>   	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
>   #undef MBOX_UPDATE_DWORDS
>
> -	ret = intel_ring_begin(signaller, num_dwords);
> +	ret = intel_ring_begin(signaller_req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -1199,7 +1198,7 @@ static int gen6_signal(struct drm_i915_gem_request *signaller_req,
>   	num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2);
>   #undef MBOX_UPDATE_DWORDS
>
> -	ret = intel_ring_begin(signaller, num_dwords);
> +	ret = intel_ring_begin(signaller_req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -1237,7 +1236,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
>   	if (ring->semaphore.signal)
>   		ret = ring->semaphore.signal(req, 4);
>   	else
> -		ret = intel_ring_begin(ring, 4);
> +		ret = intel_ring_begin(req, 4);
>
>   	if (ret)
>   		return ret;
> @@ -1275,7 +1274,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
>   	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
>   	int ret;
>
> -	ret = intel_ring_begin(waiter, 4);
> +	ret = intel_ring_begin(waiter_req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1312,7 +1311,7 @@ gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
>
>   	WARN_ON(wait_mbox == MI_SEMAPHORE_SYNC_INVALID);
>
> -	ret = intel_ring_begin(waiter, 4);
> +	ret = intel_ring_begin(waiter_req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1357,7 +1356,7 @@ pc_render_add_request(struct drm_i915_gem_request *req)
>   	 * incoherence by flushing the 6 PIPE_NOTIFY buffers out to
>   	 * memory before requesting an interrupt.
>   	 */
> -	ret = intel_ring_begin(ring, 32);
> +	ret = intel_ring_begin(req, 32);
>   	if (ret)
>   		return ret;
>
> @@ -1542,7 +1541,7 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -1558,7 +1557,7 @@ i9xx_add_request(struct drm_i915_gem_request *req)
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1703,7 +1702,7 @@ i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -1731,7 +1730,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	u32 cs_offset = ring->scratch.gtt_offset;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -1748,7 +1747,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   		if (len > I830_BATCH_LIMIT)
>   			return -ENOSPC;
>
> -		ret = intel_ring_begin(ring, 6 + 2);
> +		ret = intel_ring_begin(req, 6 + 2);
>   		if (ret)
>   			return ret;
>
> @@ -1771,7 +1770,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   		offset = cs_offset;
>   	}
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1793,7 +1792,7 @@ i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -2232,13 +2231,15 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring,
>   	return 0;
>   }
>
> -int intel_ring_begin(struct intel_engine_cs *ring,
> +int intel_ring_begin(struct drm_i915_gem_request *req,
>   		     int num_dwords)
>   {
> -	struct drm_i915_gem_request *req;
> +	struct intel_engine_cs *ring = req->ring;

The WARN_ON below will only fire _after_ we've already gotten a null 
pointer exception here at the req->ring dereference. You might want to 
rearrange this a bit so that the WARN_ON appears before the dereference.

Thanks,
Tomas

>   	struct drm_i915_private *dev_priv = ring->dev->dev_private;
>   	int ret;
>
> +	WARN_ON(req == NULL);
> +
>   	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
>   				   dev_priv->mm.interruptible);
>   	if (ret)
> @@ -2248,11 +2249,6 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>   	if (ret)
>   		return ret;
>
> -	/* Preallocate the olr before touching the ring */
> -	ret = intel_ring_alloc_request(ring, NULL, &req);
> -	if (ret)
> -		return ret;
> -
>   	ring->buffer->space -= num_dwords * sizeof(uint32_t);
>   	return 0;
>   }
> @@ -2268,7 +2264,7 @@ int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
>   		return 0;
>
>   	num_dwords = CACHELINE_BYTES / sizeof(uint32_t) - num_dwords;
> -	ret = intel_ring_begin(ring, num_dwords);
> +	ret = intel_ring_begin(req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -2338,7 +2334,7 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
>   	uint32_t cmd;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -2385,7 +2381,7 @@ gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   			!(dispatch_flags & I915_DISPATCH_SECURE);
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -2407,7 +2403,7 @@ hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -2430,7 +2426,7 @@ gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -2456,7 +2452,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req,
>   	uint32_t cmd;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 80eb399..e83fbbb 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -386,7 +386,7 @@ int intel_alloc_ringbuffer_obj(struct drm_device *dev,
>   void intel_stop_ring_buffer(struct intel_engine_cs *ring);
>   void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
>
> -int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
> +int __must_check intel_ring_begin(struct drm_i915_gem_request *req, int n);
>   int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
>   int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring,
>   					  struct intel_context *ctx,
>

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Re: [PATCH 49/53] drm/i915: Make intel_logical_ring_begin() static

[Tomas Elf]

On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The only usage of intel_logical_ring_begin() is within intel_lrc.c so it can be
> made static. To avoid a forward declaration at the top of the file, it and bunch
> of other functions have been shuffled upwards.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c |  394 +++++++++++++++++++-------------------
>   drivers/gpu/drm/i915/intel_lrc.h |    3 -
>   2 files changed, 197 insertions(+), 200 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 5212b54..b40501d 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -606,6 +606,203 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
>   	return logical_ring_invalidate_all_caches(req);
>   }
>
> +static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> +				     int bytes)
> +{
> +	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct drm_i915_gem_request *request;
> +	int ret;
> +
> +	if (intel_ring_space(ringbuf) >= bytes)
> +		return 0;
> +
> +	list_for_each_entry(request, &ring->request_list, list) {
> +		/*
> +		 * The request queue is per-engine, so can contain requests
> +		 * from multiple ringbuffers. Here, we must ignore any that
> +		 * aren't from the ringbuffer we're considering.
> +		 */
> +		struct intel_context *ctx = request->ctx;
> +		if (ctx->engine[ring->id].ringbuf != ringbuf)
> +			continue;
> +
> +		/* Would completion of this request free enough space? */
> +		if (__intel_ring_space(request->tail, ringbuf->tail,
> +				       ringbuf->size) >= bytes) {
> +			break;
> +		}
> +	}
> +
> +	if (&request->list == &ring->request_list)
> +		return -ENOSPC;
> +
> +	ret = i915_wait_request(request);
> +	if (ret)
> +		return ret;
> +
> +	i915_gem_retire_requests_ring(ring);
> +
> +	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
> +}
> +
> +/*
> + * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
> + * @ringbuf: Logical Ringbuffer to advance.
> + *
> + * The tail is updated in our logical ringbuffer struct, not in the actual context. What
> + * really happens during submission is that the context and current tail will be placed
> + * on a queue waiting for the ELSP to be ready to accept a new context submission. At that
> + * point, the tail *inside* the context is updated and the ELSP written to.
> + */
> +static void
> +intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
> +				      struct intel_context *ctx,
> +				      struct drm_i915_gem_request *request)
> +{
> +	struct intel_engine_cs *ring = ringbuf->ring;
> +
> +	intel_logical_ring_advance(ringbuf);
> +
> +	if (intel_ring_stopped(ring))
> +		return;
> +
> +	execlists_context_queue(ring, ctx, ringbuf->tail, request);
> +}
> +
> +static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> +				       struct intel_context *ctx,
> +				       int bytes)
> +{
> +	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct drm_device *dev = ring->dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	unsigned long end;
> +	int ret;
> +
> +	ret = logical_ring_wait_request(ringbuf, bytes);
> +	if (ret != -ENOSPC)
> +		return ret;
> +
> +	/* Force the context submission in case we have been skipping it */
> +	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
> +
> +	/* With GEM the hangcheck timer should kick us out of the loop,
> +	 * leaving it early runs the risk of corrupting GEM state (due
> +	 * to running on almost untested codepaths). But on resume
> +	 * timers don't work yet, so prevent a complete hang in that
> +	 * case by choosing an insanely large timeout. */
> +	end = jiffies + 60 * HZ;
> +
> +	ret = 0;
> +	do {
> +		if (intel_ring_space(ringbuf) >= bytes)
> +			break;
> +
> +		msleep(1);
> +
> +		if (dev_priv->mm.interruptible && signal_pending(current)) {
> +			ret = -ERESTARTSYS;
> +			break;
> +		}
> +
> +		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> +					   dev_priv->mm.interruptible);
> +		if (ret)
> +			break;
> +
> +		if (time_after(jiffies, end)) {
> +			ret = -EBUSY;
> +			break;
> +		}
> +	} while (1);
> +
> +	return ret;
> +}
> +
> +static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
> +				    struct intel_context *ctx)
> +{
> +	uint32_t __iomem *virt;
> +	int rem = ringbuf->size - ringbuf->tail;
> +
> +	if (ringbuf->space < rem) {
> +		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
> +
> +		if (ret)
> +			return ret;
> +	}
> +
> +	virt = ringbuf->virtual_start + ringbuf->tail;
> +	rem /= 4;
> +	while (rem--)
> +		iowrite32(MI_NOOP, virt++);
> +
> +	ringbuf->tail = 0;
> +	intel_ring_update_space(ringbuf);
> +
> +	return 0;
> +}
> +
> +static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
> +				struct intel_context *ctx, int bytes)
> +{
> +	int ret;
> +
> +	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
> +		ret = logical_ring_wrap_buffer(ringbuf, ctx);
> +		if (unlikely(ret))
> +			return ret;
> +	}
> +
> +	if (unlikely(ringbuf->space < bytes)) {
> +		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
> +		if (unlikely(ret))
> +			return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +/**
> + * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
> + *
> + * @ringbuf: Logical ringbuffer.
> + * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
> + *
> + * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
> + * be wrapped, or wait a bit for the tail to be updated). This function takes care of that
> + * and also preallocates a request (every workload submission is still mediated through
> + * requests, same as it did with legacy ringbuffer submission).
> + *
> + * Return: non-zero if the ringbuffer is not ready to be written to.
> + */
> +static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
> +				    struct intel_context *ctx, int num_dwords)
> +{
> +	struct drm_i915_gem_request *req;
> +	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct drm_device *dev = ring->dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	int ret;
> +
> +	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> +				   dev_priv->mm.interruptible);
> +	if (ret)
> +		return ret;
> +
> +	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
> +	if (ret)
> +		return ret;
> +
> +	/* Preallocate the olr before touching the ring */
> +	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
> +	if (ret)
> +		return ret;
> +
> +	ringbuf->space -= num_dwords * sizeof(uint32_t);
> +	return 0;
> +}
> +
>   /**
>    * execlists_submission() - submit a batchbuffer for execution, Execlists style
>    * @dev: DRM device.
> @@ -783,30 +980,6 @@ int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
>   	return 0;
>   }
>
> -/*
> - * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
> - * @ringbuf: Logical Ringbuffer to advance.
> - *
> - * The tail is updated in our logical ringbuffer struct, not in the actual context. What
> - * really happens during submission is that the context and current tail will be placed
> - * on a queue waiting for the ELSP to be ready to accept a new context submission. At that
> - * point, the tail *inside* the context is updated and the ELSP written to.
> - */
> -static void
> -intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
> -				      struct intel_context *ctx,
> -				      struct drm_i915_gem_request *request)
> -{
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -
> -	intel_logical_ring_advance(ringbuf);
> -
> -	if (intel_ring_stopped(ring))
> -		return;
> -
> -	execlists_context_queue(ring, ctx, ringbuf->tail, request);
> -}
> -
>   static int intel_lr_context_pin(struct intel_engine_cs *ring,
>   		struct intel_context *ctx)
>   {
> @@ -901,179 +1074,6 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
>   	return 0;
>   }
>
> -static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> -				     int bytes)
> -{
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_i915_gem_request *request;
> -	int ret;
> -
> -	if (intel_ring_space(ringbuf) >= bytes)
> -		return 0;
> -
> -	list_for_each_entry(request, &ring->request_list, list) {
> -		/*
> -		 * The request queue is per-engine, so can contain requests
> -		 * from multiple ringbuffers. Here, we must ignore any that
> -		 * aren't from the ringbuffer we're considering.
> -		 */
> -		struct intel_context *ctx = request->ctx;
> -		if (ctx->engine[ring->id].ringbuf != ringbuf)
> -			continue;
> -
> -		/* Would completion of this request free enough space? */
> -		if (__intel_ring_space(request->tail, ringbuf->tail,
> -				       ringbuf->size) >= bytes) {
> -			break;
> -		}
> -	}
> -
> -	if (&request->list == &ring->request_list)
> -		return -ENOSPC;
> -
> -	ret = i915_wait_request(request);
> -	if (ret)
> -		return ret;
> -
> -	i915_gem_retire_requests_ring(ring);
> -
> -	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
> -}
> -
> -static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> -				       struct intel_context *ctx,
> -				       int bytes)
> -{
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_device *dev = ring->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	unsigned long end;
> -	int ret;
> -
> -	ret = logical_ring_wait_request(ringbuf, bytes);
> -	if (ret != -ENOSPC)
> -		return ret;
> -
> -	/* Force the context submission in case we have been skipping it */
> -	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
> -
> -	/* With GEM the hangcheck timer should kick us out of the loop,
> -	 * leaving it early runs the risk of corrupting GEM state (due
> -	 * to running on almost untested codepaths). But on resume
> -	 * timers don't work yet, so prevent a complete hang in that
> -	 * case by choosing an insanely large timeout. */
> -	end = jiffies + 60 * HZ;
> -
> -	ret = 0;
> -	do {
> -		if (intel_ring_space(ringbuf) >= bytes)
> -			break;
> -
> -		msleep(1);
> -
> -		if (dev_priv->mm.interruptible && signal_pending(current)) {
> -			ret = -ERESTARTSYS;
> -			break;
> -		}
> -
> -		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> -					   dev_priv->mm.interruptible);
> -		if (ret)
> -			break;
> -
> -		if (time_after(jiffies, end)) {
> -			ret = -EBUSY;
> -			break;
> -		}
> -	} while (1);
> -
> -	return ret;
> -}
> -
> -static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
> -				    struct intel_context *ctx)
> -{
> -	uint32_t __iomem *virt;
> -	int rem = ringbuf->size - ringbuf->tail;
> -
> -	if (ringbuf->space < rem) {
> -		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
> -
> -		if (ret)
> -			return ret;
> -	}
> -
> -	virt = ringbuf->virtual_start + ringbuf->tail;
> -	rem /= 4;
> -	while (rem--)
> -		iowrite32(MI_NOOP, virt++);
> -
> -	ringbuf->tail = 0;
> -	intel_ring_update_space(ringbuf);
> -
> -	return 0;
> -}
> -
> -static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
> -				struct intel_context *ctx, int bytes)
> -{
> -	int ret;
> -
> -	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
> -		ret = logical_ring_wrap_buffer(ringbuf, ctx);
> -		if (unlikely(ret))
> -			return ret;
> -	}
> -
> -	if (unlikely(ringbuf->space < bytes)) {
> -		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
> -		if (unlikely(ret))
> -			return ret;
> -	}
> -
> -	return 0;
> -}
> -
> -/**
> - * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
> - *
> - * @ringbuf: Logical ringbuffer.
> - * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
> - *
> - * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
> - * be wrapped, or wait a bit for the tail to be updated). This function takes care of that
> - * and also preallocates a request (every workload submission is still mediated through
> - * requests, same as it did with legacy ringbuffer submission).
> - *
> - * Return: non-zero if the ringbuffer is not ready to be written to.
> - */
> -int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
> -			     struct intel_context *ctx, int num_dwords)
> -{
> -	struct drm_i915_gem_request *req;
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_device *dev = ring->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	int ret;
> -
> -	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> -				   dev_priv->mm.interruptible);
> -	if (ret)
> -		return ret;
> -
> -	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
> -	if (ret)
> -		return ret;
> -
> -	/* Preallocate the olr before touching the ring */
> -	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
> -	if (ret)
> -		return ret;
> -
> -	ringbuf->space -= num_dwords * sizeof(uint32_t);
> -	return 0;
> -}
> -
>   static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   {
>   	int ret, i;
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 40848b0..dceecc6 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -65,9 +65,6 @@ static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
>   	iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
>   	ringbuf->tail += 4;
>   }
> -int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
> -			     struct intel_context *ctx,
> -			     int num_dwords);
>
>   /* Logical Ring Contexts */
>   void intel_lr_context_free(struct intel_context *ctx);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 50/53] drm/i915: Update intel_logical_ring_begin() to take a request structure

[Tomas Elf]

On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that everything above has been converted to use requests,
> intel_logical_ring_begin() can be updated to take a request instead of a
> ringbuf/context pair. This also means that it no longer needs to lazily allocate
> a request if no-one happens to have done it earlier.
>
> Note that this change makes the execlist signature the same as the legacy
> version. Thus the two functions could be merged into a ring->begin() wrapper if
> required.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c |   33 +++++++++++++++------------------
>   1 file changed, 15 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index b40501d..2911cf6 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -766,7 +766,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
>   /**
>    * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
>    *
> - * @ringbuf: Logical ringbuffer.
> + * @request: The request to start some new work for
>    * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
>    *
>    * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
> @@ -776,30 +776,27 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
>    *
>    * Return: non-zero if the ringbuffer is not ready to be written to.
>    */
> -static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
> -				    struct intel_context *ctx, int num_dwords)
> +static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
> +				    int num_dwords)
>   {
> -	struct drm_i915_gem_request *req;
> -	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	int ret;
>
> +	WARN_ON(req == NULL);

This WARN_ON will only fire after there's been a null pointer exception 
in the req->ring dereference above. Please rearrange these so that it 
warns before the null pointer exception.

Thanks,
Tomas

> +
>   	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
>   				   dev_priv->mm.interruptible);
>   	if (ret)
>   		return ret;
>
> -	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
> -	if (ret)
> -		return ret;
> -
> -	/* Preallocate the olr before touching the ring */
> -	ret = intel_logical_ring_alloc_request(ring, ctx, &req);
> +	ret = logical_ring_prepare(req->ringbuf, req->ctx,
> +				   num_dwords * sizeof(uint32_t));
>   	if (ret)
>   		return ret;
>
> -	ringbuf->space -= num_dwords * sizeof(uint32_t);
> +	req->ringbuf->space -= num_dwords * sizeof(uint32_t);
>   	return 0;
>   }
>
> @@ -885,7 +882,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
>
>   	if (ring == &dev_priv->ring[RCS] &&
>   	    instp_mode != dev_priv->relative_constants_mode) {
> -		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
> +		ret = intel_logical_ring_begin(params->request, 4);
>   		if (ret)
>   			return ret;
>
> @@ -1091,7 +1088,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, req->ctx, w->count * 2 + 2);
> +	ret = intel_logical_ring_begin(req, w->count * 2 + 2);
>   	if (ret)
>   		return ret;
>
> @@ -1173,7 +1170,7 @@ static int gen8_emit_bb_start(struct drm_i915_gem_request *req,
>   	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
>   	int ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, req->ctx, 4);
> +	ret = intel_logical_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1231,7 +1228,7 @@ static int gen8_emit_flush(struct drm_i915_gem_request *request,
>   	uint32_t cmd;
>   	int ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, request->ctx, 4);
> +	ret = intel_logical_ring_begin(request, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1289,7 +1286,7 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
>   		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
>   	}
>
> -	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
> +	ret = intel_logical_ring_begin(request, 6);
>   	if (ret)
>   		return ret;
>
> @@ -1321,7 +1318,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
>   	u32 cmd;
>   	int ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
> +	ret = intel_logical_ring_begin(request, 6);
>   	if (ret)
>   		return ret;
>
>

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Re: [PATCH 51/53] drm/i915: Remove the now obsolete intel_ring_get_request()

[Tomas Elf]

On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Much of the driver has now been converted to passing requests around instead of
> rings/ringbufs/contexts. Thus the function for retreiving the request from a
> ring (i.e. the OLR) is no longer used and can be removed.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    7 -------
>   1 file changed, 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index e83fbbb..3b0261f 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -431,11 +431,4 @@ static inline u32 intel_ring_get_tail(struct intel_ringbuffer *ringbuf)
>   	return ringbuf->tail;
>   }
>
> -static inline struct drm_i915_gem_request *
> -intel_ring_get_request(struct intel_engine_cs *ring)
> -{
> -	BUG_ON(ring->outstanding_lazy_request == NULL);
> -	return ring->outstanding_lazy_request;
> -}
> -
>   #endif /* _INTEL_RINGBUFFER_H_ */
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 52/53] drm/i915: Remove the now obsolete 'outstanding_lazy_request'

[Tomas Elf]

On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The outstanding_lazy_request is no longer used anywhere in the driver.
> Everything that was looking at it now has a request explicitly passed in from on
> high. Everything that was relying upon behind the scenes is now explicitly
> creating/passing/submitting it's own private request. Thus the OLR can be
> removed.
>

"Everything that was relying upon behind the scenes is now explicitly 
creating/passing/submitting it's ..."
--->
"Everything that was relying on it behind the scenes is now explicitly 
creating/passing/submitting its ..." ?


> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c            |   16 +---------------
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    4 +---
>   drivers/gpu/drm/i915/intel_lrc.c           |    6 ++----
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   17 ++---------------
>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ----
>   5 files changed, 6 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 60f6671..8e7418b 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1156,15 +1156,9 @@ i915_gem_check_wedge(struct i915_gpu_error *error,
>   int
>   i915_gem_check_olr(struct drm_i915_gem_request *req)
>   {
> -	int ret;
> -
>   	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
>
> -	ret = 0;
> -	if (req == req->ring->outstanding_lazy_request)
> -		ret = i915_add_request(req);
> -
> -	return ret;
> +	return 0;
>   }
>
>   static void fake_irq(unsigned long data)
> @@ -2424,8 +2418,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
>   	dev_priv = ring->dev->dev_private;
>   	ringbuf = request->ringbuf;
>
> -	WARN_ON(request != ring->outstanding_lazy_request);
> -
>   	request_start = intel_ring_get_tail(ringbuf);
>   	/*
>   	 * Emit any outstanding flushes - execbuf can fail to emit the flush
> @@ -2486,7 +2478,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
>   	}
>
>   	trace_i915_gem_request_add(request);
> -	ring->outstanding_lazy_request = NULL;
>
>   	i915_queue_hangcheck(ring->dev);
>
> @@ -2672,9 +2663,6 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
>
>   		i915_gem_free_request(request);
>   	}
> -
> -	/* This may not have been flushed before the reset, so clean it now */
> -	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
>   }
>
>   void i915_gem_restore_fences(struct drm_device *dev)
> @@ -3124,8 +3112,6 @@ int i915_gpu_idle(struct drm_device *dev)
>   			}
>   		}
>
> -		WARN_ON(ring->outstanding_lazy_request);
> -
>   		ret = intel_ring_idle(ring);
>   		if (ret)
>   			return ret;
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 6a703e6..0eae592 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1571,10 +1571,8 @@ err:
>   	 * must be freed again. If it was submitted then it is being tracked
>   	 * on the active request list and no clean up is required here.
>   	 */
> -	if (ret && params->request) {
> +	if (ret && params->request)
>   		i915_gem_request_unreference(params->request);
> -		ring->outstanding_lazy_request = NULL;
> -	}
>
>   	mutex_unlock(&dev->struct_mutex);
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 2911cf6..db63ea0 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1032,8 +1032,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
>   	if (!req_out)
>   		return -EINVAL;
>
> -	if ((*req_out = ring->outstanding_lazy_request) != NULL)
> -		return 0;
> +	*req_out = NULL;
>
>   	request = kzalloc(sizeof(*request), GFP_KERNEL);
>   	if (request == NULL)
> @@ -1067,7 +1066,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
>   	i915_gem_context_reference(request->ctx);
>   	request->ringbuf = ctx->engine[ring->id].ringbuf;
>
> -	*req_out = ring->outstanding_lazy_request = request;
> +	*req_out = request;
>   	return 0;
>   }
>
> @@ -1393,7 +1392,6 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
>
>   	intel_logical_ring_stop(ring);
>   	WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0);
> -	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
>
>   	if (ring->cleanup)
>   		ring->cleanup(ring);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 5eef02e..85daa18 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2034,7 +2034,6 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
>
>   	intel_unpin_ringbuffer_obj(ringbuf);
>   	intel_destroy_ringbuffer_obj(ringbuf);
> -	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
>
>   	if (ring->cleanup)
>   		ring->cleanup(ring);
> @@ -2153,15 +2152,6 @@ static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
>   int intel_ring_idle(struct intel_engine_cs *ring)
>   {
>   	struct drm_i915_gem_request *req;
> -	int ret;
> -
> -	/* We need to add any requests required to flush the objects and ring */
> -	WARN_ON(ring->outstanding_lazy_request);
> -	if (ring->outstanding_lazy_request) {
> -		ret = i915_add_request(ring->outstanding_lazy_request);
> -		if (ret)
> -			return ret;
> -	}
>
>   	/* Wait upon the last request to be completed */
>   	if (list_empty(&ring->request_list))
> @@ -2186,8 +2176,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
>   	if (!req_out)
>   		return -EINVAL;
>
> -	if ((*req_out = ring->outstanding_lazy_request) != NULL)
> -		return 0;
> +	*req_out = NULL;
>
>   	request = kzalloc(sizeof(*request), GFP_KERNEL);
>   	if (request == NULL)
> @@ -2206,7 +2195,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
>   		return ret;
>   	}
>
> -	*req_out = ring->outstanding_lazy_request = request;
> +	*req_out = request;
>   	return 0;
>   }
>
> @@ -2281,8 +2270,6 @@ void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>
> -	BUG_ON(ring->outstanding_lazy_request);
> -
>   	if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {
>   		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
>   		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 3b0261f..d2c6427 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -258,10 +258,6 @@ struct  intel_engine_cs {
>   	 */
>   	struct list_head request_list;
>
> -	/**
> -	 * Do we have some not yet emitted requests outstanding?
> -	 */
> -	struct drm_i915_gem_request *outstanding_lazy_request;
>   	bool gpu_caches_dirty;
>   	bool fbc_dirty;
>
>

Since we're removing the i915_add_request from i915_check_olr and 
thereby removing the OLR emission the following comment at 
i915_gem_object_flush_active is no longer valid:

         /**
          * Ensures that an object will eventually get non-busy by 
flushing any required
          * write domains, emitting any outstanding lazy request and 
retiring and
          * completed requests.
          */
          static int
          i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
          {
                 struct intel_engine_cs *ring;
                 int ret;

                 if (obj->active) {
                         ring = 
i915_gem_request_get_ring(obj->last_read_req);
                         ret = i915_gem_check_olr(obj->last_read_req);


Thanks,
Tomas
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Re: [PATCH 53/53] drm/i915: Move the request/file and request/pid association to creation time

[Tomas Elf]

On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> In _i915_add_request(), the request is associated with a userland client.
> Specifically it is linked to the 'file' structure and the current user process
> is recorded. One problem here is that the current user process is not
> necessarily the same as when the request was submitted to the driver. This is
> especially true when the GPU scheduler arrives and decouples driver submission
> from hardware submission. Note also that it is only in the case where the add
> request comes from an execbuff call that there is a client to associate. Any
> other add request call is kernel only so does not need to do it.
>
> This patch moves the client association into a separate function. This is then
> called from the execbuffer code path itself at a sensible time. It also removes
> the now redundant 'file' pointer from the add request parameter list.
>
> An extra cleanup of the client association is also added to the request clean up
> code for the eventuality where the request is killed after association but
> before being submitted (e.g. due to out of memory error somewhere). Once the
> submission has happened, the request is on the request list and the regular
> request list removal will clear the association. Note that this still needs to
> happen at this point in time because the request might be kept floating around
> much longer (due to someone holding a reference count) and the client should not
> be worrying about this request after it has been retired.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    8 +++--
>   drivers/gpu/drm/i915/i915_gem.c            |   49 +++++++++++++++++++---------
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    7 ++--
>   3 files changed, 44 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 3955bef..4a9248f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2199,6 +2199,9 @@ struct drm_i915_gem_request {
>   };
>
>   void i915_gem_request_free(struct kref *req_ref);
> +void i915_gem_request_remove_from_client(struct drm_i915_gem_request *request);
> +int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
> +				   struct drm_file *file);
>
>   static inline uint32_t
>   i915_gem_request_get_seqno(struct drm_i915_gem_request *req)
> @@ -2831,13 +2834,12 @@ void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
>   int __must_check i915_gpu_idle(struct drm_device *dev);
>   int __must_check i915_gem_suspend(struct drm_device *dev);
>   int __i915_add_request(struct drm_i915_gem_request *req,
> -		       struct drm_file *file,
>   		       struct drm_i915_gem_object *batch_obj,
>   		       bool flush_caches);
>   #define i915_add_request(req) \
> -	__i915_add_request(req, NULL, NULL, true)
> +	__i915_add_request(req, NULL, true)
>   #define i915_add_request_no_flush(req) \
> -	__i915_add_request(req, NULL, NULL, false)
> +	__i915_add_request(req, NULL, false)
>   int __i915_wait_request(struct drm_i915_gem_request *req,
>   			unsigned reset_counter,
>   			bool interruptible,
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 8e7418b..660518d 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2401,7 +2401,6 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
>   }
>
>   int __i915_add_request(struct drm_i915_gem_request *request,
> -		       struct drm_file *file,
>   		       struct drm_i915_gem_object *obj,
>   		       bool flush_caches)
>   {
> @@ -2463,19 +2462,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
>
>   	request->emitted_jiffies = jiffies;
>   	list_add_tail(&request->list, &ring->request_list);
> -	request->file_priv = NULL;
> -
> -	if (file) {
> -		struct drm_i915_file_private *file_priv = file->driver_priv;
> -
> -		spin_lock(&file_priv->mm.lock);
> -		request->file_priv = file_priv;
> -		list_add_tail(&request->client_list,
> -			      &file_priv->mm.request_list);
> -		spin_unlock(&file_priv->mm.lock);
> -
> -		request->pid = get_pid(task_pid(current));
> -	}
>
>   	trace_i915_gem_request_add(request);
>
> @@ -2490,7 +2476,34 @@ int __i915_add_request(struct drm_i915_gem_request *request,
>   	return 0;
>   }
>
> -static inline void
> +int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
> +				   struct drm_file *file)
> +{
> +	struct drm_i915_private *dev_private;
> +	struct drm_i915_file_private *file_priv;
> +
> +	WARN_ON(!req || !file || req->file_priv);
> +
> +	if (!req || !file)
> +		return -EINVAL;
> +
> +	if (req->file_priv)
> +		return -EINVAL;
> +
> +	dev_private = req->ring->dev->dev_private;
> +	file_priv = file->driver_priv;
> +
> +	spin_lock(&file_priv->mm.lock);
> +	req->file_priv = file_priv;
> +	list_add_tail(&req->client_list, &file_priv->mm.request_list);
> +	spin_unlock(&file_priv->mm.lock);
> +
> +	req->pid = get_pid(task_pid(current));
> +
> +	return 0;
> +}
> +
> +inline void
>   i915_gem_request_remove_from_client(struct drm_i915_gem_request *request)
>   {
>   	struct drm_i915_file_private *file_priv = request->file_priv;
> @@ -2565,6 +2578,9 @@ void i915_gem_request_free(struct kref *req_ref)
>   						 typeof(*req), ref);
>   	struct intel_context *ctx = req->ctx;
>
> +	if (req->file_priv)
> +		i915_gem_request_remove_from_client(req);
> +
>   	if (ctx) {
>   		if (i915.enable_execlists) {
>   			struct intel_engine_cs *ring = req->ring;
> @@ -4120,6 +4136,9 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file)
>   		if (time_after_eq(request->emitted_jiffies, recent_enough))
>   			break;
>
> +		if (!request->emitted_jiffies)
> +			continue;
> +

Please add a comment clarifying the purpose of the emitted_jiffies check 
above.

Thanks,
Tomas


>   		target = request;
>   	}
>   	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 0eae592..739aaeb 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -996,8 +996,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
>   	params->ring->gpu_caches_dirty = true;
>
>   	/* Add a breadcrumb for the completion of the batch buffer */
> -	return __i915_add_request(params->request, params->file,
> -				  params->batch_obj, true);
> +	return __i915_add_request(params->request, params->batch_obj, true);
>   }
>
>   static int
> @@ -1537,6 +1536,10 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	if (ret)
>   		goto err;
>
> +	ret = i915_gem_request_add_to_client(params->request, file);
> +	if (ret)
> +		goto err;
> +
>   	/*
>   	 * Save assorted stuff away to pass through to *_submission().
>   	 * NB: This data should be 'persistent' and not local as it will
>

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Re: [PATCH 52/53] drm/i915: Remove the now obsolete 'outstanding_lazy_request'

[Daniel Vetter]

On Mon, Mar 09, 2015 at 11:51:26PM +0000, Tomas Elf wrote:
> On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote:
> >From: John Harrison <John.C.Harrison@Intel.com>
> >
> >The outstanding_lazy_request is no longer used anywhere in the driver.
> >Everything that was looking at it now has a request explicitly passed in from on
> >high. Everything that was relying upon behind the scenes is now explicitly
> >creating/passing/submitting it's own private request. Thus the OLR can be
> >removed.
> >
> 
> "Everything that was relying upon behind the scenes is now explicitly
> creating/passing/submitting it's ..."
> --->
> "Everything that was relying on it behind the scenes is now explicitly
> creating/passing/submitting its ..." ?
> 
> 
> >For: VIZ-5115
> >Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >---
> >  drivers/gpu/drm/i915/i915_gem.c            |   16 +---------------
> >  drivers/gpu/drm/i915/i915_gem_execbuffer.c |    4 +---
> >  drivers/gpu/drm/i915/intel_lrc.c           |    6 ++----
> >  drivers/gpu/drm/i915/intel_ringbuffer.c    |   17 ++---------------
> >  drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ----
> >  5 files changed, 6 insertions(+), 41 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> >index 60f6671..8e7418b 100644
> >--- a/drivers/gpu/drm/i915/i915_gem.c
> >+++ b/drivers/gpu/drm/i915/i915_gem.c
> >@@ -1156,15 +1156,9 @@ i915_gem_check_wedge(struct i915_gpu_error *error,
> >  int
> >  i915_gem_check_olr(struct drm_i915_gem_request *req)
> >  {
> >-	int ret;
> >-
> >  	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
> >
> >-	ret = 0;
> >-	if (req == req->ring->outstanding_lazy_request)
> >-		ret = i915_add_request(req);
> >-
> >-	return ret;
> >+	return 0;
> >  }
> >
> >  static void fake_irq(unsigned long data)
> >@@ -2424,8 +2418,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
> >  	dev_priv = ring->dev->dev_private;
> >  	ringbuf = request->ringbuf;
> >
> >-	WARN_ON(request != ring->outstanding_lazy_request);
> >-
> >  	request_start = intel_ring_get_tail(ringbuf);
> >  	/*
> >  	 * Emit any outstanding flushes - execbuf can fail to emit the flush
> >@@ -2486,7 +2478,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
> >  	}
> >
> >  	trace_i915_gem_request_add(request);
> >-	ring->outstanding_lazy_request = NULL;
> >
> >  	i915_queue_hangcheck(ring->dev);
> >
> >@@ -2672,9 +2663,6 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
> >
> >  		i915_gem_free_request(request);
> >  	}
> >-
> >-	/* This may not have been flushed before the reset, so clean it now */
> >-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
> >  }
> >
> >  void i915_gem_restore_fences(struct drm_device *dev)
> >@@ -3124,8 +3112,6 @@ int i915_gpu_idle(struct drm_device *dev)
> >  			}
> >  		}
> >
> >-		WARN_ON(ring->outstanding_lazy_request);
> >-
> >  		ret = intel_ring_idle(ring);
> >  		if (ret)
> >  			return ret;
> >diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >index 6a703e6..0eae592 100644
> >--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >@@ -1571,10 +1571,8 @@ err:
> >  	 * must be freed again. If it was submitted then it is being tracked
> >  	 * on the active request list and no clean up is required here.
> >  	 */
> >-	if (ret && params->request) {
> >+	if (ret && params->request)
> >  		i915_gem_request_unreference(params->request);
> >-		ring->outstanding_lazy_request = NULL;
> >-	}
> >
> >  	mutex_unlock(&dev->struct_mutex);
> >
> >diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> >index 2911cf6..db63ea0 100644
> >--- a/drivers/gpu/drm/i915/intel_lrc.c
> >+++ b/drivers/gpu/drm/i915/intel_lrc.c
> >@@ -1032,8 +1032,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
> >  	if (!req_out)
> >  		return -EINVAL;
> >
> >-	if ((*req_out = ring->outstanding_lazy_request) != NULL)
> >-		return 0;
> >+	*req_out = NULL;
> >
> >  	request = kzalloc(sizeof(*request), GFP_KERNEL);
> >  	if (request == NULL)
> >@@ -1067,7 +1066,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
> >  	i915_gem_context_reference(request->ctx);
> >  	request->ringbuf = ctx->engine[ring->id].ringbuf;
> >
> >-	*req_out = ring->outstanding_lazy_request = request;
> >+	*req_out = request;
> >  	return 0;
> >  }
> >
> >@@ -1393,7 +1392,6 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
> >
> >  	intel_logical_ring_stop(ring);
> >  	WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0);
> >-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
> >
> >  	if (ring->cleanup)
> >  		ring->cleanup(ring);
> >diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >index 5eef02e..85daa18 100644
> >--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> >+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >@@ -2034,7 +2034,6 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
> >
> >  	intel_unpin_ringbuffer_obj(ringbuf);
> >  	intel_destroy_ringbuffer_obj(ringbuf);
> >-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
> >
> >  	if (ring->cleanup)
> >  		ring->cleanup(ring);
> >@@ -2153,15 +2152,6 @@ static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
> >  int intel_ring_idle(struct intel_engine_cs *ring)
> >  {
> >  	struct drm_i915_gem_request *req;
> >-	int ret;
> >-
> >-	/* We need to add any requests required to flush the objects and ring */
> >-	WARN_ON(ring->outstanding_lazy_request);
> >-	if (ring->outstanding_lazy_request) {
> >-		ret = i915_add_request(ring->outstanding_lazy_request);
> >-		if (ret)
> >-			return ret;
> >-	}
> >
> >  	/* Wait upon the last request to be completed */
> >  	if (list_empty(&ring->request_list))
> >@@ -2186,8 +2176,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
> >  	if (!req_out)
> >  		return -EINVAL;
> >
> >-	if ((*req_out = ring->outstanding_lazy_request) != NULL)
> >-		return 0;
> >+	*req_out = NULL;
> >
> >  	request = kzalloc(sizeof(*request), GFP_KERNEL);
> >  	if (request == NULL)
> >@@ -2206,7 +2195,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
> >  		return ret;
> >  	}
> >
> >-	*req_out = ring->outstanding_lazy_request = request;
> >+	*req_out = request;
> >  	return 0;
> >  }
> >
> >@@ -2281,8 +2270,6 @@ void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)
> >  	struct drm_device *dev = ring->dev;
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >
> >-	BUG_ON(ring->outstanding_lazy_request);
> >-
> >  	if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {
> >  		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
> >  		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
> >diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >index 3b0261f..d2c6427 100644
> >--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> >+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >@@ -258,10 +258,6 @@ struct  intel_engine_cs {
> >  	 */
> >  	struct list_head request_list;
> >
> >-	/**
> >-	 * Do we have some not yet emitted requests outstanding?
> >-	 */
> >-	struct drm_i915_gem_request *outstanding_lazy_request;
> >  	bool gpu_caches_dirty;
> >  	bool fbc_dirty;
> >
> >
> 
> Since we're removing the i915_add_request from i915_check_olr and thereby
> removing the OLR emission the following comment at
> i915_gem_object_flush_active is no longer valid:
> 
>         /**
>          * Ensures that an object will eventually get non-busy by flushing
> any required
>          * write domains, emitting any outstanding lazy request and retiring
> and
>          * completed requests.
>          */
>          static int
>          i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
>          {
>                 struct intel_engine_cs *ring;
>                 int ret;
> 
>                 if (obj->active) {
>                         ring =
> i915_gem_request_get_ring(obj->last_read_req);
>                         ret = i915_gem_check_olr(obj->last_read_req);

Nice catch! On top of that the int return value is no longer needed, so a
follow-up patch should simplify it to void.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 01/53] drm/i915: Remove ironlake rc6 support

[Tomas Elf]

On 05/03/2015 14:03, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Apparently, this has never worked reliably and is currently disabled. Also, the
> gains are not particularly impressive. Thus rather than try to keep unused code
> from decaying and having to update it for other driver changes, it was decided
> to simply remove it.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_debugfs.c  |   12 ---
>   drivers/gpu/drm/i915/i915_drv.h      |    3 -
>   drivers/gpu/drm/i915/intel_display.c |    2 -
>   drivers/gpu/drm/i915/intel_drv.h     |    1 -
>   drivers/gpu/drm/i915/intel_pm.c      |  155 ----------------------------------
>   5 files changed, 173 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 68a1e6e..18e4900 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1846,18 +1846,6 @@ static int i915_context_status(struct seq_file *m, void *unused)
>   	if (ret)
>   		return ret;
>
> -	if (dev_priv->ips.pwrctx) {
> -		seq_puts(m, "power context ");
> -		describe_obj(m, dev_priv->ips.pwrctx);
> -		seq_putc(m, '\n');
> -	}
> -
> -	if (dev_priv->ips.renderctx) {
> -		seq_puts(m, "render context ");
> -		describe_obj(m, dev_priv->ips.renderctx);
> -		seq_putc(m, '\n');
> -	}
> -
>   	list_for_each_entry(ctx, &dev_priv->context_list, link) {
>   		if (!i915.enable_execlists &&
>   		    ctx->legacy_hw_ctx.rcs_state == NULL)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 798fa88..05f106d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1053,9 +1053,6 @@ struct intel_ilk_power_mgmt {
>
>   	int c_m;
>   	int r_t;
> -
> -	struct drm_i915_gem_object *pwrctx;
> -	struct drm_i915_gem_object *renderctx;
>   };
>
>   struct drm_i915_private;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5c35098..51f7ed4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13904,8 +13904,6 @@ void intel_modeset_cleanup(struct drm_device *dev)
>
>   	intel_fbc_disable(dev);
>
> -	ironlake_teardown_rc6(dev);
> -
>   	mutex_unlock(&dev->struct_mutex);
>
>   	/* flush any delayed tasks or pending work */
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index f4305be..b793558 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1229,7 +1229,6 @@ void intel_enable_gt_powersave(struct drm_device *dev);
>   void intel_disable_gt_powersave(struct drm_device *dev);
>   void intel_suspend_gt_powersave(struct drm_device *dev);
>   void intel_reset_gt_powersave(struct drm_device *dev);
> -void ironlake_teardown_rc6(struct drm_device *dev);
>   void gen6_update_ring_freq(struct drm_device *dev);
>   void gen6_rps_idle(struct drm_i915_private *dev_priv);
>   void gen6_rps_boost(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 542cf68..0762572 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3539,41 +3539,6 @@ void intel_update_sprite_watermarks(struct drm_plane *plane,
>   						   pixel_size, enabled, scaled);
>   }
>
> -static struct drm_i915_gem_object *
> -intel_alloc_context_page(struct drm_device *dev)
> -{
> -	struct drm_i915_gem_object *ctx;
> -	int ret;
> -
> -	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
> -
> -	ctx = i915_gem_alloc_object(dev, 4096);
> -	if (!ctx) {
> -		DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
> -		return NULL;
> -	}
> -
> -	ret = i915_gem_obj_ggtt_pin(ctx, 4096, 0);
> -	if (ret) {
> -		DRM_ERROR("failed to pin power context: %d\n", ret);
> -		goto err_unref;
> -	}
> -
> -	ret = i915_gem_object_set_to_gtt_domain(ctx, 1);
> -	if (ret) {
> -		DRM_ERROR("failed to set-domain on power context: %d\n", ret);
> -		goto err_unpin;
> -	}
> -
> -	return ctx;
> -
> -err_unpin:
> -	i915_gem_object_ggtt_unpin(ctx);
> -err_unref:
> -	drm_gem_object_unreference(&ctx->base);
> -	return NULL;
> -}
> -
>   /**
>    * Lock protecting IPS related data structures
>    */
> @@ -4990,124 +4955,6 @@ static void valleyview_enable_rps(struct drm_device *dev)
>   	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
>   }
>
> -void ironlake_teardown_rc6(struct drm_device *dev)
> -{
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -
> -	if (dev_priv->ips.renderctx) {
> -		i915_gem_object_ggtt_unpin(dev_priv->ips.renderctx);
> -		drm_gem_object_unreference(&dev_priv->ips.renderctx->base);
> -		dev_priv->ips.renderctx = NULL;
> -	}
> -
> -	if (dev_priv->ips.pwrctx) {
> -		i915_gem_object_ggtt_unpin(dev_priv->ips.pwrctx);
> -		drm_gem_object_unreference(&dev_priv->ips.pwrctx->base);
> -		dev_priv->ips.pwrctx = NULL;
> -	}
> -}
> -
> -static void ironlake_disable_rc6(struct drm_device *dev)
> -{
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -
> -	if (I915_READ(PWRCTXA)) {
> -		/* Wake the GPU, prevent RC6, then restore RSTDBYCTL */
> -		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) | RCX_SW_EXIT);
> -		wait_for(((I915_READ(RSTDBYCTL) & RSX_STATUS_MASK) == RSX_STATUS_ON),
> -			 50);
> -
> -		I915_WRITE(PWRCTXA, 0);
> -		POSTING_READ(PWRCTXA);
> -
> -		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
> -		POSTING_READ(RSTDBYCTL);
> -	}
> -}
> -
> -static int ironlake_setup_rc6(struct drm_device *dev)
> -{
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -
> -	if (dev_priv->ips.renderctx == NULL)
> -		dev_priv->ips.renderctx = intel_alloc_context_page(dev);
> -	if (!dev_priv->ips.renderctx)
> -		return -ENOMEM;
> -
> -	if (dev_priv->ips.pwrctx == NULL)
> -		dev_priv->ips.pwrctx = intel_alloc_context_page(dev);
> -	if (!dev_priv->ips.pwrctx) {
> -		ironlake_teardown_rc6(dev);
> -		return -ENOMEM;
> -	}
> -
> -	return 0;
> -}
> -
> -static void ironlake_enable_rc6(struct drm_device *dev)
> -{
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
> -	bool was_interruptible;
> -	int ret;
> -
> -	/* rc6 disabled by default due to repeated reports of hanging during
> -	 * boot and resume.
> -	 */
> -	if (!intel_enable_rc6(dev))
> -		return;
> -
> -	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
> -
> -	ret = ironlake_setup_rc6(dev);
> -	if (ret)
> -		return;
> -
> -	was_interruptible = dev_priv->mm.interruptible;
> -	dev_priv->mm.interruptible = false;
> -
> -	/*
> -	 * GPU can automatically power down the render unit if given a page
> -	 * to save state.
> -	 */
> -	ret = intel_ring_begin(ring, 6);
> -	if (ret) {
> -		ironlake_teardown_rc6(dev);
> -		dev_priv->mm.interruptible = was_interruptible;
> -		return;
> -	}
> -
> -	intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);
> -	intel_ring_emit(ring, MI_SET_CONTEXT);
> -	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(dev_priv->ips.renderctx) |
> -			MI_MM_SPACE_GTT |
> -			MI_SAVE_EXT_STATE_EN |
> -			MI_RESTORE_EXT_STATE_EN |
> -			MI_RESTORE_INHIBIT);
> -	intel_ring_emit(ring, MI_SUSPEND_FLUSH);
> -	intel_ring_emit(ring, MI_NOOP);
> -	intel_ring_emit(ring, MI_FLUSH);
> -	intel_ring_advance(ring);
> -
> -	/*
> -	 * Wait for the command parser to advance past MI_SET_CONTEXT. The HW
> -	 * does an implicit flush, combined with MI_FLUSH above, it should be
> -	 * safe to assume that renderctx is valid
> -	 */
> -	ret = intel_ring_idle(ring);
> -	dev_priv->mm.interruptible = was_interruptible;
> -	if (ret) {
> -		DRM_ERROR("failed to enable ironlake power savings\n");
> -		ironlake_teardown_rc6(dev);
> -		return;
> -	}
> -
> -	I915_WRITE(PWRCTXA, i915_gem_obj_ggtt_offset(dev_priv->ips.pwrctx) | PWRCTX_EN);
> -	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
> -
> -	intel_print_rc6_info(dev, GEN6_RC_CTL_RC6_ENABLE);
> -}
> -
>   static unsigned long intel_pxfreq(u32 vidfreq)
>   {
>   	unsigned long freq;
> @@ -5655,7 +5502,6 @@ void intel_disable_gt_powersave(struct drm_device *dev)
>
>   	if (IS_IRONLAKE_M(dev)) {
>   		ironlake_disable_drps(dev);
> -		ironlake_disable_rc6(dev);
>   	} else if (INTEL_INFO(dev)->gen >= 6) {
>   		intel_suspend_gt_powersave(dev);
>
> @@ -5726,7 +5572,6 @@ void intel_enable_gt_powersave(struct drm_device *dev)
>   	if (IS_IRONLAKE_M(dev)) {
>   		mutex_lock(&dev->struct_mutex);
>   		ironlake_enable_drps(dev);
> -		ironlake_enable_rc6(dev);
>   		intel_init_emon(dev);
>   		mutex_unlock(&dev->struct_mutex);
>   	} else if (INTEL_INFO(dev)->gen >= 6) {
>
 >

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

(I know this one has already been queued for merge... I'm going through 
these patches regardless, for my own bookkeeping)
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Re: [PATCH 54/56] drm/i915: Rename 'do_execbuf' to 'execbuf_submit'

[Tomas Elf]

On 05/03/2015 13:57, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The submission portion of the execbuffer code path was abstracted into a
> function pointer indirection as part of the legacy vs execlist work. The two
> implementation functions are called 'i915_gem_ringbuffer_submission' and
> 'intel_execlists_submission' but the pointer was called 'do_execbuf'. There is
> already a 'i915_gem_do_execbuffer' function (which is what calls the pointer
> indirection). The name of the pointer is therefore considered to be backwards
> and should be changed.
>
> This patch renames it to 'execbuf_submit' which is hopefully a bit clearer.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    6 +++---
>   drivers/gpu/drm/i915/i915_gem.c            |    4 ++--
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
>   3 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7c9e569..4e9a350 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1793,9 +1793,9 @@ struct drm_i915_private {
>   		int (*alloc_request)(struct intel_engine_cs *ring,
>   				     struct intel_context *ctx,
>   				     struct drm_i915_gem_request **req_out);
> -		int (*do_execbuf)(struct i915_execbuffer_params *params,
> -				  struct drm_i915_gem_execbuffer2 *args,
> -				  struct list_head *vmas);
> +		int (*execbuf_submit)(struct i915_execbuffer_params *params,
> +				      struct drm_i915_gem_execbuffer2 *args,
> +				      struct list_head *vmas);
>   		int (*init_rings)(struct drm_device *dev);
>   		void (*cleanup_ring)(struct intel_engine_cs *ring);
>   		void (*stop_ring)(struct intel_engine_cs *ring);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index ecff3f7..27abc9d 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4928,13 +4928,13 @@ int i915_gem_init(struct drm_device *dev)
>
>   	if (!i915.enable_execlists) {
>   		dev_priv->gt.alloc_request = intel_ring_alloc_request;
> -		dev_priv->gt.do_execbuf = i915_gem_ringbuffer_submission;
> +		dev_priv->gt.execbuf_submit = i915_gem_ringbuffer_submission;
>   		dev_priv->gt.init_rings = i915_gem_init_rings;
>   		dev_priv->gt.cleanup_ring = intel_cleanup_ring_buffer;
>   		dev_priv->gt.stop_ring = intel_stop_ring_buffer;
>   	} else {
>   		dev_priv->gt.alloc_request = intel_logical_ring_alloc_request;
> -		dev_priv->gt.do_execbuf = intel_execlists_submission;
> +		dev_priv->gt.execbuf_submit = intel_execlists_submission;
>   		dev_priv->gt.init_rings = intel_logical_rings_init;
>   		dev_priv->gt.cleanup_ring = intel_logical_ring_cleanup;
>   		dev_priv->gt.stop_ring = intel_logical_ring_stop;
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index dfad66a..d969eb5 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1558,7 +1558,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	params->batch_obj               = batch_obj;
>   	params->ctx                     = ctx;
>
> -	ret = dev_priv->gt.do_execbuf(params, args, &eb->vmas);
> +	ret = dev_priv->gt.execbuf_submit(params, args, &eb->vmas);
>
>   err:
>   	/*
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 55/56] drm/i915: Remove 'faked' request from LRC submission

[John Harrison]

On 05/03/2015 14:49, Daniel Vetter wrote:
> On Thu, Mar 05, 2015 at 01:57:31PM +0000, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> The LRC submission code requires a request for tracking purposes. It does not
>> actually require that request to 'complete' it simply uses it for keeping hold
>> of reference counts on contexts and such like.
>>
>> In the case where the ring buffer is completely full, the LRC code looks for a
>> pending request that would free up sufficient space upon completion and waits
>> for it. If no such request can be found it resorts to simply polling the free
>> space count until it is big enough. This situation should only occur when the
>> entire buffer is filled with the request currently being generated. I.e., the
>> user is trying to submit a single piece of work that is large than the ring
>> buffer itself (which should be impossible because very large batch buffers don't
>> consume any more ring buffer space). Before starting to poll, a submit call is
>> made to make sure that the currently queued up work in the buffer will actually
>> be submtted and thus the poll will eventually succeed.
>>
>> The problem here is that the 'official' request cannot be used as that could
>> lead to multiple LRC submissions being tagged to a single request structure.
>> Instead, the code fakes up a private request structure and uses that.
>>
>> This patch moves the faked request allocation higher up in the call stack to the
>> wait code itself (rather than being at the very lowest submission level). Thus
>> it is now obvious where the faked request is coming from and why it is
>> necessary. The patch also replaces it with a call to the official request
>> allocation code rather than attempting to duplicate that code. This becomes
>> especially important in the future when the request allocation changes to
>> accommodate a conversion to struct fence.
>>
>> For: VIZ-5115
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> This is only possible if you pile up tons of olr. Since your patch series
> fixes this design issue by removing olr I think we can just put a WARN_ON
> in here if this ever happens and bail out with -ELOSTMYMARBLES or
> something. And then rip out all this complexity.
>
> Or do I miss something important?
> -Daniel

Yeah, you missed the extremely important bug in the free space 
calculation that meant this impossible code path was being hit on a 
regular basis. The LRC wait_request code differed from the legacy 
wait_request code in the the latter was updated with request->postfix 
changes and the former was not. Thus the LRC one would happily find a 
request that frees up enough space, wait on it, retire it and then find 
there was still not enough space!

New patches to fix the space calculation bug and to completely remove 
the polling path will be forth coming...


>> ---
>>   drivers/gpu/drm/i915/intel_lrc.c |   45 ++++++++++++++++++++++----------------
>>   1 file changed, 26 insertions(+), 19 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>> index 65eea51..1fa36de 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> @@ -507,23 +507,11 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
>>   	if (to != ring->default_context)
>>   		intel_lr_context_pin(ring, to);
>>   
>> -	if (!request) {
>> -		/*
>> -		 * If there isn't a request associated with this submission,
>> -		 * create one as a temporary holder.
>> -		 */
>> -		request = kzalloc(sizeof(*request), GFP_KERNEL);
>> -		if (request == NULL)
>> -			return -ENOMEM;
>> -		request->ring = ring;
>> -		request->ctx = to;
>> -		kref_init(&request->ref);
>> -		request->uniq = dev_priv->request_uniq++;
>> -		i915_gem_context_reference(request->ctx);
>> -	} else {
>> -		i915_gem_request_reference(request);
>> -		WARN_ON(to != request->ctx);
>> -	}
>> +	WARN_ON(!request);
>> +	WARN_ON(to != request->ctx);
>> +
>> +	i915_gem_request_reference(request);
>> +
>>   	request->tail = tail;
>>   
>>   	intel_runtime_pm_get(dev_priv);
>> @@ -677,6 +665,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>>   	struct intel_engine_cs *ring = ringbuf->ring;
>>   	struct drm_device *dev = ring->dev;
>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>> +	struct drm_i915_gem_request *local_req;
>>   	unsigned long end;
>>   	int ret;
>>   
>> @@ -684,8 +673,23 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>>   	if (ret != -ENOSPC)
>>   		return ret;
>>   
>> -	/* Force the context submission in case we have been skipping it */
>> -	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
>> +	/*
>> +	 * Force the context submission in case we have been skipping it.
>> +	 * This requires creating a place holder request so that the LRC
>> +	 * submission can be tracked. Note that if this point has been
>> +	 * reached then it is the current submission that is blocking the
>> +	 * driver and the only course of action is to do a partial send and
>> +	 * wait for it to complete.
>> +	 * Note also that because there is no space left in the ring, it is
>> +	 * not possible to write the request submission prologue (which does
>> +	 * things like update seqno values and trigger completion interrupts).
>> +	 * Thus the request cannot be submitted via i915_add_request() and
>> +	 * can not be waiting on by i915_gem_wait_request().
>> +	 */
>> +	ret = dev_priv->gt.alloc_request(ring, ctx, &local_req);
>> +	if (ret)
>> +		return ret;
>> +	intel_logical_ring_advance_and_submit(ringbuf, ctx, local_req);
>>   
>>   	/* With GEM the hangcheck timer should kick us out of the loop,
>>   	 * leaving it early runs the risk of corrupting GEM state (due
>> @@ -717,6 +721,9 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>>   		}
>>   	} while (1);
>>   
>> +	/* This request is now done with and can be disposed of. */
>> +	i915_gem_request_unreference(local_req);
>> +
>>   	return ret;
>>   }
>>   
>> -- 
>> 1.7.9.5
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

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Re: [PATCH 55/56] drm/i915: Remove 'faked' request from LRC submission

[Daniel Vetter]

On Wed, Mar 11, 2015 at 02:53:39PM +0000, John Harrison wrote:
> On 05/03/2015 14:49, Daniel Vetter wrote:
> >On Thu, Mar 05, 2015 at 01:57:31PM +0000, John.C.Harrison@Intel.com wrote:
> >>From: John Harrison <John.C.Harrison@Intel.com>
> >>
> >>The LRC submission code requires a request for tracking purposes. It does not
> >>actually require that request to 'complete' it simply uses it for keeping hold
> >>of reference counts on contexts and such like.
> >>
> >>In the case where the ring buffer is completely full, the LRC code looks for a
> >>pending request that would free up sufficient space upon completion and waits
> >>for it. If no such request can be found it resorts to simply polling the free
> >>space count until it is big enough. This situation should only occur when the
> >>entire buffer is filled with the request currently being generated. I.e., the
> >>user is trying to submit a single piece of work that is large than the ring
> >>buffer itself (which should be impossible because very large batch buffers don't
> >>consume any more ring buffer space). Before starting to poll, a submit call is
> >>made to make sure that the currently queued up work in the buffer will actually
> >>be submtted and thus the poll will eventually succeed.
> >>
> >>The problem here is that the 'official' request cannot be used as that could
> >>lead to multiple LRC submissions being tagged to a single request structure.
> >>Instead, the code fakes up a private request structure and uses that.
> >>
> >>This patch moves the faked request allocation higher up in the call stack to the
> >>wait code itself (rather than being at the very lowest submission level). Thus
> >>it is now obvious where the faked request is coming from and why it is
> >>necessary. The patch also replaces it with a call to the official request
> >>allocation code rather than attempting to duplicate that code. This becomes
> >>especially important in the future when the request allocation changes to
> >>accommodate a conversion to struct fence.
> >>
> >>For: VIZ-5115
> >>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >This is only possible if you pile up tons of olr. Since your patch series
> >fixes this design issue by removing olr I think we can just put a WARN_ON
> >in here if this ever happens and bail out with -ELOSTMYMARBLES or
> >something. And then rip out all this complexity.
> >
> >Or do I miss something important?
> >-Daniel
> 
> Yeah, you missed the extremely important bug in the free space calculation
> that meant this impossible code path was being hit on a regular basis. The
> LRC wait_request code differed from the legacy wait_request code in the the
> latter was updated with request->postfix changes and the former was not.
> Thus the LRC one would happily find a request that frees up enough space,
> wait on it, retire it and then find there was still not enough space!
> 
> New patches to fix the space calculation bug and to completely remove the
> polling path will be forth coming...

Hm, Jesse did dig out a regression where gem_ringfill blows up on
execlist. That igt is specifically to exercise this cornercases. I'm not
sure whith bugzilla Jesse meant, there's two:

https://bugs.freedesktop.org/show_bug.cgi?id=89001
https://bugs.freedesktop.org/show_bug.cgi?id=88865

Can you please check whether your fixes help for those issues two?

Also adding Jesse since he's chasing these atm.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 55/56] drm/i915: Remove 'faked' request from LRC submission

[Jesse Barnes]

On 03/11/2015 09:14 AM, Daniel Vetter wrote:
> On Wed, Mar 11, 2015 at 02:53:39PM +0000, John Harrison wrote:
>> On 05/03/2015 14:49, Daniel Vetter wrote:
>>> On Thu, Mar 05, 2015 at 01:57:31PM +0000, John.C.Harrison@Intel.com wrote:
>>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>>
>>>> The LRC submission code requires a request for tracking purposes. It does not
>>>> actually require that request to 'complete' it simply uses it for keeping hold
>>>> of reference counts on contexts and such like.
>>>>
>>>> In the case where the ring buffer is completely full, the LRC code looks for a
>>>> pending request that would free up sufficient space upon completion and waits
>>>> for it. If no such request can be found it resorts to simply polling the free
>>>> space count until it is big enough. This situation should only occur when the
>>>> entire buffer is filled with the request currently being generated. I.e., the
>>>> user is trying to submit a single piece of work that is large than the ring
>>>> buffer itself (which should be impossible because very large batch buffers don't
>>>> consume any more ring buffer space). Before starting to poll, a submit call is
>>>> made to make sure that the currently queued up work in the buffer will actually
>>>> be submtted and thus the poll will eventually succeed.
>>>>
>>>> The problem here is that the 'official' request cannot be used as that could
>>>> lead to multiple LRC submissions being tagged to a single request structure.
>>>> Instead, the code fakes up a private request structure and uses that.
>>>>
>>>> This patch moves the faked request allocation higher up in the call stack to the
>>>> wait code itself (rather than being at the very lowest submission level). Thus
>>>> it is now obvious where the faked request is coming from and why it is
>>>> necessary. The patch also replaces it with a call to the official request
>>>> allocation code rather than attempting to duplicate that code. This becomes
>>>> especially important in the future when the request allocation changes to
>>>> accommodate a conversion to struct fence.
>>>>
>>>> For: VIZ-5115
>>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>> This is only possible if you pile up tons of olr. Since your patch series
>>> fixes this design issue by removing olr I think we can just put a WARN_ON
>>> in here if this ever happens and bail out with -ELOSTMYMARBLES or
>>> something. And then rip out all this complexity.
>>>
>>> Or do I miss something important?
>>> -Daniel
>>
>> Yeah, you missed the extremely important bug in the free space calculation
>> that meant this impossible code path was being hit on a regular basis. The
>> LRC wait_request code differed from the legacy wait_request code in the the
>> latter was updated with request->postfix changes and the former was not.
>> Thus the LRC one would happily find a request that frees up enough space,
>> wait on it, retire it and then find there was still not enough space!
>>
>> New patches to fix the space calculation bug and to completely remove the
>> polling path will be forth coming...
> 
> Hm, Jesse did dig out a regression where gem_ringfill blows up on
> execlist. That igt is specifically to exercise this cornercases. I'm not
> sure whith bugzilla Jesse meant, there's two:
> 
> https://bugs.freedesktop.org/show_bug.cgi?id=89001
> https://bugs.freedesktop.org/show_bug.cgi?id=88865
> 
> Can you please check whether your fixes help for those issues two?
> 
> Also adding Jesse since he's chasing these atm.

Ah cool, sounds related at least.  89001 was the one I looked at
yesterday.  The worrying thing was that this bug caused a hard system
hang.  Not even the reset button worked...  I guess we should have an
HSD for that too so we can root cause the system part of it.

Jesse

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Re: [PATCH 55/56] drm/i915: Remove 'faked' request from LRC submission

[John Harrison]

On 11/03/2015 16:44, Jesse Barnes wrote:
> On 03/11/2015 09:14 AM, Daniel Vetter wrote:
>> On Wed, Mar 11, 2015 at 02:53:39PM +0000, John Harrison wrote:
>>> On 05/03/2015 14:49, Daniel Vetter wrote:
>>>> On Thu, Mar 05, 2015 at 01:57:31PM +0000, John.C.Harrison@Intel.com wrote:
>>>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>>>
>>>>> The LRC submission code requires a request for tracking purposes. It does not
>>>>> actually require that request to 'complete' it simply uses it for keeping hold
>>>>> of reference counts on contexts and such like.
>>>>>
>>>>> In the case where the ring buffer is completely full, the LRC code looks for a
>>>>> pending request that would free up sufficient space upon completion and waits
>>>>> for it. If no such request can be found it resorts to simply polling the free
>>>>> space count until it is big enough. This situation should only occur when the
>>>>> entire buffer is filled with the request currently being generated. I.e., the
>>>>> user is trying to submit a single piece of work that is large than the ring
>>>>> buffer itself (which should be impossible because very large batch buffers don't
>>>>> consume any more ring buffer space). Before starting to poll, a submit call is
>>>>> made to make sure that the currently queued up work in the buffer will actually
>>>>> be submtted and thus the poll will eventually succeed.
>>>>>
>>>>> The problem here is that the 'official' request cannot be used as that could
>>>>> lead to multiple LRC submissions being tagged to a single request structure.
>>>>> Instead, the code fakes up a private request structure and uses that.
>>>>>
>>>>> This patch moves the faked request allocation higher up in the call stack to the
>>>>> wait code itself (rather than being at the very lowest submission level). Thus
>>>>> it is now obvious where the faked request is coming from and why it is
>>>>> necessary. The patch also replaces it with a call to the official request
>>>>> allocation code rather than attempting to duplicate that code. This becomes
>>>>> especially important in the future when the request allocation changes to
>>>>> accommodate a conversion to struct fence.
>>>>>
>>>>> For: VIZ-5115
>>>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>>> This is only possible if you pile up tons of olr. Since your patch series
>>>> fixes this design issue by removing olr I think we can just put a WARN_ON
>>>> in here if this ever happens and bail out with -ELOSTMYMARBLES or
>>>> something. And then rip out all this complexity.
>>>>
>>>> Or do I miss something important?
>>>> -Daniel
>>> Yeah, you missed the extremely important bug in the free space calculation
>>> that meant this impossible code path was being hit on a regular basis. The
>>> LRC wait_request code differed from the legacy wait_request code in the the
>>> latter was updated with request->postfix changes and the former was not.
>>> Thus the LRC one would happily find a request that frees up enough space,
>>> wait on it, retire it and then find there was still not enough space!
>>>
>>> New patches to fix the space calculation bug and to completely remove the
>>> polling path will be forth coming...
>> Hm, Jesse did dig out a regression where gem_ringfill blows up on
>> execlist. That igt is specifically to exercise this cornercases. I'm not
>> sure whith bugzilla Jesse meant, there's two:
>>
>> https://bugs.freedesktop.org/show_bug.cgi?id=89001
>> https://bugs.freedesktop.org/show_bug.cgi?id=88865

I don't think the space calculation bug could cause the gem_ringfill 
failure. As noted above, even when the calculation gets it horribly 
wrong and flunks the wait for request path, the sit and poll path should 
still do the right thing. Plus the 88865 bug report I've already tried 
to reproduce and verified as fixed by the initial version of this patch 
set (i.e. without the space calc bug fix or the clean up of the fake 
request that follows it). It would go wrong pretty reliably on a clean 
nightly but never failed on my anti-OLR branch after quite a large 
amount of trying.

I've just realised that I somehow got completely the wrong bug number in 
the cover letter. So where patch zero talks about fixing a gem_ringfill 
bug, it was supposed to be BZ:88865 not BZ:4####! The second one, 
BZ:89001 certainly looks like the same issue but I don't have a SKL to 
test with.


>>
>> Can you please check whether your fixes help for those issues two?
>>
>> Also adding Jesse since he's chasing these atm.
> Ah cool, sounds related at least.  89001 was the one I looked at
> yesterday.  The worrying thing was that this bug caused a hard system
> hang.  Not even the reset button worked...  I guess we should have an
> HSD for that too so we can root cause the system part of it.
>
> Jesse
>

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Re: [PATCH 52/53] drm/i915: Remove the now obsolete 'outstanding_lazy_request'

[John Harrison]

On 10/03/2015 10:18, Daniel Vetter wrote:
> On Mon, Mar 09, 2015 at 11:51:26PM +0000, Tomas Elf wrote:
>> On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote:
>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>
>>> The outstanding_lazy_request is no longer used anywhere in the driver.
>>> Everything that was looking at it now has a request explicitly passed in from on
>>> high. Everything that was relying upon behind the scenes is now explicitly
>>> creating/passing/submitting it's own private request. Thus the OLR can be
>>> removed.
>>>
>> "Everything that was relying upon behind the scenes is now explicitly
>> creating/passing/submitting it's ..."
>> --->
>> "Everything that was relying on it behind the scenes is now explicitly
>> creating/passing/submitting its ..." ?
>>
>>
>>> For: VIZ-5115
>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/i915_gem.c            |   16 +---------------
>>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    4 +---
>>>   drivers/gpu/drm/i915/intel_lrc.c           |    6 ++----
>>>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   17 ++---------------
>>>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ----
>>>   5 files changed, 6 insertions(+), 41 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
>>> index 60f6671..8e7418b 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem.c
>>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>>> @@ -1156,15 +1156,9 @@ i915_gem_check_wedge(struct i915_gpu_error *error,
>>>   int
>>>   i915_gem_check_olr(struct drm_i915_gem_request *req)
>>>   {
>>> -	int ret;
>>> -
>>>   	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
>>>
>>> -	ret = 0;
>>> -	if (req == req->ring->outstanding_lazy_request)
>>> -		ret = i915_add_request(req);
>>> -
>>> -	return ret;
>>> +	return 0;
>>>   }
>>>
>>>   static void fake_irq(unsigned long data)
>>> @@ -2424,8 +2418,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
>>>   	dev_priv = ring->dev->dev_private;
>>>   	ringbuf = request->ringbuf;
>>>
>>> -	WARN_ON(request != ring->outstanding_lazy_request);
>>> -
>>>   	request_start = intel_ring_get_tail(ringbuf);
>>>   	/*
>>>   	 * Emit any outstanding flushes - execbuf can fail to emit the flush
>>> @@ -2486,7 +2478,6 @@ int __i915_add_request(struct drm_i915_gem_request *request,
>>>   	}
>>>
>>>   	trace_i915_gem_request_add(request);
>>> -	ring->outstanding_lazy_request = NULL;
>>>
>>>   	i915_queue_hangcheck(ring->dev);
>>>
>>> @@ -2672,9 +2663,6 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
>>>
>>>   		i915_gem_free_request(request);
>>>   	}
>>> -
>>> -	/* This may not have been flushed before the reset, so clean it now */
>>> -	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
>>>   }
>>>
>>>   void i915_gem_restore_fences(struct drm_device *dev)
>>> @@ -3124,8 +3112,6 @@ int i915_gpu_idle(struct drm_device *dev)
>>>   			}
>>>   		}
>>>
>>> -		WARN_ON(ring->outstanding_lazy_request);
>>> -
>>>   		ret = intel_ring_idle(ring);
>>>   		if (ret)
>>>   			return ret;
>>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>> index 6a703e6..0eae592 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>>> @@ -1571,10 +1571,8 @@ err:
>>>   	 * must be freed again. If it was submitted then it is being tracked
>>>   	 * on the active request list and no clean up is required here.
>>>   	 */
>>> -	if (ret && params->request) {
>>> +	if (ret && params->request)
>>>   		i915_gem_request_unreference(params->request);
>>> -		ring->outstanding_lazy_request = NULL;
>>> -	}
>>>
>>>   	mutex_unlock(&dev->struct_mutex);
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>>> index 2911cf6..db63ea0 100644
>>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>>> @@ -1032,8 +1032,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
>>>   	if (!req_out)
>>>   		return -EINVAL;
>>>
>>> -	if ((*req_out = ring->outstanding_lazy_request) != NULL)
>>> -		return 0;
>>> +	*req_out = NULL;
>>>
>>>   	request = kzalloc(sizeof(*request), GFP_KERNEL);
>>>   	if (request == NULL)
>>> @@ -1067,7 +1066,7 @@ int intel_logical_ring_alloc_request(struct intel_engine_cs *ring,
>>>   	i915_gem_context_reference(request->ctx);
>>>   	request->ringbuf = ctx->engine[ring->id].ringbuf;
>>>
>>> -	*req_out = ring->outstanding_lazy_request = request;
>>> +	*req_out = request;
>>>   	return 0;
>>>   }
>>>
>>> @@ -1393,7 +1392,6 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
>>>
>>>   	intel_logical_ring_stop(ring);
>>>   	WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0);
>>> -	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
>>>
>>>   	if (ring->cleanup)
>>>   		ring->cleanup(ring);
>>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> index 5eef02e..85daa18 100644
>>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> @@ -2034,7 +2034,6 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
>>>
>>>   	intel_unpin_ringbuffer_obj(ringbuf);
>>>   	intel_destroy_ringbuffer_obj(ringbuf);
>>> -	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
>>>
>>>   	if (ring->cleanup)
>>>   		ring->cleanup(ring);
>>> @@ -2153,15 +2152,6 @@ static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
>>>   int intel_ring_idle(struct intel_engine_cs *ring)
>>>   {
>>>   	struct drm_i915_gem_request *req;
>>> -	int ret;
>>> -
>>> -	/* We need to add any requests required to flush the objects and ring */
>>> -	WARN_ON(ring->outstanding_lazy_request);
>>> -	if (ring->outstanding_lazy_request) {
>>> -		ret = i915_add_request(ring->outstanding_lazy_request);
>>> -		if (ret)
>>> -			return ret;
>>> -	}
>>>
>>>   	/* Wait upon the last request to be completed */
>>>   	if (list_empty(&ring->request_list))
>>> @@ -2186,8 +2176,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
>>>   	if (!req_out)
>>>   		return -EINVAL;
>>>
>>> -	if ((*req_out = ring->outstanding_lazy_request) != NULL)
>>> -		return 0;
>>> +	*req_out = NULL;
>>>
>>>   	request = kzalloc(sizeof(*request), GFP_KERNEL);
>>>   	if (request == NULL)
>>> @@ -2206,7 +2195,7 @@ intel_ring_alloc_request(struct intel_engine_cs *ring,
>>>   		return ret;
>>>   	}
>>>
>>> -	*req_out = ring->outstanding_lazy_request = request;
>>> +	*req_out = request;
>>>   	return 0;
>>>   }
>>>
>>> @@ -2281,8 +2270,6 @@ void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)
>>>   	struct drm_device *dev = ring->dev;
>>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>>>
>>> -	BUG_ON(ring->outstanding_lazy_request);
>>> -
>>>   	if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {
>>>   		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
>>>   		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
>>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
>>> index 3b0261f..d2c6427 100644
>>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
>>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
>>> @@ -258,10 +258,6 @@ struct  intel_engine_cs {
>>>   	 */
>>>   	struct list_head request_list;
>>>
>>> -	/**
>>> -	 * Do we have some not yet emitted requests outstanding?
>>> -	 */
>>> -	struct drm_i915_gem_request *outstanding_lazy_request;
>>>   	bool gpu_caches_dirty;
>>>   	bool fbc_dirty;
>>>
>>>
>> Since we're removing the i915_add_request from i915_check_olr and thereby
>> removing the OLR emission the following comment at
>> i915_gem_object_flush_active is no longer valid:
>>
>>          /**
>>           * Ensures that an object will eventually get non-busy by flushing
>> any required
>>           * write domains, emitting any outstanding lazy request and retiring
>> and
>>           * completed requests.
>>           */
>>           static int
>>           i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
>>           {
>>                  struct intel_engine_cs *ring;
>>                  int ret;
>>
>>                  if (obj->active) {
>>                          ring =
>> i915_gem_request_get_ring(obj->last_read_req);
>>                          ret = i915_gem_check_olr(obj->last_read_req);
> Nice catch! On top of that the int return value is no longer needed, so a
> follow-up patch should simplify it to void.
> -Daniel

The comment also talks about flushing write domains but there is no 
obvious flush call. All it does is the check_olr (which is now a no-op) 
and the retire (which won't do anything unless the request has already 
completed). So is there any need for this function at all anymore? Or 
should it just be removed and replaced with a call to retire instead?

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Re: [PATCH 20/53] drm/i915: Update ppgtt_init_ring() & context_enable() to take requests

[Tomas Elf]

On 13/03/2015 12:46, John Harrison wrote:
> On 05/03/2015 17:57, Tomas Elf wrote:
>> On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote:
>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>
>>> The final step in removing the OLR from i915_gem_init_hw() is to pass
>>> the newly
>>> allocated request structure in to each step rather than passing a ring
>>> structure. This patch updates both i915_ppgtt_init_ring() and
>>> i915_gem_context_enable() to take request pointers.
>>>
>>> For: VIZ-5115
>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/i915_drv.h         |    2 +-
>>>   drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
>>>   drivers/gpu/drm/i915/i915_gem_context.c |    7 ++++---
>>>   drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
>>>   drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
>>>   5 files changed, 11 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>>> b/drivers/gpu/drm/i915/i915_drv.h
>>> index ea0da6b..618a841 100644
>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>> @@ -2990,7 +2990,7 @@ int __must_check i915_gem_context_init(struct
>>> drm_device *dev);
>>>   void i915_gem_context_fini(struct drm_device *dev);
>>>   void i915_gem_context_reset(struct drm_device *dev);
>>>   int i915_gem_context_open(struct drm_device *dev, struct drm_file
>>> *file);
>>> -int i915_gem_context_enable(struct intel_engine_cs *ring);
>>> +int i915_gem_context_enable(struct drm_i915_gem_request *req);
>>>   void i915_gem_context_close(struct drm_device *dev, struct drm_file
>>> *file);
>>>   int i915_switch_context(struct intel_engine_cs *ring,
>>>               struct intel_context *to);
>>> diff --git a/drivers/gpu/drm/i915/i915_gem.c
>>> b/drivers/gpu/drm/i915/i915_gem.c
>>> index efed49a..379bf44 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem.c
>>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>>> @@ -4877,7 +4877,7 @@ i915_gem_init_hw(struct drm_device *dev)
>>>                   i915_gem_l3_remap(ring, i);
>>>           }
>>>
>>> -        ret = i915_ppgtt_init_ring(ring);
>>> +        ret = i915_ppgtt_init_ring(req);
>>>           if (ret && ret != -EIO) {
>>>               DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
>>>               i915_gem_request_unreference(req);
>>> @@ -4885,7 +4885,7 @@ i915_gem_init_hw(struct drm_device *dev)
>>>               return ret;
>>>           }
>>>
>>> -        ret = i915_gem_context_enable(ring);
>>> +        ret = i915_gem_context_enable(req);
>>>           if (ret && ret != -EIO) {
>>>               DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
>>>               i915_gem_request_unreference(req);
>>> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
>>> b/drivers/gpu/drm/i915/i915_gem_context.c
>>> index dd83d61..04d2a20 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem_context.c
>>> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
>>> @@ -403,17 +403,18 @@ void i915_gem_context_fini(struct drm_device *dev)
>>>       i915_gem_context_unreference(dctx);
>>>   }
>>>
>>> -int i915_gem_context_enable(struct intel_engine_cs *ring)
>>> +int i915_gem_context_enable(struct drm_i915_gem_request *req)
>>>   {
>>> +    struct intel_engine_cs *ring = req->ring;
>>>       int ret;
>>>
>>>       if (i915.enable_execlists) {
>>>           if (ring->init_context == NULL)
>>>               return 0;
>>>
>>> -        ret = ring->init_context(ring, ring->default_context);
>>> +        ret = ring->init_context(req->ring, ring->default_context);
>>>       } else
>>> -        ret = i915_switch_context(ring, ring->default_context);
>>> +        ret = i915_switch_context(req->ring, ring->default_context);
>>
>> You don't have to make any more changes to this function aside from
>> setting up the ring variable at the top. ring = req->ring and if you
>> don't change these lines the will by default use ring like they always
>> did.
>>
>>>
>>>       if (ret) {
>>>           DRM_ERROR("ring init context: %d\n", ret);
>>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
>>> b/drivers/gpu/drm/i915/i915_gem_gtt.c
>>> index 428d2f6..cd00080 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>>> @@ -1227,15 +1227,15 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
>>>       return 0;
>>>   }
>>>
>>> -int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
>>> +int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
>>>   {
>>> -    struct drm_i915_private *dev_priv = ring->dev->dev_private;
>>> +    struct drm_i915_private *dev_priv = req->ring->dev->dev_private;
>>>       struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
>>>
>>>       if (!ppgtt)
>>>           return 0;
>>>
>>> -    return ppgtt->switch_mm(ppgtt, ring);
>>> +    return ppgtt->switch_mm(ppgtt, req->ring);
>>>   }
>>>
>>
>> If you want to uphold a pattern that you've already established you
>> could just make a single change in the function above by setting up
>> ring = req->ring and then make no more changes to the function body.
>> In this case it's one new line vs. two changes of existing code so
>> it's doesn't make that much of a difference but it is nice to stick to
>> patterns. Also, you wouldn't have to make a 4-level indirection
>> (req->ring->dev->dev_private), only a 3-level one.
> It all depends how often the ring variable would get used. In this case,
> there are only two references. One of which, the switch_mm(), will
> disappear later in the series anyway. So for the sake of a single usage,
> it isn't worth adding in the extra line. The dev_priv is only really
> there because if you don't use an explicit variable, you have to do a
> messy type cast in the middle of the dereference chain.

If switch_mm won't require the ring parameter later in the patch series 
(which I should've noticed) then it admittedly becomes kind of 
unnecessary to have a local ring variable. Never mind!

Thanks,
Tomas

>
>>
>>>   struct i915_hw_ppgtt *
>>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h
>>> b/drivers/gpu/drm/i915/i915_gem_gtt.h
>>> index 5a6cef9..e7e202f 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
>>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
>>> @@ -300,7 +300,7 @@ void i915_global_gtt_cleanup(struct drm_device
>>> *dev);
>>>
>>>   int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt
>>> *ppgtt);
>>>   int i915_ppgtt_init_hw(struct drm_device *dev);
>>> -int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
>>> +int i915_ppgtt_init_ring(struct drm_i915_gem_request *req);
>>>   void i915_ppgtt_release(struct kref *kref);
>>>   struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
>>>                       struct drm_i915_file_private *fpriv);
>>>
>>
>

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Re: [PATCH 52/53] drm/i915: Remove the now obsolete 'outstanding_lazy_request'

[Daniel Vetter]

On Fri, Mar 13, 2015 at 01:32:38PM +0000, John Harrison wrote:
> On 10/03/2015 10:18, Daniel Vetter wrote:
> >On Mon, Mar 09, 2015 at 11:51:26PM +0000, Tomas Elf wrote:
> >>On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote:
> >>>diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >>>index 3b0261f..d2c6427 100644
> >>>--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> >>>+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> >>>@@ -258,10 +258,6 @@ struct  intel_engine_cs {
> >>>  	 */
> >>>  	struct list_head request_list;
> >>>
> >>>-	/**
> >>>-	 * Do we have some not yet emitted requests outstanding?
> >>>-	 */
> >>>-	struct drm_i915_gem_request *outstanding_lazy_request;
> >>>  	bool gpu_caches_dirty;
> >>>  	bool fbc_dirty;
> >>>
> >>>
> >>Since we're removing the i915_add_request from i915_check_olr and thereby
> >>removing the OLR emission the following comment at
> >>i915_gem_object_flush_active is no longer valid:
> >>
> >>         /**
> >>          * Ensures that an object will eventually get non-busy by flushing
> >>any required
> >>          * write domains, emitting any outstanding lazy request and retiring
> >>and
> >>          * completed requests.
> >>          */
> >>          static int
> >>          i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
> >>          {
> >>                 struct intel_engine_cs *ring;
> >>                 int ret;
> >>
> >>                 if (obj->active) {
> >>                         ring =
> >>i915_gem_request_get_ring(obj->last_read_req);
> >>                         ret = i915_gem_check_olr(obj->last_read_req);
> >Nice catch! On top of that the int return value is no longer needed, so a
> >follow-up patch should simplify it to void.
> >-Daniel
> 
> The comment also talks about flushing write domains but there is no obvious
> flush call. All it does is the check_olr (which is now a no-op) and the
> retire (which won't do anything unless the request has already completed).
> So is there any need for this function at all anymore? Or should it just be
> removed and replaced with a call to retire instead?

That's historical baggage - way back we've done lazy cache-flushing, which
mean on readback you might have needed to flush caches first. Massive case
of premature optimization, the comment is just plainly outdated. See

commit 65ce3027415d4dc9ee18ef0a135214b4fb76730b
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Jul 20 12:41:02 2012 +0100

    drm/i915: Remove the defunct flushing list

and

commit cc889e0f6ce6a63c62db17d702ecfed86d58083f
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Jun 13 20:45:19 2012 +0200

    drm/i915: disable flushing_list/gpu_write_list

You can savely remove the comment (maybe with the above commits referenced
in the commit message).
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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