From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> To: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Cc: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Subject: [PATCH 0/3] iommu/arm-smmu: Add driver for ARM SMMUv3 devices Date: Fri, 8 May 2015 19:00:43 +0100 [thread overview] Message-ID: <1431108046-9675-1-git-send-email-will.deacon@arm.com> (raw) Hi all, SMMUv3 is a significant departure from previous ARM SMMU designs in that the majority of the configuration data has been moved from MMIO registers to in-memory data structures, with communication between the CPU and the SMMU being mediated via in-memory circular queues. It also has native support for MSI generation, PCI masters (e.g. ATS, PRI, PASIDs), ARM 8.1 architectural extensions (e.g. hardware translation table updates) and optional RAS extensions. It is designed for large numbers of masters and consequently uses a 32-bit StreamID. This patch series adds an initial driver for ARM SMMUv3 devices, which enables dma-mapping and VFIO for PCI masters. Unfortunately, there is not yet any documentation available for the hardware, but I have tested this successfully on internal simulation. Having the driver available at this early stage is useful for ARM partners building implementations and provides a common upstream base on which the driver can be developed. Future work will look at: - DMA to paged memory using PRI (for now we send a PRI_DENY response and dump the transaction to the console) - MSI generation from the SMMU (requires generic changes to the irqdomain code) - Support for non-PCI masters (pending core of_xlate rework as discussed on linux-arm-kernel) There's also the nested translation angle, but we should work out what we're doing on SMMUv2 before implementing anything here. All feedback welcome, Will --->8 Will Deacon (3): Documentation: dt-bindings: Add device-tree binding for ARM SMMUv3 IOMMU iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices drivers/vfio: Allow type-1 IOMMU instantiation on top of an ARM SMMUv3 .../devicetree/bindings/iommu/arm,smmu-v3.txt | 37 + MAINTAINERS | 3 +- drivers/iommu/Kconfig | 13 + drivers/iommu/Makefile | 1 + drivers/iommu/arm-smmu-v3.c | 2599 ++++++++++++++++++++ drivers/vfio/Kconfig | 2 +- 6 files changed, 2653 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt create mode 100644 drivers/iommu/arm-smmu-v3.c -- 2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/3] iommu/arm-smmu: Add driver for ARM SMMUv3 devices Date: Fri, 8 May 2015 19:00:43 +0100 [thread overview] Message-ID: <1431108046-9675-1-git-send-email-will.deacon@arm.com> (raw) Hi all, SMMUv3 is a significant departure from previous ARM SMMU designs in that the majority of the configuration data has been moved from MMIO registers to in-memory data structures, with communication between the CPU and the SMMU being mediated via in-memory circular queues. It also has native support for MSI generation, PCI masters (e.g. ATS, PRI, PASIDs), ARM 8.1 architectural extensions (e.g. hardware translation table updates) and optional RAS extensions. It is designed for large numbers of masters and consequently uses a 32-bit StreamID. This patch series adds an initial driver for ARM SMMUv3 devices, which enables dma-mapping and VFIO for PCI masters. Unfortunately, there is not yet any documentation available for the hardware, but I have tested this successfully on internal simulation. Having the driver available at this early stage is useful for ARM partners building implementations and provides a common upstream base on which the driver can be developed. Future work will look at: - DMA to paged memory using PRI (for now we send a PRI_DENY response and dump the transaction to the console) - MSI generation from the SMMU (requires generic changes to the irqdomain code) - Support for non-PCI masters (pending core of_xlate rework as discussed on linux-arm-kernel) There's also the nested translation angle, but we should work out what we're doing on SMMUv2 before implementing anything here. All feedback welcome, Will --->8 Will Deacon (3): Documentation: dt-bindings: Add device-tree binding for ARM SMMUv3 IOMMU iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices drivers/vfio: Allow type-1 IOMMU instantiation on top of an ARM SMMUv3 .../devicetree/bindings/iommu/arm,smmu-v3.txt | 37 + MAINTAINERS | 3 +- drivers/iommu/Kconfig | 13 + drivers/iommu/Makefile | 1 + drivers/iommu/arm-smmu-v3.c | 2599 ++++++++++++++++++++ drivers/vfio/Kconfig | 2 +- 6 files changed, 2653 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt create mode 100644 drivers/iommu/arm-smmu-v3.c -- 2.1.4
next reply other threads:[~2015-05-08 18:00 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-05-08 18:00 Will Deacon [this message] 2015-05-08 18:00 ` [PATCH 0/3] iommu/arm-smmu: Add driver for ARM SMMUv3 devices Will Deacon [not found] ` <1431108046-9675-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2015-05-08 18:00 ` [PATCH 1/3] Documentation: dt-bindings: Add device-tree binding for ARM SMMUv3 IOMMU Will Deacon 2015-05-08 18:00 ` Will Deacon 2015-05-08 18:00 ` [PATCH 2/3] iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices Will Deacon 2015-05-08 18:00 ` Will Deacon [not found] ` <1431108046-9675-3-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2015-05-12 7:40 ` leizhen 2015-05-12 7:40 ` leizhen [not found] ` <5551AE56.6050906-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2015-05-12 16:55 ` Will Deacon 2015-05-12 16:55 ` Will Deacon [not found] ` <20150512165500.GE2062-5wv7dgnIgG8@public.gmane.org> 2015-05-13 8:33 ` leizhen 2015-05-13 8:33 ` leizhen [not found] ` <55530C4F.5000605-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2015-05-21 11:25 ` Will Deacon 2015-05-21 11:25 ` Will Deacon [not found] ` <20150521112555.GH21920-5wv7dgnIgG8@public.gmane.org> 2015-05-25 2:07 ` leizhen 2015-05-25 2:07 ` leizhen [not found] ` <556283D5.4030901-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2015-05-26 16:12 ` Will Deacon 2015-05-26 16:12 ` Will Deacon [not found] ` <20150526161245.GR1565-5wv7dgnIgG8@public.gmane.org> 2015-05-27 9:12 ` leizhen 2015-05-27 9:12 ` leizhen 2015-05-19 15:24 ` Joerg Roedel 2015-05-19 15:24 ` Joerg Roedel [not found] ` <20150519152435.GL20611-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2015-05-20 17:09 ` Will Deacon 2015-05-20 17:09 ` Will Deacon [not found] ` <20150520170926.GI11498-5wv7dgnIgG8@public.gmane.org> 2015-05-29 6:43 ` Joerg Roedel 2015-05-29 6:43 ` Joerg Roedel [not found] ` <20150529064337.GN20611-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2015-05-29 11:35 ` Robin Murphy 2015-05-29 11:35 ` Robin Murphy [not found] ` <55684F1C.3050702-5wv7dgnIgG8@public.gmane.org> 2015-05-29 14:40 ` Joerg Roedel 2015-05-29 14:40 ` Joerg Roedel [not found] ` <20150529144043.GA20384-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2015-06-01 9:40 ` Will Deacon 2015-06-01 9:40 ` Will Deacon [not found] ` <20150601094014.GC1641-5wv7dgnIgG8@public.gmane.org> 2015-06-02 7:39 ` Joerg Roedel 2015-06-02 7:39 ` Joerg Roedel [not found] ` <20150602073956.GG20384-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2015-06-02 9:47 ` Will Deacon 2015-06-02 9:47 ` Will Deacon [not found] ` <20150602094746.GC22569-5wv7dgnIgG8@public.gmane.org> 2015-06-02 18:43 ` Joerg Roedel 2015-06-02 18:43 ` Joerg Roedel 2015-05-08 18:00 ` [PATCH 3/3] drivers/vfio: Allow type-1 IOMMU instantiation on top of an ARM SMMUv3 Will Deacon 2015-05-08 18:00 ` Will Deacon
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