From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> To: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Subject: [PATCH 1/3] Documentation: dt-bindings: Add device-tree binding for ARM SMMUv3 IOMMU Date: Fri, 8 May 2015 19:00:44 +0100 [thread overview] Message-ID: <1431108046-9675-2-git-send-email-will.deacon@arm.com> (raw) In-Reply-To: <1431108046-9675-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> This patch adds device-tree bindings for ARM SMMUv3 IOMMU devices. Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> Signed-off-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> --- .../devicetree/bindings/iommu/arm,smmu-v3.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt new file mode 100644 index 000000000000..c03eec116872 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt @@ -0,0 +1,37 @@ +* ARM SMMUv3 Architecture Implementation + +The SMMUv3 architecture is a significant deparature from previous +revisions, replacing the MMIO register interface with in-memory command +and event queues and adding support for the ATS and PRI components of +the PCIe specification. + +** SMMUv3 required properties: + +- compatible : Should include: + + * "arm,smmu-v3" for any SMMUv3 compliant + implementation. This entry should be last in the + compatible list. + +- reg : Base address and size of the SMMU. + +- interrupts : Non-secure interrupt list describing the wired + interrupt sources corresponding to entries in + interrupt-names. If no wired interrupts are + present then this property may be omitted. + +- interrupt-names : When the interrupts property is present, should + include the following: + * "eventq" - Event Queue not empty + * "priq" - PRI Queue not empty + * "cmdq-sync" - CMD_SYNC complete + * "gerror" - Global Error activated + +** SMMUv3 optional properties: + +- dma-coherent : Present if DMA operations made by the SMMU (page + table walks, stream table accesses etc) are cache + coherent with the CPU. + + NOTE: this only applies to the SMMU itself, not + masters connected upstream of the SMMU. -- 2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] Documentation: dt-bindings: Add device-tree binding for ARM SMMUv3 IOMMU Date: Fri, 8 May 2015 19:00:44 +0100 [thread overview] Message-ID: <1431108046-9675-2-git-send-email-will.deacon@arm.com> (raw) In-Reply-To: <1431108046-9675-1-git-send-email-will.deacon@arm.com> This patch adds device-tree bindings for ARM SMMUv3 IOMMU devices. Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> --- .../devicetree/bindings/iommu/arm,smmu-v3.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt new file mode 100644 index 000000000000..c03eec116872 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt @@ -0,0 +1,37 @@ +* ARM SMMUv3 Architecture Implementation + +The SMMUv3 architecture is a significant deparature from previous +revisions, replacing the MMIO register interface with in-memory command +and event queues and adding support for the ATS and PRI components of +the PCIe specification. + +** SMMUv3 required properties: + +- compatible : Should include: + + * "arm,smmu-v3" for any SMMUv3 compliant + implementation. This entry should be last in the + compatible list. + +- reg : Base address and size of the SMMU. + +- interrupts : Non-secure interrupt list describing the wired + interrupt sources corresponding to entries in + interrupt-names. If no wired interrupts are + present then this property may be omitted. + +- interrupt-names : When the interrupts property is present, should + include the following: + * "eventq" - Event Queue not empty + * "priq" - PRI Queue not empty + * "cmdq-sync" - CMD_SYNC complete + * "gerror" - Global Error activated + +** SMMUv3 optional properties: + +- dma-coherent : Present if DMA operations made by the SMMU (page + table walks, stream table accesses etc) are cache + coherent with the CPU. + + NOTE: this only applies to the SMMU itself, not + masters connected upstream of the SMMU. -- 2.1.4
next prev parent reply other threads:[~2015-05-08 18:00 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-05-08 18:00 [PATCH 0/3] iommu/arm-smmu: Add driver for ARM SMMUv3 devices Will Deacon 2015-05-08 18:00 ` Will Deacon [not found] ` <1431108046-9675-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2015-05-08 18:00 ` Will Deacon [this message] 2015-05-08 18:00 ` [PATCH 1/3] Documentation: dt-bindings: Add device-tree binding for ARM SMMUv3 IOMMU Will Deacon 2015-05-08 18:00 ` [PATCH 2/3] iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices Will Deacon 2015-05-08 18:00 ` Will Deacon [not found] ` <1431108046-9675-3-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2015-05-12 7:40 ` leizhen 2015-05-12 7:40 ` leizhen [not found] ` <5551AE56.6050906-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2015-05-12 16:55 ` Will Deacon 2015-05-12 16:55 ` Will Deacon [not found] ` <20150512165500.GE2062-5wv7dgnIgG8@public.gmane.org> 2015-05-13 8:33 ` leizhen 2015-05-13 8:33 ` leizhen [not found] ` <55530C4F.5000605-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2015-05-21 11:25 ` Will Deacon 2015-05-21 11:25 ` Will Deacon [not found] ` <20150521112555.GH21920-5wv7dgnIgG8@public.gmane.org> 2015-05-25 2:07 ` leizhen 2015-05-25 2:07 ` leizhen [not found] ` <556283D5.4030901-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2015-05-26 16:12 ` Will Deacon 2015-05-26 16:12 ` Will Deacon [not found] ` <20150526161245.GR1565-5wv7dgnIgG8@public.gmane.org> 2015-05-27 9:12 ` leizhen 2015-05-27 9:12 ` leizhen 2015-05-19 15:24 ` Joerg Roedel 2015-05-19 15:24 ` Joerg Roedel [not found] ` <20150519152435.GL20611-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2015-05-20 17:09 ` Will Deacon 2015-05-20 17:09 ` Will Deacon [not found] ` <20150520170926.GI11498-5wv7dgnIgG8@public.gmane.org> 2015-05-29 6:43 ` Joerg Roedel 2015-05-29 6:43 ` Joerg Roedel [not found] ` <20150529064337.GN20611-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2015-05-29 11:35 ` Robin Murphy 2015-05-29 11:35 ` Robin Murphy [not found] ` <55684F1C.3050702-5wv7dgnIgG8@public.gmane.org> 2015-05-29 14:40 ` Joerg Roedel 2015-05-29 14:40 ` Joerg Roedel [not found] ` <20150529144043.GA20384-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2015-06-01 9:40 ` Will Deacon 2015-06-01 9:40 ` Will Deacon [not found] ` <20150601094014.GC1641-5wv7dgnIgG8@public.gmane.org> 2015-06-02 7:39 ` Joerg Roedel 2015-06-02 7:39 ` Joerg Roedel [not found] ` <20150602073956.GG20384-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2015-06-02 9:47 ` Will Deacon 2015-06-02 9:47 ` Will Deacon [not found] ` <20150602094746.GC22569-5wv7dgnIgG8@public.gmane.org> 2015-06-02 18:43 ` Joerg Roedel 2015-06-02 18:43 ` Joerg Roedel 2015-05-08 18:00 ` [PATCH 3/3] drivers/vfio: Allow type-1 IOMMU instantiation on top of an ARM SMMUv3 Will Deacon 2015-05-08 18:00 ` Will Deacon
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1431108046-9675-2-git-send-email-will.deacon@arm.com \ --to=will.deacon-5wv7dgnigg8@public.gmane.org \ --cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \ --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \ --cc=mark.rutland-5wv7dgnIgG8@public.gmane.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.