* [PATCH V3 0/6] Add LS1043A SoC support
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Shaohui.Xie, wsa, bhupesh.sharma, mturquette, corbet, sboyd, wim,
Wenbin.Song, scottwood, Mingkai.Hu, leoli
This patchest adds support for Freescale's LS1043A SoC which is
based on ARMv8 architecture.
Some pending patches are depended on:
1. The LS1043A is belong to Freescale's ARMv8 Layerscape SoC family,
so depends on the updating ARCH kconfig patch.
https://patchwork.kernel.org/patch/7120101/
2. The LS1043A use the new clockgen binding updated by Scott Wood,
depends on the patchset:
https://patchwork.kernel.org/patch/7225421/
https://patchwork.kernel.org/patch/7225461/
https://patchwork.kernel.org/patch/7225431/
https://patchwork.kernel.org/patch/7225441/
https://patchwork.kernel.org/patch/7225451/
[PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms
[PATCH V3 2/6] watchdog: Add support for Freescale Layerscape
[PATCH V3 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board
[PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
[PATCH V3 5/6] clk: qoriq: Add ls1043a support.
[PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 0/6] Add LS1043A SoC support
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song
This patchest adds support for Freescale's LS1043A SoC which is
based on ARMv8 architecture.
Some pending patches are depended on:
1. The LS1043A is belong to Freescale's ARMv8 Layerscape SoC family,
so depends on the updating ARCH kconfig patch.
https://patchwork.kernel.org/patch/7120101/
2. The LS1043A use the new clockgen binding updated by Scott Wood,
depends on the patchset:
https://patchwork.kernel.org/patch/7225421/
https://patchwork.kernel.org/patch/7225461/
https://patchwork.kernel.org/patch/7225431/
https://patchwork.kernel.org/patch/7225441/
https://patchwork.kernel.org/patch/7225451/
[PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms
[PATCH V3 2/6] watchdog: Add support for Freescale Layerscape
[PATCH V3 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board
[PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
[PATCH V3 5/6] clk: qoriq: Add ls1043a support.
[PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 0/6] Add LS1043A SoC support
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel
This patchest adds support for Freescale's LS1043A SoC which is
based on ARMv8 architecture.
Some pending patches are depended on:
1. The LS1043A is belong to Freescale's ARMv8 Layerscape SoC family,
so depends on the updating ARCH kconfig patch.
https://patchwork.kernel.org/patch/7120101/
2. The LS1043A use the new clockgen binding updated by Scott Wood,
depends on the patchset:
https://patchwork.kernel.org/patch/7225421/
https://patchwork.kernel.org/patch/7225461/
https://patchwork.kernel.org/patch/7225431/
https://patchwork.kernel.org/patch/7225441/
https://patchwork.kernel.org/patch/7225451/
[PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms
[PATCH V3 2/6] watchdog: Add support for Freescale Layerscape
[PATCH V3 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board
[PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
[PATCH V3 5/6] clk: qoriq: Add ls1043a support.
[PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms
2015-10-14 11:34 ` Zhiqiang Hou
(?)
@ 2015-10-14 11:34 ` Zhiqiang Hou
-1 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
linux-clk-u79uwXL29TY76Z2rM5mHXA, mark.rutland-5wv7dgnIgG8
Cc: Mingkai.Hu-KZfg59tc24xl57MIdRCFDg,
Shaohui.Xie-KZfg59tc24xl57MIdRCFDg,
scottwood-KZfg59tc24xl57MIdRCFDg,
bhupesh.sharma-KZfg59tc24xl57MIdRCFDg,
leoli-KZfg59tc24xl57MIdRCFDg, wsa-z923LK4zBo2bacvFa/9K2g,
wim-IQzOog9fTRqzQB+pC5nmwQ, corbet-T1hC0tSOHrs,
mturquette-rdvid1DuHRBWk0Htik3J/w, sboyd-sgV2jX0FEOL9JmXXK+q4OQ,
Wenbin.Song-KZfg59tc24xl57MIdRCFDg, Hou Zhiqiang
From: Shaohui Xie <Shaohui.Xie-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Modify the I2C_IMX config to support to Layerscape platforms.
Signed-off-by: Mingkai Hu <Mingkai.Hu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Signed-off-by: Wenbin Song <Wenbin.Song-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Signed-off-by: Hou Zhiqiang <B48286-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
V3:
- No change.
drivers/i2c/busses/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 08b8617..14147ec 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -582,10 +582,10 @@ config I2C_IMG
config I2C_IMX
tristate "IMX I2C interface"
- depends on ARCH_MXC
+ depends on ARCH_MXC || ARCH_LAYERSCAPE
help
Say Y here if you want to use the IIC bus controller on
- the Freescale i.MX/MXC processors.
+ the Freescale i.MX/MXC or Layerscape processors.
This driver can also be built as a module. If so, the module
will be called i2c-imx.
--
2.1.0.27.g96db324
--
To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Modify the I2C_IMX config to support to Layerscape platforms.
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
drivers/i2c/busses/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 08b8617..14147ec 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -582,10 +582,10 @@ config I2C_IMG
config I2C_IMX
tristate "IMX I2C interface"
- depends on ARCH_MXC
+ depends on ARCH_MXC || ARCH_LAYERSCAPE
help
Say Y here if you want to use the IIC bus controller on
- the Freescale i.MX/MXC processors.
+ the Freescale i.MX/MXC or Layerscape processors.
This driver can also be built as a module. If so, the module
will be called i2c-imx.
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Modify the I2C_IMX config to support to Layerscape platforms.
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
drivers/i2c/busses/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 08b8617..14147ec 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -582,10 +582,10 @@ config I2C_IMG
config I2C_IMX
tristate "IMX I2C interface"
- depends on ARCH_MXC
+ depends on ARCH_MXC || ARCH_LAYERSCAPE
help
Say Y here if you want to use the IIC bus controller on
- the Freescale i.MX/MXC processors.
+ the Freescale i.MX/MXC or Layerscape processors.
This driver can also be built as a module. If so, the module
will be called i2c-imx.
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 2/6] watchdog: Add support for Freescale Layerscape platforms
2015-10-14 11:34 ` Zhiqiang Hou
(?)
@ 2015-10-14 11:34 ` Zhiqiang Hou
-1 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Modify watchdog/Kconfig file to support Layerscape platforms.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
drivers/watchdog/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 79e1aa1..448dbaf 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -446,7 +446,7 @@ config MAX63XX_WATCHDOG
config IMX2_WDT
tristate "IMX2+ Watchdog"
- depends on ARCH_MXC
+ depends on ARCH_MXC || ARCH_LAYERSCAPE
select REGMAP_MMIO
select WATCHDOG_CORE
help
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 2/6] watchdog: Add support for Freescale Layerscape platforms
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Modify watchdog/Kconfig file to support Layerscape platforms.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
drivers/watchdog/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 79e1aa1..448dbaf 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -446,7 +446,7 @@ config MAX63XX_WATCHDOG
config IMX2_WDT
tristate "IMX2+ Watchdog"
- depends on ARCH_MXC
+ depends on ARCH_MXC || ARCH_LAYERSCAPE
select REGMAP_MMIO
select WATCHDOG_CORE
help
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 2/6] watchdog: Add support for Freescale Layerscape platforms
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Modify watchdog/Kconfig file to support Layerscape platforms.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
drivers/watchdog/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 79e1aa1..448dbaf 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -446,7 +446,7 @@ config MAX63XX_WATCHDOG
config IMX2_WDT
tristate "IMX2+ Watchdog"
- depends on ARCH_MXC
+ depends on ARCH_MXC || ARCH_LAYERSCAPE
select REGMAP_MMIO
select WATCHDOG_CORE
help
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board
2015-10-14 11:34 ` Zhiqiang Hou
(?)
@ 2015-10-14 11:34 ` Zhiqiang Hou
-1 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
Documentation/devicetree/bindings/arm/fsl.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 34c88b0..752a685 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -131,6 +131,10 @@ Example:
Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
----------------------------------------------------------------
+LS1043A ARMv8 based RDB Board
+Required root node properties:
+ - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
+
LS2080A ARMv8 based Simulator model
Required root node properties:
- compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
Documentation/devicetree/bindings/arm/fsl.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 34c88b0..752a685 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -131,6 +131,10 @@ Example:
Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
----------------------------------------------------------------
+LS1043A ARMv8 based RDB Board
+Required root node properties:
+ - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
+
LS2080A ARMv8 based Simulator model
Required root node properties:
- compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel
From: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
Documentation/devicetree/bindings/arm/fsl.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 34c88b0..752a685 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -131,6 +131,10 @@ Example:
Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
----------------------------------------------------------------
+LS1043A ARMv8 based RDB Board
+Required root node properties:
+ - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
+
LS2080A ARMv8 based Simulator model
Required root node properties:
- compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-14 11:34 ` Zhiqiang Hou
(?)
@ 2015-10-14 11:34 ` Zhiqiang Hou
-1 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Mingkai Hu <Mingkai.Hu@freescale.com>
LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
similar to LS1021a which complies to Chassis 2.1 spec.
Following levels of DTSI/DTS files have been created for the
LS1043A SoC family:
- fsl-ls1043a.dtsi:
DTS-Include file for FSL LS1043A SoC.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
---
V3:
- Add device tree node for SATA.
- Remove properity enable-method for all cpu node.
Remove reserved memory region for spin-table.
V2:
- Add secondary core boot method.
- Move out the sysclk node from the clockgen node.
- Correct the reg size of GICC.
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 513 +++++++++++++++++++++++++
1 file changed, 513 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
new file mode 100644
index 0000000..99a5eaf
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -0,0 +1,513 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright 2014-2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/ {
+ compatible = "fsl,ls1043a";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ /*
+ * We expect the enable-method for cpu's to be "psci", but this
+ * is dependent on the SoC FW, which will fill this in.
+ *
+ * Currently supported enable-method is psci v0.2
+ */
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x0>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x1>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x2>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x3>;
+ clocks = <&clockgen 1 0>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <1 13 0x1>, /* Physical Secure PPI */
+ <1 14 0x1>, /* Physical Non-Secure PPI */
+ <1 11 0x1>, /* Virtual PPI */
+ <1 10 0x1>; /* Hypervisor PPI */
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <0 106 0x4>,
+ <0 107 0x4>,
+ <0 95 0x4>,
+ <0 97 0x4>;
+ };
+
+ gic: interrupt-controller@1400000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x0 0x1401000 0 0x1000>, /* GICD */
+ <0x0 0x1402000 0 0x2000>, /* GICC */
+ <0x0 0x1404000 0 0x2000>, /* GICH */
+ <0x0 0x1406000 0 0x2000>; /* GICV */
+ interrupts = <1 9 0xf08>;
+ };
+
+ msi1: msi-controller1@1571000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1571000 0x0 0x4>,
+ <0x0 0x1571004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 116 0x4>;
+ };
+
+ msi2: msi-controller2@1572000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1572000 0x0 0x4>,
+ <0x0 0x1572004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 126 0x4>;
+ };
+
+ msi3: msi-controller3@1573000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1573000 0x0 0x4>,
+ <0x0 0x1573004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 160 0x4>;
+ };
+
+ ifc: ifc@1530000 {
+ compatible = "fsl,ifc", "simple-bus";
+ reg = <0x0 0x1530000 0x0 0x10000>;
+ interrupts = <0 43 0x4>;
+ };
+
+ esdhc: esdhc@1560000 {
+ compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
+ reg = <0x0 0x1560000 0x0 0x10000>;
+ interrupts = <0 62 0x4>;
+ clock-frequency = <0>;
+ voltage-ranges = <1800 1800 3300 3300>;
+ sdhci,auto-cmd12;
+ big-endian;
+ bus-width = <4>;
+ };
+
+ scfg: scfg@1570000 {
+ compatible = "fsl,ls1043a-scfg", "syscon";
+ reg = <0x0 0x1570000 0x0 0x10000>;
+ big-endian;
+ };
+
+ dcfg: dcfg@1ee0000 {
+ compatible = "fsl,ls1043a-dcfg", "syscon";
+ reg = <0x0 0x1ee0000 0x0 0x10000>;
+ };
+
+ clockgen: clocking@1ee1000 {
+ compatible = "fsl,ls1043a-clockgen";
+ reg = <0x0 0x1ee1000 0x0 0x1000>;
+ #clock-cells = <2>;
+ clocks = <&sysclk>;
+ };
+
+ sysclk: sysclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "sysclk";
+ };
+
+ dspi0: dspi@2100000 {
+ compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2100000 0x0 0x10000>;
+ interrupts = <0 64 0x4>;
+ clock-names = "dspi";
+ clocks = <&clockgen 4 0>;
+ spi-num-chipselects = <5>;
+ big-endian;
+ status = "disabled";
+ };
+
+ dspi1: dspi@2110000 {
+ compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2110000 0x0 0x10000>;
+ interrupts = <0 65 0x4>;
+ clock-names = "dspi";
+ clocks = <&clockgen 4 0>;
+ spi-num-chipselects = <5>;
+ big-endian;
+ status = "disabled";
+ };
+
+ i2c0: i2c@2180000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2180000 0x0 0x10000>;
+ interrupts = <0 56 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ dmas = <&edma0 1 39>,
+ <&edma0 1 38>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ i2c1: i2c@2190000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2190000 0x0 0x10000>;
+ interrupts = <0 57 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@21a0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x21a0000 0x0 0x10000>;
+ interrupts = <0 58 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@21b0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x21b0000 0x0 0x10000>;
+ interrupts = <0 59 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ duart0: serial@21c0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0500 0x0 0x100>;
+ interrupts = <0 54 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart1: serial@21c0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0600 0x0 0x100>;
+ interrupts = <0 54 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart2: serial@21d0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0500 0x0 0x100>;
+ interrupts = <0 55 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart3: serial@21d0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0600 0x0 0x100>;
+ interrupts = <0 55 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ gpio1: gpio@2300000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2300000 0x0 0x10000>;
+ interrupts = <0 66 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio@2310000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2310000 0x0 0x10000>;
+ interrupts = <0 67 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio3: gpio@2320000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2320000 0x0 0x10000>;
+ interrupts = <0 68 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio4: gpio@2330000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2330000 0x0 0x10000>;
+ interrupts = <0 134 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ lpuart0: serial@2950000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2950000 0x0 0x1000>;
+ interrupts = <0 48 0x4>;
+ clocks = <&clockgen 0 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart1: serial@2960000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2960000 0x0 0x1000>;
+ interrupts = <0 49 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart2: serial@2970000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2970000 0x0 0x1000>;
+ interrupts = <0 50 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart3: serial@2980000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2980000 0x0 0x1000>;
+ interrupts = <0 51 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart4: serial@2990000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2990000 0x0 0x1000>;
+ interrupts = <0 52 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart5: serial@29a0000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x29a0000 0x0 0x1000>;
+ interrupts = <0 53 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ wdog0: wdog@2ad0000 {
+ compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
+ reg = <0x0 0x2ad0000 0x0 0x10000>;
+ interrupts = <0 83 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "wdog";
+ big-endian;
+ };
+
+ edma0: edma@2c00000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x0 0x2c00000 0x0 0x10000>,
+ <0x0 0x2c10000 0x0 0x10000>,
+ <0x0 0x2c20000 0x0 0x10000>;
+ interrupts = <0 103 0x4>,
+ <0 103 0x4>;
+ interrupt-names = "edma-tx", "edma-err";
+ dma-channels = <32>;
+ big-endian;
+ clock-names = "dmamux0", "dmamux1";
+ clocks = <&clockgen 4 0>,
+ <&clockgen 4 0>;
+ };
+
+ usb0: usb3@2f00000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x2f00000 0x0 0x10000>;
+ interrupts = <0 60 0x4>;
+ dr_mode = "host";
+ };
+
+ usb1: usb3@3000000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x3000000 0x0 0x10000>;
+ interrupts = <0 61 0x4>;
+ dr_mode = "host";
+ };
+ usb2: usb3@3100000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x3100000 0x0 0x10000>;
+ interrupts = <0 63 0x4>;
+ dr_mode = "host";
+ };
+
+ sata: sata@3200000 {
+ compatible = "fsl,ls1043a-ahci", "fsl,ls1021a-ahci";
+ reg = <0x0 0x3200000 0x0 0x10000>;
+ interrupts = <0 69 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ pcie@3400000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
+ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 118 0x4>, /* controller interrupt */
+ <0 117 0x4>; /* PME interrupt */
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <4>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi1>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
+ <0000 0 0 2 &gic 0 111 0x4>,
+ <0000 0 0 3 &gic 0 112 0x4>,
+ <0000 0 0 4 &gic 0 113 0x4>;
+ };
+
+ pcie@3500000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
+ 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 128 0x4>,
+ <0 127 0x4>;
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <2>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
+ <0000 0 0 2 &gic 0 121 0x4>,
+ <0000 0 0 3 &gic 0 122 0x4>,
+ <0000 0 0 4 &gic 0 123 0x4>;
+ };
+
+ pcie@3600000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
+ 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 162 0x4>,
+ <0 161 0x4>;
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <2>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi3>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
+ <0000 0 0 2 &gic 0 155 0x4>,
+ <0000 0 0 3 &gic 0 156 0x4>,
+ <0000 0 0 4 &gic 0 157 0x4>;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0 0x80000000>;
+ /* DRAM space 1 - 2 GB DRAM */
+ };
+
+};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Mingkai Hu <Mingkai.Hu@freescale.com>
LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
similar to LS1021a which complies to Chassis 2.1 spec.
Following levels of DTSI/DTS files have been created for the
LS1043A SoC family:
- fsl-ls1043a.dtsi:
DTS-Include file for FSL LS1043A SoC.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
---
V3:
- Add device tree node for SATA.
- Remove properity enable-method for all cpu node.
Remove reserved memory region for spin-table.
V2:
- Add secondary core boot method.
- Move out the sysclk node from the clockgen node.
- Correct the reg size of GICC.
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 513 +++++++++++++++++++++++++
1 file changed, 513 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
new file mode 100644
index 0000000..99a5eaf
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -0,0 +1,513 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright 2014-2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/ {
+ compatible = "fsl,ls1043a";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ /*
+ * We expect the enable-method for cpu's to be "psci", but this
+ * is dependent on the SoC FW, which will fill this in.
+ *
+ * Currently supported enable-method is psci v0.2
+ */
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x0>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x1>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x2>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x3>;
+ clocks = <&clockgen 1 0>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <1 13 0x1>, /* Physical Secure PPI */
+ <1 14 0x1>, /* Physical Non-Secure PPI */
+ <1 11 0x1>, /* Virtual PPI */
+ <1 10 0x1>; /* Hypervisor PPI */
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <0 106 0x4>,
+ <0 107 0x4>,
+ <0 95 0x4>,
+ <0 97 0x4>;
+ };
+
+ gic: interrupt-controller@1400000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x0 0x1401000 0 0x1000>, /* GICD */
+ <0x0 0x1402000 0 0x2000>, /* GICC */
+ <0x0 0x1404000 0 0x2000>, /* GICH */
+ <0x0 0x1406000 0 0x2000>; /* GICV */
+ interrupts = <1 9 0xf08>;
+ };
+
+ msi1: msi-controller1@1571000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1571000 0x0 0x4>,
+ <0x0 0x1571004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 116 0x4>;
+ };
+
+ msi2: msi-controller2@1572000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1572000 0x0 0x4>,
+ <0x0 0x1572004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 126 0x4>;
+ };
+
+ msi3: msi-controller3@1573000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1573000 0x0 0x4>,
+ <0x0 0x1573004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 160 0x4>;
+ };
+
+ ifc: ifc@1530000 {
+ compatible = "fsl,ifc", "simple-bus";
+ reg = <0x0 0x1530000 0x0 0x10000>;
+ interrupts = <0 43 0x4>;
+ };
+
+ esdhc: esdhc@1560000 {
+ compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
+ reg = <0x0 0x1560000 0x0 0x10000>;
+ interrupts = <0 62 0x4>;
+ clock-frequency = <0>;
+ voltage-ranges = <1800 1800 3300 3300>;
+ sdhci,auto-cmd12;
+ big-endian;
+ bus-width = <4>;
+ };
+
+ scfg: scfg@1570000 {
+ compatible = "fsl,ls1043a-scfg", "syscon";
+ reg = <0x0 0x1570000 0x0 0x10000>;
+ big-endian;
+ };
+
+ dcfg: dcfg@1ee0000 {
+ compatible = "fsl,ls1043a-dcfg", "syscon";
+ reg = <0x0 0x1ee0000 0x0 0x10000>;
+ };
+
+ clockgen: clocking@1ee1000 {
+ compatible = "fsl,ls1043a-clockgen";
+ reg = <0x0 0x1ee1000 0x0 0x1000>;
+ #clock-cells = <2>;
+ clocks = <&sysclk>;
+ };
+
+ sysclk: sysclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "sysclk";
+ };
+
+ dspi0: dspi@2100000 {
+ compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2100000 0x0 0x10000>;
+ interrupts = <0 64 0x4>;
+ clock-names = "dspi";
+ clocks = <&clockgen 4 0>;
+ spi-num-chipselects = <5>;
+ big-endian;
+ status = "disabled";
+ };
+
+ dspi1: dspi@2110000 {
+ compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2110000 0x0 0x10000>;
+ interrupts = <0 65 0x4>;
+ clock-names = "dspi";
+ clocks = <&clockgen 4 0>;
+ spi-num-chipselects = <5>;
+ big-endian;
+ status = "disabled";
+ };
+
+ i2c0: i2c@2180000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2180000 0x0 0x10000>;
+ interrupts = <0 56 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ dmas = <&edma0 1 39>,
+ <&edma0 1 38>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ i2c1: i2c@2190000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2190000 0x0 0x10000>;
+ interrupts = <0 57 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@21a0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x21a0000 0x0 0x10000>;
+ interrupts = <0 58 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@21b0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x21b0000 0x0 0x10000>;
+ interrupts = <0 59 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ duart0: serial@21c0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0500 0x0 0x100>;
+ interrupts = <0 54 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart1: serial@21c0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0600 0x0 0x100>;
+ interrupts = <0 54 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart2: serial@21d0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0500 0x0 0x100>;
+ interrupts = <0 55 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart3: serial@21d0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0600 0x0 0x100>;
+ interrupts = <0 55 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ gpio1: gpio@2300000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2300000 0x0 0x10000>;
+ interrupts = <0 66 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio@2310000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2310000 0x0 0x10000>;
+ interrupts = <0 67 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio3: gpio@2320000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2320000 0x0 0x10000>;
+ interrupts = <0 68 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio4: gpio@2330000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2330000 0x0 0x10000>;
+ interrupts = <0 134 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ lpuart0: serial@2950000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2950000 0x0 0x1000>;
+ interrupts = <0 48 0x4>;
+ clocks = <&clockgen 0 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart1: serial@2960000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2960000 0x0 0x1000>;
+ interrupts = <0 49 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart2: serial@2970000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2970000 0x0 0x1000>;
+ interrupts = <0 50 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart3: serial@2980000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2980000 0x0 0x1000>;
+ interrupts = <0 51 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart4: serial@2990000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2990000 0x0 0x1000>;
+ interrupts = <0 52 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart5: serial@29a0000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x29a0000 0x0 0x1000>;
+ interrupts = <0 53 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ wdog0: wdog@2ad0000 {
+ compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
+ reg = <0x0 0x2ad0000 0x0 0x10000>;
+ interrupts = <0 83 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "wdog";
+ big-endian;
+ };
+
+ edma0: edma@2c00000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x0 0x2c00000 0x0 0x10000>,
+ <0x0 0x2c10000 0x0 0x10000>,
+ <0x0 0x2c20000 0x0 0x10000>;
+ interrupts = <0 103 0x4>,
+ <0 103 0x4>;
+ interrupt-names = "edma-tx", "edma-err";
+ dma-channels = <32>;
+ big-endian;
+ clock-names = "dmamux0", "dmamux1";
+ clocks = <&clockgen 4 0>,
+ <&clockgen 4 0>;
+ };
+
+ usb0: usb3@2f00000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x2f00000 0x0 0x10000>;
+ interrupts = <0 60 0x4>;
+ dr_mode = "host";
+ };
+
+ usb1: usb3@3000000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x3000000 0x0 0x10000>;
+ interrupts = <0 61 0x4>;
+ dr_mode = "host";
+ };
+ usb2: usb3@3100000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x3100000 0x0 0x10000>;
+ interrupts = <0 63 0x4>;
+ dr_mode = "host";
+ };
+
+ sata: sata@3200000 {
+ compatible = "fsl,ls1043a-ahci", "fsl,ls1021a-ahci";
+ reg = <0x0 0x3200000 0x0 0x10000>;
+ interrupts = <0 69 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ pcie@3400000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
+ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 118 0x4>, /* controller interrupt */
+ <0 117 0x4>; /* PME interrupt */
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <4>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi1>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
+ <0000 0 0 2 &gic 0 111 0x4>,
+ <0000 0 0 3 &gic 0 112 0x4>,
+ <0000 0 0 4 &gic 0 113 0x4>;
+ };
+
+ pcie@3500000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
+ 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 128 0x4>,
+ <0 127 0x4>;
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <2>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
+ <0000 0 0 2 &gic 0 121 0x4>,
+ <0000 0 0 3 &gic 0 122 0x4>,
+ <0000 0 0 4 &gic 0 123 0x4>;
+ };
+
+ pcie@3600000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
+ 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 162 0x4>,
+ <0 161 0x4>;
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <2>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi3>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
+ <0000 0 0 2 &gic 0 155 0x4>,
+ <0000 0 0 3 &gic 0 156 0x4>,
+ <0000 0 0 4 &gic 0 157 0x4>;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0 0x80000000>;
+ /* DRAM space 1 - 2 GB DRAM */
+ };
+
+};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel
From: Mingkai Hu <Mingkai.Hu@freescale.com>
LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
similar to LS1021a which complies to Chassis 2.1 spec.
Following levels of DTSI/DTS files have been created for the
LS1043A SoC family:
- fsl-ls1043a.dtsi:
DTS-Include file for FSL LS1043A SoC.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
---
V3:
- Add device tree node for SATA.
- Remove properity enable-method for all cpu node.
Remove reserved memory region for spin-table.
V2:
- Add secondary core boot method.
- Move out the sysclk node from the clockgen node.
- Correct the reg size of GICC.
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 513 +++++++++++++++++++++++++
1 file changed, 513 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
new file mode 100644
index 0000000..99a5eaf
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -0,0 +1,513 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright 2014-2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/ {
+ compatible = "fsl,ls1043a";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ /*
+ * We expect the enable-method for cpu's to be "psci", but this
+ * is dependent on the SoC FW, which will fill this in.
+ *
+ * Currently supported enable-method is psci v0.2
+ */
+ cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x0>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x1>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu at 2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x2>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu at 3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x3>;
+ clocks = <&clockgen 1 0>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <1 13 0x1>, /* Physical Secure PPI */
+ <1 14 0x1>, /* Physical Non-Secure PPI */
+ <1 11 0x1>, /* Virtual PPI */
+ <1 10 0x1>; /* Hypervisor PPI */
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <0 106 0x4>,
+ <0 107 0x4>,
+ <0 95 0x4>,
+ <0 97 0x4>;
+ };
+
+ gic: interrupt-controller at 1400000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x0 0x1401000 0 0x1000>, /* GICD */
+ <0x0 0x1402000 0 0x2000>, /* GICC */
+ <0x0 0x1404000 0 0x2000>, /* GICH */
+ <0x0 0x1406000 0 0x2000>; /* GICV */
+ interrupts = <1 9 0xf08>;
+ };
+
+ msi1: msi-controller1 at 1571000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1571000 0x0 0x4>,
+ <0x0 0x1571004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 116 0x4>;
+ };
+
+ msi2: msi-controller2 at 1572000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1572000 0x0 0x4>,
+ <0x0 0x1572004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 126 0x4>;
+ };
+
+ msi3: msi-controller3 at 1573000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1573000 0x0 0x4>,
+ <0x0 0x1573004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 160 0x4>;
+ };
+
+ ifc: ifc at 1530000 {
+ compatible = "fsl,ifc", "simple-bus";
+ reg = <0x0 0x1530000 0x0 0x10000>;
+ interrupts = <0 43 0x4>;
+ };
+
+ esdhc: esdhc at 1560000 {
+ compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
+ reg = <0x0 0x1560000 0x0 0x10000>;
+ interrupts = <0 62 0x4>;
+ clock-frequency = <0>;
+ voltage-ranges = <1800 1800 3300 3300>;
+ sdhci,auto-cmd12;
+ big-endian;
+ bus-width = <4>;
+ };
+
+ scfg: scfg at 1570000 {
+ compatible = "fsl,ls1043a-scfg", "syscon";
+ reg = <0x0 0x1570000 0x0 0x10000>;
+ big-endian;
+ };
+
+ dcfg: dcfg at 1ee0000 {
+ compatible = "fsl,ls1043a-dcfg", "syscon";
+ reg = <0x0 0x1ee0000 0x0 0x10000>;
+ };
+
+ clockgen: clocking at 1ee1000 {
+ compatible = "fsl,ls1043a-clockgen";
+ reg = <0x0 0x1ee1000 0x0 0x1000>;
+ #clock-cells = <2>;
+ clocks = <&sysclk>;
+ };
+
+ sysclk: sysclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "sysclk";
+ };
+
+ dspi0: dspi at 2100000 {
+ compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2100000 0x0 0x10000>;
+ interrupts = <0 64 0x4>;
+ clock-names = "dspi";
+ clocks = <&clockgen 4 0>;
+ spi-num-chipselects = <5>;
+ big-endian;
+ status = "disabled";
+ };
+
+ dspi1: dspi at 2110000 {
+ compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2110000 0x0 0x10000>;
+ interrupts = <0 65 0x4>;
+ clock-names = "dspi";
+ clocks = <&clockgen 4 0>;
+ spi-num-chipselects = <5>;
+ big-endian;
+ status = "disabled";
+ };
+
+ i2c0: i2c at 2180000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2180000 0x0 0x10000>;
+ interrupts = <0 56 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ dmas = <&edma0 1 39>,
+ <&edma0 1 38>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ i2c1: i2c at 2190000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2190000 0x0 0x10000>;
+ interrupts = <0 57 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c at 21a0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x21a0000 0x0 0x10000>;
+ interrupts = <0 58 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c at 21b0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x21b0000 0x0 0x10000>;
+ interrupts = <0 59 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ duart0: serial at 21c0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0500 0x0 0x100>;
+ interrupts = <0 54 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart1: serial at 21c0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0600 0x0 0x100>;
+ interrupts = <0 54 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart2: serial at 21d0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0500 0x0 0x100>;
+ interrupts = <0 55 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart3: serial at 21d0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0600 0x0 0x100>;
+ interrupts = <0 55 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ gpio1: gpio at 2300000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2300000 0x0 0x10000>;
+ interrupts = <0 66 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio at 2310000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2310000 0x0 0x10000>;
+ interrupts = <0 67 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio3: gpio at 2320000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2320000 0x0 0x10000>;
+ interrupts = <0 68 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio4: gpio at 2330000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2330000 0x0 0x10000>;
+ interrupts = <0 134 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ lpuart0: serial at 2950000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2950000 0x0 0x1000>;
+ interrupts = <0 48 0x4>;
+ clocks = <&clockgen 0 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart1: serial at 2960000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2960000 0x0 0x1000>;
+ interrupts = <0 49 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart2: serial at 2970000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2970000 0x0 0x1000>;
+ interrupts = <0 50 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart3: serial at 2980000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2980000 0x0 0x1000>;
+ interrupts = <0 51 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart4: serial at 2990000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2990000 0x0 0x1000>;
+ interrupts = <0 52 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart5: serial at 29a0000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x29a0000 0x0 0x1000>;
+ interrupts = <0 53 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ wdog0: wdog at 2ad0000 {
+ compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
+ reg = <0x0 0x2ad0000 0x0 0x10000>;
+ interrupts = <0 83 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "wdog";
+ big-endian;
+ };
+
+ edma0: edma at 2c00000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x0 0x2c00000 0x0 0x10000>,
+ <0x0 0x2c10000 0x0 0x10000>,
+ <0x0 0x2c20000 0x0 0x10000>;
+ interrupts = <0 103 0x4>,
+ <0 103 0x4>;
+ interrupt-names = "edma-tx", "edma-err";
+ dma-channels = <32>;
+ big-endian;
+ clock-names = "dmamux0", "dmamux1";
+ clocks = <&clockgen 4 0>,
+ <&clockgen 4 0>;
+ };
+
+ usb0: usb3 at 2f00000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x2f00000 0x0 0x10000>;
+ interrupts = <0 60 0x4>;
+ dr_mode = "host";
+ };
+
+ usb1: usb3 at 3000000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x3000000 0x0 0x10000>;
+ interrupts = <0 61 0x4>;
+ dr_mode = "host";
+ };
+ usb2: usb3 at 3100000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x3100000 0x0 0x10000>;
+ interrupts = <0 63 0x4>;
+ dr_mode = "host";
+ };
+
+ sata: sata at 3200000 {
+ compatible = "fsl,ls1043a-ahci", "fsl,ls1021a-ahci";
+ reg = <0x0 0x3200000 0x0 0x10000>;
+ interrupts = <0 69 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ pcie at 3400000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
+ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 118 0x4>, /* controller interrupt */
+ <0 117 0x4>; /* PME interrupt */
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <4>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi1>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
+ <0000 0 0 2 &gic 0 111 0x4>,
+ <0000 0 0 3 &gic 0 112 0x4>,
+ <0000 0 0 4 &gic 0 113 0x4>;
+ };
+
+ pcie at 3500000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
+ 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 128 0x4>,
+ <0 127 0x4>;
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <2>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
+ <0000 0 0 2 &gic 0 121 0x4>,
+ <0000 0 0 3 &gic 0 122 0x4>,
+ <0000 0 0 4 &gic 0 123 0x4>;
+ };
+
+ pcie at 3600000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
+ 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 162 0x4>,
+ <0 161 0x4>;
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <2>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi3>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
+ <0000 0 0 2 &gic 0 155 0x4>,
+ <0000 0 0 3 &gic 0 156 0x4>,
+ <0000 0 0 4 &gic 0 157 0x4>;
+ };
+
+ memory at 80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0 0x80000000>;
+ /* DRAM space 1 - 2 GB DRAM */
+ };
+
+};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
2015-10-14 11:34 ` Zhiqiang Hou
(?)
@ 2015-10-14 11:34 ` Zhiqiang Hou
-1 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
drivers/clk/clk-qoriq.c | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 7753fa3..e71927b 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -244,6 +244,28 @@ static const struct clockgen_muxinfo clockgen2_cmux_cgb = {
},
};
+static const struct clockgen_muxinfo ls1043a_hwa1 = {
+ {
+ {},
+ {},
+ { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+ { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
+ {},
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+ },
+};
+
+static const struct clockgen_muxinfo ls1043a_hwa2 = {
+ {
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+ },
+};
+
static const struct clockgen_muxinfo t1023_hwa1 = {
{
{},
@@ -452,6 +474,21 @@ static const struct clockgen_chipinfo chipinfo[] = {
.pll_mask = 0x03,
},
{
+ .compat = "fsl,ls1043a-clockgen",
+ .init_periph = t2080_init_periph,
+ .cmux_groups = {
+ &t1040_cmux
+ },
+ .hwaccel = {
+ &ls1043a_hwa1, &ls1043a_hwa2
+ },
+ .cmux_to_group = {
+ 0, -1
+ },
+ .pll_mask = 0x07,
+ .flags = CG_PLL_8BIT,
+ },
+ {
.compat = "fsl,ls2080a-clockgen",
.cmux_groups = {
&clockgen2_cmux_cga12, &clockgen2_cmux_cgb
@@ -1228,6 +1265,7 @@ err:
CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
/* Legacy nodes */
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
drivers/clk/clk-qoriq.c | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 7753fa3..e71927b 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -244,6 +244,28 @@ static const struct clockgen_muxinfo clockgen2_cmux_cgb = {
},
};
+static const struct clockgen_muxinfo ls1043a_hwa1 = {
+ {
+ {},
+ {},
+ { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+ { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
+ {},
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+ },
+};
+
+static const struct clockgen_muxinfo ls1043a_hwa2 = {
+ {
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+ },
+};
+
static const struct clockgen_muxinfo t1023_hwa1 = {
{
{},
@@ -452,6 +474,21 @@ static const struct clockgen_chipinfo chipinfo[] = {
.pll_mask = 0x03,
},
{
+ .compat = "fsl,ls1043a-clockgen",
+ .init_periph = t2080_init_periph,
+ .cmux_groups = {
+ &t1040_cmux
+ },
+ .hwaccel = {
+ &ls1043a_hwa1, &ls1043a_hwa2
+ },
+ .cmux_to_group = {
+ 0, -1
+ },
+ .pll_mask = 0x07,
+ .flags = CG_PLL_8BIT,
+ },
+ {
.compat = "fsl,ls2080a-clockgen",
.cmux_groups = {
&clockgen2_cmux_cga12, &clockgen2_cmux_cgb
@@ -1228,6 +1265,7 @@ err:
CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
/* Legacy nodes */
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel
From: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
drivers/clk/clk-qoriq.c | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 7753fa3..e71927b 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -244,6 +244,28 @@ static const struct clockgen_muxinfo clockgen2_cmux_cgb = {
},
};
+static const struct clockgen_muxinfo ls1043a_hwa1 = {
+ {
+ {},
+ {},
+ { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+ { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
+ {},
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+ },
+};
+
+static const struct clockgen_muxinfo ls1043a_hwa2 = {
+ {
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+ },
+};
+
static const struct clockgen_muxinfo t1023_hwa1 = {
{
{},
@@ -452,6 +474,21 @@ static const struct clockgen_chipinfo chipinfo[] = {
.pll_mask = 0x03,
},
{
+ .compat = "fsl,ls1043a-clockgen",
+ .init_periph = t2080_init_periph,
+ .cmux_groups = {
+ &t1040_cmux
+ },
+ .hwaccel = {
+ &ls1043a_hwa1, &ls1043a_hwa2
+ },
+ .cmux_to_group = {
+ 0, -1
+ },
+ .pll_mask = 0x07,
+ .flags = CG_PLL_8BIT,
+ },
+ {
.compat = "fsl,ls2080a-clockgen",
.cmux_groups = {
&clockgen2_cmux_cga12, &clockgen2_cmux_cgb
@@ -1228,6 +1265,7 @@ err:
CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
/* Legacy nodes */
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support
2015-10-14 11:34 ` Zhiqiang Hou
(?)
@ 2015-10-14 11:34 ` Zhiqiang Hou
-1 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
V2:
- Remove the useless compatible "simple-bus" from cpld node.
arch/arm64/boot/dts/freescale/Makefile | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 116 ++++++++++++++++++++++
2 files changed, 117 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 57b41c7..33b1e57 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -1,4 +1,4 @@
-dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb fsl-ls2080a-rdb.dtb fsl-ls2080a-simu.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb fsl-ls2080a-rdb.dtb fsl-ls2080a-simu.dtb fsl-ls1043a-rdb.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
new file mode 100644
index 0000000..7a351e2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -0,0 +1,116 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright 2014-2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "fsl-ls1043a.dtsi"
+
+/ {
+ model = "LS1043A RDB Board";
+};
+
+&i2c0 {
+ status = "okay";
+ ina220@40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+ adt7461a@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+ eeprom@56 {
+ compatible = "at24,24c512";
+ reg = <0x52>;
+ };
+ eeprom@57 {
+ compatible = "at24,24c512";
+ reg = <0x53>;
+ };
+ rtc@68 {
+ compatible = "pericom,pt7c4338";
+ reg = <0x68>;
+ };
+};
+
+&ifc {
+ status = "okay";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ /* NOR, NAND Flashes and FPGA on board */
+ ranges = <0x0 0x0 0x0 0x60000000 0x08000000
+ 0x1 0x0 0x0 0x7e800000 0x00010000
+ 0x2 0x0 0x0 0x7fb00000 0x00000100>;
+
+ nor@0,0 {
+ compatible = "cfi-flash";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@1,0 {
+ compatible = "fsl,ifc-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x1 0x0 0x10000>;
+ };
+
+ cpld: board-control@2,0 {
+ compatible = "fsl,ls1043ardb-cpld";
+ reg = <0x2 0x0 0x0000100>;
+ };
+};
+
+&duart0 {
+ status = "okay";
+};
+
+&duart1 {
+ status = "okay";
+};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song, Hou Zhiqiang
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
V2:
- Remove the useless compatible "simple-bus" from cpld node.
arch/arm64/boot/dts/freescale/Makefile | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 116 ++++++++++++++++++++++
2 files changed, 117 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 57b41c7..33b1e57 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -1,4 +1,4 @@
-dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb fsl-ls2080a-rdb.dtb fsl-ls2080a-simu.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb fsl-ls2080a-rdb.dtb fsl-ls2080a-simu.dtb fsl-ls1043a-rdb.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
new file mode 100644
index 0000000..7a351e2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -0,0 +1,116 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright 2014-2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "fsl-ls1043a.dtsi"
+
+/ {
+ model = "LS1043A RDB Board";
+};
+
+&i2c0 {
+ status = "okay";
+ ina220@40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+ adt7461a@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+ eeprom@56 {
+ compatible = "at24,24c512";
+ reg = <0x52>;
+ };
+ eeprom@57 {
+ compatible = "at24,24c512";
+ reg = <0x53>;
+ };
+ rtc@68 {
+ compatible = "pericom,pt7c4338";
+ reg = <0x68>;
+ };
+};
+
+&ifc {
+ status = "okay";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ /* NOR, NAND Flashes and FPGA on board */
+ ranges = <0x0 0x0 0x0 0x60000000 0x08000000
+ 0x1 0x0 0x0 0x7e800000 0x00010000
+ 0x2 0x0 0x0 0x7fb00000 0x00000100>;
+
+ nor@0,0 {
+ compatible = "cfi-flash";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@1,0 {
+ compatible = "fsl,ifc-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x1 0x0 0x10000>;
+ };
+
+ cpld: board-control@2,0 {
+ compatible = "fsl,ls1043ardb-cpld";
+ reg = <0x2 0x0 0x0000100>;
+ };
+};
+
+&duart0 {
+ status = "okay";
+};
+
+&duart1 {
+ status = "okay";
+};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support
@ 2015-10-14 11:34 ` Zhiqiang Hou
0 siblings, 0 replies; 49+ messages in thread
From: Zhiqiang Hou @ 2015-10-14 11:34 UTC (permalink / raw)
To: linux-arm-kernel
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V3:
- No change.
V2:
- Remove the useless compatible "simple-bus" from cpld node.
arch/arm64/boot/dts/freescale/Makefile | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 116 ++++++++++++++++++++++
2 files changed, 117 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 57b41c7..33b1e57 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -1,4 +1,4 @@
-dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb fsl-ls2080a-rdb.dtb fsl-ls2080a-simu.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb fsl-ls2080a-rdb.dtb fsl-ls2080a-simu.dtb fsl-ls1043a-rdb.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
new file mode 100644
index 0000000..7a351e2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -0,0 +1,116 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright 2014-2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "fsl-ls1043a.dtsi"
+
+/ {
+ model = "LS1043A RDB Board";
+};
+
+&i2c0 {
+ status = "okay";
+ ina220 at 40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+ adt7461a at 4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+ eeprom at 56 {
+ compatible = "at24,24c512";
+ reg = <0x52>;
+ };
+ eeprom at 57 {
+ compatible = "at24,24c512";
+ reg = <0x53>;
+ };
+ rtc at 68 {
+ compatible = "pericom,pt7c4338";
+ reg = <0x68>;
+ };
+};
+
+&ifc {
+ status = "okay";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ /* NOR, NAND Flashes and FPGA on board */
+ ranges = <0x0 0x0 0x0 0x60000000 0x08000000
+ 0x1 0x0 0x0 0x7e800000 0x00010000
+ 0x2 0x0 0x0 0x7fb00000 0x00000100>;
+
+ nor at 0,0 {
+ compatible = "cfi-flash";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand at 1,0 {
+ compatible = "fsl,ifc-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x1 0x0 0x10000>;
+ };
+
+ cpld: board-control at 2,0 {
+ compatible = "fsl,ls1043ardb-cpld";
+ reg = <0x2 0x0 0x0000100>;
+ };
+};
+
+&duart0 {
+ status = "okay";
+};
+
+&duart1 {
+ status = "okay";
+};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 49+ messages in thread
* Re: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-14 11:34 ` Zhiqiang Hou
(?)
@ 2015-10-14 12:43 ` Mark Rutland
-1 siblings, 0 replies; 49+ messages in thread
From: Mark Rutland @ 2015-10-14 12:43 UTC (permalink / raw)
To: Zhiqiang Hou
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
linux-clk-u79uwXL29TY76Z2rM5mHXA,
Mingkai.Hu-KZfg59tc24xl57MIdRCFDg,
Shaohui.Xie-KZfg59tc24xl57MIdRCFDg,
scottwood-KZfg59tc24xl57MIdRCFDg,
bhupesh.sharma-KZfg59tc24xl57MIdRCFDg,
leoli-KZfg59tc24xl57MIdRCFDg, wsa-z923LK4zBo2bacvFa/9K2g,
wim-IQzOog9fTRqzQB+pC5nmwQ, corbet-T1hC0tSOHrs,
mturquette-rdvid1DuHRBWk0Htik3J/w, sboyd-sgV2jX0FEOL9JmXXK+q4OQ,
Wenbin.Song-KZfg59tc24xl57MIdRCFDg
Hi,
> + pmu {
> + compatible = "arm,armv8-pmuv3";
> + interrupts = <0 106 0x4>,
> + <0 107 0x4>,
> + <0 95 0x4>,
> + <0 97 0x4>;
> + };
You should have interrupt-affinity here. See
Documentation/devicetree/bindings/arm/pmu.txt
Otherwise this looks ok.
Thanks,
Mark.
--
To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-14 12:43 ` Mark Rutland
0 siblings, 0 replies; 49+ messages in thread
From: Mark Rutland @ 2015-10-14 12:43 UTC (permalink / raw)
To: Zhiqiang Hou
Cc: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, Mingkai.Hu, Shaohui.Xie,
scottwood, bhupesh.sharma, leoli, wsa, wim, corbet, mturquette,
sboyd, Wenbin.Song
Hi,
> + pmu {
> + compatible = "arm,armv8-pmuv3";
> + interrupts = <0 106 0x4>,
> + <0 107 0x4>,
> + <0 95 0x4>,
> + <0 97 0x4>;
> + };
You should have interrupt-affinity here. See
Documentation/devicetree/bindings/arm/pmu.txt
Otherwise this looks ok.
Thanks,
Mark.
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-14 12:43 ` Mark Rutland
0 siblings, 0 replies; 49+ messages in thread
From: Mark Rutland @ 2015-10-14 12:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
> + pmu {
> + compatible = "arm,armv8-pmuv3";
> + interrupts = <0 106 0x4>,
> + <0 107 0x4>,
> + <0 95 0x4>,
> + <0 97 0x4>;
> + };
You should have interrupt-affinity here. See
Documentation/devicetree/bindings/arm/pmu.txt
Otherwise this looks ok.
Thanks,
Mark.
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 2/6] watchdog: Add support for Freescale Layerscape platforms
2015-10-14 11:34 ` Zhiqiang Hou
@ 2015-10-14 14:06 ` Guenter Roeck
-1 siblings, 0 replies; 49+ messages in thread
From: Guenter Roeck @ 2015-10-14 14:06 UTC (permalink / raw)
To: Zhiqiang Hou, linux-arm-kernel, catalin.marinas, will.deacon,
linux-i2c, linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa,
wim, corbet, mturquette, sboyd, Wenbin.Song
On 10/14/2015 04:34 AM, Zhiqiang Hou wrote:
> From: Shaohui Xie <Shaohui.Xie@freescale.com>
>
> Modify watchdog/Kconfig file to support Layerscape platforms.
>
> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
> Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
> ---
> V3:
> - No change.
>
> drivers/watchdog/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> index 79e1aa1..448dbaf 100644
> --- a/drivers/watchdog/Kconfig
> +++ b/drivers/watchdog/Kconfig
> @@ -446,7 +446,7 @@ config MAX63XX_WATCHDOG
>
> config IMX2_WDT
> tristate "IMX2+ Watchdog"
> - depends on ARCH_MXC
> + depends on ARCH_MXC || ARCH_LAYERSCAPE
> select REGMAP_MMIO
> select WATCHDOG_CORE
> help
>
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 2/6] watchdog: Add support for Freescale Layerscape platforms
@ 2015-10-14 14:06 ` Guenter Roeck
0 siblings, 0 replies; 49+ messages in thread
From: Guenter Roeck @ 2015-10-14 14:06 UTC (permalink / raw)
To: linux-arm-kernel
On 10/14/2015 04:34 AM, Zhiqiang Hou wrote:
> From: Shaohui Xie <Shaohui.Xie@freescale.com>
>
> Modify watchdog/Kconfig file to support Layerscape platforms.
>
> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
> Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
> ---
> V3:
> - No change.
>
> drivers/watchdog/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> index 79e1aa1..448dbaf 100644
> --- a/drivers/watchdog/Kconfig
> +++ b/drivers/watchdog/Kconfig
> @@ -446,7 +446,7 @@ config MAX63XX_WATCHDOG
>
> config IMX2_WDT
> tristate "IMX2+ Watchdog"
> - depends on ARCH_MXC
> + depends on ARCH_MXC || ARCH_LAYERSCAPE
> select REGMAP_MMIO
> select WATCHDOG_CORE
> help
>
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
2015-10-14 11:34 ` Zhiqiang Hou
@ 2015-10-14 18:31 ` Stephen Boyd
-1 siblings, 0 replies; 49+ messages in thread
From: Stephen Boyd @ 2015-10-14 18:31 UTC (permalink / raw)
To: Zhiqiang Hou
Cc: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland, Mingkai.Hu,
Shaohui.Xie, scottwood, bhupesh.sharma, leoli, wsa, wim, corbet,
mturquette, Wenbin.Song
On 10/14, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <B48286@freescale.com>
>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> ---
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
@ 2015-10-14 18:31 ` Stephen Boyd
0 siblings, 0 replies; 49+ messages in thread
From: Stephen Boyd @ 2015-10-14 18:31 UTC (permalink / raw)
To: linux-arm-kernel
On 10/14, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <B48286@freescale.com>
>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> ---
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
2015-10-14 18:31 ` Stephen Boyd
(?)
@ 2015-10-15 0:57 ` Scott Wood
-1 siblings, 0 replies; 49+ messages in thread
From: Scott Wood @ 2015-10-15 0:57 UTC (permalink / raw)
To: Stephen Boyd
Cc: mark.rutland, corbet, linux-watchdog, linux-doc, bhupesh.sharma,
catalin.marinas, mturquette, Zhiqiang Hou, will.deacon, wim,
linux-i2c, wsa, Mingkai.Hu, leoli, Wenbin.Song, linux-clk,
linux-arm-kernel, Shaohui.Xie
On Wed, 2015-10-14 at 11:31 -0700, Stephen Boyd wrote:
> On 10/14, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <B48286@freescale.com>
> >
> > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > ---
>
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
>
Could you ack my clock patchset that this depends on (if there are no
objections)? Mike Turquette acked the RFC version a while back, but it's
changed a bit since then (including the new clk_get_num_parents() and
clk_get_parent_by_index() -- I CCed Russell King on that but got no
response), and got no response when I asked whether the ack was still good
for v3.
-Scott
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
@ 2015-10-15 0:57 ` Scott Wood
0 siblings, 0 replies; 49+ messages in thread
From: Scott Wood @ 2015-10-15 0:57 UTC (permalink / raw)
To: Stephen Boyd
Cc: Zhiqiang Hou, linux-arm-kernel, catalin.marinas, will.deacon,
linux-i2c, linux-watchdog, linux-doc, linux-clk, mark.rutland,
Mingkai.Hu, Shaohui.Xie, bhupesh.sharma, leoli, wsa, wim, corbet,
mturquette, Wenbin.Song
On Wed, 2015-10-14 at 11:31 -0700, Stephen Boyd wrote:
> On 10/14, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <B48286@freescale.com>
> >
> > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > ---
>
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
>
Could you ack my clock patchset that this depends on (if there are no
objections)? Mike Turquette acked the RFC version a while back, but it's
changed a bit since then (including the new clk_get_num_parents() and
clk_get_parent_by_index() -- I CCed Russell King on that but got no
response), and got no response when I asked whether the ack was still good
for v3.
-Scott
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
@ 2015-10-15 0:57 ` Scott Wood
0 siblings, 0 replies; 49+ messages in thread
From: Scott Wood @ 2015-10-15 0:57 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 2015-10-14 at 11:31 -0700, Stephen Boyd wrote:
> On 10/14, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <B48286@freescale.com>
> >
> > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > ---
>
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
>
Could you ack my clock patchset that this depends on (if there are no
objections)? Mike Turquette acked the RFC version a while back, but it's
changed a bit since then (including the new clk_get_num_parents() and
clk_get_parent_by_index() -- I CCed Russell King on that but got no
response), and got no response when I asked whether the ack was still good
for v3.
-Scott
^ permalink raw reply [flat|nested] 49+ messages in thread
* RE: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-14 12:43 ` Mark Rutland
(?)
@ 2015-10-15 3:32 ` Hou Zhiqiang
-1 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-15 3:32 UTC (permalink / raw)
To: Mark Rutland
Cc: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, Hu Vincent, Shaohui Xie,
Scott Wood, Sharma Bhupesh, Li Leo, wsa, wim, corbet, mturquette,
sboyd, Wenbin Song
> -----Original Message-----
> From: Mark Rutland [mailto:mark.rutland@arm.com]
> Sent: 2015年10月14日 20:44
> To: Hou Zhiqiang-B48286
> Cc: linux-arm-kernel@lists.infradead.org; catalin.marinas@arm.com;
> will.deacon@arm.com; linux-i2c@vger.kernel.org; linux-
> watchdog@vger.kernel.org; linux-doc@vger.kernel.org; linux-
> clk@vger.kernel.org; Hu Mingkai-B21284; Xie Shaohui-B21989; Wood Scott-
> B07421; Sharma Bhupesh-B45370; Li Yang-Leo-R58472; wsa@the-dreams.de;
> wim@iguana.be; corbet@lwn.net; mturquette@baylibre.com;
> sboyd@codeaurora.org; Song Wenbin-B53747
> Subject: Re: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A
> SoC
>
> Hi,
>
> > + pmu {
> > + compatible = "arm,armv8-pmuv3";
> > + interrupts = <0 106 0x4>,
> > + <0 107 0x4>,
> > + <0 95 0x4>,
> > + <0 97 0x4>;
> > + };
>
> You should have interrupt-affinity here. See
> Documentation/devicetree/bindings/arm/pmu.txt
>
> Otherwise this looks ok.
>
Thanks for your correction.
Thanks,
Zhiqiang
^ permalink raw reply [flat|nested] 49+ messages in thread
* RE: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-15 3:32 ` Hou Zhiqiang
0 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-15 3:32 UTC (permalink / raw)
To: Mark Rutland
Cc: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, Hu Vincent, Shaohui Xie,
Scott Wood, Sharma Bhupesh, Li Leo, wsa, wim, corbet, mturquette,
sboyd, Wenbin Song
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogTWFyayBSdXRsYW5kIFtt
YWlsdG86bWFyay5ydXRsYW5kQGFybS5jb21dDQo+IFNlbnQ6IDIwMTXE6jEw1MIxNMjVIDIwOjQ0
DQo+IFRvOiBIb3UgWmhpcWlhbmctQjQ4Mjg2DQo+IENjOiBsaW51eC1hcm0ta2VybmVsQGxpc3Rz
LmluZnJhZGVhZC5vcmc7IGNhdGFsaW4ubWFyaW5hc0Bhcm0uY29tOw0KPiB3aWxsLmRlYWNvbkBh
cm0uY29tOyBsaW51eC1pMmNAdmdlci5rZXJuZWwub3JnOyBsaW51eC0NCj4gd2F0Y2hkb2dAdmdl
ci5rZXJuZWwub3JnOyBsaW51eC1kb2NAdmdlci5rZXJuZWwub3JnOyBsaW51eC0NCj4gY2xrQHZn
ZXIua2VybmVsLm9yZzsgSHUgTWluZ2thaS1CMjEyODQ7IFhpZSBTaGFvaHVpLUIyMTk4OTsgV29v
ZCBTY290dC0NCj4gQjA3NDIxOyBTaGFybWEgQmh1cGVzaC1CNDUzNzA7IExpIFlhbmctTGVvLVI1
ODQ3Mjsgd3NhQHRoZS1kcmVhbXMuZGU7DQo+IHdpbUBpZ3VhbmEuYmU7IGNvcmJldEBsd24ubmV0
OyBtdHVycXVldHRlQGJheWxpYnJlLmNvbTsNCj4gc2JveWRAY29kZWF1cm9yYS5vcmc7IFNvbmcg
V2VuYmluLUI1Mzc0Nw0KPiBTdWJqZWN0OiBSZTogW1BBVENIIFYzIDQvNl0gYXJtNjQvbHMxMDQz
YTogYWRkIERUUyBmb3IgRnJlZXNjYWxlIExTMTA0M0ENCj4gU29DDQo+IA0KPiBIaSwNCj4gDQo+
ID4gKwlwbXUgew0KPiA+ICsJCWNvbXBhdGlibGUgPSAiYXJtLGFybXY4LXBtdXYzIjsNCj4gPiAr
CQlpbnRlcnJ1cHRzID0gPDAgMTA2IDB4ND4sDQo+ID4gKwkJCSAgICAgPDAgMTA3IDB4ND4sDQo+
ID4gKwkJCSAgICAgPDAgOTUgMHg0PiwNCj4gPiArCQkJICAgICA8MCA5NyAweDQ+Ow0KPiA+ICsJ
fTsNCj4gDQo+IFlvdSBzaG91bGQgaGF2ZSBpbnRlcnJ1cHQtYWZmaW5pdHkgaGVyZS4gU2VlDQo+
IERvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9hcm0vcG11LnR4dA0KPiANCj4gT3Ro
ZXJ3aXNlIHRoaXMgbG9va3Mgb2suDQo+IA0KDQpUaGFua3MgZm9yIHlvdXIgY29ycmVjdGlvbi4N
Cg0KVGhhbmtzLA0KWmhpcWlhbmcNCg==
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-15 3:32 ` Hou Zhiqiang
0 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-15 3:32 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Mark Rutland [mailto:mark.rutland at arm.com]
> Sent: 2015?10?14? 20:44
> To: Hou Zhiqiang-B48286
> Cc: linux-arm-kernel at lists.infradead.org; catalin.marinas at arm.com;
> will.deacon at arm.com; linux-i2c at vger.kernel.org; linux-
> watchdog at vger.kernel.org; linux-doc at vger.kernel.org; linux-
> clk at vger.kernel.org; Hu Mingkai-B21284; Xie Shaohui-B21989; Wood Scott-
> B07421; Sharma Bhupesh-B45370; Li Yang-Leo-R58472; wsa at the-dreams.de;
> wim at iguana.be; corbet at lwn.net; mturquette at baylibre.com;
> sboyd at codeaurora.org; Song Wenbin-B53747
> Subject: Re: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A
> SoC
>
> Hi,
>
> > + pmu {
> > + compatible = "arm,armv8-pmuv3";
> > + interrupts = <0 106 0x4>,
> > + <0 107 0x4>,
> > + <0 95 0x4>,
> > + <0 97 0x4>;
> > + };
>
> You should have interrupt-affinity here. See
> Documentation/devicetree/bindings/arm/pmu.txt
>
> Otherwise this looks ok.
>
Thanks for your correction.
Thanks,
Zhiqiang
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-14 11:34 ` Zhiqiang Hou
(?)
@ 2015-10-15 3:56 ` Scott Wood
-1 siblings, 0 replies; 49+ messages in thread
From: Scott Wood @ 2015-10-15 3:56 UTC (permalink / raw)
To: Zhiqiang Hou
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
linux-clk-u79uwXL29TY76Z2rM5mHXA, mark.rutland-5wv7dgnIgG8,
Mingkai.Hu-KZfg59tc24xl57MIdRCFDg,
Shaohui.Xie-KZfg59tc24xl57MIdRCFDg,
bhupesh.sharma-KZfg59tc24xl57MIdRCFDg,
leoli-KZfg59tc24xl57MIdRCFDg, wsa-z923LK4zBo2bacvFa/9K2g,
wim-IQzOog9fTRqzQB+pC5nmwQ, corbet-T1hC0tSOHrs,
mturquette-rdvid1DuHRBWk0Htik3J/w, sboyd-sgV2jX0FEOL9JmXXK+q4OQ,
Wenbin.Song-KZfg59tc24xl57MIdRCFDg
On Wed, 2015-10-14 at 19:34 +0800, Zhiqiang Hou wrote:
> From: Mingkai Hu <Mingkai.Hu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>
> LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
> similar to LS1021a which complies to Chassis 2.1 spec.
>
> Following levels of DTSI/DTS files have been created for the
> LS1043A SoC family:
>
> - fsl-ls1043a.dtsi:
> DTS-Include file for FSL LS1043A SoC.
>
> Signed-off-by: Li Yang <leoli-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> Signed-off-by: Hou Zhiqiang <B48286-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> Signed-off-by: Mingkai Hu <Mingkai.Hu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> Signed-off-by: Wenbin Song <Wenbin.Song-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
> V3:
> - Add device tree node for SATA.
> - Remove properity enable-method for all cpu node.
> Remove reserved memory region for spin-table.
>
> V2:
> - Add secondary core boot method.
> - Move out the sysclk node from the clockgen node.
> - Correct the reg size of GICC.
>
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 513
> +++++++++++++++++++++++++
> 1 file changed, 513 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
On the ls208x device tree we were asked to put devices under a bus node, such
as an soc node with a simple-bus compatible.
-Scott
--
To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-15 3:56 ` Scott Wood
0 siblings, 0 replies; 49+ messages in thread
From: Scott Wood @ 2015-10-15 3:56 UTC (permalink / raw)
To: Zhiqiang Hou
Cc: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland, Mingkai.Hu,
Shaohui.Xie, bhupesh.sharma, leoli, wsa, wim, corbet, mturquette,
sboyd, Wenbin.Song
On Wed, 2015-10-14 at 19:34 +0800, Zhiqiang Hou wrote:
> From: Mingkai Hu <Mingkai.Hu@freescale.com>
>
> LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
> similar to LS1021a which complies to Chassis 2.1 spec.
>
> Following levels of DTSI/DTS files have been created for the
> LS1043A SoC family:
>
> - fsl-ls1043a.dtsi:
> DTS-Include file for FSL LS1043A SoC.
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
> Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
> ---
> V3:
> - Add device tree node for SATA.
> - Remove properity enable-method for all cpu node.
> Remove reserved memory region for spin-table.
>
> V2:
> - Add secondary core boot method.
> - Move out the sysclk node from the clockgen node.
> - Correct the reg size of GICC.
>
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 513
> +++++++++++++++++++++++++
> 1 file changed, 513 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
On the ls208x device tree we were asked to put devices under a bus node, such
as an soc node with a simple-bus compatible.
-Scott
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-15 3:56 ` Scott Wood
0 siblings, 0 replies; 49+ messages in thread
From: Scott Wood @ 2015-10-15 3:56 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 2015-10-14 at 19:34 +0800, Zhiqiang Hou wrote:
> From: Mingkai Hu <Mingkai.Hu@freescale.com>
>
> LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
> similar to LS1021a which complies to Chassis 2.1 spec.
>
> Following levels of DTSI/DTS files have been created for the
> LS1043A SoC family:
>
> - fsl-ls1043a.dtsi:
> DTS-Include file for FSL LS1043A SoC.
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
> Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
> ---
> V3:
> - Add device tree node for SATA.
> - Remove properity enable-method for all cpu node.
> Remove reserved memory region for spin-table.
>
> V2:
> - Add secondary core boot method.
> - Move out the sysclk node from the clockgen node.
> - Correct the reg size of GICC.
>
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 513
> +++++++++++++++++++++++++
> 1 file changed, 513 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
On the ls208x device tree we were asked to put devices under a bus node, such
as an soc node with a simple-bus compatible.
-Scott
^ permalink raw reply [flat|nested] 49+ messages in thread
* RE: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-15 3:56 ` Scott Wood
(?)
(?)
@ 2015-10-15 7:34 ` Hou Zhiqiang
-1 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-15 7:34 UTC (permalink / raw)
To: Scott Wood
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
linux-clk-u79uwXL29TY76Z2rM5mHXA, mark.rutland-5wv7dgnIgG8,
Hu Vincent, Shaohui Xie, Sharma Bhupesh, Li Leo,
wsa-z923LK4zBo2bacvFa/9K2g, wim-IQzOog9fTRqzQB+pC5nmwQ,
corbet-T1hC0tSOHrs, mturquette-rdvid1DuHRBWk0Htik3J/w,
sboyd-sgV2jX0FEOL9JmXXK+q4OQ, Wenbin Song
> -----Original Message-----
> From: Wood Scott-B07421
> Sent: 2015年10月15日 11:57
> To: Hou Zhiqiang-B48286
> Cc: linux-arm-kernel@lists.infradead.org; catalin.marinas@arm.com;
> will.deacon@arm.com; linux-i2c@vger.kernel.org; linux-
> watchdog@vger.kernel.org; linux-doc@vger.kernel.org; linux-
> clk@vger.kernel.org; mark.rutland@arm.com; Hu Mingkai-B21284; Xie
> Shaohui-B21989; Sharma Bhupesh-B45370; Li Yang-Leo-R58472; wsa@the-
> dreams.de; wim@iguana.be; corbet@lwn.net; mturquette@baylibre.com;
> sboyd@codeaurora.org; Song Wenbin-B53747
> Subject: Re: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A
> SoC
>
> On Wed, 2015-10-14 at 19:34 +0800, Zhiqiang Hou wrote:
> > From: Mingkai Hu <Mingkai.Hu@freescale.com>
> >
> > LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
> > similar to LS1021a which complies to Chassis 2.1 spec.
> >
> > Following levels of DTSI/DTS files have been created for the LS1043A
> > SoC family:
> >
> > - fsl-ls1043a.dtsi:
> > DTS-Include file for FSL LS1043A SoC.
> >
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
> > Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
> > ---
> > V3:
> > - Add device tree node for SATA.
> > - Remove properity enable-method for all cpu node.
> > Remove reserved memory region for spin-table.
> >
> > V2:
> > - Add secondary core boot method.
> > - Move out the sysclk node from the clockgen node.
> > - Correct the reg size of GICC.
> >
> > arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 513
> > +++++++++++++++++++++++++
> > 1 file changed, 513 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
>
> On the ls208x device tree we were asked to put devices under a bus node,
> such as an soc node with a simple-bus compatible.
>
Thanks, will reform.
Thanks,
Zhiqiang
^ permalink raw reply [flat|nested] 49+ messages in thread
* RE: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-15 7:34 ` Hou Zhiqiang
0 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-15 7:34 UTC (permalink / raw)
To: Scott Wood
Cc: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland, Hu Vincent,
Shaohui Xie, Sharma Bhupesh, Li Leo, wsa, wim, corbet,
mturquette, sboyd, Wenbin Song
> -----Original Message-----
> From: Wood Scott-B07421
> Sent: 2015年10月15日 11:57
> To: Hou Zhiqiang-B48286
> Cc: linux-arm-kernel@lists.infradead.org; catalin.marinas@arm.com;
> will.deacon@arm.com; linux-i2c@vger.kernel.org; linux-
> watchdog@vger.kernel.org; linux-doc@vger.kernel.org; linux-
> clk@vger.kernel.org; mark.rutland@arm.com; Hu Mingkai-B21284; Xie
> Shaohui-B21989; Sharma Bhupesh-B45370; Li Yang-Leo-R58472; wsa@the-
> dreams.de; wim@iguana.be; corbet@lwn.net; mturquette@baylibre.com;
> sboyd@codeaurora.org; Song Wenbin-B53747
> Subject: Re: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A
> SoC
>
> On Wed, 2015-10-14 at 19:34 +0800, Zhiqiang Hou wrote:
> > From: Mingkai Hu <Mingkai.Hu@freescale.com>
> >
> > LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
> > similar to LS1021a which complies to Chassis 2.1 spec.
> >
> > Following levels of DTSI/DTS files have been created for the LS1043A
> > SoC family:
> >
> > - fsl-ls1043a.dtsi:
> > DTS-Include file for FSL LS1043A SoC.
> >
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
> > Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
> > ---
> > V3:
> > - Add device tree node for SATA.
> > - Remove properity enable-method for all cpu node.
> > Remove reserved memory region for spin-table.
> >
> > V2:
> > - Add secondary core boot method.
> > - Move out the sysclk node from the clockgen node.
> > - Correct the reg size of GICC.
> >
> > arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 513
> > +++++++++++++++++++++++++
> > 1 file changed, 513 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
>
> On the ls208x device tree we were asked to put devices under a bus node,
> such as an soc node with a simple-bus compatible.
>
Thanks, will reform.
Thanks,
Zhiqiang
^ permalink raw reply [flat|nested] 49+ messages in thread
* RE: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-15 7:34 ` Hou Zhiqiang
0 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-15 7:34 UTC (permalink / raw)
To: Scott Wood
Cc: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland, Hu Vincent,
Shaohui Xie, Sharma Bhupesh, Li Leo, wsa, wim, corbet,
mturquette, sboyd, Wenbin Song
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0
MjENCj4gU2VudDogMjAxNeW5tDEw5pyIMTXml6UgMTE6NTcNCj4gVG86IEhvdSBaaGlxaWFuZy1C
NDgyODYNCj4gQ2M6IGxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZzsgY2F0YWxp
bi5tYXJpbmFzQGFybS5jb207DQo+IHdpbGwuZGVhY29uQGFybS5jb207IGxpbnV4LWkyY0B2Z2Vy
Lmtlcm5lbC5vcmc7IGxpbnV4LQ0KPiB3YXRjaGRvZ0B2Z2VyLmtlcm5lbC5vcmc7IGxpbnV4LWRv
Y0B2Z2VyLmtlcm5lbC5vcmc7IGxpbnV4LQ0KPiBjbGtAdmdlci5rZXJuZWwub3JnOyBtYXJrLnJ1
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MDgwMCwgWmhpcWlhbmcgSG91IHdyb3RlOg0KPiA+IEZyb206IE1pbmdrYWkgSHUgPE1pbmdrYWku
SHVAZnJlZXNjYWxlLmNvbT4NCj4gPg0KPiA+IExTMTA0M2EgaXMgYW4gU29DIHdpdGggNCBBUk12
OCBBNTMgY29yZXMgYW5kIG1vc3Qgb3RoZXIgSVAgYmxvY2tzDQo+ID4gc2ltaWxhciB0byBMUzEw
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IFdlbmJpbiBTb25nIDxXZW5iaW4uU29uZ0BmcmVlc2NhbGUuY29tPg0KPiA+IC0tLQ0KPiA+IFYz
Og0KPiA+ICAtIEFkZCBkZXZpY2UgdHJlZSBub2RlIGZvciBTQVRBLg0KPiA+ICAtIFJlbW92ZSBw
cm9wZXJpdHkgZW5hYmxlLW1ldGhvZCBmb3IgYWxsIGNwdSBub2RlLg0KPiA+ICAgIFJlbW92ZSBy
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IC0gQWRkIHNlY29uZGFyeSBjb3JlIGJvb3QgbWV0aG9kLg0KPiA+ICAtIE1vdmUgb3V0IHRoZSBz
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ZyBzaXplIG9mIEdJQ0MuDQo+ID4NCj4gPiAgYXJjaC9hcm02NC9ib290L2R0cy9mcmVlc2NhbGUv
ZnNsLWxzMTA0M2EuZHRzaSB8IDUxMw0KPiA+ICsrKysrKysrKysrKysrKysrKysrKysrKysNCj4g
PiAgMSBmaWxlIGNoYW5nZWQsIDUxMyBpbnNlcnRpb25zKCspDQo+ID4gIGNyZWF0ZSBtb2RlIDEw
MDY0NCBhcmNoL2FybTY0L2Jvb3QvZHRzL2ZyZWVzY2FsZS9mc2wtbHMxMDQzYS5kdHNpDQo+IA0K
PiBPbiB0aGUgbHMyMDh4IGRldmljZSB0cmVlIHdlIHdlcmUgYXNrZWQgdG8gcHV0IGRldmljZXMg
dW5kZXIgYSBidXMgbm9kZSwNCj4gc3VjaCBhcyBhbiBzb2Mgbm9kZSB3aXRoIGEgc2ltcGxlLWJ1
cyBjb21wYXRpYmxlLg0KPiANCg0KVGhhbmtzLCB3aWxsIHJlZm9ybS4NCg0KVGhhbmtzLA0KWmhp
cWlhbmcNCg==
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
@ 2015-10-15 7:34 ` Hou Zhiqiang
0 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-15 7:34 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Wood Scott-B07421
> Sent: 2015?10?15? 11:57
> To: Hou Zhiqiang-B48286
> Cc: linux-arm-kernel at lists.infradead.org; catalin.marinas at arm.com;
> will.deacon at arm.com; linux-i2c at vger.kernel.org; linux-
> watchdog at vger.kernel.org; linux-doc at vger.kernel.org; linux-
> clk at vger.kernel.org; mark.rutland at arm.com; Hu Mingkai-B21284; Xie
> Shaohui-B21989; Sharma Bhupesh-B45370; Li Yang-Leo-R58472; wsa at the-
> dreams.de; wim at iguana.be; corbet at lwn.net; mturquette at baylibre.com;
> sboyd at codeaurora.org; Song Wenbin-B53747
> Subject: Re: [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A
> SoC
>
> On Wed, 2015-10-14 at 19:34 +0800, Zhiqiang Hou wrote:
> > From: Mingkai Hu <Mingkai.Hu@freescale.com>
> >
> > LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
> > similar to LS1021a which complies to Chassis 2.1 spec.
> >
> > Following levels of DTSI/DTS files have been created for the LS1043A
> > SoC family:
> >
> > - fsl-ls1043a.dtsi:
> > DTS-Include file for FSL LS1043A SoC.
> >
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
> > Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
> > ---
> > V3:
> > - Add device tree node for SATA.
> > - Remove properity enable-method for all cpu node.
> > Remove reserved memory region for spin-table.
> >
> > V2:
> > - Add secondary core boot method.
> > - Move out the sysclk node from the clockgen node.
> > - Correct the reg size of GICC.
> >
> > arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 513
> > +++++++++++++++++++++++++
> > 1 file changed, 513 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
>
> On the ls208x device tree we were asked to put devices under a bus node,
> such as an soc node with a simple-bus compatible.
>
Thanks, will reform.
Thanks,
Zhiqiang
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
2015-10-15 0:57 ` Scott Wood
@ 2015-10-15 19:54 ` Stephen Boyd
-1 siblings, 0 replies; 49+ messages in thread
From: Stephen Boyd @ 2015-10-15 19:54 UTC (permalink / raw)
To: Scott Wood
Cc: Zhiqiang Hou, linux-arm-kernel, catalin.marinas, will.deacon,
linux-i2c, linux-watchdog, linux-doc, linux-clk, mark.rutland,
Mingkai.Hu, Shaohui.Xie, bhupesh.sharma, leoli, wsa, wim, corbet,
mturquette, Wenbin.Song
On 10/14, Scott Wood wrote:
> On Wed, 2015-10-14 at 11:31 -0700, Stephen Boyd wrote:
> > On 10/14, Zhiqiang Hou wrote:
> > > From: Hou Zhiqiang <B48286@freescale.com>
> > >
> > > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > > ---
> >
> > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> >
>
> Could you ack my clock patchset that this depends on (if there are no
>
> objections)? Mike Turquette acked the RFC version a while back, but it's
>
> changed a bit since then (including the new clk_get_num_parents() and
>
> clk_get_parent_by_index() -- I CCed Russell King on that but got no
>
> response), and got no response when I asked whether the ack was still good
>
> for v3.
>
>
Done. The consumer APIs look ok too, but I'd like to see if
Russell has any comments.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
@ 2015-10-15 19:54 ` Stephen Boyd
0 siblings, 0 replies; 49+ messages in thread
From: Stephen Boyd @ 2015-10-15 19:54 UTC (permalink / raw)
To: linux-arm-kernel
On 10/14, Scott Wood wrote:
> On Wed, 2015-10-14 at 11:31 -0700, Stephen Boyd wrote:
> > On 10/14, Zhiqiang Hou wrote:
> > > From: Hou Zhiqiang <B48286@freescale.com>
> > >
> > > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > > ---
> >
> > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> >
>
> Could you ack my clock patchset that this depends on (if there are no
>
> objections)? Mike Turquette acked the RFC version a while back, but it's
>
> changed a bit since then (including the new clk_get_num_parents() and
>
> clk_get_parent_by_index() -- I CCed Russell King on that but got no
>
> response), and got no response when I asked whether the ack was still good
>
> for v3.
>
>
Done. The consumer APIs look ok too, but I'd like to see if
Russell has any comments.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
2015-10-15 19:54 ` Stephen Boyd
(?)
@ 2015-12-14 23:32 ` Scott Wood
-1 siblings, 0 replies; 49+ messages in thread
From: Scott Wood @ 2015-12-14 23:32 UTC (permalink / raw)
To: Stephen Boyd
Cc: Zhiqiang Hou, linux-arm-kernel, catalin.marinas, will.deacon,
linux-i2c, linux-watchdog, linux-doc, linux-clk, mark.rutland,
Mingkai.Hu, Shaohui.Xie, bhupesh.sharma, leoli, wsa, wim, corbet,
mturquette, Wenbin.Song, Russell King
On Thu, 2015-10-15 at 12:54 -0700, Stephen Boyd wrote:
> On 10/14, Scott Wood wrote:
> > On Wed, 2015-10-14 at 11:31 -0700, Stephen Boyd wrote:
> > > On 10/14, Zhiqiang Hou wrote:
> > > > From: Hou Zhiqiang <B48286@freescale.com>
> > > >
> > > > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > > > ---
> > >
> > > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> > >
> >
> > Could you ack my clock patchset that this depends on (if there are no
> >
> > objections)? Mike Turquette acked the RFC version a while back, but it's
> >
> > changed a bit since then (including the new clk_get_num_parents() and
> >
> > clk_get_parent_by_index() -- I CCed Russell King on that but got no
> >
> > response), and got no response when I asked whether the ack was still good
> >
> > for v3.
> >
> >
>
> Done. The consumer APIs look ok too, but I'd like to see if
> Russell has any comments.
I've pinged Russell several times and gotten no response -- how should we
proceed?
-Scott
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
@ 2015-12-14 23:32 ` Scott Wood
0 siblings, 0 replies; 49+ messages in thread
From: Scott Wood @ 2015-12-14 23:32 UTC (permalink / raw)
To: Stephen Boyd
Cc: Zhiqiang Hou, linux-arm-kernel, catalin.marinas, will.deacon,
linux-i2c, linux-watchdog, linux-doc, linux-clk, mark.rutland,
Mingkai.Hu, Shaohui.Xie, bhupesh.sharma, leoli, wsa, wim, corbet,
mturquette, Wenbin.Song, Russell King
On Thu, 2015-10-15 at 12:54 -0700, Stephen Boyd wrote:
> On 10/14, Scott Wood wrote:
> > On Wed, 2015-10-14 at 11:31 -0700, Stephen Boyd wrote:
> > > On 10/14, Zhiqiang Hou wrote:
> > > > From: Hou Zhiqiang <B48286@freescale.com>
> > > >
> > > > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > > > ---
> > >
> > > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> > >
> >
> > Could you ack my clock patchset that this depends on (if there are no
> >
> > objections)? Mike Turquette acked the RFC version a while back, but it's
> >
> > changed a bit since then (including the new clk_get_num_parents() and
> >
> > clk_get_parent_by_index() -- I CCed Russell King on that but got no
> >
> > response), and got no response when I asked whether the ack was still good
> >
> > for v3.
> >
> >
>
> Done. The consumer APIs look ok too, but I'd like to see if
> Russell has any comments.
I've pinged Russell several times and gotten no response -- how should we
proceed?
-Scott
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 5/6] clk: qoriq: Add ls1043a support.
@ 2015-12-14 23:32 ` Scott Wood
0 siblings, 0 replies; 49+ messages in thread
From: Scott Wood @ 2015-12-14 23:32 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2015-10-15 at 12:54 -0700, Stephen Boyd wrote:
> On 10/14, Scott Wood wrote:
> > On Wed, 2015-10-14 at 11:31 -0700, Stephen Boyd wrote:
> > > On 10/14, Zhiqiang Hou wrote:
> > > > From: Hou Zhiqiang <B48286@freescale.com>
> > > >
> > > > Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> > > > ---
> > >
> > > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> > >
> >
> > Could you ack my clock patchset that this depends on (if there are no
> >
> > objections)? Mike Turquette acked the RFC version a while back, but it's
> >
> > changed a bit since then (including the new clk_get_num_parents() and
> >
> > clk_get_parent_by_index() -- I CCed Russell King on that but got no
> >
> > response), and got no response when I asked whether the ack was still good
> >
> > for v3.
> >
> >
>
> Done. The consumer APIs look ok too, but I'd like to see if
> Russell has any comments.
I've pinged Russell several times and gotten no response -- how should we
proceed?
-Scott
^ permalink raw reply [flat|nested] 49+ messages in thread
* RE: [PATCH V3 0/6] Add LS1043A SoC support
[not found] <BN3PR0301MB1249C8F2305C3ED1723055B6843F0@BN3PR0301MB1249.namprd03.prod.outlook.com>
2015-10-14 12:02 ` Hou Zhiqiang
@ 2015-10-14 12:02 ` Hou Zhiqiang
0 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-14 12:02 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Hu Vincent, Shaohui Xie, Scott Wood, Sharma Bhupesh, Li Leo, wsa,
wim, corbet, mturquette, sboyd, Wenbin Song
Hi all,
Sorry for my late response due to Chinese National Day holidays.
> From: Zhiqiang Hou [mailto:B48286@freescale.com]
> Sent: Wednesday, October 14, 2015 7:35 PM
> To: linux-arm-kernel@lists.infradead.org; catalin.marinas@arm.com;
> will.deacon@arm.com; linux-i2c@vger.kernel.org; linux-
> watchdog@vger.kernel.org; linux-doc@vger.kernel.org; linux-
> clk@vger.kernel.org; mark.rutland@arm.com
> Cc: Hu Mingkai-B21284; Xie Shaohui-B21989; Wood Scott-B07421; Sharma
> Bhupesh-B45370; Li Yang-Leo-R58472; wsa@the-dreams.de; wim@iguana.be;
> corbet@lwn.net; mturquette@baylibre.com; sboyd@codeaurora.org; Song
> Wenbin-B53747
> Subject: [PATCH V3 0/6] Add LS1043A SoC support
>
> This patchest adds support for Freescale's LS1043A SoC which is based on
> ARMv8 architecture.
>
> Some pending patches are depended on:
> 1. The LS1043A is belong to Freescale's ARMv8 Layerscape SoC family, so
> depends on the updating ARCH kconfig patch.
> https://patchwork.kernel.org/patch/7120101/
>
> 2. The LS1043A use the new clockgen binding updated by Scott Wood,
> depends on the patchset:
> https://patchwork.kernel.org/patch/7225421/
> https://patchwork.kernel.org/patch/7225461/
> https://patchwork.kernel.org/patch/7225431/
> https://patchwork.kernel.org/patch/7225441/
> https://patchwork.kernel.org/patch/7225451/
>
> [PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms
> [PATCH V3 2/6] watchdog: Add support for Freescale Layerscape [PATCH V3
> 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board [PATCH V3 4/6]
> arm64/ls1043a: add DTS for Freescale LS1043A SoC [PATCH V3 5/6] clk:
> qoriq: Add ls1043a support.
> [PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support
Thanks,
Zhiqiang
^ permalink raw reply [flat|nested] 49+ messages in thread
* RE: [PATCH V3 0/6] Add LS1043A SoC support
@ 2015-10-14 12:02 ` Hou Zhiqiang
0 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-14 12:02 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland
Cc: Hu Vincent, Shaohui Xie, Scott Wood, Sharma Bhupesh, Li Leo, wsa,
wim, corbet, mturquette, sboyd, Wenbin Song
Hi all,
Sorry for my late response due to Chinese National Day holidays.
> From: Zhiqiang Hou [mailto:B48286@freescale.com]
> Sent: Wednesday, October 14, 2015 7:35 PM
> To: linux-arm-kernel@lists.infradead.org; catalin.marinas@arm.com;
> will.deacon@arm.com; linux-i2c@vger.kernel.org; linux-
> watchdog@vger.kernel.org; linux-doc@vger.kernel.org; linux-
> clk@vger.kernel.org; mark.rutland@arm.com
> Cc: Hu Mingkai-B21284; Xie Shaohui-B21989; Wood Scott-B07421; Sharma
> Bhupesh-B45370; Li Yang-Leo-R58472; wsa@the-dreams.de; wim@iguana.be;
> corbet@lwn.net; mturquette@baylibre.com; sboyd@codeaurora.org; Song
> Wenbin-B53747
> Subject: [PATCH V3 0/6] Add LS1043A SoC support
>=20
> This patchest adds support for Freescale's LS1043A SoC which is based on
> ARMv8 architecture.
>=20
> Some pending patches are depended on:
> 1. The LS1043A is belong to Freescale's ARMv8 Layerscape SoC family, so
> depends on the updating ARCH kconfig patch.
> https://patchwork.kernel.org/patch/7120101/
>=20
> 2. The LS1043A use the new clockgen binding updated by Scott Wood,
> depends on the patchset:
> https://patchwork.kernel.org/patch/7225421/
> https://patchwork.kernel.org/patch/7225461/
> https://patchwork.kernel.org/patch/7225431/
> https://patchwork.kernel.org/patch/7225441/
> https://patchwork.kernel.org/patch/7225451/
>=20
> [PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms
> [PATCH V3 2/6] watchdog: Add support for Freescale Layerscape [PATCH V3
> 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board [PATCH V3 4/6]
> arm64/ls1043a: add DTS for Freescale LS1043A SoC [PATCH V3 5/6] clk:
> qoriq: Add ls1043a support.
> [PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support
Thanks,
Zhiqiang
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH V3 0/6] Add LS1043A SoC support
@ 2015-10-14 12:02 ` Hou Zhiqiang
0 siblings, 0 replies; 49+ messages in thread
From: Hou Zhiqiang @ 2015-10-14 12:02 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
Sorry for my late response due to Chinese National Day holidays.
> From: Zhiqiang Hou [mailto:B48286 at freescale.com]
> Sent: Wednesday, October 14, 2015 7:35 PM
> To: linux-arm-kernel at lists.infradead.org; catalin.marinas at arm.com;
> will.deacon at arm.com; linux-i2c at vger.kernel.org; linux-
> watchdog at vger.kernel.org; linux-doc at vger.kernel.org; linux-
> clk at vger.kernel.org; mark.rutland at arm.com
> Cc: Hu Mingkai-B21284; Xie Shaohui-B21989; Wood Scott-B07421; Sharma
> Bhupesh-B45370; Li Yang-Leo-R58472; wsa at the-dreams.de; wim at iguana.be;
> corbet at lwn.net; mturquette at baylibre.com; sboyd at codeaurora.org; Song
> Wenbin-B53747
> Subject: [PATCH V3 0/6] Add LS1043A SoC support
>
> This patchest adds support for Freescale's LS1043A SoC which is based on
> ARMv8 architecture.
>
> Some pending patches are depended on:
> 1. The LS1043A is belong to Freescale's ARMv8 Layerscape SoC family, so
> depends on the updating ARCH kconfig patch.
> https://patchwork.kernel.org/patch/7120101/
>
> 2. The LS1043A use the new clockgen binding updated by Scott Wood,
> depends on the patchset:
> https://patchwork.kernel.org/patch/7225421/
> https://patchwork.kernel.org/patch/7225461/
> https://patchwork.kernel.org/patch/7225431/
> https://patchwork.kernel.org/patch/7225441/
> https://patchwork.kernel.org/patch/7225451/
>
> [PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms
> [PATCH V3 2/6] watchdog: Add support for Freescale Layerscape [PATCH V3
> 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board [PATCH V3 4/6]
> arm64/ls1043a: add DTS for Freescale LS1043A SoC [PATCH V3 5/6] clk:
> qoriq: Add ls1043a support.
> [PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support
Thanks,
Zhiqiang
^ permalink raw reply [flat|nested] 49+ messages in thread
end of thread, other threads:[~2015-12-14 23:33 UTC | newest]
Thread overview: 49+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-10-14 11:34 [PATCH V3 0/6] Add LS1043A SoC support Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
[not found] ` <1444822498-16477-1-git-send-email-B48286-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2015-10-14 11:34 ` [PATCH V3 1/6] i2c: Add i2c support to Freescale Layerscape platforms Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 11:34 ` [PATCH V3 2/6] watchdog: Add support for " Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 14:06 ` Guenter Roeck
2015-10-14 14:06 ` Guenter Roeck
2015-10-14 11:34 ` [PATCH V3 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 11:34 ` [PATCH V3 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
[not found] ` <1444822498-16477-5-git-send-email-B48286-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2015-10-14 12:43 ` Mark Rutland
2015-10-14 12:43 ` Mark Rutland
2015-10-14 12:43 ` Mark Rutland
2015-10-15 3:32 ` Hou Zhiqiang
2015-10-15 3:32 ` Hou Zhiqiang
2015-10-15 3:32 ` Hou Zhiqiang
2015-10-15 3:56 ` Scott Wood
2015-10-15 3:56 ` Scott Wood
2015-10-15 3:56 ` Scott Wood
[not found] ` <1444881407.5185.232.camel-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2015-10-15 7:34 ` Hou Zhiqiang
2015-10-15 7:34 ` Hou Zhiqiang
2015-10-15 7:34 ` Hou Zhiqiang
2015-10-15 7:34 ` Hou Zhiqiang
2015-10-14 11:34 ` [PATCH V3 5/6] clk: qoriq: Add ls1043a support Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 18:31 ` Stephen Boyd
2015-10-14 18:31 ` Stephen Boyd
2015-10-15 0:57 ` Scott Wood
2015-10-15 0:57 ` Scott Wood
2015-10-15 0:57 ` Scott Wood
2015-10-15 19:54 ` Stephen Boyd
2015-10-15 19:54 ` Stephen Boyd
2015-12-14 23:32 ` Scott Wood
2015-12-14 23:32 ` Scott Wood
2015-12-14 23:32 ` Scott Wood
2015-10-14 11:34 ` [PATCH V3 6/6] dts/ls1043a: add LS1043ARDB board support Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
2015-10-14 11:34 ` Zhiqiang Hou
[not found] <BN3PR0301MB1249C8F2305C3ED1723055B6843F0@BN3PR0301MB1249.namprd03.prod.outlook.com>
2015-10-14 12:02 ` [PATCH V3 0/6] Add LS1043A SoC support Hou Zhiqiang
2015-10-14 12:02 ` Hou Zhiqiang
2015-10-14 12:02 ` Hou Zhiqiang
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