From: Zhiqiang Hou <Zhiqiang.Hou-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
scottwood-KZfg59tc24xl57MIdRCFDg@public.gmane.org,
galak-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org,
benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org,
paulus-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org,
mpe-Gsx/Oe8HsFggBc27wqDAHg@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
pawel.moll-5wv7dgnIgG8@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
harninder.rai-KZfg59tc24xl57MIdRCFDg@public.gmane.org
Cc: Minghuan.Lian-KZfg59tc24xl57MIdRCFDg@public.gmane.org,
Mingkai.Hu-KZfg59tc24xl57MIdRCFDg@public.gmane.org,
Hou Zhiqiang <B48286-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Subject: [PATCH V4 1/2] powerpc/fsl: Add PCI node in device tree of bsc9132qds
Date: Thu, 5 Nov 2015 11:15:59 +0800 [thread overview]
Message-ID: <1446693360-1578-1-git-send-email-Zhiqiang.Hou@freescale.com> (raw)
From: Harninder Rai <harninder.rai-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Signed-off-by: Harninder Rai <harninder.rai-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Signed-off-by: Minghuan Lian <Minghuan.Lian-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Signed-off-by: Hou Zhiqiang <B48286-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
V4: V3:
- Remove gerrit stuff.
V2:
- Remove property clock-frequency.
arch/powerpc/boot/dts/bsc9132qds.dts | 15 ++++++++++++++
arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi | 28 +++++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi | 1 +
3 files changed, 44 insertions(+)
diff --git a/arch/powerpc/boot/dts/bsc9132qds.dts b/arch/powerpc/boot/dts/bsc9132qds.dts
index 6cab106..940d719 100644
--- a/arch/powerpc/boot/dts/bsc9132qds.dts
+++ b/arch/powerpc/boot/dts/bsc9132qds.dts
@@ -29,6 +29,21 @@
soc: soc@ff700000 {
ranges = <0x0 0x0 0xff700000 0x100000>;
};
+
+ pci0: pcie@ff70a000 {
+ reg = <0 0xff70a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xc0010000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0x90000000
+ 0x2000000 0x0 0x90000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
};
/include/ "bsc9132qds.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
index c723071..b5f0715 100644
--- a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
@@ -40,6 +40,34 @@
interrupts = <16 2 0 0 20 2 0 0>;
};
+/* controller at 0xa000 */
+&pci0 {
+ compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0 255>;
+ interrupts = <16 2 0 0>;
+
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <16 2 0 0>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0x0 0x0 0x1 &mpic 0x0 0x2 0x0 0x0
+ 0000 0x0 0x0 0x2 &mpic 0x1 0x2 0x0 0x0
+ 0000 0x0 0x0 0x3 &mpic 0x2 0x2 0x0 0x0
+ 0000 0x0 0x0 0x4 &mpic 0x3 0x2 0x0 0x0
+ >;
+ };
+};
+
&soc {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi b/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
index 301a9db..90f7949 100644
--- a/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
@@ -45,6 +45,7 @@
serial0 = &serial0;
ethernet0 = &enet0;
ethernet1 = &enet1;
+ pci0 = &pci0;
};
cpus {
--
2.1.0.27.g96db324
--
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WARNING: multiple messages have this Message-ID (diff)
From: Zhiqiang Hou <Zhiqiang.Hou@freescale.com>
To: <linuxppc-dev@lists.ozlabs.org>, <scottwood@freescale.com>,
<galak@kernel.crashing.org>, <benh@kernel.crashing.org>,
<paulus@samba.org>, <mpe@ellerman.id.au>,
<devicetree@vger.kernel.org>, <robh+dt@kernel.org>,
<pawel.moll@arm.com>, <mark.rutland@arm.com>,
<ijc+devicetree@hellion.org.uk>, <harninder.rai@freescale.com>
Cc: <Minghuan.Lian@freescale.com>, <Mingkai.Hu@freescale.com>,
Hou Zhiqiang <B48286@freescale.com>
Subject: [PATCH V4 1/2] powerpc/fsl: Add PCI node in device tree of bsc9132qds
Date: Thu, 5 Nov 2015 11:15:59 +0800 [thread overview]
Message-ID: <1446693360-1578-1-git-send-email-Zhiqiang.Hou@freescale.com> (raw)
From: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V4: V3:
- Remove gerrit stuff.
V2:
- Remove property clock-frequency.
arch/powerpc/boot/dts/bsc9132qds.dts | 15 ++++++++++++++
arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi | 28 +++++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi | 1 +
3 files changed, 44 insertions(+)
diff --git a/arch/powerpc/boot/dts/bsc9132qds.dts b/arch/powerpc/boot/dts/bsc9132qds.dts
index 6cab106..940d719 100644
--- a/arch/powerpc/boot/dts/bsc9132qds.dts
+++ b/arch/powerpc/boot/dts/bsc9132qds.dts
@@ -29,6 +29,21 @@
soc: soc@ff700000 {
ranges = <0x0 0x0 0xff700000 0x100000>;
};
+
+ pci0: pcie@ff70a000 {
+ reg = <0 0xff70a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xc0010000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0x90000000
+ 0x2000000 0x0 0x90000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
};
/include/ "bsc9132qds.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
index c723071..b5f0715 100644
--- a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
@@ -40,6 +40,34 @@
interrupts = <16 2 0 0 20 2 0 0>;
};
+/* controller at 0xa000 */
+&pci0 {
+ compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0 255>;
+ interrupts = <16 2 0 0>;
+
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <16 2 0 0>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0x0 0x0 0x1 &mpic 0x0 0x2 0x0 0x0
+ 0000 0x0 0x0 0x2 &mpic 0x1 0x2 0x0 0x0
+ 0000 0x0 0x0 0x3 &mpic 0x2 0x2 0x0 0x0
+ 0000 0x0 0x0 0x4 &mpic 0x3 0x2 0x0 0x0
+ >;
+ };
+};
+
&soc {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi b/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
index 301a9db..90f7949 100644
--- a/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
@@ -45,6 +45,7 @@
serial0 = &serial0;
ethernet0 = &enet0;
ethernet1 = &enet1;
+ pci0 = &pci0;
};
cpus {
--
2.1.0.27.g96db324
next reply other threads:[~2015-11-05 3:15 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-05 3:15 Zhiqiang Hou [this message]
2015-11-05 3:15 ` [PATCH V4 1/2] powerpc/fsl: Add PCI node in device tree of bsc9132qds Zhiqiang Hou
[not found] ` <1446693360-1578-1-git-send-email-Zhiqiang.Hou-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2015-11-05 3:16 ` [PATCH V4 2/2] powerpc/85xx: Add PCIe controller support for bsc9132qds Zhiqiang Hou
2015-11-05 3:16 ` Zhiqiang Hou
2015-11-17 2:31 ` Hou Zhiqiang
2015-11-17 2:31 ` Hou Zhiqiang
[not found] ` <CY1PR0301MB07806A3A31D76967125054C28B1D0-YrwGdl+PljnwWZenWrSUgZwN6zqB+hSMnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2015-11-20 3:02 ` Scott Wood
2015-11-20 3:02 ` Scott Wood
2015-12-22 9:21 ` Zhiqiang Hou
2015-12-22 9:21 ` Zhiqiang Hou
2015-12-22 9:28 ` [PATCH V4 1/2] powerpc/fsl: Add PCI node in device tree of bsc9132qds Zhiqiang Hou
2015-12-22 9:28 ` Zhiqiang Hou
2016-01-27 6:47 ` Zhiqiang Hou
2016-01-27 6:47 ` Zhiqiang Hou
[not found] ` <HE1PR04MB09060D4FCE88CD7B3F1CBF9084D90-6LN7OEpIatWBkn9woE/rDM9NdZoXdze2vxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2016-01-27 14:23 ` Scott Wood
2016-01-27 14:23 ` Scott Wood
2016-01-29 11:26 ` Zhiqiang Hou
2016-01-29 11:26 ` Zhiqiang Hou
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