From: Zhiqiang Hou <Zhiqiang.Hou-KZfg59tc24xl57MIdRCFDg@public.gmane.org> To: linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, scottwood-KZfg59tc24xl57MIdRCFDg@public.gmane.org, galak-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org, benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org, paulus-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org, mpe-Gsx/Oe8HsFggBc27wqDAHg@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, harninder.rai-KZfg59tc24xl57MIdRCFDg@public.gmane.org Cc: Minghuan.Lian-KZfg59tc24xl57MIdRCFDg@public.gmane.org, Mingkai.Hu-KZfg59tc24xl57MIdRCFDg@public.gmane.org, Hou Zhiqiang <B48286-KZfg59tc24xl57MIdRCFDg@public.gmane.org> Subject: [PATCH V4 2/2] powerpc/85xx: Add PCIe controller support for bsc9132qds Date: Thu, 5 Nov 2015 11:16:00 +0800 [thread overview] Message-ID: <1446693360-1578-2-git-send-email-Zhiqiang.Hou@freescale.com> (raw) In-Reply-To: <1446693360-1578-1-git-send-email-Zhiqiang.Hou-KZfg59tc24xl57MIdRCFDg@public.gmane.org> From: Harninder Rai <harninder.rai-KZfg59tc24xl57MIdRCFDg@public.gmane.org> 1. Use machine_arch_initcall to hook mpc85xx_common_publish_devices This can ensure before pcibios_init() is called, pci controllers have been probed and added to the hose_list. 2. Add a workaround for errata A-005434 For the BSC9132, PEX_PEXIWARn[TRGT] for all windows defaults to 0xF, which is mapped to CCSRBAR. However, for other products, 0xF is mapped to the local memory. Therefore, for the BSC9132, any default PCI Express access to the local memory (DDR) will now access the CCSRBAR. This patch changes the mapping of targets of inbound windows PEX_PEXIWARn[TRGT] to the Local address space – 0x0 (from 0xF). Signed-off-by: Harninder Rai <harninder.rai-KZfg59tc24xl57MIdRCFDg@public.gmane.org> Signed-off-by: Minghuan Lian <Minghuan.Lian-KZfg59tc24xl57MIdRCFDg@public.gmane.org> Signed-off-by: Hou Zhiqiang <B48286-KZfg59tc24xl57MIdRCFDg@public.gmane.org> --- V4: V3: - Remove gerrit stuff. arch/powerpc/platforms/85xx/bsc913x_qds.c | 8 +++++++- arch/powerpc/sysdev/fsl_pci.c | 13 +++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/85xx/bsc913x_qds.c b/arch/powerpc/platforms/85xx/bsc913x_qds.c index f0927e5..dcfafd6 100644 --- a/arch/powerpc/platforms/85xx/bsc913x_qds.c +++ b/arch/powerpc/platforms/85xx/bsc913x_qds.c @@ -17,6 +17,7 @@ #include <linux/pci.h> #include <asm/mpic.h> #include <sysdev/fsl_soc.h> +#include <sysdev/fsl_pci.h> #include <asm/udbg.h> #include "mpc85xx.h" @@ -46,10 +47,12 @@ static void __init bsc913x_qds_setup_arch(void) mpc85xx_smp_init(); #endif + fsl_pci_assign_primary(); + pr_info("bsc913x board from Freescale Semiconductor\n"); } -machine_device_initcall(bsc9132_qds, mpc85xx_common_publish_devices); +machine_arch_initcall(bsc9132_qds, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened @@ -67,6 +70,9 @@ define_machine(bsc9132_qds) { .probe = bsc9132_qds_probe, .setup_arch = bsc913x_qds_setup_arch, .init_IRQ = bsc913x_qds_pic_init, +#ifdef CONFIG_PCI + .pcibios_fixup_bus = fsl_pcibios_fixup_bus, +#endif .get_irq = mpic_get_irq, .restart = fsl_rstcr_restart, .calibrate_decr = generic_calibrate_decr, diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index ebc1f412..b8607f6 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -193,6 +193,19 @@ static void setup_pci_atmu(struct pci_controller *hose) const u64 *reg; int len; + if (of_device_is_compatible(hose->dn, "fsl,bsc9132-pcie")) { + /* + * BSC9132 Rev1.0 has an issue where all the PEX inbound + * windows have implemented the default target value as 0xf + * for CCSR space.In all Freescale legacy devices the target + * of 0xf is reserved for local memory space. 9132 Rev1.0 + * now has local mempry space mapped to target 0x0 instead of + * 0xf. Hence adding a workaround to remove the target 0xf + * defined for memory space from Inbound window attributes. + */ + piwar &= ~PIWAR_TGI_LOCAL; + } + if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { if (in_be32(&pci->block_rev1) >= PCIE_IP_REV_2_2) { win_idx = 2; -- 2.1.0.27.g96db324 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Zhiqiang Hou <Zhiqiang.Hou@freescale.com> To: <linuxppc-dev@lists.ozlabs.org>, <scottwood@freescale.com>, <galak@kernel.crashing.org>, <benh@kernel.crashing.org>, <paulus@samba.org>, <mpe@ellerman.id.au>, <devicetree@vger.kernel.org>, <robh+dt@kernel.org>, <pawel.moll@arm.com>, <mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>, <harninder.rai@freescale.com> Cc: <Minghuan.Lian@freescale.com>, <Mingkai.Hu@freescale.com>, Hou Zhiqiang <B48286@freescale.com> Subject: [PATCH V4 2/2] powerpc/85xx: Add PCIe controller support for bsc9132qds Date: Thu, 5 Nov 2015 11:16:00 +0800 [thread overview] Message-ID: <1446693360-1578-2-git-send-email-Zhiqiang.Hou@freescale.com> (raw) In-Reply-To: <1446693360-1578-1-git-send-email-Zhiqiang.Hou@freescale.com> From: Harninder Rai <harninder.rai@freescale.com> 1. Use machine_arch_initcall to hook mpc85xx_common_publish_devices This can ensure before pcibios_init() is called, pci controllers have been probed and added to the hose_list. 2. Add a workaround for errata A-005434 For the BSC9132, PEX_PEXIWARn[TRGT] for all windows defaults to 0xF, which is mapped to CCSRBAR. However, for other products, 0xF is mapped to the local memory. Therefore, for the BSC9132, any default PCI Express access to the local memory (DDR) will now access the CCSRBAR. This patch changes the mapping of targets of inbound windows PEX_PEXIWARn[TRGT] to the Local address space – 0x0 (from 0xF). Signed-off-by: Harninder Rai <harninder.rai@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> --- V4: V3: - Remove gerrit stuff. arch/powerpc/platforms/85xx/bsc913x_qds.c | 8 +++++++- arch/powerpc/sysdev/fsl_pci.c | 13 +++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/85xx/bsc913x_qds.c b/arch/powerpc/platforms/85xx/bsc913x_qds.c index f0927e5..dcfafd6 100644 --- a/arch/powerpc/platforms/85xx/bsc913x_qds.c +++ b/arch/powerpc/platforms/85xx/bsc913x_qds.c @@ -17,6 +17,7 @@ #include <linux/pci.h> #include <asm/mpic.h> #include <sysdev/fsl_soc.h> +#include <sysdev/fsl_pci.h> #include <asm/udbg.h> #include "mpc85xx.h" @@ -46,10 +47,12 @@ static void __init bsc913x_qds_setup_arch(void) mpc85xx_smp_init(); #endif + fsl_pci_assign_primary(); + pr_info("bsc913x board from Freescale Semiconductor\n"); } -machine_device_initcall(bsc9132_qds, mpc85xx_common_publish_devices); +machine_arch_initcall(bsc9132_qds, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened @@ -67,6 +70,9 @@ define_machine(bsc9132_qds) { .probe = bsc9132_qds_probe, .setup_arch = bsc913x_qds_setup_arch, .init_IRQ = bsc913x_qds_pic_init, +#ifdef CONFIG_PCI + .pcibios_fixup_bus = fsl_pcibios_fixup_bus, +#endif .get_irq = mpic_get_irq, .restart = fsl_rstcr_restart, .calibrate_decr = generic_calibrate_decr, diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index ebc1f412..b8607f6 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -193,6 +193,19 @@ static void setup_pci_atmu(struct pci_controller *hose) const u64 *reg; int len; + if (of_device_is_compatible(hose->dn, "fsl,bsc9132-pcie")) { + /* + * BSC9132 Rev1.0 has an issue where all the PEX inbound + * windows have implemented the default target value as 0xf + * for CCSR space.In all Freescale legacy devices the target + * of 0xf is reserved for local memory space. 9132 Rev1.0 + * now has local mempry space mapped to target 0x0 instead of + * 0xf. Hence adding a workaround to remove the target 0xf + * defined for memory space from Inbound window attributes. + */ + piwar &= ~PIWAR_TGI_LOCAL; + } + if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { if (in_be32(&pci->block_rev1) >= PCIE_IP_REV_2_2) { win_idx = 2; -- 2.1.0.27.g96db324
next prev parent reply other threads:[~2015-11-05 3:16 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-11-05 3:15 [PATCH V4 1/2] powerpc/fsl: Add PCI node in device tree of bsc9132qds Zhiqiang Hou 2015-11-05 3:15 ` Zhiqiang Hou [not found] ` <1446693360-1578-1-git-send-email-Zhiqiang.Hou-KZfg59tc24xl57MIdRCFDg@public.gmane.org> 2015-11-05 3:16 ` Zhiqiang Hou [this message] 2015-11-05 3:16 ` [PATCH V4 2/2] powerpc/85xx: Add PCIe controller support for bsc9132qds Zhiqiang Hou 2015-11-17 2:31 ` Hou Zhiqiang 2015-11-17 2:31 ` Hou Zhiqiang [not found] ` <CY1PR0301MB07806A3A31D76967125054C28B1D0-YrwGdl+PljnwWZenWrSUgZwN6zqB+hSMnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org> 2015-11-20 3:02 ` Scott Wood 2015-11-20 3:02 ` Scott Wood 2015-12-22 9:21 ` Zhiqiang Hou 2015-12-22 9:21 ` Zhiqiang Hou 2015-12-22 9:28 ` [PATCH V4 1/2] powerpc/fsl: Add PCI node in device tree of bsc9132qds Zhiqiang Hou 2015-12-22 9:28 ` Zhiqiang Hou 2016-01-27 6:47 ` Zhiqiang Hou 2016-01-27 6:47 ` Zhiqiang Hou [not found] ` <HE1PR04MB09060D4FCE88CD7B3F1CBF9084D90-6LN7OEpIatWBkn9woE/rDM9NdZoXdze2vxpqHgZTriW3zl9H0oFU5g@public.gmane.org> 2016-01-27 14:23 ` Scott Wood 2016-01-27 14:23 ` Scott Wood 2016-01-29 11:26 ` Zhiqiang Hou 2016-01-29 11:26 ` Zhiqiang Hou
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