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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: gregkh@linuxfoundation.org, alexander.shishkin@linux.intel.com
Cc: zhang.chunyan@linaro.org, mike.leach@arm.com, tor@ti.com,
	al.grant@arm.com, pawel.moll@arm.com, fainelli@broadcom.com,
	linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Mathieu Poirier <mathieu.poirier@linaro.org>
Subject: [PATCH V5 03/26] coresight: etm3x: unlocking tracers in default arch init
Date: Sun, 29 Nov 2015 19:14:24 -0700	[thread overview]
Message-ID: <1448849687-5724-4-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1448849687-5724-1-git-send-email-mathieu.poirier@linaro.org>

Calling function 'smp_call_function_single()' to unlock a
tracer and calling it again right after to perform the
default initialisation doesn't make sense.

Moving 'etm_os_unlock()' just before making the default
initialisation results in the same outcome while saving
one call to 'smp_call_function_single()'.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm3x.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index 2a1950d0753d..737b6164f4a5 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -47,11 +47,11 @@ static struct etm_drvdata *etmdrvdata[NR_CPUS];
  * and OS lock must be unlocked before any memory mapped access on such
  * processors, otherwise memory mapped reads/writes will be invalid.
  */
-static void etm_os_unlock(void *info)
+static void etm_os_unlock(struct etm_drvdata *drvdata)
 {
-	struct etm_drvdata *drvdata = (struct etm_drvdata *)info;
 	/* Writing any value to ETMOSLAR unlocks the trace registers */
 	etm_writel(drvdata, 0x0, ETMOSLAR);
+	drvdata->os_unlock = true;
 	isb();
 }
 
@@ -478,6 +478,9 @@ static void etm_init_arch_data(void *info)
 	u32 etmccr;
 	struct etm_drvdata *drvdata = info;
 
+	/* Make sure all registers are accessible */
+	etm_os_unlock(drvdata);
+
 	CS_UNLOCK(drvdata->base);
 
 	/* First dummy read */
@@ -602,9 +605,6 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id)
 	get_online_cpus();
 	etmdrvdata[drvdata->cpu] = drvdata;
 
-	if (!smp_call_function_single(drvdata->cpu, etm_os_unlock, drvdata, 1))
-		drvdata->os_unlock = true;
-
 	if (smp_call_function_single(drvdata->cpu,
 				     etm_init_arch_data,  drvdata, 1))
 		dev_err(dev, "ETM arch init failed\n");
-- 
2.1.4


WARNING: multiple messages have this Message-ID (diff)
From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V5 03/26] coresight: etm3x: unlocking tracers in default arch init
Date: Sun, 29 Nov 2015 19:14:24 -0700	[thread overview]
Message-ID: <1448849687-5724-4-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1448849687-5724-1-git-send-email-mathieu.poirier@linaro.org>

Calling function 'smp_call_function_single()' to unlock a
tracer and calling it again right after to perform the
default initialisation doesn't make sense.

Moving 'etm_os_unlock()' just before making the default
initialisation results in the same outcome while saving
one call to 'smp_call_function_single()'.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm3x.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index 2a1950d0753d..737b6164f4a5 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -47,11 +47,11 @@ static struct etm_drvdata *etmdrvdata[NR_CPUS];
  * and OS lock must be unlocked before any memory mapped access on such
  * processors, otherwise memory mapped reads/writes will be invalid.
  */
-static void etm_os_unlock(void *info)
+static void etm_os_unlock(struct etm_drvdata *drvdata)
 {
-	struct etm_drvdata *drvdata = (struct etm_drvdata *)info;
 	/* Writing any value to ETMOSLAR unlocks the trace registers */
 	etm_writel(drvdata, 0x0, ETMOSLAR);
+	drvdata->os_unlock = true;
 	isb();
 }
 
@@ -478,6 +478,9 @@ static void etm_init_arch_data(void *info)
 	u32 etmccr;
 	struct etm_drvdata *drvdata = info;
 
+	/* Make sure all registers are accessible */
+	etm_os_unlock(drvdata);
+
 	CS_UNLOCK(drvdata->base);
 
 	/* First dummy read */
@@ -602,9 +605,6 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id)
 	get_online_cpus();
 	etmdrvdata[drvdata->cpu] = drvdata;
 
-	if (!smp_call_function_single(drvdata->cpu, etm_os_unlock, drvdata, 1))
-		drvdata->os_unlock = true;
-
 	if (smp_call_function_single(drvdata->cpu,
 				     etm_init_arch_data,  drvdata, 1))
 		dev_err(dev, "ETM arch init failed\n");
-- 
2.1.4

  parent reply	other threads:[~2015-11-30  2:16 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-30  2:14 [PATCH V5 00/26] Coresight integration with perf Mathieu Poirier
2015-11-30  2:14 ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 01/26] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 02/26] coresight: etm3x: moving sysFS entries to dedicated file Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` Mathieu Poirier [this message]
2015-11-30  2:14   ` [PATCH V5 03/26] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 04/26] coresight: etm3x: splitting struct etm_drvdata Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  6:54   ` kbuild test robot
2015-11-30  6:54     ` kbuild test robot
2015-11-30  2:14 ` [PATCH V5 05/26] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 06/26] coresight: associating path with session rather than tracer Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 07/26] coresight: moving PM runtime operations to core framework Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 08/26] coresight: etm3x: adding operation mode for etm_enable() Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 09/26] coresight: add API to get sink from path Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 10/26] coresight: etm3x: set progbit to stop trace collection Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 11/26] coresight: etm3x: changing default trace configuration Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 12/26] coresight: etm3x: consolidating initial config Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 13/26] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 14/26] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 15/26] coresight: etm3x: implementing perf_enable/disable() API Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 16/26] coresight: etb10: moving to local atomic operations Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 17/26] coresight: adding operation mode for sink->enable() Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 18/26] coresight: etb10: implementing AUX space API Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 19/26] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 20/26] perf: changing pmu::setup_aux() parameter to include event Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 21/26] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30 23:23   ` Alexander Shishkin
2015-11-30 23:23     ` Alexander Shishkin
2015-12-01 17:25     ` Mathieu Poirier
2015-12-01 17:25       ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 22/26] coresight: introducing a global trace ID function Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 23/26] perf tools: making function set_max_cpu_num() non static Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 24/26] perf tools: adding perf_session to *info_prive_size() Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30 16:15   ` Arnaldo Carvalho de Melo
2015-11-30 16:15     ` Arnaldo Carvalho de Melo
2015-11-30  2:14 ` [PATCH V5 25/26] perf tools: making coresight PMU listable Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 26/26] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier
2015-11-30  2:14   ` Mathieu Poirier

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