From: Marc Zyngier <marc.zyngier@arm.com> To: Christoffer Dall <christoffer.dall@linaro.org> Cc: kvm@vger.kernel.org, Ard Biesheuvel <ard.biesheuvel@linaro.org>, Catalin Marinas <catalin.marinas@arm.com>, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 14/22] arm64: KVM: Implement TLB handling Date: Mon, 7 Dec 2015 10:53:30 +0000 [thread overview] Message-ID: <1449485618-9443-15-git-send-email-marc.zyngier@arm.com> (raw) In-Reply-To: <1449485618-9443-1-git-send-email-marc.zyngier@arm.com> Implement the TLB handling as a direct translation of the assembly code version. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> --- arch/arm64/kvm/hyp/Makefile | 1 + arch/arm64/kvm/hyp/entry.S | 1 + arch/arm64/kvm/hyp/tlb.c | 73 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 75 insertions(+) create mode 100644 arch/arm64/kvm/hyp/tlb.c diff --git a/arch/arm64/kvm/hyp/Makefile b/arch/arm64/kvm/hyp/Makefile index 56238d0..1a529f5 100644 --- a/arch/arm64/kvm/hyp/Makefile +++ b/arch/arm64/kvm/hyp/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_KVM_ARM_HOST) += debug-sr.o obj-$(CONFIG_KVM_ARM_HOST) += entry.o obj-$(CONFIG_KVM_ARM_HOST) += switch.o obj-$(CONFIG_KVM_ARM_HOST) += fpsimd.o +obj-$(CONFIG_KVM_ARM_HOST) += tlb.o diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S index 852ac12..cae59e5 100644 --- a/arch/arm64/kvm/hyp/entry.S +++ b/arch/arm64/kvm/hyp/entry.S @@ -148,6 +148,7 @@ ENTRY(__fpsimd_guest_restore) add x0, x2, #CPU_GP_REG_OFFSET(CPU_FP_REGS) bl __fpsimd_restore_state + // Skip restoring fpexc32 for AArch64 guests mrs x1, hcr_el2 tbnz x1, #HCR_RW_SHIFT, 1f ldr x4, [x2, #CPU_SYSREG_OFFSET(FPEXC32_EL2)] diff --git a/arch/arm64/kvm/hyp/tlb.c b/arch/arm64/kvm/hyp/tlb.c new file mode 100644 index 0000000..6fcb93a --- /dev/null +++ b/arch/arm64/kvm/hyp/tlb.c @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2015 - ARM Ltd + * Author: Marc Zyngier <marc.zyngier@arm.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "hyp.h" + +void __hyp_text __tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) +{ + dsb(ishst); + + /* Switch to requested VMID */ + kvm = kern_hyp_va(kvm); + write_sysreg(kvm->arch.vttbr, vttbr_el2); + isb(); + + /* + * We could do so much better if we had the VA as well. + * Instead, we invalidate Stage-2 for this IPA, and the + * whole of Stage-1. Weep... + */ + ipa >>= 12; + asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa)); + + /* + * We have to ensure completion of the invalidation at Stage-2, + * since a table walk on another CPU could refill a TLB with a + * complete (S1 + S2) walk based on the old Stage-2 mapping if + * the Stage-1 invalidation happened first. + */ + dsb(ish); + asm volatile("tlbi vmalle1is" : : ); + dsb(ish); + isb(); + + write_sysreg(0, vttbr_el2); +} + +void __hyp_text __tlb_flush_vmid(struct kvm *kvm) +{ + dsb(ishst); + + /* Switch to requested VMID */ + kvm = kern_hyp_va(kvm); + write_sysreg(kvm->arch.vttbr, vttbr_el2); + isb(); + + asm volatile("tlbi vmalls12e1is" : : ); + dsb(ish); + isb(); + + write_sysreg(0, vttbr_el2); +} + +void __hyp_text __tlb_flush_vm_context(void) +{ + dsb(ishst); + asm volatile("tlbi alle1is \n" + "ic ialluis ": : ); + dsb(ish); +} -- 2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 14/22] arm64: KVM: Implement TLB handling Date: Mon, 7 Dec 2015 10:53:30 +0000 [thread overview] Message-ID: <1449485618-9443-15-git-send-email-marc.zyngier@arm.com> (raw) In-Reply-To: <1449485618-9443-1-git-send-email-marc.zyngier@arm.com> Implement the TLB handling as a direct translation of the assembly code version. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> --- arch/arm64/kvm/hyp/Makefile | 1 + arch/arm64/kvm/hyp/entry.S | 1 + arch/arm64/kvm/hyp/tlb.c | 73 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 75 insertions(+) create mode 100644 arch/arm64/kvm/hyp/tlb.c diff --git a/arch/arm64/kvm/hyp/Makefile b/arch/arm64/kvm/hyp/Makefile index 56238d0..1a529f5 100644 --- a/arch/arm64/kvm/hyp/Makefile +++ b/arch/arm64/kvm/hyp/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_KVM_ARM_HOST) += debug-sr.o obj-$(CONFIG_KVM_ARM_HOST) += entry.o obj-$(CONFIG_KVM_ARM_HOST) += switch.o obj-$(CONFIG_KVM_ARM_HOST) += fpsimd.o +obj-$(CONFIG_KVM_ARM_HOST) += tlb.o diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S index 852ac12..cae59e5 100644 --- a/arch/arm64/kvm/hyp/entry.S +++ b/arch/arm64/kvm/hyp/entry.S @@ -148,6 +148,7 @@ ENTRY(__fpsimd_guest_restore) add x0, x2, #CPU_GP_REG_OFFSET(CPU_FP_REGS) bl __fpsimd_restore_state + // Skip restoring fpexc32 for AArch64 guests mrs x1, hcr_el2 tbnz x1, #HCR_RW_SHIFT, 1f ldr x4, [x2, #CPU_SYSREG_OFFSET(FPEXC32_EL2)] diff --git a/arch/arm64/kvm/hyp/tlb.c b/arch/arm64/kvm/hyp/tlb.c new file mode 100644 index 0000000..6fcb93a --- /dev/null +++ b/arch/arm64/kvm/hyp/tlb.c @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2015 - ARM Ltd + * Author: Marc Zyngier <marc.zyngier@arm.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "hyp.h" + +void __hyp_text __tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) +{ + dsb(ishst); + + /* Switch to requested VMID */ + kvm = kern_hyp_va(kvm); + write_sysreg(kvm->arch.vttbr, vttbr_el2); + isb(); + + /* + * We could do so much better if we had the VA as well. + * Instead, we invalidate Stage-2 for this IPA, and the + * whole of Stage-1. Weep... + */ + ipa >>= 12; + asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa)); + + /* + * We have to ensure completion of the invalidation at Stage-2, + * since a table walk on another CPU could refill a TLB with a + * complete (S1 + S2) walk based on the old Stage-2 mapping if + * the Stage-1 invalidation happened first. + */ + dsb(ish); + asm volatile("tlbi vmalle1is" : : ); + dsb(ish); + isb(); + + write_sysreg(0, vttbr_el2); +} + +void __hyp_text __tlb_flush_vmid(struct kvm *kvm) +{ + dsb(ishst); + + /* Switch to requested VMID */ + kvm = kern_hyp_va(kvm); + write_sysreg(kvm->arch.vttbr, vttbr_el2); + isb(); + + asm volatile("tlbi vmalls12e1is" : : ); + dsb(ish); + isb(); + + write_sysreg(0, vttbr_el2); +} + +void __hyp_text __tlb_flush_vm_context(void) +{ + dsb(ishst); + asm volatile("tlbi alle1is \n" + "ic ialluis ": : ); + dsb(ish); +} -- 2.1.4
next prev parent reply other threads:[~2015-12-07 10:53 UTC|newest] Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-12-07 10:53 [PATCH v3 00/22] arm64: KVM: Rewriting the world switch in C Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 01/22] arm64: Add macros to read/write system registers Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 17:35 ` Catalin Marinas 2015-12-07 17:35 ` Catalin Marinas 2015-12-07 17:45 ` Mark Rutland 2015-12-07 17:45 ` Mark Rutland 2015-12-07 17:51 ` Marc Zyngier 2015-12-07 17:51 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 02/22] arm64: KVM: Add a HYP-specific header file Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 21:19 ` Christoffer Dall 2015-12-11 21:19 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 03/22] arm64: KVM: Implement vgic-v2 save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 20:55 ` Christoffer Dall 2015-12-11 20:55 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 04/22] KVM: arm/arm64: vgic-v3: Make the LR indexing macro public Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 20:57 ` Christoffer Dall 2015-12-11 20:57 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 05/22] arm64: KVM: Implement vgic-v3 save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 16:40 ` Mario Smarduch 2015-12-07 16:40 ` Mario Smarduch 2015-12-07 16:52 ` Marc Zyngier 2015-12-07 16:52 ` Marc Zyngier 2015-12-07 17:18 ` Mario Smarduch 2015-12-07 17:18 ` Mario Smarduch 2015-12-07 17:37 ` Marc Zyngier 2015-12-07 17:37 ` Marc Zyngier 2015-12-07 18:05 ` Mario Smarduch 2015-12-07 18:05 ` Mario Smarduch 2015-12-07 18:20 ` Marc Zyngier 2015-12-07 18:20 ` Marc Zyngier 2015-12-08 2:14 ` Mario Smarduch 2015-12-08 2:14 ` Mario Smarduch 2015-12-08 8:19 ` Marc Zyngier 2015-12-08 8:19 ` Marc Zyngier 2015-12-08 8:19 ` Marc Zyngier 2015-12-11 21:04 ` Christoffer Dall 2015-12-11 21:04 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 06/22] arm64: KVM: Implement timer save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-08 2:18 ` Mario Smarduch 2015-12-08 2:18 ` Mario Smarduch 2015-12-08 10:02 ` Marc Zyngier 2015-12-08 10:02 ` Marc Zyngier 2015-12-11 21:20 ` Christoffer Dall 2015-12-11 21:20 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 07/22] arm64: KVM: Implement system register save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 3:24 ` Mario Smarduch 2015-12-11 3:24 ` Mario Smarduch 2015-12-11 18:29 ` Marc Zyngier 2015-12-11 18:29 ` Marc Zyngier 2015-12-13 4:56 ` Mario Smarduch 2015-12-13 4:56 ` Mario Smarduch 2015-12-07 10:53 ` [PATCH v3 08/22] arm64: KVM: Implement 32bit " Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 09/22] arm64: KVM: Implement debug save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 10/22] arm64: KVM: Implement guest entry Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-14 11:06 ` Christoffer Dall 2015-12-14 11:06 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 11/22] arm64: KVM: Add patchable function selector Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 21:21 ` Christoffer Dall 2015-12-11 21:21 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 12/22] arm64: KVM: Implement the core world switch Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 13/22] arm64: KVM: Implement fpsimd save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier [this message] 2015-12-07 10:53 ` [PATCH v3 14/22] arm64: KVM: Implement TLB handling Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 15/22] arm64: KVM: HYP mode entry points Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 16/22] arm64: KVM: Add panic handling Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 17/22] arm64: KVM: Add compatibility aliases Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 18/22] arm64: KVM: Map the kernel RO section into HYP Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 19/22] arm64: KVM: Move away from the assembly version of the world switch Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 20/22] arm64: KVM: Turn system register numbers to an enum Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 21/22] arm64: KVM: Cleanup asm-offset.c Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 22/22] arm64: KVM: Remove weak attributes Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-14 11:07 ` Christoffer Dall 2015-12-14 11:07 ` Christoffer Dall
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