From: Mario Smarduch <m.smarduch@samsung.com> To: Marc Zyngier <marc.zyngier@arm.com>, Christoffer Dall <christoffer.dall@linaro.org> Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas <catalin.marinas@arm.com>, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Ard Biesheuvel <ard.biesheuvel@linaro.org> Subject: Re: [PATCH v3 05/22] arm64: KVM: Implement vgic-v3 save/restore Date: Mon, 07 Dec 2015 18:14:36 -0800 [thread overview] Message-ID: <56663D0C.1070500@samsung.com> (raw) In-Reply-To: <5665CDDF.3090201@arm.com> On 12/7/2015 10:20 AM, Marc Zyngier wrote: > On 07/12/15 18:05, Mario Smarduch wrote: >> >> >> On 12/7/2015 9:37 AM, Marc Zyngier wrote: [...] >>> >> >> I was thinking something like 'current_lr[VGIC_V3_LR_INDEX(...)]'. > > That doesn't change anything, the compiler is perfectly able to > optimize something like this: > > [...] > ffffffc0007f31ac: 38624862 ldrb w2, [x3,w2,uxtw] > ffffffc0007f31b0: 10000063 adr x3, ffffffc0007f31bc <__vgic_v3_save_state+0x64> > ffffffc0007f31b4: 8b228862 add x2, x3, w2, sxtb #2 > ffffffc0007f31b8: d61f0040 br x2 > ffffffc0007f31bc: d53ccde2 mrs x2, s3_4_c12_c13_7 > ffffffc0007f31c0: f9001c02 str x2, [x0,#56] > ffffffc0007f31c4: d53ccdc2 mrs x2, s3_4_c12_c13_6 > ffffffc0007f31c8: f9002002 str x2, [x0,#64] > ffffffc0007f31cc: d53ccda2 mrs x2, s3_4_c12_c13_5 > ffffffc0007f31d0: f9002402 str x2, [x0,#72] > ffffffc0007f31d4: d53ccd82 mrs x2, s3_4_c12_c13_4 > ffffffc0007f31d8: f9002802 str x2, [x0,#80] > ffffffc0007f31dc: d53ccd62 mrs x2, s3_4_c12_c13_3 > ffffffc0007f31e0: f9002c02 str x2, [x0,#88] > ffffffc0007f31e4: d53ccd42 mrs x2, s3_4_c12_c13_2 > ffffffc0007f31e8: f9003002 str x2, [x0,#96] > ffffffc0007f31ec: d53ccd22 mrs x2, s3_4_c12_c13_1 > ffffffc0007f31f0: f9003402 str x2, [x0,#104] > ffffffc0007f31f4: d53ccd02 mrs x2, s3_4_c12_c13_0 > ffffffc0007f31f8: f9003802 str x2, [x0,#112] > ffffffc0007f31fc: d53ccce2 mrs x2, s3_4_c12_c12_7 > ffffffc0007f3200: f9003c02 str x2, [x0,#120] > ffffffc0007f3204: d53cccc2 mrs x2, s3_4_c12_c12_6 > ffffffc0007f3208: f9004002 str x2, [x0,#128] > ffffffc0007f320c: d53ccca2 mrs x2, s3_4_c12_c12_5 > ffffffc0007f3210: f9004402 str x2, [x0,#136] > ffffffc0007f3214: d53ccc82 mrs x2, s3_4_c12_c12_4 > ffffffc0007f3218: f9004802 str x2, [x0,#144] > ffffffc0007f321c: d53ccc62 mrs x2, s3_4_c12_c12_3 > ffffffc0007f3220: f9004c02 str x2, [x0,#152] > ffffffc0007f3224: d53ccc42 mrs x2, s3_4_c12_c12_2 > ffffffc0007f3228: f9005002 str x2, [x0,#160] > ffffffc0007f322c: d53ccc22 mrs x2, s3_4_c12_c12_1 > ffffffc0007f3230: f9005402 str x2, [x0,#168] > ffffffc0007f3234: d53ccc02 mrs x2, s3_4_c12_c12_0 > ffffffc0007f3238: 7100183f cmp w1, #0x6 > ffffffc0007f323c: f9005802 str x2, [x0,#176] > > As you can see, this is as optimal as it gets, short of being able > to find a nice way to use more than one register... Interesting, thanks for the dump I'm no expert on pipeline optimizations but I'm wondering with these system register accesses can these be executed out of order provided you didn't have what I thinks are write after read dependencies? It's only 4 registers here, there are some other longer stretches in subsequent patches. I minor note here is some white space in this patch. > > Thanks, > > M. >
WARNING: multiple messages have this Message-ID (diff)
From: m.smarduch@samsung.com (Mario Smarduch) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 05/22] arm64: KVM: Implement vgic-v3 save/restore Date: Mon, 07 Dec 2015 18:14:36 -0800 [thread overview] Message-ID: <56663D0C.1070500@samsung.com> (raw) In-Reply-To: <5665CDDF.3090201@arm.com> On 12/7/2015 10:20 AM, Marc Zyngier wrote: > On 07/12/15 18:05, Mario Smarduch wrote: >> >> >> On 12/7/2015 9:37 AM, Marc Zyngier wrote: [...] >>> >> >> I was thinking something like 'current_lr[VGIC_V3_LR_INDEX(...)]'. > > That doesn't change anything, the compiler is perfectly able to > optimize something like this: > > [...] > ffffffc0007f31ac: 38624862 ldrb w2, [x3,w2,uxtw] > ffffffc0007f31b0: 10000063 adr x3, ffffffc0007f31bc <__vgic_v3_save_state+0x64> > ffffffc0007f31b4: 8b228862 add x2, x3, w2, sxtb #2 > ffffffc0007f31b8: d61f0040 br x2 > ffffffc0007f31bc: d53ccde2 mrs x2, s3_4_c12_c13_7 > ffffffc0007f31c0: f9001c02 str x2, [x0,#56] > ffffffc0007f31c4: d53ccdc2 mrs x2, s3_4_c12_c13_6 > ffffffc0007f31c8: f9002002 str x2, [x0,#64] > ffffffc0007f31cc: d53ccda2 mrs x2, s3_4_c12_c13_5 > ffffffc0007f31d0: f9002402 str x2, [x0,#72] > ffffffc0007f31d4: d53ccd82 mrs x2, s3_4_c12_c13_4 > ffffffc0007f31d8: f9002802 str x2, [x0,#80] > ffffffc0007f31dc: d53ccd62 mrs x2, s3_4_c12_c13_3 > ffffffc0007f31e0: f9002c02 str x2, [x0,#88] > ffffffc0007f31e4: d53ccd42 mrs x2, s3_4_c12_c13_2 > ffffffc0007f31e8: f9003002 str x2, [x0,#96] > ffffffc0007f31ec: d53ccd22 mrs x2, s3_4_c12_c13_1 > ffffffc0007f31f0: f9003402 str x2, [x0,#104] > ffffffc0007f31f4: d53ccd02 mrs x2, s3_4_c12_c13_0 > ffffffc0007f31f8: f9003802 str x2, [x0,#112] > ffffffc0007f31fc: d53ccce2 mrs x2, s3_4_c12_c12_7 > ffffffc0007f3200: f9003c02 str x2, [x0,#120] > ffffffc0007f3204: d53cccc2 mrs x2, s3_4_c12_c12_6 > ffffffc0007f3208: f9004002 str x2, [x0,#128] > ffffffc0007f320c: d53ccca2 mrs x2, s3_4_c12_c12_5 > ffffffc0007f3210: f9004402 str x2, [x0,#136] > ffffffc0007f3214: d53ccc82 mrs x2, s3_4_c12_c12_4 > ffffffc0007f3218: f9004802 str x2, [x0,#144] > ffffffc0007f321c: d53ccc62 mrs x2, s3_4_c12_c12_3 > ffffffc0007f3220: f9004c02 str x2, [x0,#152] > ffffffc0007f3224: d53ccc42 mrs x2, s3_4_c12_c12_2 > ffffffc0007f3228: f9005002 str x2, [x0,#160] > ffffffc0007f322c: d53ccc22 mrs x2, s3_4_c12_c12_1 > ffffffc0007f3230: f9005402 str x2, [x0,#168] > ffffffc0007f3234: d53ccc02 mrs x2, s3_4_c12_c12_0 > ffffffc0007f3238: 7100183f cmp w1, #0x6 > ffffffc0007f323c: f9005802 str x2, [x0,#176] > > As you can see, this is as optimal as it gets, short of being able > to find a nice way to use more than one register... Interesting, thanks for the dump I'm no expert on pipeline optimizations but I'm wondering with these system register accesses can these be executed out of order provided you didn't have what I thinks are write after read dependencies? It's only 4 registers here, there are some other longer stretches in subsequent patches. I minor note here is some white space in this patch. > > Thanks, > > M. >
next prev parent reply other threads:[~2015-12-08 2:14 UTC|newest] Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-12-07 10:53 [PATCH v3 00/22] arm64: KVM: Rewriting the world switch in C Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 01/22] arm64: Add macros to read/write system registers Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 17:35 ` Catalin Marinas 2015-12-07 17:35 ` Catalin Marinas 2015-12-07 17:45 ` Mark Rutland 2015-12-07 17:45 ` Mark Rutland 2015-12-07 17:51 ` Marc Zyngier 2015-12-07 17:51 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 02/22] arm64: KVM: Add a HYP-specific header file Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 21:19 ` Christoffer Dall 2015-12-11 21:19 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 03/22] arm64: KVM: Implement vgic-v2 save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 20:55 ` Christoffer Dall 2015-12-11 20:55 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 04/22] KVM: arm/arm64: vgic-v3: Make the LR indexing macro public Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 20:57 ` Christoffer Dall 2015-12-11 20:57 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 05/22] arm64: KVM: Implement vgic-v3 save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 16:40 ` Mario Smarduch 2015-12-07 16:40 ` Mario Smarduch 2015-12-07 16:52 ` Marc Zyngier 2015-12-07 16:52 ` Marc Zyngier 2015-12-07 17:18 ` Mario Smarduch 2015-12-07 17:18 ` Mario Smarduch 2015-12-07 17:37 ` Marc Zyngier 2015-12-07 17:37 ` Marc Zyngier 2015-12-07 18:05 ` Mario Smarduch 2015-12-07 18:05 ` Mario Smarduch 2015-12-07 18:20 ` Marc Zyngier 2015-12-07 18:20 ` Marc Zyngier 2015-12-08 2:14 ` Mario Smarduch [this message] 2015-12-08 2:14 ` Mario Smarduch 2015-12-08 8:19 ` Marc Zyngier 2015-12-08 8:19 ` Marc Zyngier 2015-12-08 8:19 ` Marc Zyngier 2015-12-11 21:04 ` Christoffer Dall 2015-12-11 21:04 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 06/22] arm64: KVM: Implement timer save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-08 2:18 ` Mario Smarduch 2015-12-08 2:18 ` Mario Smarduch 2015-12-08 10:02 ` Marc Zyngier 2015-12-08 10:02 ` Marc Zyngier 2015-12-11 21:20 ` Christoffer Dall 2015-12-11 21:20 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 07/22] arm64: KVM: Implement system register save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 3:24 ` Mario Smarduch 2015-12-11 3:24 ` Mario Smarduch 2015-12-11 18:29 ` Marc Zyngier 2015-12-11 18:29 ` Marc Zyngier 2015-12-13 4:56 ` Mario Smarduch 2015-12-13 4:56 ` Mario Smarduch 2015-12-07 10:53 ` [PATCH v3 08/22] arm64: KVM: Implement 32bit " Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 09/22] arm64: KVM: Implement debug save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 10/22] arm64: KVM: Implement guest entry Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-14 11:06 ` Christoffer Dall 2015-12-14 11:06 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 11/22] arm64: KVM: Add patchable function selector Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-11 21:21 ` Christoffer Dall 2015-12-11 21:21 ` Christoffer Dall 2015-12-07 10:53 ` [PATCH v3 12/22] arm64: KVM: Implement the core world switch Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 13/22] arm64: KVM: Implement fpsimd save/restore Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 14/22] arm64: KVM: Implement TLB handling Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 15/22] arm64: KVM: HYP mode entry points Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 16/22] arm64: KVM: Add panic handling Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 17/22] arm64: KVM: Add compatibility aliases Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 18/22] arm64: KVM: Map the kernel RO section into HYP Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 19/22] arm64: KVM: Move away from the assembly version of the world switch Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 20/22] arm64: KVM: Turn system register numbers to an enum Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 21/22] arm64: KVM: Cleanup asm-offset.c Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-07 10:53 ` [PATCH v3 22/22] arm64: KVM: Remove weak attributes Marc Zyngier 2015-12-07 10:53 ` Marc Zyngier 2015-12-14 11:07 ` Christoffer Dall 2015-12-14 11:07 ` Christoffer Dall
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