[Qemu-devel] [PULL 0/5] tcg queued patches

[Qemu-devel] [PULL 0/5] tcg queued patches

[Richard Henderson]

One clang fix and the improvments for sparc register windows.


r~



The following changes since commit a5af12871fd4601c44f08d9e49131e9ca13ef102:

  Merge remote-tracking branch 'remotes/sstabellini/tags/xen-2016-02-12' into staging (2016-02-12 17:36:12 +0000)

are available in the git repository at:

  git://github.com/rth7680/qemu.git tags/pull-tcg-20160215

for you to fetch changes up to dcf640230d5c4779c8b31a97ab130ac183b965a0:

  target-sparc: Use global registers for the register window (2016-02-15 22:27:08 +1100)

----------------------------------------------------------------
Clang fix and Sparc improvements

----------------------------------------------------------------
Richard Henderson (5):
      tcg: Work around clang bug wrt enum ranges, part 2
      tcg: Implement indirect memory registers
      tcg: Allocate indirect_base temporaries in a different order
      target-sparc: Tidy global register initialization
      target-sparc: Use global registers for the register window

 target-sparc/translate.c | 196 ++++++++++++++++++++++-------------------------
 tcg/tcg.c                | 138 +++++++++++++++++++++++----------
 tcg/tcg.h                |   2 +
 3 files changed, 192 insertions(+), 144 deletions(-)

[Qemu-devel] [PULL 1/5] tcg: Work around clang bug wrt enum ranges, part 2

[Richard Henderson]

A previous patch patch changed the type of REG from int
to enum TCGReg, which provokes the following bug in clang:

  https://llvm.org/bugs/show_bug.cgi?id=16154

Signed-off-by: Richard Henderson  <rth@twiddle.net>
---
 tcg/tcg.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tcg/tcg.c b/tcg/tcg.c
index 0317c9e..664e8e1 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1602,7 +1602,7 @@ static void dump_regs(TCGContext *s)
 
 static void check_regs(TCGContext *s)
 {
-    TCGReg reg;
+    int reg;
     int k;
     TCGTemp *ts;
     char buf[64];
-- 
2.5.0

[Qemu-devel] [PULL 2/5] tcg: Implement indirect memory registers

[Richard Henderson]

That is, global_mem registers whose base is another global_mem
register, rather than a fixed register.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/tcg.c | 95 ++++++++++++++++++++++++++++++++++++++++++++-------------------
 tcg/tcg.h |  2 ++
 2 files changed, 68 insertions(+), 29 deletions(-)

diff --git a/tcg/tcg.c b/tcg/tcg.c
index 664e8e1..ba2491f 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -506,17 +506,23 @@ int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
     TCGContext *s = &tcg_ctx;
     TCGTemp *base_ts = &s->temps[GET_TCGV_PTR(base)];
     TCGTemp *ts = tcg_global_alloc(s);
-    int bigendian = 0;
+    int indirect_reg = 0, bigendian = 0;
 #ifdef HOST_WORDS_BIGENDIAN
     bigendian = 1;
 #endif
 
+    if (!base_ts->fixed_reg) {
+        indirect_reg = 1;
+        base_ts->indirect_base = 1;
+    }
+
     if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
         TCGTemp *ts2 = tcg_global_alloc(s);
         char buf[64];
 
         ts->base_type = TCG_TYPE_I64;
         ts->type = TCG_TYPE_I32;
+        ts->indirect_reg = indirect_reg;
         ts->mem_allocated = 1;
         ts->mem_base = base_ts;
         ts->mem_offset = offset + bigendian * 4;
@@ -527,6 +533,7 @@ int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
         tcg_debug_assert(ts2 == ts + 1);
         ts2->base_type = TCG_TYPE_I64;
         ts2->type = TCG_TYPE_I32;
+        ts2->indirect_reg = indirect_reg;
         ts2->mem_allocated = 1;
         ts2->mem_base = base_ts;
         ts2->mem_offset = offset + (1 - bigendian) * 4;
@@ -536,6 +543,7 @@ int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
     } else {
         ts->base_type = type;
         ts->type = type;
+        ts->indirect_reg = indirect_reg;
         ts->mem_allocated = 1;
         ts->mem_base = base_ts;
         ts->mem_offset = offset;
@@ -1652,8 +1660,10 @@ static void temp_allocate_frame(TCGContext *s, int temp)
     s->current_frame_offset += sizeof(tcg_target_long);
 }
 
+static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet);
+
 /* sync register 'reg' by saving it to the corresponding temporary */
-static inline void tcg_reg_sync(TCGContext *s, TCGReg reg)
+static void tcg_reg_sync(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
 {
     TCGTemp *ts = s->reg_to_temp[reg];
 
@@ -1661,6 +1671,11 @@ static inline void tcg_reg_sync(TCGContext *s, TCGReg reg)
     if (!ts->mem_coherent && !ts->fixed_reg) {
         if (!ts->mem_allocated) {
             temp_allocate_frame(s, temp_idx(s, ts));
+        } else if (ts->indirect_reg) {
+            tcg_regset_set_reg(allocated_regs, ts->reg);
+            temp_load(s, ts->mem_base,
+                      tcg_target_available_regs[TCG_TYPE_PTR],
+                      allocated_regs);
         }
         tcg_out_st(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset);
     }
@@ -1668,25 +1683,26 @@ static inline void tcg_reg_sync(TCGContext *s, TCGReg reg)
 }
 
 /* free register 'reg' by spilling the corresponding temporary if necessary */
-static void tcg_reg_free(TCGContext *s, TCGReg reg)
+static void tcg_reg_free(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
 {
     TCGTemp *ts = s->reg_to_temp[reg];
 
     if (ts != NULL) {
-        tcg_reg_sync(s, reg);
+        tcg_reg_sync(s, reg, allocated_regs);
         ts->val_type = TEMP_VAL_MEM;
         s->reg_to_temp[reg] = NULL;
     }
 }
 
 /* Allocate a register belonging to reg1 & ~reg2 */
-static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
+static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet desired_regs,
+                            TCGRegSet allocated_regs)
 {
     int i;
     TCGReg reg;
     TCGRegSet reg_ct;
 
-    tcg_regset_andnot(reg_ct, reg1, reg2);
+    tcg_regset_andnot(reg_ct, desired_regs, allocated_regs);
 
     /* first try free registers */
     for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
@@ -1699,7 +1715,7 @@ static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
     for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
         reg = tcg_target_reg_alloc_order[i];
         if (tcg_regset_test_reg(reg_ct, reg)) {
-            tcg_reg_free(s, reg);
+            tcg_reg_free(s, reg, allocated_regs);
             return reg;
         }
     }
@@ -1724,6 +1740,12 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
         break;
     case TEMP_VAL_MEM:
         reg = tcg_reg_alloc(s, desired_regs, allocated_regs);
+        if (ts->indirect_reg) {
+            tcg_regset_set_reg(allocated_regs, reg);
+            temp_load(s, ts->mem_base,
+                      tcg_target_available_regs[TCG_TYPE_PTR],
+                      allocated_regs);
+        }
         tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset);
         ts->mem_coherent = 1;
         break;
@@ -1761,7 +1783,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs)
         temp_load(s, ts, tcg_target_available_regs[ts->type], allocated_regs);
         /* fallthrough */
     case TEMP_VAL_REG:
-        tcg_reg_sync(s, ts->reg);
+        tcg_reg_sync(s, ts->reg, allocated_regs);
         break;
     case TEMP_VAL_DEAD:
     case TEMP_VAL_MEM:
@@ -1777,13 +1799,16 @@ static inline void temp_save(TCGContext *s, TCGTemp *ts,
                              TCGRegSet allocated_regs)
 {
 #ifdef USE_LIVENESS_ANALYSIS
-    /* The liveness analysis already ensures that globals are back
-       in memory. Keep an assert for safety. */
-    tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg);
-#else
+    /* ??? Liveness does not yet incorporate indirect bases.  */
+    if (!ts->indirect_base) {
+        /* The liveness analysis already ensures that globals are back
+           in memory. Keep an assert for safety. */
+        tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg);
+        return;
+    }
+#endif
     temp_sync(s, ts, allocated_regs);
     temp_dead(s, ts);
-#endif
 }
 
 /* save globals to their canonical location and assume they can be
@@ -1808,12 +1833,15 @@ static void sync_globals(TCGContext *s, TCGRegSet allocated_regs)
     for (i = 0; i < s->nb_globals; i++) {
         TCGTemp *ts = &s->temps[i];
 #ifdef USE_LIVENESS_ANALYSIS
-        tcg_debug_assert(ts->val_type != TEMP_VAL_REG
-                         || ts->fixed_reg
-                         || ts->mem_coherent);
-#else
-        temp_sync(s, ts, allocated_regs);
+        /* ??? Liveness does not yet incorporate indirect bases.  */
+        if (!ts->indirect_base) {
+            tcg_debug_assert(ts->val_type != TEMP_VAL_REG
+                             || ts->fixed_reg
+                             || ts->mem_coherent);
+            continue;
+        }
 #endif
+        temp_sync(s, ts, allocated_regs);
     }
 }
 
@@ -1829,12 +1857,15 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
             temp_save(s, ts, allocated_regs);
         } else {
 #ifdef USE_LIVENESS_ANALYSIS
-            /* The liveness analysis already ensures that temps are dead.
-               Keep an assert for safety. */
-            assert(ts->val_type == TEMP_VAL_DEAD);
-#else
-            temp_dead(s, ts);
+            /* ??? Liveness does not yet incorporate indirect bases.  */
+            if (!ts->indirect_base) {
+                /* The liveness analysis already ensures that temps are dead.
+                   Keep an assert for safety. */
+                assert(ts->val_type == TEMP_VAL_DEAD);
+                continue;
+            }
 #endif
+            temp_dead(s, ts);
         }
     }
 
@@ -1907,6 +1938,12 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
         if (!ots->mem_allocated) {
             temp_allocate_frame(s, args[0]);
         }
+        if (ots->indirect_reg) {
+            tcg_regset_set_reg(allocated_regs, ts->reg);
+            temp_load(s, ots->mem_base,
+                      tcg_target_available_regs[TCG_TYPE_PTR],
+                      allocated_regs);
+        }
         tcg_out_st(s, otype, ts->reg, ots->mem_base->reg, ots->mem_offset);
         if (IS_DEAD_ARG(1)) {
             temp_dead(s, ts);
@@ -1947,7 +1984,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
         ots->mem_coherent = 0;
         s->reg_to_temp[ots->reg] = ots;
         if (NEED_SYNC_ARG(0)) {
-            tcg_reg_sync(s, ots->reg);
+            tcg_reg_sync(s, ots->reg, allocated_regs);
         }
     }
 }
@@ -2047,7 +2084,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
             /* XXX: permit generic clobber register list ? */ 
             for (i = 0; i < TCG_TARGET_NB_REGS; i++) {
                 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, i)) {
-                    tcg_reg_free(s, i);
+                    tcg_reg_free(s, i, allocated_regs);
                 }
             }
         }
@@ -2104,7 +2141,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
             tcg_out_mov(s, ts->type, ts->reg, reg);
         }
         if (NEED_SYNC_ARG(i)) {
-            tcg_reg_sync(s, reg);
+            tcg_reg_sync(s, reg, allocated_regs);
         }
         if (IS_DEAD_ARG(i)) {
             temp_dead(s, ts);
@@ -2175,7 +2212,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
         if (arg != TCG_CALL_DUMMY_ARG) {
             ts = &s->temps[arg];
             reg = tcg_target_call_iarg_regs[i];
-            tcg_reg_free(s, reg);
+            tcg_reg_free(s, reg, allocated_regs);
 
             if (ts->val_type == TEMP_VAL_REG) {
                 if (ts->reg != reg) {
@@ -2203,7 +2240,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
     /* clobber call registers */
     for (i = 0; i < TCG_TARGET_NB_REGS; i++) {
         if (tcg_regset_test_reg(tcg_target_call_clobber_regs, i)) {
-            tcg_reg_free(s, i);
+            tcg_reg_free(s, i, allocated_regs);
         }
     }
 
@@ -2239,7 +2276,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
             ts->mem_coherent = 0;
             s->reg_to_temp[reg] = ts;
             if (NEED_SYNC_ARG(i)) {
-                tcg_reg_sync(s, reg);
+                tcg_reg_sync(s, reg, allocated_regs);
             }
             if (IS_DEAD_ARG(i)) {
                 temp_dead(s, ts);
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 83da5fb..d181694 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -453,6 +453,8 @@ typedef struct TCGTemp {
     TCGType base_type:8;
     TCGType type:8;
     unsigned int fixed_reg:1;
+    unsigned int indirect_reg:1;
+    unsigned int indirect_base:1;
     unsigned int mem_coherent:1;
     unsigned int mem_allocated:1;
     unsigned int temp_local:1; /* If true, the temp is saved across
-- 
2.5.0

[Qemu-devel] [PULL 3/5] tcg: Allocate indirect_base temporaries in a different order

[Richard Henderson]

Since we've not got liveness analysis for indirect bases,
placing them at the end of the call-saved registers makes
it more likely that it'll stay live.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/tcg.c | 43 ++++++++++++++++++++++++++++++++-----------
 1 file changed, 32 insertions(+), 11 deletions(-)

diff --git a/tcg/tcg.c b/tcg/tcg.c
index ba2491f..86208a8 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -318,6 +318,8 @@ static const TCGHelperInfo all_helpers[] = {
 #include "exec/helper-tcg.h"
 };
 
+static int indirect_reg_alloc_order[ARRAY_SIZE(tcg_target_reg_alloc_order)];
+
 void tcg_context_init(TCGContext *s)
 {
     int op, total_args, n, i;
@@ -360,6 +362,21 @@ void tcg_context_init(TCGContext *s)
     }
 
     tcg_target_init(s);
+
+    /* Reverse the order of the saved registers, assuming they're all at
+       the start of tcg_target_reg_alloc_order.  */
+    for (n = 0; n < ARRAY_SIZE(tcg_target_reg_alloc_order); ++n) {
+        int r = tcg_target_reg_alloc_order[n];
+        if (tcg_regset_test_reg(tcg_target_call_clobber_regs, r)) {
+            break;
+        }
+    }
+    for (i = 0; i < n; ++i) {
+        indirect_reg_alloc_order[i] = tcg_target_reg_alloc_order[n - 1 - i];
+    }
+    for (; i < ARRAY_SIZE(tcg_target_reg_alloc_order); ++i) {
+        indirect_reg_alloc_order[i] = tcg_target_reg_alloc_order[i];
+    }
 }
 
 void tcg_prologue_init(TCGContext *s)
@@ -1696,24 +1713,26 @@ static void tcg_reg_free(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
 
 /* Allocate a register belonging to reg1 & ~reg2 */
 static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet desired_regs,
-                            TCGRegSet allocated_regs)
+                            TCGRegSet allocated_regs, bool rev)
 {
-    int i;
+    int i, n = ARRAY_SIZE(tcg_target_reg_alloc_order);
+    const int *order;
     TCGReg reg;
     TCGRegSet reg_ct;
 
     tcg_regset_andnot(reg_ct, desired_regs, allocated_regs);
+    order = rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order;
 
     /* first try free registers */
-    for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
-        reg = tcg_target_reg_alloc_order[i];
+    for(i = 0; i < n; i++) {
+        reg = order[i];
         if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == NULL)
             return reg;
     }
 
     /* XXX: do better spill choice */
-    for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
-        reg = tcg_target_reg_alloc_order[i];
+    for(i = 0; i < n; i++) {
+        reg = order[i];
         if (tcg_regset_test_reg(reg_ct, reg)) {
             tcg_reg_free(s, reg, allocated_regs);
             return reg;
@@ -1734,12 +1753,12 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
     case TEMP_VAL_REG:
         return;
     case TEMP_VAL_CONST:
-        reg = tcg_reg_alloc(s, desired_regs, allocated_regs);
+        reg = tcg_reg_alloc(s, desired_regs, allocated_regs, ts->indirect_base);
         tcg_out_movi(s, ts->type, reg, ts->val);
         ts->mem_coherent = 0;
         break;
     case TEMP_VAL_MEM:
-        reg = tcg_reg_alloc(s, desired_regs, allocated_regs);
+        reg = tcg_reg_alloc(s, desired_regs, allocated_regs, ts->indirect_base);
         if (ts->indirect_reg) {
             tcg_regset_set_reg(allocated_regs, reg);
             temp_load(s, ts->mem_base,
@@ -1976,7 +1995,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
                    input one. */
                 tcg_regset_set_reg(allocated_regs, ts->reg);
                 ots->reg = tcg_reg_alloc(s, tcg_target_available_regs[otype],
-                                         allocated_regs);
+                                         allocated_regs, ots->indirect_base);
             }
             tcg_out_mov(s, otype, ots->reg, ts->reg);
         }
@@ -2061,7 +2080,8 @@ static void tcg_reg_alloc_op(TCGContext *s,
         allocate_in_reg:
             /* allocate a new register matching the constraint 
                and move the temporary register into it */
-            reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
+            reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs,
+                                ts->indirect_base);
             tcg_out_mov(s, ts->type, reg, ts->reg);
         }
         new_args[i] = reg;
@@ -2110,7 +2130,8 @@ static void tcg_reg_alloc_op(TCGContext *s,
                     tcg_regset_test_reg(arg_ct->u.regs, reg)) {
                     goto oarg_end;
                 }
-                reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
+                reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs,
+                                    ts->indirect_base);
             }
             tcg_regset_set_reg(allocated_regs, reg);
             /* if a fixed register is used, then a move will be done afterwards */
-- 
2.5.0

[Qemu-devel] [PULL 4/5] target-sparc: Tidy global register initialization

[Richard Henderson]

Create tables for the various global registers that need allocation.
Remove one level of indirection from  gregnames and fregnames.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-sparc/translate.c | 157 +++++++++++++++++++++--------------------------
 1 file changed, 70 insertions(+), 87 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 536c4b5..4be56dd 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5329,106 +5329,89 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
 
 void gen_intermediate_code_init(CPUSPARCState *env)
 {
-    unsigned int i;
     static int inited;
-    static const char * const gregnames[8] = {
-        NULL, // g0 not used
-        "g1",
-        "g2",
-        "g3",
-        "g4",
-        "g5",
-        "g6",
-        "g7",
+    static const char gregnames[8][4] = {
+        "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
     };
-    static const char * const fregnames[32] = {
+    static const char fregnames[32][4] = {
         "f0", "f2", "f4", "f6", "f8", "f10", "f12", "f14",
         "f16", "f18", "f20", "f22", "f24", "f26", "f28", "f30",
         "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
         "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
     };
 
-    /* init various static tables */
-    if (!inited) {
-        inited = 1;
-
-        cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
-        cpu_regwptr = tcg_global_mem_new_ptr(cpu_env,
-                                             offsetof(CPUSPARCState, regwptr),
-                                             "regwptr");
+    static const struct { TCGv_i32 *ptr; int off; const char *name; } r32[] = {
 #ifdef TARGET_SPARC64
-        cpu_xcc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, xcc),
-                                         "xcc");
-        cpu_asi = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, asi),
-                                         "asi");
-        cpu_fprs = tcg_global_mem_new_i32(cpu_env,
-                                          offsetof(CPUSPARCState, fprs),
-                                          "fprs");
-        cpu_gsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, gsr),
-                                     "gsr");
-        cpu_tick_cmpr = tcg_global_mem_new(cpu_env,
-                                           offsetof(CPUSPARCState, tick_cmpr),
-                                           "tick_cmpr");
-        cpu_stick_cmpr = tcg_global_mem_new(cpu_env,
-                                            offsetof(CPUSPARCState, stick_cmpr),
-                                            "stick_cmpr");
-        cpu_hstick_cmpr = tcg_global_mem_new(cpu_env,
-                                             offsetof(CPUSPARCState, hstick_cmpr),
-                                             "hstick_cmpr");
-        cpu_hintp = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hintp),
-                                       "hintp");
-        cpu_htba = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, htba),
-                                      "htba");
-        cpu_hver = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hver),
-                                      "hver");
-        cpu_ssr = tcg_global_mem_new(cpu_env,
-                                     offsetof(CPUSPARCState, ssr), "ssr");
-        cpu_ver = tcg_global_mem_new(cpu_env,
-                                     offsetof(CPUSPARCState, version), "ver");
-        cpu_softint = tcg_global_mem_new_i32(cpu_env,
-                                             offsetof(CPUSPARCState, softint),
-                                             "softint");
+        { &cpu_xcc, offsetof(CPUSPARCState, xcc), "xcc" },
+        { &cpu_asi, offsetof(CPUSPARCState, asi), "asi" },
+        { &cpu_fprs, offsetof(CPUSPARCState, fprs), "fprs" },
+        { &cpu_softint, offsetof(CPUSPARCState, softint), "softint" },
 #else
-        cpu_wim = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, wim),
-                                     "wim");
+        { &cpu_wim, offsetof(CPUSPARCState, wim), "wim" },
+#endif
+        { &cpu_cc_op, offsetof(CPUSPARCState, cc_op), "cc_op" },
+        { &cpu_psr, offsetof(CPUSPARCState, psr), "psr" },
+    };
+
+    static const struct { TCGv *ptr; int off; const char *name; } rtl[] = {
+#ifdef TARGET_SPARC64
+        { &cpu_gsr, offsetof(CPUSPARCState, gsr), "gsr" },
+        { &cpu_tick_cmpr, offsetof(CPUSPARCState, tick_cmpr), "tick_cmpr" },
+        { &cpu_stick_cmpr, offsetof(CPUSPARCState, stick_cmpr), "stick_cmpr" },
+        { &cpu_hstick_cmpr, offsetof(CPUSPARCState, hstick_cmpr),
+          "hstick_cmpr" },
+        { &cpu_hintp, offsetof(CPUSPARCState, hintp), "hintp" },
+        { &cpu_htba, offsetof(CPUSPARCState, htba), "htba" },
+        { &cpu_hver, offsetof(CPUSPARCState, hver), "hver" },
+        { &cpu_ssr, offsetof(CPUSPARCState, ssr), "ssr" },
+        { &cpu_ver, offsetof(CPUSPARCState, version), "ver" },
 #endif
-        cpu_cond = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, cond),
-                                      "cond");
-        cpu_cc_src = tcg_global_mem_new(cpu_env,
-                                        offsetof(CPUSPARCState, cc_src),
-                                        "cc_src");
-        cpu_cc_src2 = tcg_global_mem_new(cpu_env,
-                                         offsetof(CPUSPARCState, cc_src2),
-                                         "cc_src2");
-        cpu_cc_dst = tcg_global_mem_new(cpu_env,
-                                        offsetof(CPUSPARCState, cc_dst),
-                                        "cc_dst");
-        cpu_cc_op = tcg_global_mem_new_i32(cpu_env,
-                                           offsetof(CPUSPARCState, cc_op),
-                                           "cc_op");
-        cpu_psr = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, psr),
-                                         "psr");
-        cpu_fsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, fsr),
-                                     "fsr");
-        cpu_pc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, pc),
-                                    "pc");
-        cpu_npc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, npc),
-                                     "npc");
-        cpu_y = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, y), "y");
+        { &cpu_cond, offsetof(CPUSPARCState, cond), "cond" },
+        { &cpu_cc_src, offsetof(CPUSPARCState, cc_src), "cc_src" },
+        { &cpu_cc_src2, offsetof(CPUSPARCState, cc_src2), "cc_src2" },
+        { &cpu_cc_dst, offsetof(CPUSPARCState, cc_dst), "cc_dst" },
+        { &cpu_fsr, offsetof(CPUSPARCState, fsr), "fsr" },
+        { &cpu_pc, offsetof(CPUSPARCState, pc), "pc" },
+        { &cpu_npc, offsetof(CPUSPARCState, npc), "npc" },
+        { &cpu_y, offsetof(CPUSPARCState, y), "y" },
 #ifndef CONFIG_USER_ONLY
-        cpu_tbr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, tbr),
-                                     "tbr");
+        { &cpu_tbr, offsetof(CPUSPARCState, tbr), "tbr" },
 #endif
-        for (i = 1; i < 8; i++) {
-            cpu_gregs[i] = tcg_global_mem_new(cpu_env,
-                                              offsetof(CPUSPARCState, gregs[i]),
-                                              gregnames[i]);
-        }
-        for (i = 0; i < TARGET_DPREGS; i++) {
-            cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env,
-                                                offsetof(CPUSPARCState, fpr[i]),
-                                                fregnames[i]);
-        }
+    };
+
+    unsigned int i;
+
+    /* init various static tables */
+    if (inited) {
+        return;
+    }
+    inited = 1;
+
+    cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+
+    cpu_regwptr = tcg_global_mem_new_ptr(cpu_env,
+                                         offsetof(CPUSPARCState, regwptr),
+                                         "regwptr");
+
+    for (i = 0; i < ARRAY_SIZE(r32); ++i) {
+        *r32[i].ptr = tcg_global_mem_new_i32(cpu_env, r32[i].off, r32[i].name);
+    }
+
+    for (i = 0; i < ARRAY_SIZE(rtl); ++i) {
+        *rtl[i].ptr = tcg_global_mem_new(cpu_env, rtl[i].off, rtl[i].name);
+    }
+
+    TCGV_UNUSED(cpu_gregs[0]);
+    for (i = 1; i < 8; ++i) {
+        cpu_gregs[i] = tcg_global_mem_new(cpu_env,
+                                          offsetof(CPUSPARCState, gregs[i]),
+                                          gregnames[i]);
+    }
+
+    for (i = 0; i < TARGET_DPREGS; i++) {
+        cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env,
+                                            offsetof(CPUSPARCState, fpr[i]),
+                                            fregnames[i]);
     }
 }
 
-- 
2.5.0

[Qemu-devel] [PULL 5/5] target-sparc: Use global registers for the register window

[Richard Henderson]

Via indirection off cpu_regwptr.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-sparc/translate.c | 49 ++++++++++++++++++++++++++----------------------
 1 file changed, 27 insertions(+), 22 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 4be56dd..66008f7 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -43,7 +43,8 @@ static TCGv_ptr cpu_env, cpu_regwptr;
 static TCGv cpu_cc_src, cpu_cc_src2, cpu_cc_dst;
 static TCGv_i32 cpu_cc_op;
 static TCGv_i32 cpu_psr;
-static TCGv cpu_fsr, cpu_pc, cpu_npc, cpu_gregs[8];
+static TCGv cpu_fsr, cpu_pc, cpu_npc;
+static TCGv cpu_regs[32];
 static TCGv cpu_y;
 #ifndef CONFIG_USER_ONLY
 static TCGv cpu_tbr;
@@ -273,36 +274,31 @@ static inline void gen_address_mask(DisasContext *dc, TCGv addr)
 
 static inline TCGv gen_load_gpr(DisasContext *dc, int reg)
 {
-    if (reg == 0 || reg >= 8) {
+    if (reg > 0) {
+        assert(reg < 32);
+        return cpu_regs[reg];
+    } else {
         TCGv t = get_temp_tl(dc);
-        if (reg == 0) {
-            tcg_gen_movi_tl(t, 0);
-        } else {
-            tcg_gen_ld_tl(t, cpu_regwptr, (reg - 8) * sizeof(target_ulong));
-        }
+        tcg_gen_movi_tl(t, 0);
         return t;
-    } else {
-        return cpu_gregs[reg];
     }
 }
 
 static inline void gen_store_gpr(DisasContext *dc, int reg, TCGv v)
 {
     if (reg > 0) {
-        if (reg < 8) {
-            tcg_gen_mov_tl(cpu_gregs[reg], v);
-        } else {
-            tcg_gen_st_tl(v, cpu_regwptr, (reg - 8) * sizeof(target_ulong));
-        }
+        assert(reg < 32);
+        tcg_gen_mov_tl(cpu_regs[reg], v);
     }
 }
 
 static inline TCGv gen_dest_gpr(DisasContext *dc, int reg)
 {
-    if (reg == 0 || reg >= 8) {
-        return get_temp_tl(dc);
+    if (reg > 0) {
+        assert(reg < 32);
+        return cpu_regs[reg];
     } else {
-        return cpu_gregs[reg];
+        return get_temp_tl(dc);
     }
 }
 
@@ -5330,8 +5326,11 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
 void gen_intermediate_code_init(CPUSPARCState *env)
 {
     static int inited;
-    static const char gregnames[8][4] = {
+    static const char gregnames[32][4] = {
         "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
+        "o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7",
+        "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
+        "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7",
     };
     static const char fregnames[32][4] = {
         "f0", "f2", "f4", "f6", "f8", "f10", "f12", "f14",
@@ -5401,11 +5400,17 @@ void gen_intermediate_code_init(CPUSPARCState *env)
         *rtl[i].ptr = tcg_global_mem_new(cpu_env, rtl[i].off, rtl[i].name);
     }
 
-    TCGV_UNUSED(cpu_gregs[0]);
+    TCGV_UNUSED(cpu_regs[0]);
     for (i = 1; i < 8; ++i) {
-        cpu_gregs[i] = tcg_global_mem_new(cpu_env,
-                                          offsetof(CPUSPARCState, gregs[i]),
-                                          gregnames[i]);
+        cpu_regs[i] = tcg_global_mem_new(cpu_env,
+                                         offsetof(CPUSPARCState, gregs[i]),
+                                         gregnames[i]);
+    }
+
+    for (i = 8; i < 32; ++i) {
+        cpu_regs[i] = tcg_global_mem_new(cpu_regwptr,
+                                         (i - 8) * sizeof(target_ulong),
+                                         gregnames[i]);
     }
 
     for (i = 0; i < TARGET_DPREGS; i++) {
-- 
2.5.0

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Peter Maydell]

On 15 February 2016 at 11:29, Richard Henderson <rth@twiddle.net> wrote:
> ----------------------------------------------------------------
> Richard Henderson (5):
>       tcg: Work around clang bug wrt enum ranges, part 2
>       tcg: Implement indirect memory registers
>       tcg: Allocate indirect_base temporaries in a different order
>       target-sparc: Tidy global register initialization
>       target-sparc: Use global registers for the register window
>
>  target-sparc/translate.c | 196 ++++++++++++++++++++++-------------------------
>  tcg/tcg.c                | 138 +++++++++++++++++++++++----------
>  tcg/tcg.h                |   2 +
>  3 files changed, 192 insertions(+), 144 deletions(-)

This failed to build on the i686-w64-mingw32 compiler
("i686-w64-mingw32-gcc (GCC) 4.8.2", from the Ubuntu
gcc-mingw-w64-i686 package version 4.8.2-10ubuntu2+12):

target-sparc/translate.c: In function ‘gen_intermediate_code’:
target-sparc/translate.c:299:24: error: array subscript is above array
bounds [-Werror=array-bounds]
         return cpu_regs[reg];
                        ^

Fiddling around with the source file to see which call to
gen_dest_gpr() is provoking this shows that it's the one
in gen_ldda_asi() at line 2157 -- if I change the second
argument from 'rd + 1' to 'rd' it compiles OK.

Changing the call site of gen_ldda_asi at line 4727 so its last
argument is 'rd & ~1' rather than 'rd' also suppresses the
error. (That can't possibly change the semantics because we've
just done "if (rd & 1) goto illegal_insn;"...)

I'm generally reluctant to suggest compiler bugs, but this does
look rather like a compiler bug...

thanks
-- PMM

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Richard Henderson]

On 02/16/2016 12:04 AM, Peter Maydell wrote:
> On 15 February 2016 at 11:29, Richard Henderson <rth@twiddle.net> wrote:
>> ----------------------------------------------------------------
>> Richard Henderson (5):
>>        tcg: Work around clang bug wrt enum ranges, part 2
>>        tcg: Implement indirect memory registers
>>        tcg: Allocate indirect_base temporaries in a different order
>>        target-sparc: Tidy global register initialization
>>        target-sparc: Use global registers for the register window
>>
>>   target-sparc/translate.c | 196 ++++++++++++++++++++++-------------------------
>>   tcg/tcg.c                | 138 +++++++++++++++++++++++----------
>>   tcg/tcg.h                |   2 +
>>   3 files changed, 192 insertions(+), 144 deletions(-)
>
> This failed to build on the i686-w64-mingw32 compiler
> ("i686-w64-mingw32-gcc (GCC) 4.8.2", from the Ubuntu
> gcc-mingw-w64-i686 package version 4.8.2-10ubuntu2+12):
>
> target-sparc/translate.c: In function ‘gen_intermediate_code’:
> target-sparc/translate.c:299:24: error: array subscript is above array
> bounds [-Werror=array-bounds]
>           return cpu_regs[reg];
>                          ^
>
> Fiddling around with the source file to see which call to
> gen_dest_gpr() is provoking this shows that it's the one
> in gen_ldda_asi() at line 2157 -- if I change the second
> argument from 'rd + 1' to 'rd' it compiles OK.
>
> Changing the call site of gen_ldda_asi at line 4727 so its last
> argument is 'rd & ~1' rather than 'rd' also suppresses the
> error. (That can't possibly change the semantics because we've
> just done "if (rd & 1) goto illegal_insn;"...)
>
> I'm generally reluctant to suggest compiler bugs, but this does
> look rather like a compiler bug...

There are at least 5 such bugs open against gcc at the moment.

     https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56456

I couldn't reproduce this quickly with a freshly built gcc 4.8 branch on 
i686-linux.  Could you please file a gcc bug with your preprocessed source? 
There's a chance it isn't a duplicate, but...

In the meantime... hmm.  I don't suppose removing the inline helps?  Probably 
not, since there's only one caller...  Otherwise I guess we should go with your 
"rd & ~1" workaround.


r~

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Peter Maydell]

On 15 February 2016 at 20:29, Richard Henderson <rth@twiddle.net> wrote:
> On 02/16/2016 12:04 AM, Peter Maydell wrote:
>> I'm generally reluctant to suggest compiler bugs, but this does
>> look rather like a compiler bug...
>
>
> There are at least 5 such bugs open against gcc at the moment.
>
>     https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56456
>
> I couldn't reproduce this quickly with a freshly built gcc 4.8 branch on
> i686-linux.  Could you please file a gcc bug with your preprocessed source?
> There's a chance it isn't a duplicate, but...

Is it worth filing a bug that only repros on a non-upstream gcc?

> In the meantime... hmm.  I don't suppose removing the inline helps?
> Probably not, since there's only one caller...  Otherwise I guess we should
> go with your "rd & ~1" workaround.

We should give it a try with Eric's "stop overriding
'inline' to mean 'always inline', but as you say
with only one caller it's probably going to go ahead
and inline it anyway.

thanks
-- PMM

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Richard Henderson]

On 02/16/2016 07:35 AM, Peter Maydell wrote:
> On 15 February 2016 at 20:29, Richard Henderson <rth@twiddle.net> wrote:
>> On 02/16/2016 12:04 AM, Peter Maydell wrote:
>>> I'm generally reluctant to suggest compiler bugs, but this does
>>> look rather like a compiler bug...
>>
>>
>> There are at least 5 such bugs open against gcc at the moment.
>>
>>      https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56456
>>
>> I couldn't reproduce this quickly with a freshly built gcc 4.8 branch on
>> i686-linux.  Could you please file a gcc bug with your preprocessed source?
>> There's a chance it isn't a duplicate, but...
>
> Is it worth filing a bug that only repros on a non-upstream gcc?

Well, it doesn't repro on i686-linux; with a cross-compiler to mingw it still 
might, but filing the bug will save me setting up the full cross environment to 
be able to build qemu with mingw.



r~

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Peter Maydell]

On 15 February 2016 at 20:57, Richard Henderson <rth@twiddle.net> wrote:
> On 02/16/2016 07:35 AM, Peter Maydell wrote:
>> On 15 February 2016 at 20:29, Richard Henderson <rth@twiddle.net> wrote:
>>> I couldn't reproduce this quickly with a freshly built gcc 4.8 branch on
>>> i686-linux.  Could you please file a gcc bug with your preprocessed
>>> source?
>>> There's a chance it isn't a duplicate, but...
>>
>>
>> Is it worth filing a bug that only repros on a non-upstream gcc?
>
>
> Well, it doesn't repro on i686-linux; with a cross-compiler to mingw it
> still might, but filing the bug will save me setting up the full cross
> environment to be able to build qemu with mingw.

I started filing a bug, but the preprocessed source exceeds the 1MB
size limit on gcc bugzilla anyway. So I'm just going to put the
output of gcc -save-temps -v below, and you can find translate.i
at http://people.linaro.org/~peter.maydell/translate.i (2.3MB).


$ i686-w64-mingw32-gcc -I/home/petmay01/linaro/qemu-for-merges/tcg
-I/home/petmay01/linaro/qemu-for-merges/tcg/i386 -I.
-I/home/petmay01/linaro/qemu-for-merges
-I/home/petmay01/linaro/qemu-for-merges/include
-I/home/petmay01/linaro/qemu-for-merges/target-sparc -Itarget-sparc
-I/home/petmay01/linaro/mingw/include/pixman-1
-I/home/petmay01/linaro/qemu-for-merges/dtc/libfdt -m32 -mthreads
-D__USE_MINGW_ANSI_STDIO=1 -DWIN32_LEAN_AND_MEAN -DWINVER=0x501
-D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE
-Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings
-Wmissing-prototypes -fno-strict-aliasing -fno-common
-I/home/petmay01/linaro/mingw/include  -Wno-unused-local-typedefs
-Werror -Wendif-labels -Wmissing-include-dirs -Wempty-body
-Wnested-externs -Wformat-security -Wformat-y2k -Winit-self
-Wignored-qualifiers -Wold-style-declaration -Wold-style-definition
-Wtype-limits -fstack-protector-all
-I/home/petmay01/linaro/mingw/include/libpng15    -I..
-I/home/petmay01/linaro/qemu-for-merges/target-sparc -DNEED_CPU_H
-I/home/petmay01/linaro/qemu-for-merges/include  -MMD -MP -MT
target-sparc/translate.o -MF target-sparc/translate.d -O2
-U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -mms-bitfields
-I/home/petmay01/linaro/mingw/include/glib-2.0
-I/home/petmay01/linaro/mingw/lib/glib-2.0/include   -g   -c -o
target-sparc/translate.o
/home/petmay01/linaro/qemu-for-merges/target-sparc/translate.c
-save-temps -v
Using built-in specs.
COLLECT_GCC=i686-w64-mingw32-gcc
Target: i686-w64-mingw32
Configured with: ../../src/configure --build=x86_64-linux-gnu
--prefix=/usr --includedir='/usr/include' --mandir='/usr/share/man'
--infodir='/usr/share/info' --sysconfdir=/etc --localstatedir=/var
--libexecdir='/usr/lib/gcc-mingw-w64' --disable-maintainer-mode
--disable-dependency-tracking --prefix=/usr --enable-shared
--enable-static --disable-multilib --with-system-zlib
--libexecdir=/usr/lib --without-included-gettext --libdir=/usr/lib
--enable-libstdcxx-time=yes --with-tune=generic
--enable-version-specific-runtime-libs --enable-threads=posix
--enable-fully-dynamic-string --enable-sjlj-exceptions
--enable-libgomp --enable-languages=c,c++,fortran,objc,obj-c++
--enable-lto --with-plugin-ld --target=i686-w64-mingw32
--with-gxx-include-dir=/usr/include/c++/4.8
--with-as=/usr/bin/i686-w64-mingw32-as
--with-ld=/usr/bin/i686-w64-mingw32-ld
Thread model: posix
gcc version 4.8.2 (GCC)
COLLECT_GCC_OPTIONS='-I' '/home/petmay01/linaro/qemu-for-merges/tcg'
'-I' '/home/petmay01/linaro/qemu-for-merges/tcg/i386' '-I' '.' '-I'
'/home/petmay01/linaro/qemu-for-merges' '-I'
'/home/petmay01/linaro/qemu-for-merges/include' '-I'
'/home/petmay01/linaro/qemu-for-merges/target-sparc' '-I'
'target-sparc' '-I' '/home/petmay01/linaro/mingw/include/pixman-1'
'-I' '/home/petmay01/linaro/qemu-for-merges/dtc/libfdt' '-m32'
'-mthreads' '-D' '__USE_MINGW_ANSI_STDIO=1' '-D' 'WIN32_LEAN_AND_MEAN'
'-D' 'WINVER=0x501' '-D' '_GNU_SOURCE' '-D' '_FILE_OFFSET_BITS=64'
'-D' '_LARGEFILE_SOURCE' '-Wstrict-prototypes' '-Wredundant-decls'
'-Wall' '-Wundef' '-Wwrite-strings' '-Wmissing-prototypes'
'-fno-strict-aliasing' '-fno-common' '-I'
'/home/petmay01/linaro/mingw/include' '-Wno-unused-local-typedefs'
'-Werror' '-Wendif-labels' '-Wmissing-include-dirs' '-Wempty-body'
'-Wnested-externs' '-Wformat-security' '-Wformat-y2k' '-Winit-self'
'-Wignored-qualifiers' '-Wold-style-declaration'
'-Wold-style-definition' '-Wtype-limits' '-fstack-protector-all' '-I'
'/home/petmay01/linaro/mingw/include/libpng15' '-I' '..' '-I'
'/home/petmay01/linaro/qemu-for-merges/target-sparc' '-D' 'NEED_CPU_H'
'-I' '/home/petmay01/linaro/qemu-for-merges/include' '-MMD' '-MP'
'-MT' 'target-sparc/translate.o' '-MF' 'target-sparc/translate.d'
'-O2' '-U' '_FORTIFY_SOURCE' '-D' '_FORTIFY_SOURCE=2' '-mms-bitfields'
'-I' '/home/petmay01/linaro/mingw/include/glib-2.0' '-I'
'/home/petmay01/linaro/mingw/lib/glib-2.0/include' '-g' '-c' '-o'
'target-sparc/translate.o' '-save-temps' '-v' '-mtune=generic'
'-march=pentiumpro'
 /usr/lib/gcc/i686-w64-mingw32/4.8/cc1 -E -quiet -v -I
/home/petmay01/linaro/qemu-for-merges/tcg -I
/home/petmay01/linaro/qemu-for-merges/tcg/i386 -I . -I
/home/petmay01/linaro/qemu-for-merges -I
/home/petmay01/linaro/qemu-for-merges/include -I
/home/petmay01/linaro/qemu-for-merges/target-sparc -I target-sparc -I
/home/petmay01/linaro/mingw/include/pixman-1 -I
/home/petmay01/linaro/qemu-for-merges/dtc/libfdt -I
/home/petmay01/linaro/mingw/include -I
/home/petmay01/linaro/mingw/include/libpng15 -I .. -I
/home/petmay01/linaro/qemu-for-merges/target-sparc -I
/home/petmay01/linaro/qemu-for-merges/include -I
/home/petmay01/linaro/mingw/include/glib-2.0 -I
/home/petmay01/linaro/mingw/lib/glib-2.0/include -MMD
target-sparc/translate.d -MF target-sparc/translate.d -MP -MT
target-sparc/translate.o -D_MT -D_REENTRANT -D
__USE_MINGW_ANSI_STDIO=1 -D WIN32_LEAN_AND_MEAN -D WINVER=0x501 -D
_GNU_SOURCE -D _FILE_OFFSET_BITS=64 -D _LARGEFILE_SOURCE -D NEED_CPU_H
-U _FORTIFY_SOURCE -D _FORTIFY_SOURCE=2
/home/petmay01/linaro/qemu-for-merges/target-sparc/translate.c -m32
-mthreads -mms-bitfields -mtune=generic -march=pentiumpro
-Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings
-Wmissing-prototypes -Wno-unused-local-typedefs -Werror -Wendif-labels
-Wmissing-include-dirs -Wempty-body -Wnested-externs -Wformat-security
-Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration
-Wold-style-definition -Wtype-limits -fno-strict-aliasing -fno-common
-fstack-protector-all -g -fworking-directory -O2 -fpch-preprocess -o
translate.i
ignoring nonexistent directory
"/usr/lib/gcc/i686-w64-mingw32/4.8/../../../../i686-w64-mingw32/sys-include"
ignoring duplicate directory
"/home/petmay01/linaro/qemu-for-merges/target-sparc"
ignoring duplicate directory "/home/petmay01/linaro/qemu-for-merges/include"
#include "..." search starts here:
#include <...> search starts here:
 /home/petmay01/linaro/qemu-for-merges/tcg
 /home/petmay01/linaro/qemu-for-merges/tcg/i386
 .
 /home/petmay01/linaro/qemu-for-merges
 /home/petmay01/linaro/qemu-for-merges/include
 /home/petmay01/linaro/qemu-for-merges/target-sparc
 target-sparc
 /home/petmay01/linaro/mingw/include/pixman-1
 /home/petmay01/linaro/qemu-for-merges/dtc/libfdt
 /home/petmay01/linaro/mingw/include
 /home/petmay01/linaro/mingw/include/libpng15
 ..
 /home/petmay01/linaro/mingw/include/glib-2.0
 /home/petmay01/linaro/mingw/lib/glib-2.0/include
 /usr/lib/gcc/i686-w64-mingw32/4.8/include
 /usr/lib/gcc/i686-w64-mingw32/4.8/include-fixed
 /usr/lib/gcc/i686-w64-mingw32/4.8/../../../../i686-w64-mingw32/include
End of search list.
COLLECT_GCC_OPTIONS='-I' '/home/petmay01/linaro/qemu-for-merges/tcg'
'-I' '/home/petmay01/linaro/qemu-for-merges/tcg/i386' '-I' '.' '-I'
'/home/petmay01/linaro/qemu-for-merges' '-I'
'/home/petmay01/linaro/qemu-for-merges/include' '-I'
'/home/petmay01/linaro/qemu-for-merges/target-sparc' '-I'
'target-sparc' '-I' '/home/petmay01/linaro/mingw/include/pixman-1'
'-I' '/home/petmay01/linaro/qemu-for-merges/dtc/libfdt' '-m32'
'-mthreads' '-D' '__USE_MINGW_ANSI_STDIO=1' '-D' 'WIN32_LEAN_AND_MEAN'
'-D' 'WINVER=0x501' '-D' '_GNU_SOURCE' '-D' '_FILE_OFFSET_BITS=64'
'-D' '_LARGEFILE_SOURCE' '-Wstrict-prototypes' '-Wredundant-decls'
'-Wall' '-Wundef' '-Wwrite-strings' '-Wmissing-prototypes'
'-fno-strict-aliasing' '-fno-common' '-I'
'/home/petmay01/linaro/mingw/include' '-Wno-unused-local-typedefs'
'-Werror' '-Wendif-labels' '-Wmissing-include-dirs' '-Wempty-body'
'-Wnested-externs' '-Wformat-security' '-Wformat-y2k' '-Winit-self'
'-Wignored-qualifiers' '-Wold-style-declaration'
'-Wold-style-definition' '-Wtype-limits' '-fstack-protector-all' '-I'
'/home/petmay01/linaro/mingw/include/libpng15' '-I' '..' '-I'
'/home/petmay01/linaro/qemu-for-merges/target-sparc' '-D' 'NEED_CPU_H'
'-I' '/home/petmay01/linaro/qemu-for-merges/include' '-MMD' '-MP'
'-MT' 'target-sparc/translate.o' '-MF' 'target-sparc/translate.d'
'-O2' '-U' '_FORTIFY_SOURCE' '-D' '_FORTIFY_SOURCE=2' '-mms-bitfields'
'-I' '/home/petmay01/linaro/mingw/include/glib-2.0' '-I'
'/home/petmay01/linaro/mingw/lib/glib-2.0/include' '-g' '-c' '-o'
'target-sparc/translate.o' '-save-temps' '-v' '-mtune=generic'
'-march=pentiumpro'
 /usr/lib/gcc/i686-w64-mingw32/4.8/cc1 -fpreprocessed translate.i
-quiet -dumpbase translate.c -m32 -mthreads -mms-bitfields
-mtune=generic -march=pentiumpro -auxbase-strip
target-sparc/translate.o -g -O2 -Wstrict-prototypes -Wredundant-decls
-Wall -Wundef -Wwrite-strings -Wmissing-prototypes
-Wno-unused-local-typedefs -Werror -Wendif-labels
-Wmissing-include-dirs -Wempty-body -Wnested-externs -Wformat-security
-Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration
-Wold-style-definition -Wtype-limits -version -fno-strict-aliasing
-fno-common -fstack-protector-all -o translate.s
GNU C (GCC) version 4.8.2 (i686-w64-mingw32)
        compiled by GNU C version 4.8.2, GMP version 5.1.2, MPFR
version 3.1.2-p3, MPC version 1.0.1
warning: GMP header version 5.1.2 differs from library version 5.1.3.
GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
GNU C (GCC) version 4.8.2 (i686-w64-mingw32)
        compiled by GNU C version 4.8.2, GMP version 5.1.2, MPFR
version 3.1.2-p3, MPC version 1.0.1
warning: GMP header version 5.1.2 differs from library version 5.1.3.
GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
Compiler executable checksum: c03a50cdfea1ac209c791d80ef4799a8
/home/petmay01/linaro/qemu-for-merges/target-sparc/translate.c: In
function ‘gen_intermediate_code’:
/home/petmay01/linaro/qemu-for-merges/target-sparc/translate.c:299:24:
error: array subscript is above array bounds [-Werror=array-bounds]
         return cpu_regs[reg];
                        ^
cc1: all warnings being treated as errors

thanks
-- PMM

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Richard Henderson]

On 02/16/2016 03:45 AM, Peter Maydell wrote:
>> Well, it doesn't repro on i686-linux; with a cross-compiler to mingw it
>> still might, but filing the bug will save me setting up the full cross
>> environment to be able to build qemu with mingw.
>
> I started filing a bug, but the preprocessed source exceeds the 1MB
> size limit on gcc bugzilla anyway. So I'm just going to put the
> output of gcc -save-temps -v below, and you can find translate.i
> at http://people.linaro.org/~peter.maydell/translate.i (2.3MB).

While I can reproduce this with the ubuntu gcc 4.8.2 package, I cannot 
reproduce it with upstream source (which is currently at 4.8.5).

I'm not going to spend any more time on this.  I guess you'd like the workaround?


r~

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Peter Maydell]

On 23 February 2016 at 07:55, Richard Henderson <rth@twiddle.net> wrote:
> On 02/16/2016 03:45 AM, Peter Maydell wrote:
>>>
>>> Well, it doesn't repro on i686-linux; with a cross-compiler to mingw it
>>> still might, but filing the bug will save me setting up the full cross
>>> environment to be able to build qemu with mingw.
>>
>>
>> I started filing a bug, but the preprocessed source exceeds the 1MB
>> size limit on gcc bugzilla anyway. So I'm just going to put the
>> output of gcc -save-temps -v below, and you can find translate.i
>> at http://people.linaro.org/~peter.maydell/translate.i (2.3MB).
>
>
> While I can reproduce this with the ubuntu gcc 4.8.2 package, I cannot
> reproduce it with upstream source (which is currently at 4.8.5).
>
> I'm not going to spend any more time on this.  I guess you'd like the
> workaround?

Yes, please.

thanks
-- PMM

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Peter Maydell]

On 15 February 2016 at 20:35, Peter Maydell <peter.maydell@linaro.org> wrote:
> We should give it a try with Eric's "stop overriding
> 'inline' to mean 'always inline', but as you say
> with only one caller it's probably going to go ahead
> and inline it anyway.

...and indeed Eric's patch has no effect on this.

-- PMM

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Richard Henderson]

On 02/15/2016 05:04 AM, Peter Maydell wrote:
> This failed to build on the i686-w64-mingw32 compiler
> ("i686-w64-mingw32-gcc (GCC) 4.8.2", from the Ubuntu
> gcc-mingw-w64-i686 package version 4.8.2-10ubuntu2+12):
> 
> target-sparc/translate.c: In function ‘gen_intermediate_code’:
> target-sparc/translate.c:299:24: error: array subscript is above array
> bounds [-Werror=array-bounds]
>          return cpu_regs[reg];
>                         ^
> 
> Fiddling around with the source file to see which call to
> gen_dest_gpr() is provoking this shows that it's the one
> in gen_ldda_asi() at line 2157 -- if I change the second
> argument from 'rd + 1' to 'rd' it compiles OK.

Does it also work to change to "rd | 1"?

I'd prefer to keep the change as local as possible, especially since I've got
another patch set pending that changes all of this code too.

> Changing the call site of gen_ldda_asi at line 4727 so its last
> argument is 'rd & ~1' rather than 'rd' also suppresses the
> error. (That can't possibly change the semantics because we've
> just done "if (rd & 1) goto illegal_insn;"...)


r~

Re: [Qemu-devel] [PULL 0/5] tcg queued patches

[Peter Maydell]

On 23 February 2016 at 16:14, Richard Henderson <rth@twiddle.net> wrote:
> On 02/15/2016 05:04 AM, Peter Maydell wrote:
>> This failed to build on the i686-w64-mingw32 compiler
>> ("i686-w64-mingw32-gcc (GCC) 4.8.2", from the Ubuntu
>> gcc-mingw-w64-i686 package version 4.8.2-10ubuntu2+12):
>>
>> target-sparc/translate.c: In function ‘gen_intermediate_code’:
>> target-sparc/translate.c:299:24: error: array subscript is above array
>> bounds [-Werror=array-bounds]
>>          return cpu_regs[reg];
>>                         ^
>>
>> Fiddling around with the source file to see which call to
>> gen_dest_gpr() is provoking this shows that it's the one
>> in gen_ldda_asi() at line 2157 -- if I change the second
>> argument from 'rd + 1' to 'rd' it compiles OK.
>
> Does it also work to change to "rd | 1"?

Yes, that seems to work too.

thanks
-- PMM

[Qemu-devel] [PULL 0/5] TCG queued patches

[Richard Henderson]

The first tcg pull for 2.13/3.0.  Two of these are candidates
for cherry-picking into stable.


r~


The following changes since commit 26bd8d98c4b3284a4c6fe3b67c98b1edd00e9beb:

  Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.13-pull-request' into staging (2018-05-01 15:26:06 +0100)

are available in the Git repository at:

  git://github.com/rth7680/qemu.git tags/pull-tcg-20180502

for you to fetch changes up to 6001f7729e12dd1d810291e4cbf83cee8e07441d:

  tcg: workaround branch instruction overflow in tcg_out_qemu_ld/st (2018-05-01 11:56:55 -0700)

----------------------------------------------------------------
Queued TCG patches

----------------------------------------------------------------
Henry Wertz (1):
      tcg/arm: Fix memory barrier encoding

Laurent Vivier (1):
      tcg: workaround branch instruction overflow in tcg_out_qemu_ld/st

Richard Henderson (3):
      tcg: Document INDEX_mul[us]h_*
      tcg: Allow wider vectors for cmp and mul
      tcg: Improve TCGv_ptr support

 tcg/tcg-op.h             | 91 +++++++++++++++++++++++++++++++++++++-----------
 tcg/tcg.h                | 88 +++++++++++++++++++++++++++++-----------------
 target/hppa/translate.c  | 16 ++-------
 tcg/arm/tcg-target.inc.c |  4 +--
 tcg/tcg-ldst.inc.c       |  8 ++---
 tcg/tcg-op-vec.c         |  8 ++---
 tcg/tcg.c                | 33 ++----------------
 tcg/README               |  8 +++++
 8 files changed, 150 insertions(+), 106 deletions(-)

Re: [Qemu-devel] [PULL 0/5] TCG queued patches

[Peter Maydell]

On 2 May 2018 at 18:47, Richard Henderson <richard.henderson@linaro.org> wrote:
> The first tcg pull for 2.13/3.0.  Two of these are candidates
> for cherry-picking into stable.
>
>
> r~
>
>
> The following changes since commit 26bd8d98c4b3284a4c6fe3b67c98b1edd00e9beb:
>
>   Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.13-pull-request' into staging (2018-05-01 15:26:06 +0100)
>
> are available in the Git repository at:
>
>   git://github.com/rth7680/qemu.git tags/pull-tcg-20180502
>
> for you to fetch changes up to 6001f7729e12dd1d810291e4cbf83cee8e07441d:
>
>   tcg: workaround branch instruction overflow in tcg_out_qemu_ld/st (2018-05-01 11:56:55 -0700)
>
> ----------------------------------------------------------------
> Queued TCG patches
>

Applied, thanks.

-- PMM