* [PATCH v7 0/9] ARM: dts: omap2+: GPMC NAND node fixes
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
Hi Tony,
These patches are a preparatory step towards the NAND DT cleanup
done in [1].
They mostly deal with adding the missing compatible property and
interrupt resources and fixing up register resources for the
NAND nodes.
Patches based on v4.5-rc1.
Tested on dra7-evm, am437x-gp-evm and omap3-beagle.
cheers,
-roger
[1] - http://article.gmane.org/gmane.linux.kernel/2156857
--
Roger Quadros (9):
ARM: dts: dra7: Fix NAND device nodes.
ARM: dts: dra7: Remove redundant nand property
ARM: dts: am437x: Fix NAND device nodes
ARM: dts: am437x: Disable wait pin monitoring for NAND
ARM: dts: am335x: Fix NAND device nodes
ARM: dts: am335x: Disable wait pin monitoring for NAND
ARM: dts: dm816x: Fix NAND device nodes
ARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND
ARM: dts: omap3: Fix NAND device nodess
arch/arm/boot/dts/am335x-baltos-ir5221.dts | 9 +++++----
arch/arm/boot/dts/am335x-chilisom.dtsi | 8 +++++---
arch/arm/boot/dts/am335x-cm-t335.dts | 10 ++++++----
arch/arm/boot/dts/am335x-evm.dts | 7 ++++---
arch/arm/boot/dts/am335x-igep0033.dtsi | 8 +++++---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 8 +++++---
arch/arm/boot/dts/am33xx.dtsi | 2 ++
arch/arm/boot/dts/am4372.dtsi | 2 ++
arch/arm/boot/dts/am437x-cm-t43.dts | 11 +++++------
arch/arm/boot/dts/am437x-gp-evm.dts | 8 +++++---
arch/arm/boot/dts/am43x-epos-evm.dts | 8 +++++---
arch/arm/boot/dts/dm8168-evm.dts | 8 +++++---
arch/arm/boot/dts/dm816x.dtsi | 2 ++
arch/arm/boot/dts/dra7-evm.dts | 7 +++++--
arch/arm/boot/dts/dra7.dtsi | 2 ++
arch/arm/boot/dts/dra72-evm.dts | 7 +++++--
arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts | 3 ++-
arch/arm/boot/dts/logicpd-torpedo-som.dtsi | 8 ++++++--
arch/arm/boot/dts/omap3-beagle.dts | 5 ++++-
arch/arm/boot/dts/omap3-cm-t3x.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-devkit8000-common.dtsi | 4 ++++
arch/arm/boot/dts/omap3-evm-37xx.dts | 8 ++++++--
arch/arm/boot/dts/omap3-gta04.dtsi | 4 ++++
arch/arm/boot/dts/omap3-igep.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-igep0020-common.dtsi | 4 ++--
arch/arm/boot/dts/omap3-igep0030-common.dtsi | 4 ++++
arch/arm/boot/dts/omap3-ldp.dts | 10 +++++++---
arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-overo-base.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-pandora-common.dtsi | 4 ++++
arch/arm/boot/dts/omap3-tao3530.dtsi | 6 +++++-
arch/arm/boot/dts/omap3.dtsi | 2 ++
arch/arm/boot/dts/omap3430-sdp.dts | 6 +++++-
33 files changed, 143 insertions(+), 56 deletions(-)
--
2.5.0
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v7 1/9] ARM: dts: dra7: Fix NAND device nodes.
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/dra7-evm.dts | 6 +++++-
arch/arm/boot/dts/dra7.dtsi | 2 ++
arch/arm/boot/dts/dra72-evm.dts | 6 +++++-
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index cfc24e5..28ae95e 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -741,9 +741,13 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x16>;
- ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
+ ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* device IO registers */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <16>;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c4d9175..51ddc98 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1438,6 +1438,8 @@
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 00b1200..6cf211b 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -492,13 +492,17 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_default>;
- ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
+ ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
nand@0,0 {
/* To use NAND, DIP switch SW5 must be set like so:
* SW5.1 (NAND_SELn) = ON (LOW)
* SW5.9 (GPMC_WPN) = OFF (HIGH)
*/
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* device IO registers */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <16>;
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v7 1/9] ARM: dts: dra7: Fix NAND device nodes.
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony-4v6yS6AI5VpBDgjK7y7TUQ
Cc: computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
ezequiel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ,
javier-0uQlZySMnqxg9hUCZPvPmw, fcooper-l0cyMroinI0,
nsekhar-l0cyMroinI0, linux-omap-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Roger Quadros
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq-l0cyMroinI0@public.gmane.org>
---
arch/arm/boot/dts/dra7-evm.dts | 6 +++++-
arch/arm/boot/dts/dra7.dtsi | 2 ++
arch/arm/boot/dts/dra72-evm.dts | 6 +++++-
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index cfc24e5..28ae95e 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -741,9 +741,13 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x16>;
- ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
+ ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* device IO registers */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <16>;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c4d9175..51ddc98 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1438,6 +1438,8 @@
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 00b1200..6cf211b 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -492,13 +492,17 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_default>;
- ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
+ ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
nand@0,0 {
/* To use NAND, DIP switch SW5 must be set like so:
* SW5.1 (NAND_SELn) = ON (LOW)
* SW5.9 (GPMC_WPN) = OFF (HIGH)
*/
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* device IO registers */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <16>;
--
2.5.0
--
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^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 2/9] ARM: dts: dra7: Remove redundant nand property
2016-02-23 16:37 ` Roger Quadros
@ 2016-02-23 16:37 ` Roger Quadros
-1 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
wait pin monitoring is not used for nand so it is pointless to
have the gpmc,wait-monitoring-ns property.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/dra7-evm.dts | 1 -
arch/arm/boot/dts/dra72-evm.dts | 1 -
2 files changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 28ae95e..803ab0e 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -770,7 +770,6 @@
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 6cf211b..8916433 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -525,7 +525,6 @@
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 2/9] ARM: dts: dra7: Remove redundant nand property
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
wait pin monitoring is not used for nand so it is pointless to
have the gpmc,wait-monitoring-ns property.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/dra7-evm.dts | 1 -
arch/arm/boot/dts/dra72-evm.dts | 1 -
2 files changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 28ae95e..803ab0e 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -770,7 +770,6 @@
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 6cf211b..8916433 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -525,7 +525,6 @@
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 3/9] ARM: dts: am437x: Fix NAND device nodes
2016-02-23 16:37 ` Roger Quadros
@ 2016-02-23 16:37 ` Roger Quadros
-1 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/am4372.dtsi | 2 ++
arch/arm/boot/dts/am437x-cm-t43.dts | 6 +++++-
arch/arm/boot/dts/am437x-gp-evm.dts | 6 +++++-
arch/arm/boot/dts/am43x-epos-evm.dts | 6 +++++-
4 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index df955ba..7957bd4 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -893,6 +893,8 @@
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/am437x-cm-t43.dts b/arch/arm/boot/dts/am437x-cm-t43.dts
index 8677f4c..4aa5357 100644
--- a/arch/arm/boot/dts/am437x-cm-t43.dts
+++ b/arch/arm/boot/dts/am437x-cm-t43.dts
@@ -146,7 +146,11 @@
pinctrl-0 = <&nand_flash_x8>;
ranges = <0 0 0x08000000 0x1000000>;
nand@0,0 {
- reg = <0 0 0>;
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 64d4332..7081b88 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -812,9 +812,13 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>;
- ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
+ ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* device IO registers */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 746fd2b..12b08cf 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -561,9 +561,13 @@
status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>;
- ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
+ ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v7 3/9] ARM: dts: am437x: Fix NAND device nodes
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/am4372.dtsi | 2 ++
arch/arm/boot/dts/am437x-cm-t43.dts | 6 +++++-
arch/arm/boot/dts/am437x-gp-evm.dts | 6 +++++-
arch/arm/boot/dts/am43x-epos-evm.dts | 6 +++++-
4 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index df955ba..7957bd4 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -893,6 +893,8 @@
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/am437x-cm-t43.dts b/arch/arm/boot/dts/am437x-cm-t43.dts
index 8677f4c..4aa5357 100644
--- a/arch/arm/boot/dts/am437x-cm-t43.dts
+++ b/arch/arm/boot/dts/am437x-cm-t43.dts
@@ -146,7 +146,11 @@
pinctrl-0 = <&nand_flash_x8>;
ranges = <0 0 0x08000000 0x1000000>;
nand@0,0 {
- reg = <0 0 0>;
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 64d4332..7081b88 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -812,9 +812,13 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>;
- ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
+ ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* device IO registers */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 746fd2b..12b08cf 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -561,9 +561,13 @@
status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>;
- ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
+ ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 4/9] ARM: dts: am437x: Disable wait pin monitoring for NAND
2016-02-23 16:37 ` Roger Quadros
@ 2016-02-23 16:37 ` Roger Quadros
-1 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] AM437x TRM: SPRUHL7D: 9.1.3.3.12.2 NAND Device-Ready Pin
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/am437x-cm-t43.dts | 5 -----
arch/arm/boot/dts/am437x-gp-evm.dts | 2 --
arch/arm/boot/dts/am43x-epos-evm.dts | 2 --
3 files changed, 9 deletions(-)
diff --git a/arch/arm/boot/dts/am437x-cm-t43.dts b/arch/arm/boot/dts/am437x-cm-t43.dts
index 4aa5357..9551c47 100644
--- a/arch/arm/boot/dts/am437x-cm-t43.dts
+++ b/arch/arm/boot/dts/am437x-cm-t43.dts
@@ -170,17 +170,12 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
- gpmc,wait-pin = <0>;
-
#address-cells = <1>;
#size-cells = <1>;
/* MTD partition table */
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 7081b88..b3cfedb 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -837,11 +837,9 @@
gpmc,access-ns = <30>;
gpmc,rd-cycle-ns = <40>;
gpmc,wr-cycle-ns = <40>;
- gpmc,wait-pin = <0>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 12b08cf..b1f2bd6 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -586,11 +586,9 @@
gpmc,access-ns = <30>; /* tCEA + 4*/
gpmc,rd-cycle-ns = <40>;
gpmc,wr-cycle-ns = <40>;
- gpmc,wait-pin = <0>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 4/9] ARM: dts: am437x: Disable wait pin monitoring for NAND
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] AM437x TRM: SPRUHL7D: 9.1.3.3.12.2 NAND Device-Ready Pin
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/am437x-cm-t43.dts | 5 -----
arch/arm/boot/dts/am437x-gp-evm.dts | 2 --
arch/arm/boot/dts/am43x-epos-evm.dts | 2 --
3 files changed, 9 deletions(-)
diff --git a/arch/arm/boot/dts/am437x-cm-t43.dts b/arch/arm/boot/dts/am437x-cm-t43.dts
index 4aa5357..9551c47 100644
--- a/arch/arm/boot/dts/am437x-cm-t43.dts
+++ b/arch/arm/boot/dts/am437x-cm-t43.dts
@@ -170,17 +170,12 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
- gpmc,wait-pin = <0>;
-
#address-cells = <1>;
#size-cells = <1>;
/* MTD partition table */
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 7081b88..b3cfedb 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -837,11 +837,9 @@
gpmc,access-ns = <30>;
gpmc,rd-cycle-ns = <40>;
gpmc,wr-cycle-ns = <40>;
- gpmc,wait-pin = <0>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 12b08cf..b1f2bd6 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -586,11 +586,9 @@
gpmc,access-ns = <30>; /* tCEA + 4*/
gpmc,rd-cycle-ns = <40>;
gpmc,wr-cycle-ns = <40>;
- gpmc,wait-pin = <0>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 5/9] ARM: dts: am335x: Fix NAND device nodes
2016-02-23 16:37 ` Roger Quadros
@ 2016-02-23 16:37 ` Roger Quadros
-1 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros,
Teresa Remmet, Ilya Ledvich, Yegor Yefremov, Rostislav Lisovy,
Enric Balletbo i Serra
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/am335x-baltos-ir5221.dts | 6 +++++-
arch/arm/boot/dts/am335x-chilisom.dtsi | 5 +++++
arch/arm/boot/dts/am335x-cm-t335.dts | 7 ++++++-
arch/arm/boot/dts/am335x-evm.dts | 4 ++++
arch/arm/boot/dts/am335x-igep0033.dtsi | 5 +++++
arch/arm/boot/dts/am335x-phycore-som.dtsi | 5 +++++
arch/arm/boot/dts/am33xx.dtsi | 2 ++
7 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-baltos-ir5221.dts b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
index ded1eb6..7b6bcb0 100644
--- a/arch/arm/boot/dts/am335x-baltos-ir5221.dts
+++ b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
@@ -236,7 +236,11 @@
status = "okay";
nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
ti,nand-xfer-type = "polled";
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi
index fda457b..e8e7d9d 100644
--- a/arch/arm/boot/dts/am335x-chilisom.dtsi
+++ b/arch/arm/boot/dts/am335x-chilisom.dtsi
@@ -7,6 +7,7 @@
* published by the Free Software Foundation.
*/
#include "am33xx.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Grinn AM335x ChiliSOM";
@@ -218,7 +219,11 @@
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x01000000>; /* CS0 0 @addr 0x08000000, size 0x01000000 */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts b/arch/arm/boot/dts/am335x-cm-t335.dts
index 42e9b66..571df14 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include "am33xx.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "CompuLab CM-T335";
@@ -302,7 +303,11 @@ status = "okay";
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 0d6a68c..4e7a53e6a 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -519,7 +519,11 @@
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 54f1135..4cfe041 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -11,6 +11,7 @@
/dts-v1/;
#include "am33xx.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
cpus {
@@ -129,7 +130,11 @@
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-width = <1>;
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index c20ae6c..80a5687 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -8,6 +8,7 @@
*/
#include "am33xx.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Phytec AM335x phyCORE";
@@ -165,7 +166,11 @@
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: NAND */
nandflash: nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 04885f9..b8ca5b4 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -865,6 +865,8 @@
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
status = "disabled";
};
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v7 5/9] ARM: dts: am335x: Fix NAND device nodes
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros,
Teresa Remmet, Ilya Ledvich, Yegor Yefremov, Rostislav Lisovy,
Enric Balletbo i Serra
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/am335x-baltos-ir5221.dts | 6 +++++-
arch/arm/boot/dts/am335x-chilisom.dtsi | 5 +++++
arch/arm/boot/dts/am335x-cm-t335.dts | 7 ++++++-
arch/arm/boot/dts/am335x-evm.dts | 4 ++++
arch/arm/boot/dts/am335x-igep0033.dtsi | 5 +++++
arch/arm/boot/dts/am335x-phycore-som.dtsi | 5 +++++
arch/arm/boot/dts/am33xx.dtsi | 2 ++
7 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-baltos-ir5221.dts b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
index ded1eb6..7b6bcb0 100644
--- a/arch/arm/boot/dts/am335x-baltos-ir5221.dts
+++ b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
@@ -236,7 +236,11 @@
status = "okay";
nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
ti,nand-xfer-type = "polled";
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi
index fda457b..e8e7d9d 100644
--- a/arch/arm/boot/dts/am335x-chilisom.dtsi
+++ b/arch/arm/boot/dts/am335x-chilisom.dtsi
@@ -7,6 +7,7 @@
* published by the Free Software Foundation.
*/
#include "am33xx.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Grinn AM335x ChiliSOM";
@@ -218,7 +219,11 @@
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x01000000>; /* CS0 0 @addr 0x08000000, size 0x01000000 */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts b/arch/arm/boot/dts/am335x-cm-t335.dts
index 42e9b66..571df14 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include "am33xx.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "CompuLab CM-T335";
@@ -302,7 +303,11 @@ status = "okay";
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 0d6a68c..4e7a53e6a 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -519,7 +519,11 @@
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 54f1135..4cfe041 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -11,6 +11,7 @@
/dts-v1/;
#include "am33xx.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
cpus {
@@ -129,7 +130,11 @@
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-width = <1>;
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index c20ae6c..80a5687 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -8,6 +8,7 @@
*/
#include "am33xx.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Phytec AM335x phyCORE";
@@ -165,7 +166,11 @@
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: NAND */
nandflash: nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 04885f9..b8ca5b4 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -865,6 +865,8 @@
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
status = "disabled";
};
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 6/9] ARM: dts: am335x: Disable wait pin monitoring for NAND
2016-02-23 16:37 ` Roger Quadros
@ 2016-02-23 16:37 ` Roger Quadros
-1 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros,
Teresa Remmet, Ilya Ledvich, Yegor Yefremov, Rostislav Lisovy,
Enric Balletbo i Serra
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] AM335x TRM: SPRUH73L: 7.1.3.3.12.2 NAND Device-Ready Pin
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/am335x-baltos-ir5221.dts | 3 ---
arch/arm/boot/dts/am335x-chilisom.dtsi | 3 ---
arch/arm/boot/dts/am335x-cm-t335.dts | 3 ---
arch/arm/boot/dts/am335x-evm.dts | 3 ---
arch/arm/boot/dts/am335x-igep0033.dtsi | 3 ---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 3 ---
6 files changed, 18 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-baltos-ir5221.dts b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
index 7b6bcb0..6c667fb 100644
--- a/arch/arm/boot/dts/am335x-baltos-ir5221.dts
+++ b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
@@ -261,12 +261,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi
index e8e7d9d..40b543a 100644
--- a/arch/arm/boot/dts/am335x-chilisom.dtsi
+++ b/arch/arm/boot/dts/am335x-chilisom.dtsi
@@ -242,12 +242,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
};
diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts b/arch/arm/boot/dts/am335x-cm-t335.dts
index 571df14..7e77ce1 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -326,12 +326,9 @@ status = "okay";
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 4e7a53e6a..28b9162 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -542,12 +542,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 4cfe041..6c3a9bf 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -152,12 +152,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 80a5687..d4b7f3b 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -189,13 +189,10 @@
gpmc,access-ns = <30>;
gpmc,rd-cycle-ns = <30>;
gpmc,wr-cycle-ns = <30>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <50>;
gpmc,cycle2cycle-diffcsen;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <30>;
gpmc,wr-data-mux-bus-ns = <0>;
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 6/9] ARM: dts: am335x: Disable wait pin monitoring for NAND
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros,
Teresa Remmet, Ilya Ledvich, Yegor Yefremov, Rostislav Lisovy,
Enric Balletbo i Serra
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] AM335x TRM: SPRUH73L: 7.1.3.3.12.2 NAND Device-Ready Pin
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/am335x-baltos-ir5221.dts | 3 ---
arch/arm/boot/dts/am335x-chilisom.dtsi | 3 ---
arch/arm/boot/dts/am335x-cm-t335.dts | 3 ---
arch/arm/boot/dts/am335x-evm.dts | 3 ---
arch/arm/boot/dts/am335x-igep0033.dtsi | 3 ---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 3 ---
6 files changed, 18 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-baltos-ir5221.dts b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
index 7b6bcb0..6c667fb 100644
--- a/arch/arm/boot/dts/am335x-baltos-ir5221.dts
+++ b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
@@ -261,12 +261,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi
index e8e7d9d..40b543a 100644
--- a/arch/arm/boot/dts/am335x-chilisom.dtsi
+++ b/arch/arm/boot/dts/am335x-chilisom.dtsi
@@ -242,12 +242,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
};
diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts b/arch/arm/boot/dts/am335x-cm-t335.dts
index 571df14..7e77ce1 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -326,12 +326,9 @@ status = "okay";
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 4e7a53e6a..28b9162 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -542,12 +542,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 4cfe041..6c3a9bf 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -152,12 +152,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 80a5687..d4b7f3b 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -189,13 +189,10 @@
gpmc,access-ns = <30>;
gpmc,rd-cycle-ns = <30>;
gpmc,wr-cycle-ns = <30>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <50>;
gpmc,cycle2cycle-diffcsen;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <30>;
gpmc,wr-data-mux-bus-ns = <0>;
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 7/9] ARM: dts: dm816x: Fix NAND device nodes
2016-02-23 16:37 ` Roger Quadros
@ 2016-02-23 16:37 ` Roger Quadros
-1 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/dm8168-evm.dts | 5 +++++
arch/arm/boot/dts/dm816x.dtsi | 2 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts
index 169a855..0cb1003 100644
--- a/arch/arm/boot/dts/dm8168-evm.dts
+++ b/arch/arm/boot/dts/dm8168-evm.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "dm816x.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "DM8168 EVM";
@@ -85,8 +86,12 @@
ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
linux,mtd-name= "micron,mt29f2g16aadwp";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
#address-cells = <1>;
#size-cells = <1>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index c3b8811..30fa5b6 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -183,6 +183,8 @@
dma-names = "rxtx";
gpmc,num-cs = <6>;
gpmc,num-waitpins = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
};
i2c1: i2c@48028000 {
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v7 7/9] ARM: dts: dm816x: Fix NAND device nodes
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/dm8168-evm.dts | 5 +++++
arch/arm/boot/dts/dm816x.dtsi | 2 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts
index 169a855..0cb1003 100644
--- a/arch/arm/boot/dts/dm8168-evm.dts
+++ b/arch/arm/boot/dts/dm8168-evm.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "dm816x.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "DM8168 EVM";
@@ -85,8 +86,12 @@
ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
linux,mtd-name= "micron,mt29f2g16aadwp";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
#address-cells = <1>;
#size-cells = <1>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index c3b8811..30fa5b6 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -183,6 +183,8 @@
dma-names = "rxtx";
gpmc,num-cs = <6>;
gpmc,num-waitpins = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
};
i2c1: i2c@48028000 {
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 8/9] ARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND
2016-02-23 16:37 ` Roger Quadros
@ 2016-02-23 16:37 ` Roger Quadros
-1 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] dm816x TRM: SPRUGX8C: 9.2.4.12.2 NAND Device-Ready Pin
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/dm8168-evm.dts | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts
index 0cb1003..f50348b 100644
--- a/arch/arm/boot/dts/dm8168-evm.dts
+++ b/arch/arm/boot/dts/dm8168-evm.dts
@@ -111,12 +111,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
partition@0 {
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v7 8/9] ARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] dm816x TRM: SPRUGX8C: 9.2.4.12.2 NAND Device-Ready Pin
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/dm8168-evm.dts | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts
index 0cb1003..f50348b 100644
--- a/arch/arm/boot/dts/dm8168-evm.dts
+++ b/arch/arm/boot/dts/dm8168-evm.dts
@@ -111,12 +111,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
partition@0 {
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v7 9/9] ARM: dts: omap3: Fix NAND device nodess
2016-02-23 16:37 ` Roger Quadros
@ 2016-02-23 16:37 ` Roger Quadros
-1 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts | 3 ++-
arch/arm/boot/dts/logicpd-torpedo-som.dtsi | 8 ++++++--
arch/arm/boot/dts/omap3-beagle.dts | 5 ++++-
arch/arm/boot/dts/omap3-cm-t3x.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-devkit8000-common.dtsi | 4 ++++
arch/arm/boot/dts/omap3-evm-37xx.dts | 8 ++++++--
arch/arm/boot/dts/omap3-gta04.dtsi | 4 ++++
arch/arm/boot/dts/omap3-igep.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-igep0020-common.dtsi | 4 ++--
arch/arm/boot/dts/omap3-igep0030-common.dtsi | 4 ++++
arch/arm/boot/dts/omap3-ldp.dts | 10 +++++++---
arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-overo-base.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-pandora-common.dtsi | 4 ++++
arch/arm/boot/dts/omap3-tao3530.dtsi | 6 +++++-
arch/arm/boot/dts/omap3.dtsi | 2 ++
arch/arm/boot/dts/omap3430-sdp.dts | 6 +++++-
17 files changed, 75 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
index fb13f18..d0211fc 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
+++ b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
@@ -93,7 +93,8 @@
};
&gpmc {
- ranges = <1 0 0x08000000 0x1000000>; /* CS1: 16MB for LAN9221 */
+ ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
+ 1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */
ethernet@gpmc {
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 7fed0bd..b46789a 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -35,11 +35,15 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
+ ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
- linux,mtd-name = "micron,mt29f4g16abbda3w";
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
+ linux,mtd-name = "micron,mt29f4g16abbda3w";
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
gpmc,sync-clk-ps = <0>;
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 8ba465d..4602866 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -384,8 +384,11 @@
/* Chip select 0 */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* NAND I/O window, 4 bytes */
- interrupts = <20>;
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "ham1";
nand-bus-width = <16>;
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
index e5f7f5c..a8127bc 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
@@ -261,10 +261,14 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x01000000>;
+ ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <8>;
gpmc,device-width = <1>;
ti,nand-ecc-opt = "sw";
diff --git a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
index 86850bb..b1b8ebf 100644
--- a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
+++ b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
@@ -204,7 +204,11 @@
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "sw";
diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts
index ac18865..76056ba 100644
--- a/arch/arm/boot/dts/omap3-evm-37xx.dts
+++ b/arch/arm/boot/dts/omap3-evm-37xx.dts
@@ -154,12 +154,16 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x1000000>, /* CS0: 16MB for NAND */
+ ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */
<5 0 0x2c000000 0x01000000>;
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "hynix,h8kds0un0mer-4em";
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
index 5e2d643..ab9fb8f 100644
--- a/arch/arm/boot/dts/omap3-gta04.dtsi
+++ b/arch/arm/boot/dts/omap3-gta04.dtsi
@@ -492,7 +492,11 @@
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index 3caf062..81aec99 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -95,8 +95,12 @@
&gpmc {
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "micron,mt29c4g96maz";
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-igep0020-common.dtsi b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
index d90f12c..d6f839c 100644
--- a/arch/arm/boot/dts/omap3-igep0020-common.dtsi
+++ b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
@@ -210,8 +210,8 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x20000000>,
- <5 0 0x2c000000 0x01000000>;
+ ranges = <0 0 0x30000000 0x01000000>, /* CS0: 16MB for NAND */
+ <5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */
ethernet@gpmc {
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/omap3-igep0030-common.dtsi b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
index 640f066..cd91ef0 100644
--- a/arch/arm/boot/dts/omap3-igep0030-common.dtsi
+++ b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
@@ -58,3 +58,7 @@
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
+
+&gpmc {
+ ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
+};
diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
index 5401630..2f353da 100644
--- a/arch/arm/boot/dts/omap3-ldp.dts
+++ b/arch/arm/boot/dts/omap3-ldp.dts
@@ -97,12 +97,16 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x01000000>,
- <1 0 0x08000000 0x01000000>;
+ ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */
+ <1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "micron,nand";
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
index 93f8dfe..eff816e 100644
--- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -362,7 +362,11 @@
<7 0 0x15000000 0x01000000>;
nand@0,0 {
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
/* no elm on omap3 */
diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi
index a29ad16..de256fa 100644
--- a/arch/arm/boot/dts/omap3-overo-base.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-base.dtsi
@@ -226,8 +226,12 @@
ranges = <0 0 0x00000000 0x20000000>;
nand@0,0 {
+ compatible = "ti,omap2-nand";
linux,mtd-name= "micron,mt29c4g96maz";
- reg = <0 0 0>;
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-pandora-common.dtsi b/arch/arm/boot/dts/omap3-pandora-common.dtsi
index 13e9d1f..bcf39d6 100644
--- a/arch/arm/boot/dts/omap3-pandora-common.dtsi
+++ b/arch/arm/boot/dts/omap3-pandora-common.dtsi
@@ -546,7 +546,11 @@
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
ti,nand-ecc-opt = "sw";
diff --git a/arch/arm/boot/dts/omap3-tao3530.dtsi b/arch/arm/boot/dts/omap3-tao3530.dtsi
index ae5dbbd..644d3c8 100644
--- a/arch/arm/boot/dts/omap3-tao3530.dtsi
+++ b/arch/arm/boot/dts/omap3-tao3530.dtsi
@@ -275,10 +275,14 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x01000000>;
+ ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
ti,nand-ecc-opt = "sw";
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index d1ffabb..b41d07e 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -723,6 +723,8 @@
gpmc,num-waitpins = <4>;
#address-cells = <2>;
#size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
};
usb_otg_hs: usb_otg_hs@480ab000 {
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index 16b0cdf..a0dc8d8 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -103,10 +103,14 @@
};
nand@1,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "micron,mt29f1g08abb";
#address-cells = <1>;
#size-cells = <1>;
- reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
ti,nand-ecc-opt = "sw";
nand-bus-width = <8>;
gpmc,cs-on-ns = <0>;
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v7 9/9] ARM: dts: omap3: Fix NAND device nodess
@ 2016-02-23 16:37 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-23 16:37 UTC (permalink / raw)
To: tony
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel, Roger Quadros
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts | 3 ++-
arch/arm/boot/dts/logicpd-torpedo-som.dtsi | 8 ++++++--
arch/arm/boot/dts/omap3-beagle.dts | 5 ++++-
arch/arm/boot/dts/omap3-cm-t3x.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-devkit8000-common.dtsi | 4 ++++
arch/arm/boot/dts/omap3-evm-37xx.dts | 8 ++++++--
arch/arm/boot/dts/omap3-gta04.dtsi | 4 ++++
arch/arm/boot/dts/omap3-igep.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-igep0020-common.dtsi | 4 ++--
arch/arm/boot/dts/omap3-igep0030-common.dtsi | 4 ++++
arch/arm/boot/dts/omap3-ldp.dts | 10 +++++++---
arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-overo-base.dtsi | 6 +++++-
arch/arm/boot/dts/omap3-pandora-common.dtsi | 4 ++++
arch/arm/boot/dts/omap3-tao3530.dtsi | 6 +++++-
arch/arm/boot/dts/omap3.dtsi | 2 ++
arch/arm/boot/dts/omap3430-sdp.dts | 6 +++++-
17 files changed, 75 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
index fb13f18..d0211fc 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
+++ b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
@@ -93,7 +93,8 @@
};
&gpmc {
- ranges = <1 0 0x08000000 0x1000000>; /* CS1: 16MB for LAN9221 */
+ ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
+ 1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */
ethernet@gpmc {
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 7fed0bd..b46789a 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -35,11 +35,15 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
+ ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
- linux,mtd-name = "micron,mt29f4g16abbda3w";
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
+ linux,mtd-name = "micron,mt29f4g16abbda3w";
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
gpmc,sync-clk-ps = <0>;
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 8ba465d..4602866 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -384,8 +384,11 @@
/* Chip select 0 */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* NAND I/O window, 4 bytes */
- interrupts = <20>;
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "ham1";
nand-bus-width = <16>;
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
index e5f7f5c..a8127bc 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
@@ -261,10 +261,14 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x01000000>;
+ ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <8>;
gpmc,device-width = <1>;
ti,nand-ecc-opt = "sw";
diff --git a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
index 86850bb..b1b8ebf 100644
--- a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
+++ b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
@@ -204,7 +204,11 @@
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "sw";
diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts
index ac18865..76056ba 100644
--- a/arch/arm/boot/dts/omap3-evm-37xx.dts
+++ b/arch/arm/boot/dts/omap3-evm-37xx.dts
@@ -154,12 +154,16 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x1000000>, /* CS0: 16MB for NAND */
+ ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */
<5 0 0x2c000000 0x01000000>;
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "hynix,h8kds0un0mer-4em";
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
index 5e2d643..ab9fb8f 100644
--- a/arch/arm/boot/dts/omap3-gta04.dtsi
+++ b/arch/arm/boot/dts/omap3-gta04.dtsi
@@ -492,7 +492,11 @@
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index 3caf062..81aec99 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -95,8 +95,12 @@
&gpmc {
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "micron,mt29c4g96maz";
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-igep0020-common.dtsi b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
index d90f12c..d6f839c 100644
--- a/arch/arm/boot/dts/omap3-igep0020-common.dtsi
+++ b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
@@ -210,8 +210,8 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x20000000>,
- <5 0 0x2c000000 0x01000000>;
+ ranges = <0 0 0x30000000 0x01000000>, /* CS0: 16MB for NAND */
+ <5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */
ethernet@gpmc {
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/omap3-igep0030-common.dtsi b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
index 640f066..cd91ef0 100644
--- a/arch/arm/boot/dts/omap3-igep0030-common.dtsi
+++ b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
@@ -58,3 +58,7 @@
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
+
+&gpmc {
+ ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
+};
diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
index 5401630..2f353da 100644
--- a/arch/arm/boot/dts/omap3-ldp.dts
+++ b/arch/arm/boot/dts/omap3-ldp.dts
@@ -97,12 +97,16 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x01000000>,
- <1 0 0x08000000 0x01000000>;
+ ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */
+ <1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "micron,nand";
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
index 93f8dfe..eff816e 100644
--- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -362,7 +362,11 @@
<7 0 0x15000000 0x01000000>;
nand@0,0 {
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
/* no elm on omap3 */
diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi
index a29ad16..de256fa 100644
--- a/arch/arm/boot/dts/omap3-overo-base.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-base.dtsi
@@ -226,8 +226,12 @@
ranges = <0 0 0x00000000 0x20000000>;
nand@0,0 {
+ compatible = "ti,omap2-nand";
linux,mtd-name= "micron,mt29c4g96maz";
- reg = <0 0 0>;
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
diff --git a/arch/arm/boot/dts/omap3-pandora-common.dtsi b/arch/arm/boot/dts/omap3-pandora-common.dtsi
index 13e9d1f..bcf39d6 100644
--- a/arch/arm/boot/dts/omap3-pandora-common.dtsi
+++ b/arch/arm/boot/dts/omap3-pandora-common.dtsi
@@ -546,7 +546,11 @@
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
ti,nand-ecc-opt = "sw";
diff --git a/arch/arm/boot/dts/omap3-tao3530.dtsi b/arch/arm/boot/dts/omap3-tao3530.dtsi
index ae5dbbd..644d3c8 100644
--- a/arch/arm/boot/dts/omap3-tao3530.dtsi
+++ b/arch/arm/boot/dts/omap3-tao3530.dtsi
@@ -275,10 +275,14 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x01000000>;
+ ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
ti,nand-ecc-opt = "sw";
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index d1ffabb..b41d07e 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -723,6 +723,8 @@
gpmc,num-waitpins = <4>;
#address-cells = <2>;
#size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
};
usb_otg_hs: usb_otg_hs@480ab000 {
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index 16b0cdf..a0dc8d8 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -103,10 +103,14 @@
};
nand@1,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "micron,mt29f1g08abb";
#address-cells = <1>;
#size-cells = <1>;
- reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
ti,nand-ecc-opt = "sw";
nand-bus-width = <8>;
gpmc,cs-on-ns = <0>;
--
2.5.0
^ permalink raw reply related [flat|nested] 27+ messages in thread[parent not found: <CAHCN7xJqzgtuSW4KK93tHQh2WVRE4L5Zh6+5sGM+DZGU4qy5zg@mail.gmail.com>]
* Re: [PATCH v7 9/9] ARM: dts: omap3: Fix NAND device nodess
@ 2016-11-24 10:49 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-11-24 10:49 UTC (permalink / raw)
To: Adam Ford
Cc: Tony Lindgren, computersforpeace, ezequiel, javier, fcooper,
Sekhar Nori, linux-omap, devicetree, linux-kernel
Hi Adam
On 24/11/16 00:34, Adam Ford wrote:
>
> On Tue, Feb 23, 2016 at 10:37 AM, Roger Quadros <rogerq@ti.com <mailto:rogerq@ti.com>> wrote:
>
> Add compatible id, GPMC register resource and interrupt
> resource to NAND controller nodes.
>
> The GPMC node will provide an interrupt controller for the
> NAND IRQs.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com <mailto:rogerq@ti.com>>
> ---
> arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts | 3 ++-
> arch/arm/boot/dts/logicpd-torpedo-som.dtsi | 8 ++++++--
> arch/arm/boot/dts/omap3-beagle.dts | 5 ++++-
> arch/arm/boot/dts/omap3-cm-t3x.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3-devkit8000-common.dtsi | 4 ++++
> arch/arm/boot/dts/omap3-evm-37xx.dts | 8 ++++++--
> arch/arm/boot/dts/omap3-gta04.dtsi | 4 ++++
> arch/arm/boot/dts/omap3-igep.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3-igep0020-common.dtsi | 4 ++--
> arch/arm/boot/dts/omap3-igep0030-common.dtsi | 4 ++++
> arch/arm/boot/dts/omap3-ldp.dts | 10 +++++++---
> arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3-overo-base.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3-pandora-common.dtsi | 4 ++++
> arch/arm/boot/dts/omap3-tao3530.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3.dtsi | 2 ++
> arch/arm/boot/dts/omap3430-sdp.dts | 6 +++++-
> 17 files changed, 75 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
> index fb13f18..d0211fc 100644
> --- a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
> +++ b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
> @@ -93,7 +93,8 @@
> };
>
> &gpmc {
> - ranges = <1 0 0x08000000 0x1000000>; /* CS1: 16MB for LAN9221 */
> + ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
> + 1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */
>
> I just noticed this change earlier today, and I have question.
>
> There is a DTS and a DTSI file. The DTSI has the NAND information and the range was updated. If this was included in the dts, is there really a need to add the CS0 range info in the dts file as well?
>
> My preference would be to eliminate the new CS0 entry in the DTS file and leave the update in the DTSI. Is that reasonable, or am I missing something?
The ranges property will be overridden so you can't have only CS0 defined in .dtsi
and CS1 defined in the .dts. You will have to either define both in .dts and
remove the ranges property from the .dts or define both in the .dts.
AFAIK .dtsi file didn't have CS1 range so I had to define both CS0 and CS1 in the .dts.
>
>
> ethernet@gpmc {
> pinctrl-names = "default";
> diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
> index 7fed0bd..b46789a 100644
> --- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
> +++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
> @@ -35,11 +35,15 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
> + ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
>
>
> From what I can tell this exactly matches the same entry listed above in the dtsi.
>
Yes, but we don't have CS1 here.
If all torpedo boards don't have CS1 in use then we can't define CS1 here.
cheers,
-roger
> adam
>
>
> nand@0,0 {
> - linux,mtd-name = "micron,mt29f4g16abbda3w";
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> + linux,mtd-name = "micron,mt29f4g16abbda3w";
> nand-bus-width = <16>;
> ti,nand-ecc-opt = "bch8";
> gpmc,sync-clk-ps = <0>;
> diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
> index 8ba465d..4602866 100644
> --- a/arch/arm/boot/dts/omap3-beagle.dts
> +++ b/arch/arm/boot/dts/omap3-beagle.dts
> @@ -384,8 +384,11 @@
>
> /* Chip select 0 */
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* NAND I/O window, 4 bytes */
> - interrupts = <20>;
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> ti,nand-ecc-opt = "ham1";
> nand-bus-width = <16>;
> #address-cells = <1>;
> diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
> index e5f7f5c..a8127bc 100644
> --- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi
> +++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
> @@ -261,10 +261,14 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x01000000>;
> + ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <8>;
> gpmc,device-width = <1>;
> ti,nand-ecc-opt = "sw";
> diff --git a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
> index 86850bb..b1b8ebf 100644
> --- a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
> +++ b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
> @@ -204,7 +204,11 @@
> ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "sw";
> diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts
> index ac18865..76056ba 100644
> --- a/arch/arm/boot/dts/omap3-evm-37xx.dts
> +++ b/arch/arm/boot/dts/omap3-evm-37xx.dts
> @@ -154,12 +154,16 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x1000000>, /* CS0: 16MB for NAND */
> + ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */
> <5 0 0x2c000000 0x01000000>;
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> linux,mtd-name= "hynix,h8kds0un0mer-4em";
> - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "bch8";
> diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
> index 5e2d643..ab9fb8f 100644
> --- a/arch/arm/boot/dts/omap3-gta04.dtsi
> +++ b/arch/arm/boot/dts/omap3-gta04.dtsi
> @@ -492,7 +492,11 @@
> ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> ti,nand-ecc-opt = "bch8";
>
> diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
> index 3caf062..81aec99 100644
> --- a/arch/arm/boot/dts/omap3-igep.dtsi
> +++ b/arch/arm/boot/dts/omap3-igep.dtsi
> @@ -95,8 +95,12 @@
>
> &gpmc {
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> linux,mtd-name= "micron,mt29c4g96maz";
> - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "bch8";
> diff --git a/arch/arm/boot/dts/omap3-igep0020-common.dtsi b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
> index d90f12c..d6f839c 100644
> --- a/arch/arm/boot/dts/omap3-igep0020-common.dtsi
> +++ b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
> @@ -210,8 +210,8 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x20000000>,
> - <5 0 0x2c000000 0x01000000>;
> + ranges = <0 0 0x30000000 0x01000000>, /* CS0: 16MB for NAND */
> + <5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */
>
> ethernet@gpmc {
> pinctrl-names = "default";
> diff --git a/arch/arm/boot/dts/omap3-igep0030-common.dtsi b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
> index 640f066..cd91ef0 100644
> --- a/arch/arm/boot/dts/omap3-igep0030-common.dtsi
> +++ b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
> @@ -58,3 +58,7 @@
> pinctrl-names = "default";
> pinctrl-0 = <&uart2_pins>;
> };
> +
> +&gpmc {
> + ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
> +};
> diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
> index 5401630..2f353da 100644
> --- a/arch/arm/boot/dts/omap3-ldp.dts
> +++ b/arch/arm/boot/dts/omap3-ldp.dts
> @@ -97,12 +97,16 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x01000000>,
> - <1 0 0x08000000 0x01000000>;
> + ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */
> + <1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> linux,mtd-name= "micron,nand";
> - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "bch8";
> diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
> index 93f8dfe..eff816e 100644
> --- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
> +++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
> @@ -362,7 +362,11 @@
> <7 0 0x15000000 0x01000000>;
>
> nand@0,0 {
> - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> ti,nand-ecc-opt = "bch8";
> /* no elm on omap3 */
> diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi
> index a29ad16..de256fa 100644
> --- a/arch/arm/boot/dts/omap3-overo-base.dtsi
> +++ b/arch/arm/boot/dts/omap3-overo-base.dtsi
> @@ -226,8 +226,12 @@
> ranges = <0 0 0x00000000 0x20000000>;
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> linux,mtd-name= "micron,mt29c4g96maz";
> - reg = <0 0 0>;
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "bch8";
> diff --git a/arch/arm/boot/dts/omap3-pandora-common.dtsi b/arch/arm/boot/dts/omap3-pandora-common.dtsi
> index 13e9d1f..bcf39d6 100644
> --- a/arch/arm/boot/dts/omap3-pandora-common.dtsi
> +++ b/arch/arm/boot/dts/omap3-pandora-common.dtsi
> @@ -546,7 +546,11 @@
> ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> ti,nand-ecc-opt = "sw";
>
> diff --git a/arch/arm/boot/dts/omap3-tao3530.dtsi b/arch/arm/boot/dts/omap3-tao3530.dtsi
> index ae5dbbd..644d3c8 100644
> --- a/arch/arm/boot/dts/omap3-tao3530.dtsi
> +++ b/arch/arm/boot/dts/omap3-tao3530.dtsi
> @@ -275,10 +275,14 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x01000000>;
> + ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
> ti,nand-ecc-opt = "sw";
> diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> index d1ffabb..b41d07e 100644
> --- a/arch/arm/boot/dts/omap3.dtsi
> +++ b/arch/arm/boot/dts/omap3.dtsi
> @@ -723,6 +723,8 @@
> gpmc,num-waitpins = <4>;
> #address-cells = <2>;
> #size-cells = <1>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> };
>
> usb_otg_hs: usb_otg_hs@480ab000 {
> diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
> index 16b0cdf..a0dc8d8 100644
> --- a/arch/arm/boot/dts/omap3430-sdp.dts
> +++ b/arch/arm/boot/dts/omap3430-sdp.dts
> @@ -103,10 +103,14 @@
> };
>
> nand@1,0 {
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> linux,mtd-name= "micron,mt29f1g08abb";
> #address-cells = <1>;
> #size-cells = <1>;
> - reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
> ti,nand-ecc-opt = "sw";
> nand-bus-width = <8>;
> gpmc,cs-on-ns = <0>;
> --
> 2.5.0
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org <mailto:majordomo@vger.kernel.org>
> More majordomo info at http://vger.kernel.org/majordomo-info.html <http://vger.kernel.org/majordomo-info.html>
>
>
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v7 9/9] ARM: dts: omap3: Fix NAND device nodess
@ 2016-11-24 10:49 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-11-24 10:49 UTC (permalink / raw)
To: Adam Ford
Cc: Tony Lindgren, computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
ezequiel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ,
javier-0uQlZySMnqxg9hUCZPvPmw, fcooper-l0cyMroinI0, Sekhar Nori,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Hi Adam
On 24/11/16 00:34, Adam Ford wrote:
>
> On Tue, Feb 23, 2016 at 10:37 AM, Roger Quadros <rogerq-l0cyMroinI0@public.gmane.org <mailto:rogerq-l0cyMroinI0@public.gmane.org>> wrote:
>
> Add compatible id, GPMC register resource and interrupt
> resource to NAND controller nodes.
>
> The GPMC node will provide an interrupt controller for the
> NAND IRQs.
>
> Signed-off-by: Roger Quadros <rogerq-l0cyMroinI0@public.gmane.org <mailto:rogerq-l0cyMroinI0@public.gmane.org>>
> ---
> arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts | 3 ++-
> arch/arm/boot/dts/logicpd-torpedo-som.dtsi | 8 ++++++--
> arch/arm/boot/dts/omap3-beagle.dts | 5 ++++-
> arch/arm/boot/dts/omap3-cm-t3x.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3-devkit8000-common.dtsi | 4 ++++
> arch/arm/boot/dts/omap3-evm-37xx.dts | 8 ++++++--
> arch/arm/boot/dts/omap3-gta04.dtsi | 4 ++++
> arch/arm/boot/dts/omap3-igep.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3-igep0020-common.dtsi | 4 ++--
> arch/arm/boot/dts/omap3-igep0030-common.dtsi | 4 ++++
> arch/arm/boot/dts/omap3-ldp.dts | 10 +++++++---
> arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3-overo-base.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3-pandora-common.dtsi | 4 ++++
> arch/arm/boot/dts/omap3-tao3530.dtsi | 6 +++++-
> arch/arm/boot/dts/omap3.dtsi | 2 ++
> arch/arm/boot/dts/omap3430-sdp.dts | 6 +++++-
> 17 files changed, 75 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
> index fb13f18..d0211fc 100644
> --- a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
> +++ b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
> @@ -93,7 +93,8 @@
> };
>
> &gpmc {
> - ranges = <1 0 0x08000000 0x1000000>; /* CS1: 16MB for LAN9221 */
> + ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
> + 1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */
>
> I just noticed this change earlier today, and I have question.
>
> There is a DTS and a DTSI file. The DTSI has the NAND information and the range was updated. If this was included in the dts, is there really a need to add the CS0 range info in the dts file as well?
>
> My preference would be to eliminate the new CS0 entry in the DTS file and leave the update in the DTSI. Is that reasonable, or am I missing something?
The ranges property will be overridden so you can't have only CS0 defined in .dtsi
and CS1 defined in the .dts. You will have to either define both in .dts and
remove the ranges property from the .dts or define both in the .dts.
AFAIK .dtsi file didn't have CS1 range so I had to define both CS0 and CS1 in the .dts.
>
>
> ethernet@gpmc {
> pinctrl-names = "default";
> diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
> index 7fed0bd..b46789a 100644
> --- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
> +++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
> @@ -35,11 +35,15 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
> + ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
>
>
> From what I can tell this exactly matches the same entry listed above in the dtsi.
>
Yes, but we don't have CS1 here.
If all torpedo boards don't have CS1 in use then we can't define CS1 here.
cheers,
-roger
> adam
>
>
> nand@0,0 {
> - linux,mtd-name = "micron,mt29f4g16abbda3w";
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> + linux,mtd-name = "micron,mt29f4g16abbda3w";
> nand-bus-width = <16>;
> ti,nand-ecc-opt = "bch8";
> gpmc,sync-clk-ps = <0>;
> diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
> index 8ba465d..4602866 100644
> --- a/arch/arm/boot/dts/omap3-beagle.dts
> +++ b/arch/arm/boot/dts/omap3-beagle.dts
> @@ -384,8 +384,11 @@
>
> /* Chip select 0 */
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* NAND I/O window, 4 bytes */
> - interrupts = <20>;
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> ti,nand-ecc-opt = "ham1";
> nand-bus-width = <16>;
> #address-cells = <1>;
> diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
> index e5f7f5c..a8127bc 100644
> --- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi
> +++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
> @@ -261,10 +261,14 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x01000000>;
> + ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <8>;
> gpmc,device-width = <1>;
> ti,nand-ecc-opt = "sw";
> diff --git a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
> index 86850bb..b1b8ebf 100644
> --- a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
> +++ b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
> @@ -204,7 +204,11 @@
> ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "sw";
> diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts
> index ac18865..76056ba 100644
> --- a/arch/arm/boot/dts/omap3-evm-37xx.dts
> +++ b/arch/arm/boot/dts/omap3-evm-37xx.dts
> @@ -154,12 +154,16 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x1000000>, /* CS0: 16MB for NAND */
> + ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */
> <5 0 0x2c000000 0x01000000>;
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> linux,mtd-name= "hynix,h8kds0un0mer-4em";
> - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "bch8";
> diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
> index 5e2d643..ab9fb8f 100644
> --- a/arch/arm/boot/dts/omap3-gta04.dtsi
> +++ b/arch/arm/boot/dts/omap3-gta04.dtsi
> @@ -492,7 +492,11 @@
> ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> ti,nand-ecc-opt = "bch8";
>
> diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
> index 3caf062..81aec99 100644
> --- a/arch/arm/boot/dts/omap3-igep.dtsi
> +++ b/arch/arm/boot/dts/omap3-igep.dtsi
> @@ -95,8 +95,12 @@
>
> &gpmc {
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> linux,mtd-name= "micron,mt29c4g96maz";
> - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "bch8";
> diff --git a/arch/arm/boot/dts/omap3-igep0020-common.dtsi b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
> index d90f12c..d6f839c 100644
> --- a/arch/arm/boot/dts/omap3-igep0020-common.dtsi
> +++ b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
> @@ -210,8 +210,8 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x20000000>,
> - <5 0 0x2c000000 0x01000000>;
> + ranges = <0 0 0x30000000 0x01000000>, /* CS0: 16MB for NAND */
> + <5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */
>
> ethernet@gpmc {
> pinctrl-names = "default";
> diff --git a/arch/arm/boot/dts/omap3-igep0030-common.dtsi b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
> index 640f066..cd91ef0 100644
> --- a/arch/arm/boot/dts/omap3-igep0030-common.dtsi
> +++ b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
> @@ -58,3 +58,7 @@
> pinctrl-names = "default";
> pinctrl-0 = <&uart2_pins>;
> };
> +
> +&gpmc {
> + ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
> +};
> diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
> index 5401630..2f353da 100644
> --- a/arch/arm/boot/dts/omap3-ldp.dts
> +++ b/arch/arm/boot/dts/omap3-ldp.dts
> @@ -97,12 +97,16 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x01000000>,
> - <1 0 0x08000000 0x01000000>;
> + ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */
> + <1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> linux,mtd-name= "micron,nand";
> - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "bch8";
> diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
> index 93f8dfe..eff816e 100644
> --- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
> +++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
> @@ -362,7 +362,11 @@
> <7 0 0x15000000 0x01000000>;
>
> nand@0,0 {
> - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> ti,nand-ecc-opt = "bch8";
> /* no elm on omap3 */
> diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi
> index a29ad16..de256fa 100644
> --- a/arch/arm/boot/dts/omap3-overo-base.dtsi
> +++ b/arch/arm/boot/dts/omap3-overo-base.dtsi
> @@ -226,8 +226,12 @@
> ranges = <0 0 0x00000000 0x20000000>;
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> linux,mtd-name= "micron,mt29c4g96maz";
> - reg = <0 0 0>;
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> gpmc,device-width = <2>;
> ti,nand-ecc-opt = "bch8";
> diff --git a/arch/arm/boot/dts/omap3-pandora-common.dtsi b/arch/arm/boot/dts/omap3-pandora-common.dtsi
> index 13e9d1f..bcf39d6 100644
> --- a/arch/arm/boot/dts/omap3-pandora-common.dtsi
> +++ b/arch/arm/boot/dts/omap3-pandora-common.dtsi
> @@ -546,7 +546,11 @@
> ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> ti,nand-ecc-opt = "sw";
>
> diff --git a/arch/arm/boot/dts/omap3-tao3530.dtsi b/arch/arm/boot/dts/omap3-tao3530.dtsi
> index ae5dbbd..644d3c8 100644
> --- a/arch/arm/boot/dts/omap3-tao3530.dtsi
> +++ b/arch/arm/boot/dts/omap3-tao3530.dtsi
> @@ -275,10 +275,14 @@
> };
>
> &gpmc {
> - ranges = <0 0 0x00000000 0x01000000>;
> + ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
>
> nand@0,0 {
> + compatible = "ti,omap2-nand";
> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> nand-bus-width = <16>;
> gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
> ti,nand-ecc-opt = "sw";
> diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> index d1ffabb..b41d07e 100644
> --- a/arch/arm/boot/dts/omap3.dtsi
> +++ b/arch/arm/boot/dts/omap3.dtsi
> @@ -723,6 +723,8 @@
> gpmc,num-waitpins = <4>;
> #address-cells = <2>;
> #size-cells = <1>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> };
>
> usb_otg_hs: usb_otg_hs@480ab000 {
> diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
> index 16b0cdf..a0dc8d8 100644
> --- a/arch/arm/boot/dts/omap3430-sdp.dts
> +++ b/arch/arm/boot/dts/omap3430-sdp.dts
> @@ -103,10 +103,14 @@
> };
>
> nand@1,0 {
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
> + interrupt-parent = <&gpmc>;
> + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
> + <1 IRQ_TYPE_NONE>; /* termcount */
> linux,mtd-name= "micron,mt29f1g08abb";
> #address-cells = <1>;
> #size-cells = <1>;
> - reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
> ti,nand-ecc-opt = "sw";
> nand-bus-width = <8>;
> gpmc,cs-on-ns = <0>;
> --
> 2.5.0
>
> --
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^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v7 0/9] ARM: dts: omap2+: GPMC NAND node fixes
2016-02-23 16:37 ` Roger Quadros
` (9 preceding siblings ...)
(?)
@ 2016-02-26 18:44 ` Tony Lindgren
2016-02-29 16:13 ` Roger Quadros
-1 siblings, 1 reply; 27+ messages in thread
From: Tony Lindgren @ 2016-02-26 18:44 UTC (permalink / raw)
To: Roger Quadros
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel
Hi,
* Roger Quadros <rogerq@ti.com> [160223 08:37]:
> Hi Tony,
>
> These patches are a preparatory step towards the NAND DT cleanup
> done in [1].
OK great NAND keeps working for me. I've pushed these into an
immutable branch against v4.5-r1 named omap-for-v4.6/dt-gpmc.
I have also merged that branch into omap-for-v4.6/dt.
Please feel free to use omap-for-v4.6/dt-gpmc branch as an
immutable base for the GPMC driver changes.
And please let me know what additional patches I may need to
apply into omap-for-v4.6/dt for new files that are not in
omap-for-v4.6/dt-gpmc.
Note that I also fixed two typos below:
> Roger Quadros (9):
> ARM: dts: dra7: Fix NAND device nodes.
I removed the trailing period here.
> ARM: dts: dra7: Remove redundant nand property
> ARM: dts: am437x: Fix NAND device nodes
> ARM: dts: am437x: Disable wait pin monitoring for NAND
> ARM: dts: am335x: Fix NAND device nodes
> ARM: dts: am335x: Disable wait pin monitoring for NAND
> ARM: dts: dm816x: Fix NAND device nodes
> ARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND
> ARM: dts: omap3: Fix NAND device nodess
I removed the extra s in nodes here.
Regards,
Tony
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v7 0/9] ARM: dts: omap2+: GPMC NAND node fixes
@ 2016-02-29 16:13 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-29 16:13 UTC (permalink / raw)
To: Tony Lindgren
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel
Tony,
On 26/02/16 20:44, Tony Lindgren wrote:
> Hi,
>
> * Roger Quadros <rogerq@ti.com> [160223 08:37]:
>> Hi Tony,
>>
>> These patches are a preparatory step towards the NAND DT cleanup
>> done in [1].
>
> OK great NAND keeps working for me. I've pushed these into an
> immutable branch against v4.5-r1 named omap-for-v4.6/dt-gpmc.
>
> I have also merged that branch into omap-for-v4.6/dt.
>
> Please feel free to use omap-for-v4.6/dt-gpmc branch as an
> immutable base for the GPMC driver changes.
Thanks.
>
> And please let me know what additional patches I may need to
> apply into omap-for-v4.6/dt for new files that are not in
> omap-for-v4.6/dt-gpmc.
We need to fix the following
gpmc node in dm814x.dtsi + nand node in dra62x-j5eco-evm.dts + nand node in dm8148-evm.
>
> Note that I also fixed two typos below:
Thanks :)
cheers,
-roger
>
>> Roger Quadros (9):
>> ARM: dts: dra7: Fix NAND device nodes.
>
> I removed the trailing period here.
>
>> ARM: dts: dra7: Remove redundant nand property
>> ARM: dts: am437x: Fix NAND device nodes
>> ARM: dts: am437x: Disable wait pin monitoring for NAND
>> ARM: dts: am335x: Fix NAND device nodes
>> ARM: dts: am335x: Disable wait pin monitoring for NAND
>> ARM: dts: dm816x: Fix NAND device nodes
>> ARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND
>> ARM: dts: omap3: Fix NAND device nodess
>
> I removed the extra s in nodes here.
>
> Regards,
>
> Tony
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v7 0/9] ARM: dts: omap2+: GPMC NAND node fixes
@ 2016-02-29 16:13 ` Roger Quadros
0 siblings, 0 replies; 27+ messages in thread
From: Roger Quadros @ 2016-02-29 16:13 UTC (permalink / raw)
To: Tony Lindgren
Cc: computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
ezequiel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ,
javier-0uQlZySMnqxg9hUCZPvPmw, fcooper-l0cyMroinI0,
nsekhar-l0cyMroinI0, linux-omap-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Tony,
On 26/02/16 20:44, Tony Lindgren wrote:
> Hi,
>
> * Roger Quadros <rogerq-l0cyMroinI0@public.gmane.org> [160223 08:37]:
>> Hi Tony,
>>
>> These patches are a preparatory step towards the NAND DT cleanup
>> done in [1].
>
> OK great NAND keeps working for me. I've pushed these into an
> immutable branch against v4.5-r1 named omap-for-v4.6/dt-gpmc.
>
> I have also merged that branch into omap-for-v4.6/dt.
>
> Please feel free to use omap-for-v4.6/dt-gpmc branch as an
> immutable base for the GPMC driver changes.
Thanks.
>
> And please let me know what additional patches I may need to
> apply into omap-for-v4.6/dt for new files that are not in
> omap-for-v4.6/dt-gpmc.
We need to fix the following
gpmc node in dm814x.dtsi + nand node in dra62x-j5eco-evm.dts + nand node in dm8148-evm.
>
> Note that I also fixed two typos below:
Thanks :)
cheers,
-roger
>
>> Roger Quadros (9):
>> ARM: dts: dra7: Fix NAND device nodes.
>
> I removed the trailing period here.
>
>> ARM: dts: dra7: Remove redundant nand property
>> ARM: dts: am437x: Fix NAND device nodes
>> ARM: dts: am437x: Disable wait pin monitoring for NAND
>> ARM: dts: am335x: Fix NAND device nodes
>> ARM: dts: am335x: Disable wait pin monitoring for NAND
>> ARM: dts: dm816x: Fix NAND device nodes
>> ARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND
>> ARM: dts: omap3: Fix NAND device nodess
>
> I removed the extra s in nodes here.
>
> Regards,
>
> Tony
>
--
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^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v7 0/9] ARM: dts: omap2+: GPMC NAND node fixes
@ 2016-02-29 17:17 ` Tony Lindgren
0 siblings, 0 replies; 27+ messages in thread
From: Tony Lindgren @ 2016-02-29 17:17 UTC (permalink / raw)
To: Roger Quadros
Cc: computersforpeace, ezequiel, javier, fcooper, nsekhar,
linux-omap, devicetree, linux-kernel
* Roger Quadros <rogerq@ti.com> [160229 08:14]:
> On 26/02/16 20:44, Tony Lindgren wrote:
> > And please let me know what additional patches I may need to
> > apply into omap-for-v4.6/dt for new files that are not in
> > omap-for-v4.6/dt-gpmc.
>
> We need to fix the following
> gpmc node in dm814x.dtsi + nand node in dra62x-j5eco-evm.dts + nand node in dm8148-evm.
OK can you send that separately and I'll apply it?
Regards,
Tony
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v7 0/9] ARM: dts: omap2+: GPMC NAND node fixes
@ 2016-02-29 17:17 ` Tony Lindgren
0 siblings, 0 replies; 27+ messages in thread
From: Tony Lindgren @ 2016-02-29 17:17 UTC (permalink / raw)
To: Roger Quadros
Cc: computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
ezequiel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ,
javier-0uQlZySMnqxg9hUCZPvPmw, fcooper-l0cyMroinI0,
nsekhar-l0cyMroinI0, linux-omap-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
* Roger Quadros <rogerq-l0cyMroinI0@public.gmane.org> [160229 08:14]:
> On 26/02/16 20:44, Tony Lindgren wrote:
> > And please let me know what additional patches I may need to
> > apply into omap-for-v4.6/dt for new files that are not in
> > omap-for-v4.6/dt-gpmc.
>
> We need to fix the following
> gpmc node in dm814x.dtsi + nand node in dra62x-j5eco-evm.dts + nand node in dm8148-evm.
OK can you send that separately and I'll apply it?
Regards,
Tony
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To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 27+ messages in thread