From: Andre Przywara <andre.przywara@arm.com> To: Christoffer Dall <christoffer.dall@linaro.org>, Marc Zyngier <marc.zyngier@arm.com>, Eric Auger <eric.auger@linaro.org> Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Subject: [RFC PATCH 04/45] KVM: arm/arm64: vgic-new: Add data structure definitions Date: Fri, 25 Mar 2016 02:04:27 +0000 [thread overview] Message-ID: <1458871508-17279-5-git-send-email-andre.przywara@arm.com> (raw) In-Reply-To: <1458871508-17279-1-git-send-email-andre.przywara@arm.com> From: Christoffer Dall <christoffer.dall@linaro.org> Add a new header file for the new and improved GIC implementation. The big change is that we now have a struct vgic_irq per IRQ instead of spreading all the information over various bitmaps. We include this new header conditionally from within the old header file for the time being to avoid touching all the users. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- include/kvm/arm_vgic.h | 5 ++ include/kvm/vgic/vgic.h | 198 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 203 insertions(+) create mode 100644 include/kvm/vgic/vgic.h diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index 7656a46..db289a2 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -19,6 +19,10 @@ #ifndef __ASM_ARM_KVM_VGIC_H #define __ASM_ARM_KVM_VGIC_H +#ifdef CONFIG_KVM_NEW_VGIC +#include <kvm/vgic/vgic.h> +#else + #include <linux/kernel.h> #include <linux/kvm.h> #include <linux/irqreturn.h> @@ -376,4 +380,5 @@ static inline int vgic_v3_probe(struct device_node *vgic_node, } #endif +#endif /* old VGIC include */ #endif diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h new file mode 100644 index 0000000..659f8b1 --- /dev/null +++ b/include/kvm/vgic/vgic.h @@ -0,0 +1,198 @@ +/* + * Copyright (C) 2015, 2016 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __ASM_ARM_KVM_VGIC_VGIC_H +#define __ASM_ARM_KVM_VGIC_VGIC_H + +#include <linux/kernel.h> +#include <linux/kvm.h> +#include <linux/irqreturn.h> +#include <linux/spinlock.h> +#include <linux/types.h> +#include <kvm/iodev.h> + +#define VGIC_V3_MAX_CPUS 255 +#define VGIC_V2_MAX_CPUS 8 +#define VGIC_NR_IRQS_LEGACY 256 +#define VGIC_NR_SGIS 16 +#define VGIC_NR_PPIS 16 +#define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS) +#define VGIC_MAX_PRIVATE (VGIC_NR_PRIVATE_IRQS - 1) +#define VGIC_MAX_SPI 1019 +#define VGIC_MAX_RESERVED 1023 +#define VGIC_MIN_LPI 8192 + +enum vgic_type { + VGIC_V2, /* Good ol' GICv2 */ + VGIC_V3, /* New fancy GICv3 */ +}; + +/* same for all guests, as depending only on the _host's_ GIC model */ +struct vgic_global { + /* type of the host GIC */ + enum vgic_type type; + + /* Physical address of vgic virtual cpu interface */ + phys_addr_t vcpu_base; + + /* virtual control interface mapping */ + void __iomem *vctrl_base; + + /* Number of implemented list registers */ + int nr_lr; + + /* Maintenance IRQ number */ + unsigned int maint_irq; + + /* maximum number of VCPUs allowed (GICv2 limits us to 8) */ + int max_gic_vcpus; + + /* Only needed for the legacy KVM_CREATE_IRQCHIP */ + bool can_emulate_gicv2; +}; + +extern struct vgic_global kvm_vgic_global_state; + +#define VGIC_V2_MAX_LRS (1 << 6) +#define VGIC_V3_MAX_LRS 16 +#define VGIC_V3_LR_INDEX(lr) (VGIC_V3_MAX_LRS - 1 - lr) + +enum vgic_irq_config { + VGIC_CONFIG_EDGE = 0, + VGIC_CONFIG_LEVEL +}; + +struct vgic_irq { + spinlock_t irq_lock; /* Protects the content of the struct */ + struct list_head ap_list; + + struct kvm_vcpu *vcpu; /* SGIs and PPIs: The VCPU + * SPIs and LPIs: The VCPU whose ap_list + * on which this is queued. + */ + + struct kvm_vcpu *target_vcpu; /* The VCPU that this interrupt should + * be send to, as a result of the + * targets reg (v2) or the + * affinity reg (v3). + */ + + u32 intid; /* Guest visible INTID */ + bool pending; + bool line_level; /* Level only */ + bool soft_pending; /* Level only */ + bool active; /* not used for LPIs */ + bool enabled; + bool hw; /* Tied to HW IRQ */ + u32 hwintid; /* HW INTID number */ + union { + u8 targets; /* GICv2 target VCPUs mask */ + u32 mpidr; /* GICv3 target VCPU */ + }; + u8 source; /* GICv2 SGIs only */ + u8 priority; + enum vgic_irq_config config; /* Level or edge */ +}; + +struct vgic_dist { + bool in_kernel; + bool ready; + + /* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */ + u32 vgic_model; + + int nr_spis; + + /* TODO: Consider moving to global state */ + /* Virtual control interface mapping */ + void __iomem *vctrl_base; + + /* base addresses in guest physical address space: */ + gpa_t vgic_dist_base; /* distributor */ + union { + /* either a GICv2 CPU interface */ + gpa_t vgic_cpu_base; + /* or a number of GICv3 redistributor regions */ + gpa_t vgic_redist_base; + }; + + /* distributor enabled */ + u32 enabled; + + struct vgic_irq *spis; +}; + +struct vgic_v2_cpu_if { + u32 vgic_hcr; + u32 vgic_vmcr; + u32 vgic_misr; /* Saved only */ + u64 vgic_eisr; /* Saved only */ + u64 vgic_elrsr; /* Saved only */ + u32 vgic_apr; + u32 vgic_lr[VGIC_V2_MAX_LRS]; +}; + +struct vgic_v3_cpu_if { +#ifdef CONFIG_KVM_ARM_VGIC_V3 + u32 vgic_hcr; + u32 vgic_vmcr; + u32 vgic_sre; /* Restored only, change ignored */ + u32 vgic_misr; /* Saved only */ + u32 vgic_eisr; /* Saved only */ + u32 vgic_elrsr; /* Saved only */ + u32 vgic_ap0r[4]; + u32 vgic_ap1r[4]; + u64 vgic_lr[VGIC_V3_MAX_LRS]; +#endif +}; + +struct vgic_cpu { + /* CPU vif control registers for world switch */ + union { + struct vgic_v2_cpu_if vgic_v2; + struct vgic_v3_cpu_if vgic_v3; + }; + + /* TODO: Move nr_lr to a global state */ + /* Number of list registers on this CPU */ + int nr_lr; + + unsigned int used_lrs; + struct vgic_irq private_irqs[VGIC_NR_PRIVATE_IRQS]; + + spinlock_t ap_list_lock; /* Protects the ap_list */ + + /* list of IRQs for this VCPU to consider */ + struct list_head ap_list_head; +}; + +#define irqchip_in_kernel(k) (!!((k)->arch.vgic.in_kernel)) +#define vgic_initialized(k) (false) +#define vgic_ready(k) ((k)->arch.vgic.ready) +#define vgic_valid_spi(k,i) (((i) >= VGIC_NR_PRIVATE_IRQS) && \ + ((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) + +/** + * kvm_vgic_get_max_vcpus - Get the maximum number of VCPUs allowed by HW + * + * The host's GIC naturally limits the maximum amount of VCPUs a guest + * can use. + */ +static inline int kvm_vgic_get_max_vcpus(void) +{ + return kvm_vgic_global_state.max_gic_vcpus; +} + +#endif /* __ASM_ARM_KVM_VGIC_VGIC_H */ -- 2.7.3
WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara) To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 04/45] KVM: arm/arm64: vgic-new: Add data structure definitions Date: Fri, 25 Mar 2016 02:04:27 +0000 [thread overview] Message-ID: <1458871508-17279-5-git-send-email-andre.przywara@arm.com> (raw) In-Reply-To: <1458871508-17279-1-git-send-email-andre.przywara@arm.com> From: Christoffer Dall <christoffer.dall@linaro.org> Add a new header file for the new and improved GIC implementation. The big change is that we now have a struct vgic_irq per IRQ instead of spreading all the information over various bitmaps. We include this new header conditionally from within the old header file for the time being to avoid touching all the users. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- include/kvm/arm_vgic.h | 5 ++ include/kvm/vgic/vgic.h | 198 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 203 insertions(+) create mode 100644 include/kvm/vgic/vgic.h diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index 7656a46..db289a2 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -19,6 +19,10 @@ #ifndef __ASM_ARM_KVM_VGIC_H #define __ASM_ARM_KVM_VGIC_H +#ifdef CONFIG_KVM_NEW_VGIC +#include <kvm/vgic/vgic.h> +#else + #include <linux/kernel.h> #include <linux/kvm.h> #include <linux/irqreturn.h> @@ -376,4 +380,5 @@ static inline int vgic_v3_probe(struct device_node *vgic_node, } #endif +#endif /* old VGIC include */ #endif diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h new file mode 100644 index 0000000..659f8b1 --- /dev/null +++ b/include/kvm/vgic/vgic.h @@ -0,0 +1,198 @@ +/* + * Copyright (C) 2015, 2016 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __ASM_ARM_KVM_VGIC_VGIC_H +#define __ASM_ARM_KVM_VGIC_VGIC_H + +#include <linux/kernel.h> +#include <linux/kvm.h> +#include <linux/irqreturn.h> +#include <linux/spinlock.h> +#include <linux/types.h> +#include <kvm/iodev.h> + +#define VGIC_V3_MAX_CPUS 255 +#define VGIC_V2_MAX_CPUS 8 +#define VGIC_NR_IRQS_LEGACY 256 +#define VGIC_NR_SGIS 16 +#define VGIC_NR_PPIS 16 +#define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS) +#define VGIC_MAX_PRIVATE (VGIC_NR_PRIVATE_IRQS - 1) +#define VGIC_MAX_SPI 1019 +#define VGIC_MAX_RESERVED 1023 +#define VGIC_MIN_LPI 8192 + +enum vgic_type { + VGIC_V2, /* Good ol' GICv2 */ + VGIC_V3, /* New fancy GICv3 */ +}; + +/* same for all guests, as depending only on the _host's_ GIC model */ +struct vgic_global { + /* type of the host GIC */ + enum vgic_type type; + + /* Physical address of vgic virtual cpu interface */ + phys_addr_t vcpu_base; + + /* virtual control interface mapping */ + void __iomem *vctrl_base; + + /* Number of implemented list registers */ + int nr_lr; + + /* Maintenance IRQ number */ + unsigned int maint_irq; + + /* maximum number of VCPUs allowed (GICv2 limits us to 8) */ + int max_gic_vcpus; + + /* Only needed for the legacy KVM_CREATE_IRQCHIP */ + bool can_emulate_gicv2; +}; + +extern struct vgic_global kvm_vgic_global_state; + +#define VGIC_V2_MAX_LRS (1 << 6) +#define VGIC_V3_MAX_LRS 16 +#define VGIC_V3_LR_INDEX(lr) (VGIC_V3_MAX_LRS - 1 - lr) + +enum vgic_irq_config { + VGIC_CONFIG_EDGE = 0, + VGIC_CONFIG_LEVEL +}; + +struct vgic_irq { + spinlock_t irq_lock; /* Protects the content of the struct */ + struct list_head ap_list; + + struct kvm_vcpu *vcpu; /* SGIs and PPIs: The VCPU + * SPIs and LPIs: The VCPU whose ap_list + * on which this is queued. + */ + + struct kvm_vcpu *target_vcpu; /* The VCPU that this interrupt should + * be send to, as a result of the + * targets reg (v2) or the + * affinity reg (v3). + */ + + u32 intid; /* Guest visible INTID */ + bool pending; + bool line_level; /* Level only */ + bool soft_pending; /* Level only */ + bool active; /* not used for LPIs */ + bool enabled; + bool hw; /* Tied to HW IRQ */ + u32 hwintid; /* HW INTID number */ + union { + u8 targets; /* GICv2 target VCPUs mask */ + u32 mpidr; /* GICv3 target VCPU */ + }; + u8 source; /* GICv2 SGIs only */ + u8 priority; + enum vgic_irq_config config; /* Level or edge */ +}; + +struct vgic_dist { + bool in_kernel; + bool ready; + + /* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */ + u32 vgic_model; + + int nr_spis; + + /* TODO: Consider moving to global state */ + /* Virtual control interface mapping */ + void __iomem *vctrl_base; + + /* base addresses in guest physical address space: */ + gpa_t vgic_dist_base; /* distributor */ + union { + /* either a GICv2 CPU interface */ + gpa_t vgic_cpu_base; + /* or a number of GICv3 redistributor regions */ + gpa_t vgic_redist_base; + }; + + /* distributor enabled */ + u32 enabled; + + struct vgic_irq *spis; +}; + +struct vgic_v2_cpu_if { + u32 vgic_hcr; + u32 vgic_vmcr; + u32 vgic_misr; /* Saved only */ + u64 vgic_eisr; /* Saved only */ + u64 vgic_elrsr; /* Saved only */ + u32 vgic_apr; + u32 vgic_lr[VGIC_V2_MAX_LRS]; +}; + +struct vgic_v3_cpu_if { +#ifdef CONFIG_KVM_ARM_VGIC_V3 + u32 vgic_hcr; + u32 vgic_vmcr; + u32 vgic_sre; /* Restored only, change ignored */ + u32 vgic_misr; /* Saved only */ + u32 vgic_eisr; /* Saved only */ + u32 vgic_elrsr; /* Saved only */ + u32 vgic_ap0r[4]; + u32 vgic_ap1r[4]; + u64 vgic_lr[VGIC_V3_MAX_LRS]; +#endif +}; + +struct vgic_cpu { + /* CPU vif control registers for world switch */ + union { + struct vgic_v2_cpu_if vgic_v2; + struct vgic_v3_cpu_if vgic_v3; + }; + + /* TODO: Move nr_lr to a global state */ + /* Number of list registers on this CPU */ + int nr_lr; + + unsigned int used_lrs; + struct vgic_irq private_irqs[VGIC_NR_PRIVATE_IRQS]; + + spinlock_t ap_list_lock; /* Protects the ap_list */ + + /* list of IRQs for this VCPU to consider */ + struct list_head ap_list_head; +}; + +#define irqchip_in_kernel(k) (!!((k)->arch.vgic.in_kernel)) +#define vgic_initialized(k) (false) +#define vgic_ready(k) ((k)->arch.vgic.ready) +#define vgic_valid_spi(k,i) (((i) >= VGIC_NR_PRIVATE_IRQS) && \ + ((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) + +/** + * kvm_vgic_get_max_vcpus - Get the maximum number of VCPUs allowed by HW + * + * The host's GIC naturally limits the maximum amount of VCPUs a guest + * can use. + */ +static inline int kvm_vgic_get_max_vcpus(void) +{ + return kvm_vgic_global_state.max_gic_vcpus; +} + +#endif /* __ASM_ARM_KVM_VGIC_VGIC_H */ -- 2.7.3
next prev parent reply other threads:[~2016-03-25 2:04 UTC|newest] Thread overview: 276+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-03-25 2:04 [RFC PATCH 00/45] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 01/45] KVM: arm/arm64: add missing MMIO data write-back Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-29 12:33 ` Christoffer Dall 2016-03-29 12:33 ` Christoffer Dall 2016-04-05 12:12 ` Andre Przywara 2016-04-05 12:12 ` Andre Przywara 2016-04-05 12:58 ` Christoffer Dall 2016-04-05 12:58 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 02/45] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 03/45] KVM: arm/arm64: arch_timer: rework VGIC <-> timer interface Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-29 13:01 ` Christoffer Dall 2016-03-29 13:01 ` Christoffer Dall 2016-03-25 2:04 ` Andre Przywara [this message] 2016-03-25 2:04 ` [RFC PATCH 04/45] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara 2016-03-29 13:09 ` Christoffer Dall 2016-03-29 13:09 ` Christoffer Dall 2016-04-05 13:34 ` Andre Przywara 2016-04-05 13:34 ` Andre Przywara 2016-04-05 20:10 ` Christoffer Dall 2016-04-05 20:10 ` Christoffer Dall 2016-04-06 13:57 ` Christoffer Dall 2016-04-06 13:57 ` Christoffer Dall 2016-04-06 14:09 ` Andre Przywara 2016-04-06 14:09 ` Andre Przywara 2016-04-06 14:46 ` Christoffer Dall 2016-04-06 14:46 ` Christoffer Dall 2016-04-06 14:53 ` Andre Przywara 2016-04-06 14:53 ` Andre Przywara 2016-04-06 14:57 ` Christoffer Dall 2016-04-06 14:57 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 05/45] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 06/45] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-29 21:16 ` Christoffer Dall 2016-03-29 21:16 ` Christoffer Dall 2016-04-05 17:28 ` Andre Przywara 2016-04-05 17:28 ` Andre Przywara 2016-04-06 14:23 ` Christoffer Dall 2016-04-06 14:23 ` Christoffer Dall 2016-04-14 10:53 ` Andre Przywara 2016-04-14 10:53 ` Andre Przywara 2016-04-14 12:15 ` Christoffer Dall 2016-04-14 12:15 ` Christoffer Dall 2016-04-14 13:45 ` Andre Przywara 2016-04-14 13:45 ` Andre Przywara 2016-04-14 14:05 ` Christoffer Dall 2016-04-14 14:05 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 07/45] KVM: arm/arm64: vgic-new: Add vgic GICv2 change_affinity Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-30 9:29 ` Christoffer Dall 2016-03-30 9:29 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 08/45] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 09/45] KVM: arm/arm64: vgic-new: Add GICv2 IRQ sync/flush Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-30 13:53 ` Christoffer Dall 2016-03-30 13:53 ` Christoffer Dall 2016-04-05 17:57 ` Andre Przywara 2016-04-05 17:57 ` Andre Przywara 2016-04-06 14:34 ` Christoffer Dall 2016-04-06 14:34 ` Christoffer Dall 2016-03-31 9:47 ` Christoffer Dall 2016-03-31 9:47 ` Christoffer Dall 2016-04-11 11:40 ` Andre Przywara 2016-04-11 11:40 ` Andre Przywara 2016-04-12 12:25 ` Christoffer Dall 2016-04-12 12:25 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 10/45] KVM: arm/arm64: vgic-new: Add GICv3 world switch backend Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-30 20:40 ` Christoffer Dall 2016-03-30 20:40 ` Christoffer Dall 2016-04-12 13:59 ` Andre Przywara 2016-04-12 13:59 ` Andre Przywara 2016-04-12 15:02 ` Christoffer Dall 2016-04-12 15:02 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 11/45] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 8:54 ` Christoffer Dall 2016-03-31 8:54 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 12/45] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 9:08 ` Christoffer Dall 2016-03-31 9:08 ` Christoffer Dall 2016-03-31 9:09 ` Christoffer Dall 2016-03-31 9:09 ` Christoffer Dall 2016-03-31 12:25 ` Paolo Bonzini 2016-03-31 12:25 ` Paolo Bonzini 2016-03-31 14:31 ` Christoffer Dall 2016-03-31 14:31 ` Christoffer Dall 2016-04-01 12:11 ` André Przywara 2016-04-01 12:11 ` André Przywara 2016-04-01 12:17 ` Christoffer Dall 2016-04-01 12:17 ` Christoffer Dall 2016-04-11 10:53 ` Andre Przywara 2016-04-11 10:53 ` Andre Przywara 2016-04-12 12:50 ` Christoffer Dall 2016-04-12 12:50 ` Christoffer Dall 2016-04-12 15:56 ` Marc Zyngier 2016-04-12 15:56 ` Marc Zyngier 2016-04-12 17:26 ` Christoffer Dall 2016-04-12 17:26 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 13/45] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 9:24 ` Christoffer Dall 2016-03-31 9:24 ` Christoffer Dall 2016-04-11 11:09 ` Andre Przywara 2016-04-11 11:09 ` Andre Przywara 2016-04-12 12:52 ` Christoffer Dall 2016-04-12 12:52 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 14/45] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 9:27 ` Christoffer Dall 2016-03-31 9:27 ` Christoffer Dall 2016-04-11 11:23 ` Andre Przywara 2016-04-11 11:23 ` Andre Przywara 2016-04-12 12:55 ` Christoffer Dall 2016-04-12 12:55 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 15/45] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 9:33 ` Christoffer Dall 2016-03-31 9:33 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 16/45] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 9:35 ` Christoffer Dall 2016-03-31 9:35 ` Christoffer Dall 2016-04-11 11:31 ` Andre Przywara 2016-04-11 11:31 ` Andre Przywara 2016-04-12 13:10 ` Christoffer Dall 2016-04-12 13:10 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 17/45] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 9:50 ` Christoffer Dall 2016-03-31 9:50 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 18/45] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 9:58 ` Christoffer Dall 2016-03-31 9:58 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 19/45] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 10:07 ` Christoffer Dall 2016-03-31 10:07 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 20/45] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 11:31 ` Christoffer Dall 2016-03-31 11:31 ` Christoffer Dall 2016-04-11 12:10 ` Andre Przywara 2016-04-11 12:10 ` Andre Przywara 2016-04-12 13:18 ` Christoffer Dall 2016-04-12 13:18 ` Christoffer Dall 2016-04-12 15:18 ` Andre Przywara 2016-04-12 15:18 ` Andre Przywara 2016-04-12 15:26 ` Christoffer Dall 2016-04-12 15:26 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 21/45] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 11:35 ` Christoffer Dall 2016-03-31 11:35 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 22/45] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 11:37 ` Christoffer Dall 2016-03-31 11:37 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 23/45] KVM: arm/arm64: vgic-new: Add GICv3 emulation framework Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 11:48 ` Christoffer Dall 2016-03-31 11:48 ` Christoffer Dall 2016-04-11 12:44 ` Andre Przywara 2016-04-11 12:44 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 24/45] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 11:53 ` Christoffer Dall 2016-03-31 11:53 ` Christoffer Dall 2016-04-11 13:00 ` Andre Przywara 2016-04-11 13:00 ` Andre Przywara 2016-04-12 13:20 ` Christoffer Dall 2016-04-12 13:20 ` Christoffer Dall 2016-03-25 2:04 ` [RFC PATCH 25/45] KVM: arm/arm64: vgic-new: Add GICv3 redistributor TYPER handler Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 26/45] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 27/45] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 28/45] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-31 12:07 ` Christoffer Dall 2016-03-31 12:07 ` Christoffer Dall 2016-04-11 13:11 ` Andre Przywara 2016-04-11 13:11 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 29/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 30/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 31/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 32/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 33/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 34/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 35/45] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:04 ` [RFC PATCH 36/45] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara 2016-03-25 2:04 ` Andre Przywara 2016-03-25 2:05 ` [RFC PATCH 37/45] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara 2016-03-25 2:05 ` Andre Przywara 2016-03-25 2:05 ` [RFC PATCH 38/45] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara 2016-03-25 2:05 ` Andre Przywara 2016-03-25 2:05 ` [RFC PATCH 39/45] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara 2016-03-25 2:05 ` Andre Przywara 2016-03-25 2:05 ` [RFC PATCH 40/45] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara 2016-03-25 2:05 ` Andre Przywara 2016-03-31 17:59 ` Christoffer Dall 2016-03-31 17:59 ` Christoffer Dall 2016-04-01 8:20 ` Eric Auger 2016-04-01 8:20 ` Eric Auger 2016-04-01 9:00 ` Christoffer Dall 2016-04-01 9:00 ` Christoffer Dall 2016-03-25 2:05 ` [RFC PATCH 41/45] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara 2016-03-25 2:05 ` Andre Przywara 2016-03-25 2:05 ` [RFC PATCH 42/45] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara 2016-03-25 2:05 ` Andre Przywara 2016-03-25 2:05 ` [RFC PATCH 43/45] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara 2016-03-25 2:05 ` Andre Przywara 2016-03-31 18:15 ` Christoffer Dall 2016-03-31 18:15 ` Christoffer Dall 2016-04-01 8:44 ` Eric Auger 2016-04-01 8:44 ` Eric Auger 2016-03-25 2:05 ` [RFC PATCH 44/45] KVM: arm/arm64: vgic-new: Add dummy MSI implementation Andre Przywara 2016-03-25 2:05 ` Andre Przywara 2016-03-31 18:16 ` Christoffer Dall 2016-03-31 18:16 ` Christoffer Dall 2016-04-07 14:35 ` Eric Auger 2016-04-07 14:35 ` Eric Auger 2016-03-25 2:05 ` [RFC PATCH 45/45] KVM: arm/arm64: vgic-new: enable build Andre Przywara 2016-03-25 2:05 ` Andre Przywara 2016-03-31 18:18 ` Christoffer Dall 2016-03-31 18:18 ` Christoffer Dall 2016-04-11 14:45 ` Andre Przywara 2016-04-11 14:45 ` Andre Przywara 2016-04-12 13:21 ` Christoffer Dall 2016-04-12 13:21 ` Christoffer Dall 2016-03-25 15:58 ` [RFC PATCH 00/45] KVM: arm/arm64: Rework virtual GIC emulation Diana Madalina Craciun 2016-03-25 15:58 ` Diana Madalina Craciun 2016-03-26 2:11 ` André Przywara 2016-03-26 2:11 ` André Przywara 2016-03-29 13:12 ` Vladimir Murzin 2016-03-29 13:12 ` Vladimir Murzin 2016-03-30 11:42 ` Vladimir Murzin 2016-03-30 11:42 ` Vladimir Murzin 2016-03-30 11:52 ` Vladimir Murzin 2016-03-30 11:52 ` Vladimir Murzin 2016-03-30 13:56 ` Christoffer Dall 2016-03-30 13:56 ` Christoffer Dall 2016-03-30 14:13 ` Vladimir Murzin 2016-03-30 14:13 ` Vladimir Murzin 2016-03-30 19:53 ` Christoffer Dall 2016-03-30 19:53 ` Christoffer Dall 2016-03-30 12:07 ` Marc Zyngier 2016-03-30 12:07 ` Marc Zyngier 2016-03-30 19:55 ` Christoffer Dall 2016-03-30 19:55 ` Christoffer Dall 2016-03-31 9:06 ` Marc Zyngier 2016-03-31 9:06 ` Marc Zyngier 2016-03-31 18:28 ` Christoffer Dall 2016-03-31 18:28 ` Christoffer Dall 2016-03-31 18:30 ` Christoffer Dall 2016-03-31 18:30 ` Christoffer Dall 2016-04-13 16:07 ` André Przywara 2016-04-13 16:07 ` André Przywara 2016-04-13 17:24 ` Christoffer Dall 2016-04-13 17:24 ` Christoffer Dall
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