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From: Aleksei Mamlin <mamlinav@gmail.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
	Chen-Yu Tsai <wens@csie.org>,
	Boris Brezillon <boris.brezillon@free-electrons.com>,
	Richard Weinberger <richard@nod.at>,
	David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-sunxi@googlegroups.com, Aleksei Mamlin <mamlinav@gmail.com>
Subject: [PATCH 1/7] ARM: dts: sun4i: Add A10 NAND controller pin definitions
Date: Mon,  6 Jun 2016 13:24:18 +0300	[thread overview]
Message-ID: <1465208664-9366-2-git-send-email-mamlinav@gmail.com> (raw)
In-Reply-To: <1465208664-9366-1-git-send-email-mamlinav@gmail.com>

From: Boris Brezillon <boris.brezillon@free-electrons.com>

Define the NAND controller pin configs.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
---
 arch/arm/boot/dts/sun4i-a10.dtsi | 80 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index a9c3190..146a08db 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -1144,6 +1144,86 @@
 				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 				allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
 			};
+
+			nand_pins_a: nand_base0@0 {
+				allwinner,pins = "PC0", "PC1", "PC2",
+						"PC5", "PC8", "PC9", "PC10",
+						"PC11", "PC12", "PC13", "PC14",
+						"PC15", "PC16";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs0_pins_a: nand_cs@0 {
+				allwinner,pins = "PC4";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs1_pins_a: nand_cs@1 {
+				allwinner,pins = "PC3";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs2_pins_a: nand_cs@2 {
+				allwinner,pins = "PC17";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs3_pins_a: nand_cs@3 {
+				allwinner,pins = "PC18";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs4_pins_a: nand_cs@4 {
+				allwinner,pins = "PC19";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs5_pins_a: nand_cs@5 {
+				allwinner,pins = "PC20";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs6_pins_a: nand_cs@6 {
+				allwinner,pins = "PC21";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs7_pins_a: nand_cs@7 {
+				allwinner,pins = "PC22";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_rb0_pins_a: nand_rb@0 {
+				allwinner,pins = "PC6";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_rb1_pins_a: nand_rb@1 {
+				allwinner,pins = "PC7";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
 		};
 
 		timer@01c20c00 {
-- 
2.7.3

WARNING: multiple messages have this Message-ID (diff)
From: Aleksei Mamlin <mamlinav-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Maxime Ripard
	<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	Boris Brezillon
	<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Richard Weinberger <richard-/L3Ra7n9ekc@public.gmane.org>,
	David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
	Brian Norris
	<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	Aleksei Mamlin <mamlinav-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: [PATCH 1/7] ARM: dts: sun4i: Add A10 NAND controller pin definitions
Date: Mon,  6 Jun 2016 13:24:18 +0300	[thread overview]
Message-ID: <1465208664-9366-2-git-send-email-mamlinav@gmail.com> (raw)
In-Reply-To: <1465208664-9366-1-git-send-email-mamlinav-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

From: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

Define the NAND controller pin configs.

Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Aleksei Mamlin <mamlinav-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 arch/arm/boot/dts/sun4i-a10.dtsi | 80 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index a9c3190..146a08db 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -1144,6 +1144,86 @@
 				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 				allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
 			};
+
+			nand_pins_a: nand_base0@0 {
+				allwinner,pins = "PC0", "PC1", "PC2",
+						"PC5", "PC8", "PC9", "PC10",
+						"PC11", "PC12", "PC13", "PC14",
+						"PC15", "PC16";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs0_pins_a: nand_cs@0 {
+				allwinner,pins = "PC4";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs1_pins_a: nand_cs@1 {
+				allwinner,pins = "PC3";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs2_pins_a: nand_cs@2 {
+				allwinner,pins = "PC17";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs3_pins_a: nand_cs@3 {
+				allwinner,pins = "PC18";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs4_pins_a: nand_cs@4 {
+				allwinner,pins = "PC19";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs5_pins_a: nand_cs@5 {
+				allwinner,pins = "PC20";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs6_pins_a: nand_cs@6 {
+				allwinner,pins = "PC21";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs7_pins_a: nand_cs@7 {
+				allwinner,pins = "PC22";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_rb0_pins_a: nand_rb@0 {
+				allwinner,pins = "PC6";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_rb1_pins_a: nand_rb@1 {
+				allwinner,pins = "PC7";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
 		};
 
 		timer@01c20c00 {
-- 
2.7.3

WARNING: multiple messages have this Message-ID (diff)
From: mamlinav@gmail.com (Aleksei Mamlin)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/7] ARM: dts: sun4i: Add A10 NAND controller pin definitions
Date: Mon,  6 Jun 2016 13:24:18 +0300	[thread overview]
Message-ID: <1465208664-9366-2-git-send-email-mamlinav@gmail.com> (raw)
In-Reply-To: <1465208664-9366-1-git-send-email-mamlinav@gmail.com>

From: Boris Brezillon <boris.brezillon@free-electrons.com>

Define the NAND controller pin configs.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
---
 arch/arm/boot/dts/sun4i-a10.dtsi | 80 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index a9c3190..146a08db 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -1144,6 +1144,86 @@
 				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 				allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
 			};
+
+			nand_pins_a: nand_base0 at 0 {
+				allwinner,pins = "PC0", "PC1", "PC2",
+						"PC5", "PC8", "PC9", "PC10",
+						"PC11", "PC12", "PC13", "PC14",
+						"PC15", "PC16";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs0_pins_a: nand_cs at 0 {
+				allwinner,pins = "PC4";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs1_pins_a: nand_cs at 1 {
+				allwinner,pins = "PC3";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs2_pins_a: nand_cs at 2 {
+				allwinner,pins = "PC17";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs3_pins_a: nand_cs at 3 {
+				allwinner,pins = "PC18";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs4_pins_a: nand_cs at 4 {
+				allwinner,pins = "PC19";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs5_pins_a: nand_cs at 5 {
+				allwinner,pins = "PC20";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs6_pins_a: nand_cs at 6 {
+				allwinner,pins = "PC21";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_cs7_pins_a: nand_cs at 7 {
+				allwinner,pins = "PC22";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_rb0_pins_a: nand_rb at 0 {
+				allwinner,pins = "PC6";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			nand_rb1_pins_a: nand_rb at 1 {
+				allwinner,pins = "PC7";
+				allwinner,function = "nand0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
 		};
 
 		timer at 01c20c00 {
-- 
2.7.3

  reply	other threads:[~2016-06-06 10:27 UTC|newest]

Thread overview: 97+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-06 10:24 [PATCH 0/7] dts: sunxi: Add sunxi NAND Flash Controller support Aleksei Mamlin
2016-06-06 10:24 ` Aleksei Mamlin
2016-06-06 10:24 ` Aleksei Mamlin
2016-06-06 10:24 ` Aleksei Mamlin [this message]
2016-06-06 10:24   ` [PATCH 1/7] ARM: dts: sun4i: Add A10 NAND controller pin definitions Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-08 22:04   ` Maxime Ripard
2016-06-08 22:04     ` Maxime Ripard
2016-06-08 22:04     ` Maxime Ripard
2016-06-06 10:24 ` [PATCH 2/7] ARM: dts: sun4i: Add NFC node to Allwinner A10 SoC Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 10:24 ` [PATCH 3/7] ARM: dts: sun7i: Add A20 NAND controller pin definitions Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 10:24 ` [PATCH 4/7] ARM: dts: sun7i: Add NFC node to Allwinner A20 SoC Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-07 17:21   ` Aleksei Mamlin
2016-06-07 17:21     ` Aleksei Mamlin
2016-06-07 17:21     ` Aleksei Mamlin
2016-06-06 10:24 ` [PATCH 5/7] mtd: nand: Add Hynix H27UBG8T2BTR-BC to nand_ids table Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 18:55   ` Boris Brezillon
2016-06-06 18:55     ` Boris Brezillon
2016-06-06 18:55     ` Boris Brezillon
2016-06-06 19:59     ` Aleksei Mamlin
2016-06-06 19:59       ` Aleksei Mamlin
2016-06-06 19:59       ` Aleksei Mamlin
2016-06-06 20:31       ` Boris Brezillon
2016-06-06 20:31         ` Boris Brezillon
2016-06-06 20:31         ` Boris Brezillon
2016-06-06 21:06         ` Aleksei Mamlin
2016-06-06 21:06           ` Aleksei Mamlin
2016-06-06 21:06           ` Aleksei Mamlin
2016-06-07  5:48           ` Boris Brezillon
2016-06-07  5:48             ` Boris Brezillon
2016-06-07  5:48             ` Boris Brezillon
2016-06-07  5:49         ` Boris Brezillon
2016-06-07  5:49           ` Boris Brezillon
2016-06-06 10:24 ` [PATCH 6/7] ARM: dts: sun4i: Enable NAND on Marsboard A10 Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 18:50   ` Boris Brezillon
2016-06-06 18:50     ` Boris Brezillon
2016-06-06 18:50     ` Boris Brezillon
2016-06-06 10:24 ` [PATCH 7/7] ARM: dts: sun7i: Enable NAND on Wexler TAB7200 Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 10:24   ` Aleksei Mamlin
2016-06-06 18:51   ` Boris Brezillon
2016-06-06 18:51     ` Boris Brezillon
2016-06-08 22:03   ` Maxime Ripard
2016-06-08 22:03     ` Maxime Ripard
2016-06-08 22:03     ` Maxime Ripard
2016-06-09  8:11     ` Aleksei Mamlin
2016-06-09  8:11       ` Aleksei Mamlin
2016-06-09  8:11       ` Aleksei Mamlin
2016-06-10  8:56       ` Maxime Ripard
2016-06-10  8:56         ` Maxime Ripard
2016-06-10  8:56         ` Maxime Ripard
2016-06-14 11:17 ` [PATCH v2 0/4] dts: sunxi: Add sunxi NAND Flash Controller support Aleksei Mamlin
2016-06-14 11:17   ` Aleksei Mamlin
2016-06-14 11:17   ` Aleksei Mamlin
2016-06-14 11:17   ` [PATCH v2 1/4] ARM: dts: sun4i: Add A10 NAND controller pin definitions Aleksei Mamlin
2016-06-14 11:17     ` Aleksei Mamlin
2016-06-14 11:17     ` Aleksei Mamlin
2016-06-14 12:37     ` Maxime Ripard
2016-06-14 12:37       ` Maxime Ripard
2016-06-14 12:37       ` Maxime Ripard
2016-06-14 11:17   ` [PATCH v2 2/4] ARM: dts: sun4i: Add NFC node to Allwinner A10 SoC Aleksei Mamlin
2016-06-14 11:17     ` Aleksei Mamlin
2016-06-14 11:17     ` Aleksei Mamlin
2016-06-14 12:33     ` Maxime Ripard
2016-06-14 12:33       ` Maxime Ripard
2016-06-14 12:33       ` Maxime Ripard
2016-06-14 11:17   ` [PATCH v2 3/4] ARM: dts: sun7i: Add A20 NAND controller pin definitions Aleksei Mamlin
2016-06-14 11:17     ` Aleksei Mamlin
2016-06-14 11:17     ` Aleksei Mamlin
2016-06-14 11:17   ` [PATCH v2 4/4] ARM: dts: sun7i: Add NFC node to Allwinner A20 SoC Aleksei Mamlin
2016-06-14 11:17     ` Aleksei Mamlin
2016-06-14 11:17     ` Aleksei Mamlin
2016-06-14 12:33     ` Maxime Ripard
2016-06-14 12:33       ` Maxime Ripard
2016-06-14 12:33       ` Maxime Ripard
2016-06-14 13:11     ` kbuild test robot
2016-06-14 13:11       ` kbuild test robot
2016-06-14 13:11       ` kbuild test robot
2016-06-14 13:19       ` Aleksei Mamlin
2016-06-14 13:19         ` Aleksei Mamlin
2016-06-14 13:19         ` Aleksei Mamlin
2016-06-14 13:57         ` Maxime Ripard
2016-06-14 13:57           ` Maxime Ripard
2016-06-14 13:57           ` Maxime Ripard
2016-06-14 14:02           ` Aleksei Mamlin
2016-06-14 14:02             ` Aleksei Mamlin
2016-06-14 14:02             ` Aleksei Mamlin

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