* [CI 02/62] drm/i915: Convert sandybridge_pcode_*() to use intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 03/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register() Chris Wilson
` (60 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
We want to replace the inline wait_for() with an out-of-line hybrid
busy/sleep wait_for() in the hopes of speeding up the communication wit
the PCode unit.
Indeed, on my i5-2500s, __gen6_update_ring_freq improves from
6,080,661ns to 8172ns.
v2: Missed using _fw variants for sandybridge_pcode_read()
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 43 +++++++++++++++++++++++++++--------------
1 file changed, 28 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d7f8ba89d2a5..870085ab5423 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7623,46 +7623,59 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val
{
WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- if (I915_READ(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {
+ /* GEN6_PCODE_* are outside of the forcewake domain, we can
+ * use te fw I915_READ variants to reduce the amount of work
+ * required when reading/writing.
+ */
+
+ if (I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {
DRM_DEBUG_DRIVER("warning: pcode (read) mailbox access failed\n");
return -EAGAIN;
}
- I915_WRITE(GEN6_PCODE_DATA, *val);
- I915_WRITE(GEN6_PCODE_DATA1, 0);
- I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox);
+ I915_WRITE_FW(GEN6_PCODE_DATA, *val);
+ I915_WRITE_FW(GEN6_PCODE_DATA1, 0);
+ I915_WRITE_FW(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox);
- if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) == 0,
- 500)) {
+ if (intel_wait_for_register_fw(dev_priv,
+ GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
+ 500)) {
DRM_ERROR("timeout waiting for pcode read (%d) to finish\n", mbox);
return -ETIMEDOUT;
}
- *val = I915_READ(GEN6_PCODE_DATA);
- I915_WRITE(GEN6_PCODE_DATA, 0);
+ *val = I915_READ_FW(GEN6_PCODE_DATA);
+ I915_WRITE_FW(GEN6_PCODE_DATA, 0);
return 0;
}
-int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val)
+int sandybridge_pcode_write(struct drm_i915_private *dev_priv,
+ u32 mbox, u32 val)
{
WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- if (I915_READ(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {
+ /* GEN6_PCODE_* are outside of the forcewake domain, we can
+ * use te fw I915_READ variants to reduce the amount of work
+ * required when reading/writing.
+ */
+
+ if (I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {
DRM_DEBUG_DRIVER("warning: pcode (write) mailbox access failed\n");
return -EAGAIN;
}
- I915_WRITE(GEN6_PCODE_DATA, val);
- I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox);
+ I915_WRITE_FW(GEN6_PCODE_DATA, val);
+ I915_WRITE_FW(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox);
- if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) == 0,
- 500)) {
+ if (intel_wait_for_register_fw(dev_priv,
+ GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
+ 500)) {
DRM_ERROR("timeout waiting for pcode write (%d) to finish\n", mbox);
return -ETIMEDOUT;
}
- I915_WRITE(GEN6_PCODE_DATA, 0);
+ I915_WRITE_FW(GEN6_PCODE_DATA, 0);
return 0;
}
--
2.8.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 03/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
2016-06-30 14:32 ` [CI 02/62] drm/i915: Convert sandybridge_pcode_*() to use intel_wait_for_register() Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 04/62] " Chris Wilson
` (59 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b98afbd33235..51eb1cd86957 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2535,8 +2535,6 @@ int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool force_on)
u32 val;
int err;
-#define COND (I915_READ(VLV_GTLC_SURVIVABILITY_REG) & VLV_GFX_CLK_STATUS_BIT)
-
val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);
val &= ~VLV_GFX_CLK_FORCE_ON_BIT;
if (force_on)
@@ -2546,13 +2544,16 @@ int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool force_on)
if (!force_on)
return 0;
- err = wait_for(COND, 20);
+ err = intel_wait_for_register(dev_priv,
+ VLV_GTLC_SURVIVABILITY_REG,
+ VLV_GFX_CLK_STATUS_BIT,
+ VLV_GFX_CLK_STATUS_BIT,
+ 20);
if (err)
DRM_ERROR("timeout waiting for GFX clock force-on (%08x)\n",
I915_READ(VLV_GTLC_SURVIVABILITY_REG));
return err;
-#undef COND
}
static int vlv_allow_gt_wake(struct drm_i915_private *dev_priv, bool allow)
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 04/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
2016-06-30 14:32 ` [CI 02/62] drm/i915: Convert sandybridge_pcode_*() to use intel_wait_for_register() Chris Wilson
2016-06-30 14:32 ` [CI 03/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register() Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 05/62] " Chris Wilson
` (58 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 51eb1cd86957..fb5758f4f9d3 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2568,13 +2568,15 @@ static int vlv_allow_gt_wake(struct drm_i915_private *dev_priv, bool allow)
I915_WRITE(VLV_GTLC_WAKE_CTRL, val);
POSTING_READ(VLV_GTLC_WAKE_CTRL);
-#define COND (!!(I915_READ(VLV_GTLC_PW_STATUS) & VLV_GTLC_ALLOWWAKEACK) == \
- allow)
- err = wait_for(COND, 1);
+ err = intel_wait_for_register(dev_priv,
+ VLV_GTLC_PW_STATUS,
+ VLV_GTLC_ALLOWWAKEACK,
+ allow,
+ 1);
if (err)
DRM_ERROR("timeout disabling GT waking\n");
+
return err;
-#undef COND
}
static int vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv,
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 05/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (2 preceding siblings ...)
2016-06-30 14:32 ` [CI 04/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 06/62] " Chris Wilson
` (57 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index fb5758f4f9d3..c580e24095b0 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2588,8 +2588,7 @@ static int vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv,
mask = VLV_GTLC_PW_MEDIA_STATUS_MASK | VLV_GTLC_PW_RENDER_STATUS_MASK;
val = wait_for_on ? mask : 0;
-#define COND ((I915_READ(VLV_GTLC_PW_STATUS) & mask) == val)
- if (COND)
+ if ((I915_READ(VLV_GTLC_PW_STATUS) & mask) == val)
return 0;
DRM_DEBUG_KMS("waiting for GT wells to go %s (%08x)\n",
@@ -2600,13 +2599,14 @@ static int vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv,
* RC6 transitioning can be delayed up to 2 msec (see
* valleyview_enable_rps), use 3 msec for safety.
*/
- err = wait_for(COND, 3);
+ err = intel_wait_for_register(dev_priv,
+ VLV_GTLC_PW_STATUS, mask, val,
+ 3);
if (err)
DRM_ERROR("timeout waiting for GT wells to go %s\n",
onoff(wait_for_on));
return err;
-#undef COND
}
static void vlv_check_no_gt_access(struct drm_i915_private *dev_priv)
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 06/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (3 preceding siblings ...)
2016-06-30 14:32 ` [CI 05/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 07/62] " Chris Wilson
` (56 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_crt.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 165e4b901548..2aa85cf4b3cf 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -301,8 +301,10 @@ static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
I915_WRITE(crt->adpa_reg, adpa);
- if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
- 1000))
+ if (intel_wait_for_register(dev_priv,
+ crt->adpa_reg,
+ ADPA_CRT_HOTPLUG_FORCE_TRIGGER, 0,
+ 1000))
DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
if (turn_off_dac) {
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 07/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (4 preceding siblings ...)
2016-06-30 14:32 ` [CI 06/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 08/62] " Chris Wilson
` (55 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_crt.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 2aa85cf4b3cf..ccfb0dd09d2f 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -340,8 +340,10 @@ static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
I915_WRITE(crt->adpa_reg, adpa);
- if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
- 1000)) {
+ if (intel_wait_for_register(dev_priv,
+ crt->adpa_reg,
+ ADPA_CRT_HOTPLUG_FORCE_TRIGGER, 0,
+ 1000)) {
DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
I915_WRITE(crt->adpa_reg, save_adpa);
}
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 08/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (5 preceding siblings ...)
2016-06-30 14:32 ` [CI 07/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 09/62] " Chris Wilson
` (54 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_crt.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index ccfb0dd09d2f..0c8036e1b4d7 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -398,9 +398,9 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
CRT_HOTPLUG_FORCE_DETECT,
CRT_HOTPLUG_FORCE_DETECT);
/* wait for FORCE_DETECT to go off */
- if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
- CRT_HOTPLUG_FORCE_DETECT) == 0,
- 1000))
+ if (intel_wait_for_register(dev_priv, PORT_HOTPLUG_EN,
+ CRT_HOTPLUG_FORCE_DETECT, 0,
+ 1000))
DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
}
--
2.8.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 09/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (6 preceding siblings ...)
2016-06-30 14:32 ` [CI 08/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 10/62] " Chris Wilson
` (53 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_ddi.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index ad3b0ee5e55b..6bcd7ffbff43 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1808,7 +1808,10 @@ static u32 bxt_get_grc(struct drm_i915_private *dev_priv, enum dpio_phy phy)
static void bxt_phy_wait_grc_done(struct drm_i915_private *dev_priv,
enum dpio_phy phy)
{
- if (wait_for(I915_READ(BXT_PORT_REF_DW3(phy)) & GRC_DONE, 10))
+ if (intel_wait_for_register(dev_priv,
+ BXT_PORT_REF_DW3(phy),
+ GRC_DONE, GRC_DONE,
+ 10))
DRM_ERROR("timeout waiting for PHY%d GRC\n", phy);
}
--
2.8.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 10/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (7 preceding siblings ...)
2016-06-30 14:32 ` [CI 09/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 11/62] " Chris Wilson
` (52 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 2acc6060b78d..a501d850c6d5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1124,8 +1124,9 @@ static void intel_wait_for_pipe_off(struct intel_crtc *crtc)
i915_reg_t reg = PIPECONF(cpu_transcoder);
/* Wait for the Pipe State to go off */
- if (wait_for((I915_READ(reg) & I965_PIPECONF_ACTIVE) == 0,
- 100))
+ if (intel_wait_for_register(dev_priv,
+ reg, I965_PIPECONF_ACTIVE, 0,
+ 100))
WARN(1, "pipe_off wait timed out\n");
} else {
/* Wait for the display line to settle */
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 11/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (8 preceding siblings ...)
2016-06-30 14:32 ` [CI 10/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 12/62] " Chris Wilson
` (51 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a501d850c6d5..cf93bb2a2ac3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1545,7 +1545,11 @@ static void _vlv_enable_pll(struct intel_crtc *crtc,
POSTING_READ(DPLL(pipe));
udelay(150);
- if (wait_for(((I915_READ(DPLL(pipe)) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1))
+ if (intel_wait_for_register(dev_priv,
+ DPLL(pipe),
+ DPLL_LOCK_VLV,
+ DPLL_LOCK_VLV,
+ 1))
DRM_ERROR("DPLL %d failed to lock\n", pipe);
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 12/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (9 preceding siblings ...)
2016-06-30 14:32 ` [CI 11/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 13/62] " Chris Wilson
` (50 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index cf93bb2a2ac3..fc0794de595b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1598,7 +1598,9 @@ static void _chv_enable_pll(struct intel_crtc *crtc,
I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll);
/* Check PLL is locked */
- if (wait_for(((I915_READ(DPLL(pipe)) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1))
+ if (intel_wait_for_register(dev_priv,
+ DPLL(pipe), DPLL_LOCK_VLV, DPLL_LOCK_VLV,
+ 1))
DRM_ERROR("PLL %d failed to lock\n", pipe);
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 13/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (10 preceding siblings ...)
2016-06-30 14:32 ` [CI 12/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 14/62] " Chris Wilson
` (49 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fc0794de595b..1be0c02f5b4d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1820,7 +1820,9 @@ void vlv_wait_port_ready(struct drm_i915_private *dev_priv,
BUG();
}
- if (wait_for((I915_READ(dpll_reg) & port_mask) == expected_mask, 1000))
+ if (intel_wait_for_register(dev_priv,
+ dpll_reg, port_mask, expected_mask,
+ 1000))
WARN(1, "timed out waiting for port %c ready: got 0x%x, expected 0x%x\n",
port_name(dport->port), I915_READ(dpll_reg) & port_mask, expected_mask);
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 14/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (11 preceding siblings ...)
2016-06-30 14:32 ` [CI 13/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 15/62] " Chris Wilson
` (48 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1be0c02f5b4d..1c34d4039d7b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1880,7 +1880,9 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
val |= TRANS_PROGRESSIVE;
I915_WRITE(reg, val | TRANS_ENABLE);
- if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100))
+ if (intel_wait_for_register(dev_priv,
+ reg, TRANS_STATE_ENABLE, TRANS_STATE_ENABLE,
+ 100))
DRM_ERROR("failed to enable transcoder %c\n", pipe_name(pipe));
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 15/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (12 preceding siblings ...)
2016-06-30 14:32 ` [CI 14/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:32 ` [CI 16/62] " Chris Wilson
` (47 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1c34d4039d7b..50ad3c55f0a9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1910,7 +1910,11 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
val |= TRANS_PROGRESSIVE;
I915_WRITE(LPT_TRANSCONF, val);
- if (wait_for(I915_READ(LPT_TRANSCONF) & TRANS_STATE_ENABLE, 100))
+ if (intel_wait_for_register(dev_priv,
+ LPT_TRANSCONF,
+ TRANS_STATE_ENABLE,
+ TRANS_STATE_ENABLE,
+ 100))
DRM_ERROR("Failed to enable PCH transcoder\n");
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 16/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (13 preceding siblings ...)
2016-06-30 14:32 ` [CI 15/62] " Chris Wilson
@ 2016-06-30 14:32 ` Chris Wilson
2016-06-30 14:33 ` [CI 17/62] " Chris Wilson
` (46 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:32 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 50ad3c55f0a9..99e8c8ea7f00 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1937,7 +1937,9 @@ static void ironlake_disable_pch_transcoder(struct drm_i915_private *dev_priv,
val &= ~TRANS_ENABLE;
I915_WRITE(reg, val);
/* wait for PCH transcoder off, transcoder state */
- if (wait_for((I915_READ(reg) & TRANS_STATE_ENABLE) == 0, 50))
+ if (intel_wait_for_register(dev_priv,
+ reg, TRANS_STATE_ENABLE, 0,
+ 50))
DRM_ERROR("failed to disable transcoder %c\n", pipe_name(pipe));
if (HAS_PCH_CPT(dev)) {
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 17/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (14 preceding siblings ...)
2016-06-30 14:32 ` [CI 16/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 18/62] " Chris Wilson
` (45 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 99e8c8ea7f00..187e703a1c45 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1959,7 +1959,9 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
val &= ~TRANS_ENABLE;
I915_WRITE(LPT_TRANSCONF, val);
/* wait for PCH transcoder off, transcoder state */
- if (wait_for((I915_READ(LPT_TRANSCONF) & TRANS_STATE_ENABLE) == 0, 50))
+ if (intel_wait_for_register(dev_priv,
+ LPT_TRANSCONF, TRANS_STATE_ENABLE, 0,
+ 50))
DRM_ERROR("Failed to disable PCH transcoder\n");
/* Workaround: clear timing override bit. */
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 18/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (15 preceding siblings ...)
2016-06-30 14:33 ` [CI 17/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 19/62] " Chris Wilson
` (44 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 187e703a1c45..cb7d49c34eb3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4465,7 +4465,9 @@ void hsw_enable_ips(struct intel_crtc *crtc)
* and don't wait for vblanks until the end of crtc_enable, then
* the HW state readout code will complain that the expected
* IPS_CTL value is not the one we read. */
- if (wait_for(I915_READ_NOTRACE(IPS_CTL) & IPS_ENABLE, 50))
+ if (intel_wait_for_register(dev_priv,
+ IPS_CTL, IPS_ENABLE, IPS_ENABLE,
+ 50))
DRM_ERROR("Timed out waiting for IPS enable\n");
}
}
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 19/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (16 preceding siblings ...)
2016-06-30 14:33 ` [CI 18/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 20/62] " Chris Wilson
` (43 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index cb7d49c34eb3..8658c02e92f1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4486,7 +4486,9 @@ void hsw_disable_ips(struct intel_crtc *crtc)
WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
mutex_unlock(&dev_priv->rps.hw_lock);
/* wait for pcode to finish disabling IPS, which may take up to 42ms */
- if (wait_for((I915_READ(IPS_CTL) & IPS_ENABLE) == 0, 42))
+ if (intel_wait_for_register(dev_priv,
+ IPS_CTL, IPS_ENABLE, 0,
+ 42))
DRM_ERROR("Timed out waiting for IPS disable\n");
} else {
I915_WRITE(IPS_CTL, 0);
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 20/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (17 preceding siblings ...)
2016-06-30 14:33 ` [CI 19/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 21/62] " Chris Wilson
` (42 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8658c02e92f1..d64c393bf42c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5418,7 +5418,9 @@ static void bxt_de_pll_disable(struct drm_i915_private *dev_priv)
I915_WRITE(BXT_DE_PLL_ENABLE, 0);
/* Timeout 200us */
- if (wait_for((I915_READ(BXT_DE_PLL_ENABLE) & BXT_DE_PLL_LOCK) == 0, 1))
+ if (intel_wait_for_register(dev_priv,
+ BXT_DE_PLL_ENABLE, BXT_DE_PLL_LOCK, 0,
+ 1))
DRM_ERROR("timeout waiting for DE PLL unlock\n");
dev_priv->cdclk_pll.vco = 0;
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 21/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (18 preceding siblings ...)
2016-06-30 14:33 ` [CI 20/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 22/62] " Chris Wilson
` (41 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d64c393bf42c..f61ca97f9fb8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5439,7 +5439,11 @@ static void bxt_de_pll_enable(struct drm_i915_private *dev_priv, int vco)
I915_WRITE(BXT_DE_PLL_ENABLE, BXT_DE_PLL_PLL_ENABLE);
/* Timeout 200us */
- if (wait_for((I915_READ(BXT_DE_PLL_ENABLE) & BXT_DE_PLL_LOCK) != 0, 1))
+ if (intel_wait_for_register(dev_priv,
+ BXT_DE_PLL_ENABLE,
+ BXT_DE_PLL_LOCK,
+ BXT_DE_PLL_LOCK,
+ 1))
DRM_ERROR("timeout waiting for DE PLL lock\n");
dev_priv->cdclk_pll.vco = vco;
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 22/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (19 preceding siblings ...)
2016-06-30 14:33 ` [CI 21/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 23/62] " Chris Wilson
` (40 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f61ca97f9fb8..f47643da0ad1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5706,7 +5706,9 @@ skl_dpll0_enable(struct drm_i915_private *dev_priv, int vco)
I915_WRITE(LCPLL1_CTL, I915_READ(LCPLL1_CTL) | LCPLL_PLL_ENABLE);
- if (wait_for(I915_READ(LCPLL1_CTL) & LCPLL_PLL_LOCK, 5))
+ if (intel_wait_for_register(dev_priv,
+ LCPLL1_CTL, LCPLL_PLL_LOCK, LCPLL_PLL_LOCK,
+ 5))
DRM_ERROR("DPLL0 not locked\n");
dev_priv->cdclk_pll.vco = vco;
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 23/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (20 preceding siblings ...)
2016-06-30 14:33 ` [CI 22/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 24/62] " Chris Wilson
` (39 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f47643da0ad1..f6531137766f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5721,7 +5721,9 @@ static void
skl_dpll0_disable(struct drm_i915_private *dev_priv)
{
I915_WRITE(LCPLL1_CTL, I915_READ(LCPLL1_CTL) & ~LCPLL_PLL_ENABLE);
- if (wait_for(!(I915_READ(LCPLL1_CTL) & LCPLL_PLL_LOCK), 1))
+ if (intel_wait_for_register(dev_priv,
+ LCPLL1_CTL, LCPLL_PLL_LOCK, 0,
+ 1))
DRM_ERROR("Couldn't disable DPLL0\n");
dev_priv->cdclk_pll.vco = 0;
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 24/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (21 preceding siblings ...)
2016-06-30 14:33 ` [CI 23/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 25/62] " Chris Wilson
` (38 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f6531137766f..5fa37aaf7e51 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9578,7 +9578,7 @@ static void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
I915_WRITE(LCPLL_CTL, val);
POSTING_READ(LCPLL_CTL);
- if (wait_for((I915_READ(LCPLL_CTL) & LCPLL_PLL_LOCK) == 0, 1))
+ if (intel_wait_for_register(dev_priv, LCPLL_CTL, LCPLL_PLL_LOCK, 0, 1))
DRM_ERROR("LCPLL still locked\n");
val = hsw_read_dcomp(dev_priv);
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 25/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (22 preceding siblings ...)
2016-06-30 14:33 ` [CI 24/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 26/62] " Chris Wilson
` (37 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5fa37aaf7e51..30c181a72202 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9633,7 +9633,9 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
val &= ~LCPLL_PLL_DISABLE;
I915_WRITE(LCPLL_CTL, val);
- if (wait_for(I915_READ(LCPLL_CTL) & LCPLL_PLL_LOCK, 5))
+ if (intel_wait_for_register(dev_priv,
+ LCPLL_CTL, LCPLL_PLL_LOCK, LCPLL_PLL_LOCK,
+ 5))
DRM_ERROR("LCPLL not locked yet\n");
if (val & LCPLL_CD_SOURCE_FCLK) {
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 26/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (23 preceding siblings ...)
2016-06-30 14:33 ` [CI 25/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 27/62] " Chris Wilson
` (36 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6d586b72da88..f1a817ed134d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1768,8 +1768,9 @@ static void wait_panel_status(struct intel_dp *intel_dp,
I915_READ(pp_stat_reg),
I915_READ(pp_ctrl_reg));
- if (_wait_for((I915_READ(pp_stat_reg) & mask) == value,
- 5 * USEC_PER_SEC, 10 * USEC_PER_MSEC))
+ if (intel_wait_for_register(dev_priv,
+ pp_stat_reg, mask, value,
+ 5000))
DRM_ERROR("Panel status timeout: status %08x control %08x\n",
I915_READ(pp_stat_reg),
I915_READ(pp_ctrl_reg));
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 27/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (24 preceding siblings ...)
2016-06-30 14:33 ` [CI 26/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 28/62] " Chris Wilson
` (35 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f1a817ed134d..0757ee427ad7 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3322,8 +3322,10 @@ void intel_dp_set_idle_link_train(struct intel_dp *intel_dp)
if (port == PORT_A)
return;
- if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_IDLE_DONE),
- 1))
+ if (intel_wait_for_register(dev_priv,DP_TP_STATUS(port),
+ DP_TP_STATUS_IDLE_DONE,
+ DP_TP_STATUS_IDLE_DONE,
+ 1))
DRM_ERROR("Timed out waiting for DP idle patterns\n");
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 28/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (25 preceding siblings ...)
2016-06-30 14:33 ` [CI 27/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 29/62] " Chris Wilson
` (34 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dp_mst.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 5f88e12575ac..c1d318601bf1 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -213,8 +213,11 @@ static void intel_mst_enable_dp(struct intel_encoder *encoder)
DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
- if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
- 1))
+ if (intel_wait_for_register(dev_priv,
+ DP_TP_STATUS(port),
+ DP_TP_STATUS_ACT_SENT,
+ DP_TP_STATUS_ACT_SENT,
+ 1))
DRM_ERROR("Timed out waiting for ACT sent\n");
ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 29/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (26 preceding siblings ...)
2016-06-30 14:33 ` [CI 28/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 30/62] " Chris Wilson
` (33 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e130c3ed2b6e..e19757c76db6 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -856,7 +856,11 @@ static void skl_ddi_pll_enable(struct drm_i915_private *dev_priv,
I915_WRITE(regs[pll->id].ctl,
I915_READ(regs[pll->id].ctl) | LCPLL_PLL_ENABLE);
- if (wait_for(I915_READ(DPLL_STATUS) & DPLL_LOCK(pll->id), 5))
+ if (intel_wait_for_register(dev_priv,
+ DPLL_STATUS,
+ DPLL_LOCK(pll->id),
+ DPLL_LOCK(pll->id),
+ 5))
DRM_ERROR("DPLL %d not locked\n", pll->id);
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 30/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (27 preceding siblings ...)
2016-06-30 14:33 ` [CI 29/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 31/62] " Chris Wilson
` (32 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dsi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 63b720061bd2..146d8329369e 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -90,7 +90,9 @@ static void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
mask = LP_CTRL_FIFO_EMPTY | HS_CTRL_FIFO_EMPTY |
LP_DATA_FIFO_EMPTY | HS_DATA_FIFO_EMPTY;
- if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & mask) == mask, 100))
+ if (intel_wait_for_register(dev_priv,
+ MIPI_GEN_FIFO_STAT(port), mask, mask,
+ 100))
DRM_ERROR("DPI FIFOs are not empty\n");
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 31/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (28 preceding siblings ...)
2016-06-30 14:33 ` [CI 30/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 32/62] " Chris Wilson
` (31 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dsi.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 146d8329369e..9bbc1f4276cd 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -160,8 +160,10 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,
/* note: this is never true for reads */
if (packet.payload_length) {
-
- if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & data_mask) == 0, 50))
+ if (intel_wait_for_register(dev_priv,
+ MIPI_GEN_FIFO_STAT(port),
+ data_mask, 0,
+ 50))
DRM_ERROR("Timeout waiting for HS/LP DATA FIFO !full\n");
write_data(dev_priv, data_reg, packet.payload,
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 32/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (29 preceding siblings ...)
2016-06-30 14:33 ` [CI 31/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 33/62] " Chris Wilson
` (30 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dsi.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 9bbc1f4276cd..448d6dcc1529 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -174,7 +174,10 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,
I915_WRITE(MIPI_INTR_STAT(port), GEN_READ_DATA_AVAIL);
}
- if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & ctrl_mask) == 0, 50)) {
+ if (intel_wait_for_register(dev_priv,
+ MIPI_GEN_FIFO_STAT(port),
+ ctrl_mask, 0,
+ 50)) {
DRM_ERROR("Timeout waiting for HS/LP CTRL FIFO !full\n");
}
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 33/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (30 preceding siblings ...)
2016-06-30 14:33 ` [CI 32/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 34/62] " Chris Wilson
` (29 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dsi.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 448d6dcc1529..618f849781aa 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -186,7 +186,10 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,
/* ->rx_len is set only for reads */
if (msg->rx_len) {
data_mask = GEN_READ_DATA_AVAIL;
- if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & data_mask) == data_mask, 50))
+ if (intel_wait_for_register(dev_priv,
+ MIPI_INTR_STAT(port),
+ data_mask, data_mask,
+ 50))
DRM_ERROR("Timeout waiting for read data.\n");
read_data(dev_priv, data_reg, msg->rx_buf, msg->rx_len);
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 34/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (31 preceding siblings ...)
2016-06-30 14:33 ` [CI 33/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 35/62] " Chris Wilson
` (28 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dsi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 618f849781aa..a28dc1845455 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -279,7 +279,9 @@ static int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs,
I915_WRITE(MIPI_DPI_CONTROL(port), cmd);
mask = SPL_PKT_SENT_INTERRUPT;
- if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & mask) == mask, 100))
+ if (intel_wait_for_register(dev_priv,
+ MIPI_INTR_STAT(port), mask, mask,
+ 100))
DRM_ERROR("Video mode command 0x%08x send failed.\n", cmd);
return 0;
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 35/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (32 preceding siblings ...)
2016-06-30 14:33 ` [CI 34/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 36/62] " Chris Wilson
` (27 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dsi.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index a28dc1845455..448741d8653b 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -679,8 +679,9 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
/* Wait till Clock lanes are in LP-00 state for MIPI Port A
* only. MIPI Port C has no similar bit for checking
*/
- if (wait_for(((I915_READ(port_ctrl) & AFE_LATCHOUT)
- == 0x00000), 30))
+ if (intel_wait_for_register(dev_priv,
+ port_ctrl, AFE_LATCHOUT, 0,
+ 30))
DRM_ERROR("DSI LP not going Low\n");
/* Disable MIPI PHY transparent latch */
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 36/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (33 preceding siblings ...)
2016-06-30 14:33 ` [CI 35/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 37/62] " Chris Wilson
` (26 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dsi_pll.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index 1765e6e18f2c..cbcc7114c799 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -234,8 +234,11 @@ static void bxt_disable_dsi_pll(struct intel_encoder *encoder)
* PLL lock should deassert within 200us.
* Wait up to 1ms before timing out.
*/
- if (wait_for((I915_READ(BXT_DSI_PLL_ENABLE)
- & BXT_DSI_PLL_LOCKED) == 0, 1))
+ if (intel_wait_for_register(dev_priv,
+ BXT_DSI_PLL_ENABLE,
+ BXT_DSI_PLL_LOCKED,
+ 0,
+ 1))
DRM_ERROR("Timeout waiting for PLL lock deassertion\n");
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 37/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (34 preceding siblings ...)
2016-06-30 14:33 ` [CI 36/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 38/62] " Chris Wilson
` (25 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_dsi_pll.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index cbcc7114c799..4f9930bc89e5 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -489,7 +489,11 @@ static void bxt_enable_dsi_pll(struct intel_encoder *encoder,
I915_WRITE(BXT_DSI_PLL_ENABLE, val);
/* Timeout and fail if PLL not locked */
- if (wait_for(I915_READ(BXT_DSI_PLL_ENABLE) & BXT_DSI_PLL_LOCKED, 1)) {
+ if (intel_wait_for_register(dev_priv,
+ BXT_DSI_PLL_ENABLE,
+ BXT_DSI_PLL_LOCKED,
+ BXT_DSI_PLL_LOCKED,
+ 1)) {
DRM_ERROR("Timed out waiting for DSI PLL to lock\n");
return;
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 38/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (35 preceding siblings ...)
2016-06-30 14:33 ` [CI 37/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 39/62] " Chris Wilson
` (24 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_fbc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 97110533dcaa..978d79532f96 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -124,7 +124,9 @@ static void i8xx_fbc_deactivate(struct drm_i915_private *dev_priv)
I915_WRITE(FBC_CONTROL, fbc_ctl);
/* Wait for compressing bit to clear */
- if (wait_for((I915_READ(FBC_STATUS) & FBC_STAT_COMPRESSING) == 0, 10)) {
+ if (intel_wait_for_register(dev_priv,
+ FBC_STATUS, FBC_STAT_COMPRESSING, 0,
+ 10)) {
DRM_DEBUG_KMS("FBC idle timed out\n");
return;
}
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 39/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (36 preceding siblings ...)
2016-06-30 14:33 ` [CI 38/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 40/62] " Chris Wilson
` (23 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_i2c.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 81de23098be7..6bc4c064df0b 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -298,15 +298,16 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
{
int ret;
-#define C ((I915_READ_NOTRACE(GMBUS2) & GMBUS_ACTIVE) == 0)
-
if (!HAS_GMBUS_IRQ(dev_priv))
- return wait_for(C, 10);
+ return intel_wait_for_register(dev_priv,
+ GMBUS2, GMBUS_ACTIVE, 0,
+ 10);
/* Important: The hw handles only the first bit, so set only one! */
I915_WRITE(GMBUS4, GMBUS_IDLE_EN);
- ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C,
+ ret = wait_event_timeout(dev_priv->gmbus_wait_queue,
+ (I915_READ_NOTRACE(GMBUS2) & GMBUS_ACTIVE) == 0,
msecs_to_jiffies_timeout(10));
I915_WRITE(GMBUS4, 0);
@@ -315,7 +316,6 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
return 0;
else
return -ETIMEDOUT;
-#undef C
}
static int
--
2.8.1
_______________________________________________
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^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 40/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (37 preceding siblings ...)
2016-06-30 14:33 ` [CI 39/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 41/62] " Chris Wilson
` (22 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_lrc.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 62b0dc6c2642..339d8041075f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -929,7 +929,10 @@ void intel_logical_ring_stop(struct intel_engine_cs *engine)
/* TODO: Is this correct with Execlists enabled? */
I915_WRITE_MODE(engine, _MASKED_BIT_ENABLE(STOP_RING));
- if (wait_for((I915_READ_MODE(engine) & MODE_IDLE) != 0, 1000)) {
+ if (intel_wait_for_register(dev_priv,
+ RING_MI_MODE(engine->mmio_base),
+ MODE_IDLE, MODE_IDLE,
+ 1000)) {
DRM_ERROR("%s :timed out trying to stop ring\n", engine->name);
return;
}
--
2.8.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 41/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (38 preceding siblings ...)
2016-06-30 14:33 ` [CI 40/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 42/62] " Chris Wilson
` (21 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_lvds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index cf680661454b..2d141b67503c 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -231,7 +231,7 @@ static void intel_enable_lvds(struct intel_encoder *encoder)
I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
POSTING_READ(lvds_encoder->reg);
- if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
+ if (intel_wait_for_register(dev_priv, stat_reg, PP_ON, PP_ON, 1000))
DRM_ERROR("timed out waiting for panel to power on\n");
intel_panel_enable_backlight(intel_connector);
--
2.8.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 42/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (39 preceding siblings ...)
2016-06-30 14:33 ` [CI 41/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 43/62] " Chris Wilson
` (20 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_lvds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 2d141b67503c..c26ffef80692 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -253,7 +253,7 @@ static void intel_disable_lvds(struct intel_encoder *encoder)
}
I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
- if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
+ if (intel_wait_for_register(dev_priv, stat_reg, PP_ON, 0, 1000))
DRM_ERROR("timed out waiting for panel to power off\n");
I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 43/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (40 preceding siblings ...)
2016-06-30 14:33 ` [CI 42/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 44/62] " Chris Wilson
` (19 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 29a09bf6bd18..d299a3d95cfa 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -501,8 +501,11 @@ static void vlv_psr_disable(struct intel_dp *intel_dp)
if (dev_priv->psr.active) {
/* Put VLV PSR back to PSR_state 0 that is PSR Disabled. */
- if (wait_for((I915_READ(VLV_PSRSTAT(intel_crtc->pipe)) &
- VLV_EDP_PSR_IN_TRANS) == 0, 1))
+ if (intel_wait_for_register(dev_priv,
+ VLV_PSRSTAT(intel_crtc->pipe),
+ VLV_EDP_PSR_IN_TRANS,
+ 0,
+ 1))
WARN(1, "PSR transition took longer than expected\n");
val = I915_READ(VLV_PSRCTL(intel_crtc->pipe));
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 44/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (41 preceding siblings ...)
2016-06-30 14:33 ` [CI 43/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 45/62] " Chris Wilson
` (18 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index d299a3d95cfa..bce44ecc9409 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -531,9 +531,11 @@ static void hsw_psr_disable(struct intel_dp *intel_dp)
I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE);
/* Wait till PSR is idle */
- if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL) &
- EDP_PSR_STATUS_STATE_MASK) == 0,
- 2 * USEC_PER_SEC, 10 * USEC_PER_MSEC))
+ if (intel_wait_for_register(dev_priv,
+ EDP_PSR_STATUS_CTL,
+ EDP_PSR_STATUS_STATE_MASK,
+ 0,
+ 2000))
DRM_ERROR("Timed out waiting for PSR Idle State\n");
dev_priv->psr.active = false;
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 45/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (42 preceding siblings ...)
2016-06-30 14:33 ` [CI 44/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 46/62] " Chris Wilson
` (17 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index bce44ecc9409..8d25c45aa6fe 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -591,14 +591,20 @@ static void intel_psr_work(struct work_struct *work)
* and be ready for re-enable.
*/
if (HAS_DDI(dev_priv)) {
- if (wait_for((I915_READ(EDP_PSR_STATUS_CTL) &
- EDP_PSR_STATUS_STATE_MASK) == 0, 50)) {
+ if (intel_wait_for_register(dev_priv,
+ EDP_PSR_STATUS_CTL,
+ EDP_PSR_STATUS_STATE_MASK,
+ 0,
+ 50)) {
DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n");
return;
}
} else {
- if (wait_for((I915_READ(VLV_PSRSTAT(pipe)) &
- VLV_EDP_PSR_IN_TRANS) == 0, 1)) {
+ if (intel_wait_for_register(dev_priv,
+ VLV_PSRSTAT(pipe),
+ VLV_EDP_PSR_IN_TRANS,
+ 0,
+ 1)) {
DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n");
return;
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 46/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (43 preceding siblings ...)
2016-06-30 14:33 ` [CI 45/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 47/62] " Chris Wilson
` (16 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 04a2d141e690..7ef3e68c8fd6 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -515,8 +515,9 @@ static void intel_ring_setup_status_page(struct intel_engine_cs *engine)
I915_WRITE(reg,
_MASKED_BIT_ENABLE(INSTPM_TLB_INVALIDATE |
INSTPM_SYNC_FLUSH));
- if (wait_for((I915_READ(reg) & INSTPM_SYNC_FLUSH) == 0,
- 1000))
+ if (intel_wait_for_register(dev_priv,
+ reg, INSTPM_SYNC_FLUSH, 0,
+ 1000))
DRM_ERROR("%s: wait for SyncFlush to complete for TLB invalidation timed out\n",
engine->name);
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 47/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (44 preceding siblings ...)
2016-06-30 14:33 ` [CI 46/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 48/62] " Chris Wilson
` (15 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 7ef3e68c8fd6..05018243aaef 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -529,7 +529,11 @@ static bool stop_ring(struct intel_engine_cs *engine)
if (!IS_GEN2(dev_priv)) {
I915_WRITE_MODE(engine, _MASKED_BIT_ENABLE(STOP_RING));
- if (wait_for((I915_READ_MODE(engine) & MODE_IDLE) != 0, 1000)) {
+ if (intel_wait_for_register(dev_priv,
+ RING_MI_MODE(engine->mmio_base),
+ MODE_IDLE,
+ MODE_IDLE,
+ 1000)) {
DRM_ERROR("%s : timed out trying to stop ring\n",
engine->name);
/* Sometimes we observe that the idle flag is not
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 48/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (45 preceding siblings ...)
2016-06-30 14:33 ` [CI 47/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 49/62] " Chris Wilson
` (14 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 05018243aaef..c4365cc1f133 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2696,9 +2696,11 @@ static void gen6_bsd_ring_write_tail(struct intel_engine_cs *engine,
I915_WRITE64(GEN6_BSD_RNCID, 0x0);
/* Wait for the ring not to be idle, i.e. for it to wake up. */
- if (wait_for((I915_READ(GEN6_BSD_SLEEP_PSMI_CONTROL) &
- GEN6_BSD_SLEEP_INDICATOR) == 0,
- 50))
+ if (intel_wait_for_register(dev_priv,
+ GEN6_BSD_SLEEP_PSMI_CONTROL,
+ GEN6_BSD_SLEEP_INDICATOR,
+ 0,
+ 50))
DRM_ERROR("timed out waiting for the BSD ring to wake up\n");
/* Now that the ring is fully powered up, update the tail */
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 49/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (46 preceding siblings ...)
2016-06-30 14:33 ` [CI 48/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 50/62] " Chris Wilson
` (13 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 22b46f5f0273..cc8766df8a37 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -365,8 +365,11 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv,
if (!is_enabled) {
DRM_DEBUG_KMS("Enabling power well\n");
- if (wait_for((I915_READ(HSW_PWR_WELL_DRIVER) &
- HSW_PWR_WELL_STATE_ENABLED), 20))
+ if (intel_wait_for_register(dev_priv,
+ HSW_PWR_WELL_DRIVER,
+ HSW_PWR_WELL_STATE_ENABLED,
+ HSW_PWR_WELL_STATE_ENABLED,
+ 20))
DRM_ERROR("Timeout enabling power well\n");
hsw_power_well_post_enable(dev_priv);
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 50/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (47 preceding siblings ...)
2016-06-30 14:33 ` [CI 49/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 51/62] " Chris Wilson
` (12 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index cc8766df8a37..9625d0326d64 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -703,8 +703,11 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
switch (power_well->data) {
case SKL_DISP_PW_1:
- if (wait_for((I915_READ(SKL_FUSE_STATUS) &
- SKL_FUSE_PG0_DIST_STATUS), 1)) {
+ if (intel_wait_for_register(dev_priv,
+ SKL_FUSE_STATUS,
+ SKL_FUSE_PG0_DIST_STATUS,
+ SKL_FUSE_PG0_DIST_STATUS,
+ 1)) {
DRM_ERROR("PG0 not enabled\n");
return;
}
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 51/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (48 preceding siblings ...)
2016-06-30 14:33 ` [CI 50/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 52/62] " Chris Wilson
` (11 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 9625d0326d64..f212ef31c729 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -768,12 +768,18 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
if (check_fuse_status) {
if (power_well->data == SKL_DISP_PW_1) {
- if (wait_for((I915_READ(SKL_FUSE_STATUS) &
- SKL_FUSE_PG1_DIST_STATUS), 1))
+ if (intel_wait_for_register(dev_priv,
+ SKL_FUSE_STATUS,
+ SKL_FUSE_PG1_DIST_STATUS,
+ SKL_FUSE_PG1_DIST_STATUS,
+ 1))
DRM_ERROR("PG1 distributing status timeout\n");
} else if (power_well->data == SKL_DISP_PW_2) {
- if (wait_for((I915_READ(SKL_FUSE_STATUS) &
- SKL_FUSE_PG2_DIST_STATUS), 1))
+ if (intel_wait_for_register(dev_priv,
+ SKL_FUSE_STATUS,
+ SKL_FUSE_PG2_DIST_STATUS,
+ SKL_FUSE_PG2_DIST_STATUS,
+ 1))
DRM_ERROR("PG2 distributing status timeout\n");
}
}
--
2.8.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 52/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (49 preceding siblings ...)
2016-06-30 14:33 ` [CI 51/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 53/62] " Chris Wilson
` (10 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index f212ef31c729..615d0bfaae38 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1218,7 +1218,6 @@ static void assert_chv_phy_status(struct drm_i915_private *dev_priv)
u32 phy_control = dev_priv->chv_phy_control;
u32 phy_status = 0;
u32 phy_status_mask = 0xffffffff;
- u32 tmp;
/*
* The BIOS can leave the PHY is some weird state
@@ -1306,10 +1305,14 @@ static void assert_chv_phy_status(struct drm_i915_private *dev_priv)
* The PHY may be busy with some initial calibration and whatnot,
* so the power state can take a while to actually change.
*/
- if (wait_for((tmp = I915_READ(DISPLAY_PHY_STATUS) & phy_status_mask) == phy_status, 10))
- WARN(phy_status != tmp,
- "Unexpected PHY_STATUS 0x%08x, expected 0x%08x (PHY_CONTROL=0x%08x)\n",
- tmp, phy_status, dev_priv->chv_phy_control);
+ if (intel_wait_for_register(dev_priv,
+ DISPLAY_PHY_STATUS,
+ phy_status_mask,
+ phy_status,
+ 10))
+ DRM_ERROR("Unexpected PHY_STATUS 0x%08x, expected 0x%08x (PHY_CONTROL=0x%08x)\n",
+ I915_READ(DISPLAY_PHY_STATUS) & phy_status_mask,
+ phy_status, dev_priv->chv_phy_control);
}
#undef BITS_SET
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 53/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (50 preceding siblings ...)
2016-06-30 14:33 ` [CI 52/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 54/62] " Chris Wilson
` (9 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 615d0bfaae38..7cbba42f0ab4 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1340,7 +1340,11 @@ static void chv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv,
vlv_set_power_well(dev_priv, power_well, true);
/* Poll for phypwrgood signal */
- if (wait_for(I915_READ(DISPLAY_PHY_STATUS) & PHY_POWERGOOD(phy), 1))
+ if (intel_wait_for_register(dev_priv,
+ DISPLAY_PHY_STATUS,
+ PHY_POWERGOOD(phy),
+ PHY_POWERGOOD(phy),
+ 1))
DRM_ERROR("Display PHY %d is not power up\n", phy);
mutex_lock(&dev_priv->sb_lock);
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 54/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (51 preceding siblings ...)
2016-06-30 14:33 ` [CI 53/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 55/62] " Chris Wilson
` (8 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_sideband.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
index c3998188cf35..56744471cbac 100644
--- a/drivers/gpu/drm/i915/intel_sideband.c
+++ b/drivers/gpu/drm/i915/intel_sideband.c
@@ -51,7 +51,9 @@ static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
WARN_ON(!mutex_is_locked(&dev_priv->sb_lock));
- if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) == 0, 5)) {
+ if (intel_wait_for_register(dev_priv,
+ VLV_IOSF_DOORBELL_REQ, IOSF_SB_BUSY, 0,
+ 5)) {
DRM_DEBUG_DRIVER("IOSF sideband idle wait (%s) timed out\n",
is_read ? "read" : "write");
return -EAGAIN;
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 55/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (52 preceding siblings ...)
2016-06-30 14:33 ` [CI 54/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 56/62] " Chris Wilson
` (7 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_sideband.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
index 56744471cbac..97893457ddb8 100644
--- a/drivers/gpu/drm/i915/intel_sideband.c
+++ b/drivers/gpu/drm/i915/intel_sideband.c
@@ -64,7 +64,9 @@ static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
I915_WRITE(VLV_IOSF_DATA, *val);
I915_WRITE(VLV_IOSF_DOORBELL_REQ, cmd);
- if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) == 0, 5)) {
+ if (intel_wait_for_register(dev_priv,
+ VLV_IOSF_DOORBELL_REQ, IOSF_SB_BUSY, 0,
+ 5)) {
DRM_DEBUG_DRIVER("IOSF sideband finish wait (%s) timed out\n",
is_read ? "read" : "write");
return -ETIMEDOUT;
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 56/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (53 preceding siblings ...)
2016-06-30 14:33 ` [CI 55/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 57/62] " Chris Wilson
` (6 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_sideband.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
index 97893457ddb8..7dea3c382892 100644
--- a/drivers/gpu/drm/i915/intel_sideband.c
+++ b/drivers/gpu/drm/i915/intel_sideband.c
@@ -206,8 +206,9 @@ u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
u32 value = 0;
WARN_ON(!mutex_is_locked(&dev_priv->sb_lock));
- if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0,
- 100)) {
+ if (intel_wait_for_register(dev_priv,
+ SBI_CTL_STAT, SBI_BUSY, 0,
+ 100)) {
DRM_ERROR("timeout waiting for SBI to become ready\n");
return 0;
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 57/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (54 preceding siblings ...)
2016-06-30 14:33 ` [CI 56/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 58/62] " Chris Wilson
` (5 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_sideband.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
index 7dea3c382892..6841e2315b1b 100644
--- a/drivers/gpu/drm/i915/intel_sideband.c
+++ b/drivers/gpu/drm/i915/intel_sideband.c
@@ -221,8 +221,11 @@ u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
value = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IORD;
I915_WRITE(SBI_CTL_STAT, value | SBI_BUSY);
- if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0,
- 100)) {
+ if (intel_wait_for_register(dev_priv,
+ SBI_CTL_STAT,
+ SBI_BUSY | SBI_RESPONSE_FAIL,
+ 0,
+ 100)) {
DRM_ERROR("timeout waiting for SBI to complete read transaction\n");
return 0;
}
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 58/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (55 preceding siblings ...)
2016-06-30 14:33 ` [CI 57/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 59/62] " Chris Wilson
` (4 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_sideband.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
index 6841e2315b1b..11a25ab4d8a2 100644
--- a/drivers/gpu/drm/i915/intel_sideband.c
+++ b/drivers/gpu/drm/i915/intel_sideband.c
@@ -240,8 +240,9 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
WARN_ON(!mutex_is_locked(&dev_priv->sb_lock));
- if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0,
- 100)) {
+ if (intel_wait_for_register(dev_priv,
+ SBI_CTL_STAT, SBI_BUSY, 0,
+ 100)) {
DRM_ERROR("timeout waiting for SBI to become ready\n");
return;
}
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 59/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (56 preceding siblings ...)
2016-06-30 14:33 ` [CI 58/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 60/62] " Chris Wilson
` (3 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_sideband.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
index 11a25ab4d8a2..1a840bf92eea 100644
--- a/drivers/gpu/drm/i915/intel_sideband.c
+++ b/drivers/gpu/drm/i915/intel_sideband.c
@@ -256,8 +256,11 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
tmp = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IOWR;
I915_WRITE(SBI_CTL_STAT, SBI_BUSY | tmp);
- if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0,
- 100)) {
+ if (intel_wait_for_register(dev_priv,
+ SBI_CTL_STAT,
+ SBI_BUSY | SBI_RESPONSE_FAIL,
+ 0,
+ 100)) {
DRM_ERROR("timeout waiting for SBI to complete write transaction\n");
return;
}
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 60/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (57 preceding siblings ...)
2016-06-30 14:33 ` [CI 59/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 61/62] " Chris Wilson
` (2 subsequent siblings)
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 4c166f6550be..8bc174a2d9e6 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1530,15 +1530,17 @@ static int ironlake_do_reset(struct drm_i915_private *dev_priv,
I915_WRITE(ILK_GDSR,
ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
- ret = wait_for((I915_READ(ILK_GDSR) &
- ILK_GRDOM_RESET_ENABLE) == 0, 500);
+ ret = intel_wait_for_register(dev_priv,
+ ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0,
+ 500);
if (ret)
return ret;
I915_WRITE(ILK_GDSR,
ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
- ret = wait_for((I915_READ(ILK_GDSR) &
- ILK_GRDOM_RESET_ENABLE) == 0, 500);
+ ret = intel_wait_for_register(dev_priv,
+ ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0,
+ 500);
if (ret)
return ret;
--
2.8.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 61/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (58 preceding siblings ...)
2016-06-30 14:33 ` [CI 60/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:33 ` [CI 62/62] drm/i915: Perform Sandybridge BSD tail write under the forcewake Chris Wilson
2016-06-30 14:58 ` ✗ Ro.CI.BAT: warning for series starting with [CI,01/62] drm/i915: Use a hybrid scheme for fast register waits Patchwork
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 8bc174a2d9e6..b49a95a18da4 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1553,20 +1553,16 @@ static int ironlake_do_reset(struct drm_i915_private *dev_priv,
static int gen6_hw_domain_reset(struct drm_i915_private *dev_priv,
u32 hw_domain_mask)
{
- int ret;
-
/* GEN6_GDRST is not in the gt power well, no need to check
* for fifo space for the write or forcewake the chip for
* the read
*/
__raw_i915_write32(dev_priv, GEN6_GDRST, hw_domain_mask);
-#define ACKED ((__raw_i915_read32(dev_priv, GEN6_GDRST) & hw_domain_mask) == 0)
/* Spin waiting for the device to ack the reset requests */
- ret = wait_for(ACKED, 500);
-#undef ACKED
-
- return ret;
+ return intel_wait_for_register_fw(dev_priv,
+ GEN6_GDRST, hw_domain_mask, 0,
+ 500);
}
/**
--
2.8.1
_______________________________________________
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^ permalink raw reply related [flat|nested] 63+ messages in thread
* [CI 62/62] drm/i915: Perform Sandybridge BSD tail write under the forcewake
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (59 preceding siblings ...)
2016-06-30 14:33 ` [CI 61/62] " Chris Wilson
@ 2016-06-30 14:33 ` Chris Wilson
2016-06-30 14:58 ` ✗ Ro.CI.BAT: warning for series starting with [CI,01/62] drm/i915: Use a hybrid scheme for fast register waits Patchwork
61 siblings, 0 replies; 63+ messages in thread
From: Chris Wilson @ 2016-06-30 14:33 UTC (permalink / raw)
To: intel-gfx
Since we have a sequence of register reads and writes, we can reduce the
latency of starting the BSD ring by performing all the mmio operations
under the same forcewake wakeref.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 28 ++++++++++++++++------------
2 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 48d30676455e..485ab1148181 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3882,6 +3882,7 @@ __raw_write(64, q)
*/
#define I915_READ_FW(reg__) __raw_i915_read32(dev_priv, (reg__))
#define I915_WRITE_FW(reg__, val__) __raw_i915_write32(dev_priv, (reg__), (val__))
+#define I915_WRITE64_FW(reg__, val__) __raw_i915_write64(dev_priv, (reg__), (val__))
#define POSTING_READ_FW(reg__) (void)I915_READ_FW(reg__)
/* "Broadcast RGB" property */
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index c4365cc1f133..7c93d4c210e5 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2684,34 +2684,38 @@ static void gen6_bsd_ring_write_tail(struct intel_engine_cs *engine,
{
struct drm_i915_private *dev_priv = engine->i915;
+ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+
/* Every tail move must follow the sequence below */
/* Disable notification that the ring is IDLE. The GT
* will then assume that it is busy and bring it out of rc6.
*/
- I915_WRITE(GEN6_BSD_SLEEP_PSMI_CONTROL,
- _MASKED_BIT_ENABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
+ I915_WRITE_FW(GEN6_BSD_SLEEP_PSMI_CONTROL,
+ _MASKED_BIT_ENABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
/* Clear the context id. Here be magic! */
- I915_WRITE64(GEN6_BSD_RNCID, 0x0);
+ I915_WRITE64_FW(GEN6_BSD_RNCID, 0x0);
/* Wait for the ring not to be idle, i.e. for it to wake up. */
- if (intel_wait_for_register(dev_priv,
- GEN6_BSD_SLEEP_PSMI_CONTROL,
- GEN6_BSD_SLEEP_INDICATOR,
- 0,
- 50))
+ if (intel_wait_for_register_fw(dev_priv,
+ GEN6_BSD_SLEEP_PSMI_CONTROL,
+ GEN6_BSD_SLEEP_INDICATOR,
+ 0,
+ 50))
DRM_ERROR("timed out waiting for the BSD ring to wake up\n");
/* Now that the ring is fully powered up, update the tail */
- I915_WRITE_TAIL(engine, value);
- POSTING_READ(RING_TAIL(engine->mmio_base));
+ I915_WRITE_FW(RING_TAIL(engine->mmio_base), value);
+ POSTING_READ_FW(RING_TAIL(engine->mmio_base));
/* Let the ring send IDLE messages to the GT again,
* and so let it sleep to conserve power when idle.
*/
- I915_WRITE(GEN6_BSD_SLEEP_PSMI_CONTROL,
- _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
+ I915_WRITE_FW(GEN6_BSD_SLEEP_PSMI_CONTROL,
+ _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
+
+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
}
static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
--
2.8.1
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* ✗ Ro.CI.BAT: warning for series starting with [CI,01/62] drm/i915: Use a hybrid scheme for fast register waits
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
` (60 preceding siblings ...)
2016-06-30 14:33 ` [CI 62/62] drm/i915: Perform Sandybridge BSD tail write under the forcewake Chris Wilson
@ 2016-06-30 14:58 ` Patchwork
61 siblings, 0 replies; 63+ messages in thread
From: Patchwork @ 2016-06-30 14:58 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,01/62] drm/i915: Use a hybrid scheme for fast register waits
URL : https://patchwork.freedesktop.org/series/9323/
State : warning
== Summary ==
Series 9323v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/9323/revisions/1/mbox
Test drv_module_reload_basic:
dmesg-warn -> PASS (ro-byt-n2820)
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-c:
skip -> PASS (fi-skl-i5-6260u)
Subgroup read-crc-pipe-c-frame-sequence:
pass -> SKIP (fi-skl-i5-6260u)
Subgroup suspend-read-crc-pipe-a:
dmesg-warn -> SKIP (ro-bdw-i5-5250u)
fi-kbl-qkkr total:229 pass:160 dwarn:26 dfail:2 fail:1 skip:40
fi-skl-i5-6260u total:229 pass:203 dwarn:0 dfail:0 fail:0 skip:26
fi-skl-i7-6700k total:229 pass:190 dwarn:0 dfail:0 fail:0 skip:39
fi-snb-i7-2600 total:229 pass:176 dwarn:0 dfail:0 fail:0 skip:53
ro-bdw-i5-5250u total:229 pass:204 dwarn:1 dfail:1 fail:0 skip:23
ro-bdw-i7-5557U total:229 pass:204 dwarn:1 dfail:1 fail:0 skip:23
ro-bdw-i7-5600u total:229 pass:190 dwarn:0 dfail:1 fail:0 skip:38
ro-bsw-n3050 total:229 pass:176 dwarn:0 dfail:1 fail:3 skip:49
ro-byt-n2820 total:229 pass:180 dwarn:0 dfail:1 fail:3 skip:45
ro-hsw-i3-4010u total:229 pass:197 dwarn:0 dfail:1 fail:0 skip:31
ro-hsw-i7-4770r total:229 pass:197 dwarn:0 dfail:1 fail:0 skip:31
ro-ilk-i7-620lm total:229 pass:157 dwarn:0 dfail:1 fail:1 skip:70
ro-ilk1-i5-650 total:224 pass:157 dwarn:0 dfail:1 fail:1 skip:65
ro-ivb-i7-3770 total:229 pass:188 dwarn:0 dfail:1 fail:0 skip:40
ro-ivb2-i7-3770 total:229 pass:192 dwarn:0 dfail:1 fail:0 skip:36
ro-skl3-i5-6260u total:229 pass:208 dwarn:1 dfail:1 fail:0 skip:19
ro-snb-i7-2620M total:229 pass:179 dwarn:0 dfail:1 fail:1 skip:48
Results at /archive/results/CI_IGT_test/RO_Patchwork_1343/
e112966 drm-intel-nightly: 2016y-06m-30d-12h-06m-36s UTC integration manifest
136e34b drm/i915: Perform Sandybridge BSD tail write under the forcewake
dd8dcbf drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
0aa1390 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
7331544 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
c37a410 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
a5b9eab drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
e9222e1 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
6f44299 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
3d71d0c drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
ac453a9 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
23907f1 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
99ea5d0 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
b9026ae drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
472add0 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
c6f62f5 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
fca536b drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
8b05daa drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
d485cd8 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
c272486 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
0828a9a drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2ba9bf2 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
4699986 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
e4ee4d5 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
1694552 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
a1362def drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
299bde5 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
6efc6d3 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
f6c848c drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
fc54b15 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
a4bb612 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
79524f9 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
ec708c0 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
061ea0d drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
aed7092 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
8d3a3e4 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
1a3218b drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
88eb902 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
92d965e drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
424104f drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
32e9acc drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
9b8ebe2 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
bae8cd0 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
c29c59c drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
823b777 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
ff7c41c drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
3aacc00 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
9f6b6e1 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
640049d drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
1aeabc6 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
2026f7c drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
d0618447 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
fd119ba drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
5281fdc drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
c155188 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
bdaf736 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
c05d498 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
5b51698 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
81a36e1 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
be16500 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
14d6685 drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
b6999ad drm/i915: Convert sandybridge_pcode_*() to use intel_wait_for_register()
2df9272 drm/i915: Use a hybrid scheme for fast register waits
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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