[U-Boot] [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes protocol

[U-Boot] [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes protocol

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Up to now, the function is_serdes_configed() doesn't check if the map
of serdes protocol is initialized before accessing it. The function
is_serdes_configed() will get wrong result when it was called before
the serdes protocol maps initialized. As the first eliment of the map
isn't used for any device, so use it as the flag to indicate if the
map has been initialized.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
Tested on LS1043ARDB, LS1021AQDS and T4240QDS boards.

 arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c          |  9 +++++++++
 arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c |  6 ++++++
 arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c |  9 +++++++++
 arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c            |  6 ++++++
 arch/powerpc/cpu/mpc85xx/c29x_serdes.c               |  6 ++++++
 arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c       | 15 +++++++++++++++
 arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c        |  6 ++++++
 arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c            | 16 +++++++++++++++-
 arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c            | 16 +++++++++++++++-
 arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c            |  6 ++++++
 arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c            |  6 ++++++
 arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c            |  6 ++++++
 arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c            |  6 ++++++
 arch/powerpc/cpu/mpc85xx/p1010_serdes.c              | 16 +++++++++++++++-
 arch/powerpc/cpu/mpc85xx/p1021_serdes.c              |  6 ++++++
 arch/powerpc/cpu/mpc85xx/p1022_serdes.c              | 16 +++++++++++++++-
 arch/powerpc/cpu/mpc85xx/p1023_serdes.c              |  9 ++++++++-
 arch/powerpc/cpu/mpc85xx/p2020_serdes.c              |  6 ++++++
 arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c            | 16 +++++++++++++++-
 arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c            | 16 +++++++++++++++-
 20 files changed, 191 insertions(+), 7 deletions(-)

diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
index 9b78acb..ffb05cb 100644
--- a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
+++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
@@ -23,9 +23,15 @@ int is_serdes_configured(enum srds_prtcl device)
 	u64 ret = 0;
 
 #ifdef CONFIG_SYS_FSL_SRDS_1
+	if (!(serdes1_prtcl_map & 1ULL << NONE))
+		fsl_serdes_init();
+
 	ret |= (1ULL << device) & serdes1_prtcl_map;
 #endif
 #ifdef CONFIG_SYS_FSL_SRDS_2
+	if (!(serdes2_prtcl_map & 1ULL << NONE))
+		fsl_serdes_init();
+
 	ret |= (1ULL << device) & serdes2_prtcl_map;
 #endif
 
@@ -87,6 +93,9 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift)
 		serdes_prtcl_map |= (1ULL << lane_prtcl);
 	}
 
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes_prtcl_map |= (1ULL << NONE);
+
 	return serdes_prtcl_map;
 }
 
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
index fe3444a..fff80ef 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
@@ -19,6 +19,9 @@ int is_serdes_configured(enum srds_prtcl device)
 	int ret = 0;
 
 #ifdef CONFIG_SYS_FSL_SRDS_1
+	if (!serdes1_prtcl_map[NONE])
+		fsl_serdes_init();
+
 	ret |= serdes1_prtcl_map[device];
 #endif
 
@@ -103,6 +106,9 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift,
 		else
 			serdes_prtcl_map[lane_prtcl] = 1;
 	}
+
+	/* Set the first eliment to indicate serdes has been initialized */
+	serdes_prtcl_map[NONE] = 1;
 }
 
 void fsl_serdes_init(void)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index be6acc6..d83a073 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -28,9 +28,15 @@ int is_serdes_configured(enum srds_prtcl device)
 	int ret = 0;
 
 #ifdef CONFIG_SYS_FSL_SRDS_1
+	if (!serdes1_prtcl_map[NONE])
+		fsl_serdes_init();
+
 	ret |= serdes1_prtcl_map[device];
 #endif
 #ifdef CONFIG_SYS_FSL_SRDS_2
+	if (!serdes2_prtcl_map[NONE])
+		fsl_serdes_init();
+
 	ret |= serdes2_prtcl_map[device];
 #endif
 
@@ -136,6 +142,9 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift,
 #endif
 		}
 	}
+
+	/* Set the first eliment to indicate serdes has been initialized */
+	serdes_prtcl_map[NONE] = 1;
 }
 
 void fsl_serdes_init(void)
diff --git a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
index 399b208..414e1ea 100644
--- a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
@@ -68,6 +68,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl prtcl)
 {
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << prtcl) & serdes1_prtcl_map;
 }
 
@@ -90,4 +93,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
index 51972cb..469ef45 100644
--- a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
@@ -32,6 +32,9 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << device) & serdes1_prtcl_map;
 }
 
@@ -59,4 +62,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = ptr->lanes[lane];
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index 9920839..93b0aa8 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -92,15 +92,27 @@ int is_serdes_configured(enum srds_prtcl device)
 	int ret = 0;
 
 #ifdef CONFIG_SYS_FSL_SRDS_1
+	if (!serdes1_prtcl_map[NONE])
+		fsl_serdes_init();
+
 	ret |= serdes1_prtcl_map[device];
 #endif
 #ifdef CONFIG_SYS_FSL_SRDS_2
+	if (!serdes2_prtcl_map[NONE])
+		fsl_serdes_init();
+
 	ret |= serdes2_prtcl_map[device];
 #endif
 #ifdef CONFIG_SYS_FSL_SRDS_3
+	if (!serdes3_prtcl_map[NONE])
+		fsl_serdes_init();
+
 	ret |= serdes3_prtcl_map[device];
 #endif
 #ifdef CONFIG_SYS_FSL_SRDS_4
+	if (!serdes4_prtcl_map[NONE])
+		fsl_serdes_init();
+
 	ret |= serdes4_prtcl_map[device];
 #endif
 
@@ -325,6 +337,9 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift,
 		else
 			serdes_prtcl_map[lane_prtcl] = 1;
 	}
+
+	/* Set the first eliment to indicate serdes has been initialized */
+	serdes_prtcl_map[NONE] = 1;
 }
 
 void fsl_serdes_init(void)
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index ba22f90..45b43a4 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -136,6 +136,9 @@ int is_serdes_configured(enum srds_prtcl device)
 	if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN))
 		return 0;
 
+	if (!(serdes_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << device) & serdes_prtcl_map;
 }
 
@@ -857,6 +860,9 @@ void fsl_serdes_init(void)
 			     SRDS_RSTCTL_SDPD);
 	}
 #endif
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes_prtcl_map |= (1 << NONE);
 }
 
 const char *serdes_clock_to_string(u32 clock)
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
index baf52d5..921ea7a 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
@@ -71,11 +71,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
-	int ret = (1 << device) & serdes1_prtcl_map;
+	int ret;
+
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
+	ret = (1 << device) & serdes1_prtcl_map;
 
 	if (ret)
 		return ret;
 
+	if (!(serdes2_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << device) & serdes2_prtcl_map;
 }
 
@@ -221,6 +229,9 @@ void fsl_serdes_init(void)
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
 
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
+
 	if (srds2_io_sel >= ARRAY_SIZE(serdes2_cfg_tbl)) {
 		printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_io_sel);
 		return;
@@ -230,4 +241,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds2_io_sel][lane];
 		serdes2_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes2_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
index ed78a66..c697dff 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
@@ -34,11 +34,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
-	int ret = (1 << device) & serdes1_prtcl_map;
+	int ret;
+
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
+	ret = (1 << device) & serdes1_prtcl_map;
 
 	if (ret)
 		return ret;
 
+	if (!(serdes2_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << device) & serdes2_prtcl_map;
 }
 
@@ -61,6 +69,9 @@ void fsl_serdes_init(void)
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
 
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
+
 	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
 		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
 		return;
@@ -76,4 +87,7 @@ void fsl_serdes_init(void)
 
 	if (pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)
 		serdes2_prtcl_map &= ~(1 << SGMII_TSEC3);
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes2_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
index d146955..58dfee0 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
@@ -24,6 +24,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl prtcl)
 {
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << prtcl) & serdes1_prtcl_map;
 }
 
@@ -46,4 +49,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_cfg][lane];
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
index 9199f01..cf35fd2 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
@@ -24,6 +24,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl prtcl)
 {
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << prtcl) & serdes1_prtcl_map;
 }
 
@@ -46,4 +49,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
index 6c80b5e..941f6f0 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
@@ -33,6 +33,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl prtcl)
 {
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << prtcl) & serdes1_prtcl_map;
 }
 
@@ -55,4 +58,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
index 3632eb5..455d3a3 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
@@ -28,6 +28,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl prtcl)
 {
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << prtcl) & serdes1_prtcl_map;
 }
 
@@ -62,4 +65,7 @@ void fsl_serdes_init(void)
 
 	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
 		serdes1_prtcl_map |= (1 << SGMII_TSEC4);
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
index 4b965f7..3f2bd25 100644
--- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
@@ -33,11 +33,19 @@ static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
-	int ret = (1 << device) & serdes1_prtcl_map;
+	int ret;
+
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
+	ret = (1 << device) & serdes1_prtcl_map;
 
 	if (ret)
 		return ret;
 
+	if (!(serdes2_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << device) & serdes2_prtcl_map;
 }
 
@@ -60,6 +68,9 @@ void fsl_serdes_init(void)
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
 
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
+
 	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
 		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
 		return;
@@ -69,4 +80,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
 		serdes2_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes2_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
index 99a77bd..e8eb9e7 100644
--- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
@@ -41,6 +41,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl prtcl)
 {
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << prtcl) & serdes1_prtcl_map;
 }
 
@@ -67,6 +70,9 @@ void fsl_serdes_init(void)
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
 
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
+
 	/* Init SERDES Receiver electrical idle detection control for PCIe */
 
 	/* Lane 0 is always PCIe 1 */
diff --git a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
index 14d17eb..942df29 100644
--- a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
@@ -72,11 +72,19 @@ static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
-	int ret = (1 << device) & serdes1_prtcl_map;
+	int ret;
+
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
+	ret = (1 << device) & serdes1_prtcl_map;
 
 	if (ret)
 		return ret;
 
+	if (!(serdes2_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << device) & serdes2_prtcl_map;
 }
 
@@ -99,6 +107,9 @@ void fsl_serdes_init(void)
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
 
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
+
 	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
 		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
 		return;
@@ -108,4 +119,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
 		serdes2_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes2_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
index e83b0a3..21cb91d 100644
--- a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
@@ -24,7 +24,12 @@ static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
-	int ret = (1 << device) & serdes1_prtcl_map;
+	int ret;
+
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
+	ret = (1 << device) & serdes1_prtcl_map;
 	return ret;
 }
 
@@ -47,4 +52,6 @@ void fsl_serdes_init(void)
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
 
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
index 59d402c..91a62fb 100644
--- a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
@@ -32,6 +32,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl prtcl)
 {
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << prtcl) & serdes1_prtcl_map;
 }
 
@@ -54,4 +57,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
index 2a7e3bf..3dde1ce 100644
--- a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
+++ b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
@@ -29,11 +29,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
-	int ret = (1 << device) & serdes1_prtcl_map;
+	int ret;
+
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
+	ret = (1 << device) & serdes1_prtcl_map;
 
 	if (ret)
 		return ret;
 
+	if (!(serdes2_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << device) & serdes2_prtcl_map;
 }
 
@@ -57,6 +65,9 @@ void fsl_serdes_init(void)
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
 
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
+
 	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
 		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
 		return;
@@ -66,4 +77,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
 		serdes2_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes2_prtcl_map |= (1 << NONE);
 }
diff --git a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
index cc0f8e9..93da038 100644
--- a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
+++ b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
@@ -38,11 +38,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
-	int ret = (1 << device) & serdes1_prtcl_map;
+	int ret;
+
+	if (!(serdes1_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
+	ret = (1 << device) & serdes1_prtcl_map;
 
 	if (ret)
 		return ret;
 
+	if (!(serdes2_prtcl_map & 1 << NONE))
+		fsl_serdes_init();
+
 	return (1 << device) & serdes2_prtcl_map;
 }
 
@@ -66,6 +74,9 @@ void fsl_serdes_init(void)
 		serdes1_prtcl_map |= (1 << lane_prtcl);
 	}
 
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes1_prtcl_map |= (1 << NONE);
+
 	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
 		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
 		return;
@@ -75,4 +86,7 @@ void fsl_serdes_init(void)
 		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
 		serdes2_prtcl_map |= (1 << lane_prtcl);
 	}
+
+	/* Set the first bit to indicate serdes has been initialized */
+	serdes2_prtcl_map |= (1 << NONE);
 }
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH 2/5] arm: fsl-layerscape: move forward the non-secure access permission setup

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Move forward the basic non-secure access enable operation, so the
subsequent individual device access permission can override it.
And collect the dispersed callers in board level, and then move
them to SoC level.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
Tested on LS1043ARDB, LS1021AQDS boards.

 arch/arm/cpu/armv7/ls102xa/soc.c          | 5 +++++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c   | 5 +++++
 arch/arm/cpu/armv8/fsl-layerscape/spl.c   | 4 ----
 board/freescale/ls1012afrdm/ls1012afrdm.c | 5 -----
 board/freescale/ls1012aqds/ls1012aqds.c   | 5 -----
 board/freescale/ls1012ardb/ls1012ardb.c   | 5 -----
 board/freescale/ls1021aqds/ls1021aqds.c   | 4 ----
 board/freescale/ls1021atwr/ls1021atwr.c   | 4 ----
 board/freescale/ls1043aqds/ls1043aqds.c   | 4 ----
 board/freescale/ls1043ardb/ls1043ardb.c   | 5 -----
 10 files changed, 10 insertions(+), 36 deletions(-)

diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index b1b0c71..4c93ab7 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -10,6 +10,7 @@
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/ls102xa_soc.h>
 #include <asm/arch/ls102xa_stream_id.h>
+#include <fsl_csu.h>
 
 struct liodn_id_table sec_liodn_tbl[] = {
 	SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10),
@@ -64,6 +65,10 @@ int arch_soc_init(void)
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
 	unsigned int major;
 
+#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
+	enable_layerscape_ns_access();
+#endif
+
 #ifdef CONFIG_FSL_QSPI
 	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index f62b78d..fac539d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -12,6 +12,7 @@
 #include <asm/io.h>
 #include <asm/global_data.h>
 #include <asm/arch-fsl-layerscape/config.h>
+#include <fsl_csu.h>
 #ifdef CONFIG_SYS_FSL_DDR
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr.h>
@@ -303,6 +304,10 @@ void fsl_lsch2_early_init_f(void)
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
 	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
 
+#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
+	enable_layerscape_ns_access();
+#endif
+
 #ifdef CONFIG_FSL_IFC
 	init_early_memctl_regs();	/* tighten IFC timing */
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 19e34fa..b75547d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -8,7 +8,6 @@
 #include <spl.h>
 #include <asm/io.h>
 #include <fsl_ifc.h>
-#include <fsl_csu.h>
 #include <i2c.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -66,9 +65,6 @@ void board_init_f(ulong dummy)
 	/* Clear the BSS */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
-	enable_layerscape_ns_access();
-#endif
 	board_init_r(NULL, 0);
 }
 #endif
diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c
index a94a458..5a2b1f4 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -11,7 +11,6 @@
 #include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
 #include <hwconfig.h>
-#include <fsl_csu.h>
 #include <environment.h>
 #include <fsl_mmdc.h>
 #include <netdev.h>
@@ -175,10 +174,6 @@ int board_init(void)
 	gd->env_addr = (ulong)&default_environment[0];
 #endif
 
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
-	enable_layerscape_ns_access();
-#endif
-
 	return 0;
 }
 
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 71eea82..852d683 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -17,7 +17,6 @@
 #include <mmc.h>
 #include <scsi.h>
 #include <fm_eth.h>
-#include <fsl_csu.h>
 #include <fsl_esdhc.h>
 #include <fsl_mmdc.h>
 #include <spl.h>
@@ -207,10 +206,6 @@ int board_init(void)
 	out_le32(&cci->ctrl_ord,
 		 CCI400_CTRLORD_EN_BARRIER);
 
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
-	enable_layerscape_ns_access();
-#endif
-
 #ifdef CONFIG_ENV_IS_NOWHERE
 	gd->env_addr = (ulong)&default_environment[0];
 #endif
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index f69768d..a3748de 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -14,7 +14,6 @@
 #include <ahci.h>
 #include <mmc.h>
 #include <scsi.h>
-#include <fsl_csu.h>
 #include <fsl_esdhc.h>
 #include <environment.h>
 #include <fsl_mmdc.h>
@@ -207,10 +206,6 @@ int board_init(void)
 	gd->env_addr = (ulong)&default_environment[0];
 #endif
 
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
-	enable_layerscape_ns_access();
-#endif
-
 	return 0;
 }
 
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index dbea0bf..291b0f4 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -446,10 +446,6 @@ int board_init(void)
 
 	ls102xa_smmu_stream_id_init();
 
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
-	enable_layerscape_ns_access();
-#endif
-
 #ifdef CONFIG_U_QE
 	u_qe_init();
 #endif
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index c69c9cb..47961f9 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -489,10 +489,6 @@ int board_init(void)
 
 	ls102xa_smmu_stream_id_init();
 
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
-	enable_layerscape_ns_access();
-#endif
-
 #ifdef CONFIG_U_QE
 	u_qe_init();
 #endif
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index b7e9c21..fa2c647 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -17,7 +17,6 @@
 #include <mmc.h>
 #include <scsi.h>
 #include <fm_eth.h>
-#include <fsl_csu.h>
 #include <fsl_esdhc.h>
 #include <fsl_ifc.h>
 #include <spl.h>
@@ -316,9 +315,6 @@ int board_init(void)
 	config_serdes_mux();
 #endif
 
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
-	enable_layerscape_ns_access();
-#endif
 	return 0;
 }
 
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 1436520..5242421 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -16,7 +16,6 @@
 #include <mmc.h>
 #include <scsi.h>
 #include <fm_eth.h>
-#include <fsl_csu.h>
 #include <fsl_esdhc.h>
 #include <fsl_ifc.h>
 #include <fsl_sec.h>
@@ -88,10 +87,6 @@ int board_init(void)
 	init_final_memctl_regs();
 #endif
 
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
-	enable_layerscape_ns_access();
-#endif
-
 #ifdef CONFIG_U_QE
 	u_qe_init();
 #endif
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH 3/5] fsl: csu: add an API to set individual device access permission

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Add this API to make the individual device is able to be set to
the specified permission.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 board/freescale/common/ns_access.c | 34 ++++++++++++++++++++--------------
 include/fsl_csu.h                  |  1 +
 2 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c
index d8d16c5..c3d7a5e 100644
--- a/board/freescale/common/ns_access.c
+++ b/board/freescale/common/ns_access.c
@@ -9,25 +9,31 @@
 #include <fsl_csu.h>
 #include <asm/arch/ns_access.h>
 
-static void enable_devices_ns_access(struct csu_ns_dev *ns_dev, uint32_t num)
+void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val)
 {
 	u32 *base = (u32 *)CONFIG_SYS_FSL_CSU_ADDR;
 	u32 *reg;
-	uint32_t val;
-	int i;
+	uint32_t tmp;
 
-	for (i = 0; i < num; i++) {
-		reg = base + ns_dev[i].ind / 2;
-		val = in_be32(reg);
-		if (ns_dev[i].ind % 2 == 0) {
-			val &= 0x0000ffff;
-			val |= ns_dev[i].val << 16;
-		} else {
-			val &= 0xffff0000;
-			val |= ns_dev[i].val;
-		}
-		out_be32(reg, val);
+	reg = base + ns_dev->ind / 2;
+	tmp = in_be32(reg);
+	if (ns_dev->ind % 2 == 0) {
+		tmp &= 0x0000ffff;
+		tmp |= val << 16;
+	} else {
+		tmp &= 0xffff0000;
+		tmp |= val;
 	}
+
+	out_be32(reg, tmp);
+}
+
+static void enable_devices_ns_access(struct csu_ns_dev *ns_dev, uint32_t num)
+{
+	int i;
+
+	for (i = 0; i < num; i++)
+		set_devices_ns_access(ns_dev + i, ns_dev[i].val);
 }
 
 void enable_layerscape_ns_access(void)
diff --git a/include/fsl_csu.h b/include/fsl_csu.h
index f4d97fb..57a9985 100644
--- a/include/fsl_csu.h
+++ b/include/fsl_csu.h
@@ -30,5 +30,6 @@ struct csu_ns_dev {
 };
 
 void enable_layerscape_ns_access(void);
+void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val);
 
 #endif
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH 4/5] fsl: csu: add an API to disable all R/W permission to PCIe

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 .../include/asm/arch-fsl-layerscape/ns_access.h    |  1 +
 board/freescale/common/ns_access.c                 | 28 ++++++++++++++++++++++
 include/fsl_csu.h                                  |  1 +
 3 files changed, 30 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index db76066..f46f1d8 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -6,6 +6,7 @@
 
 #ifndef __FSL_NS_ACCESS_H_
 #define __FSL_NS_ACCESS_H_
+#include <fsl_csu.h>
 
 enum csu_cslx_ind {
 	CSU_CSLX_PCIE2_IO = 0,
diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c
index c3d7a5e..80e4b61 100644
--- a/board/freescale/common/ns_access.c
+++ b/board/freescale/common/ns_access.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <fsl_csu.h>
 #include <asm/arch/ns_access.h>
+#include <asm/arch/fsl_serdes.h>
 
 void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val)
 {
@@ -40,3 +41,30 @@ void enable_layerscape_ns_access(void)
 {
 	enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev));
 }
+
+void disable_pcie_ns_access(int pcie)
+{
+	switch (pcie) {
+#ifdef CONFIG_PCIE1
+	case PCIE1:
+		set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1], 0);
+		set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1_IO], 0);
+		return;
+#endif
+#ifdef CONFIG_PCIE2
+	case PCIE2:
+		set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2], 0);
+		set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2_IO], 0);
+		return;
+#endif
+#ifdef CONFIG_PCIE3
+	case PCIE3:
+		set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3], 0);
+		set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3_IO], 0);
+		return;
+#endif
+	default:
+		debug("The PCIE%d doesn't exist!\n", pcie);
+		return;
+	}
+}
diff --git a/include/fsl_csu.h b/include/fsl_csu.h
index 57a9985..42ca433 100644
--- a/include/fsl_csu.h
+++ b/include/fsl_csu.h
@@ -31,5 +31,6 @@ struct csu_ns_dev {
 
 void enable_layerscape_ns_access(void);
 void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val);
+void disable_pcie_ns_access(int pcie);
 
 #endif
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH 5/5] fsl-layerscape: Add workaround for PCIe erratum A010315

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
Tested on LS1043ARDB, LS1021AQDS boards.

 arch/arm/cpu/armv7/ls102xa/soc.c                  | 14 ++++++++++++++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c           | 16 ++++++++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/config.h |  2 ++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h    |  4 ++++
 arch/arm/include/asm/arch-ls102xa/config.h        |  1 +
 arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h   |  4 ++++
 board/freescale/ls1012aqds/ls1012aqds.c           |  4 ++++
 board/freescale/ls1012ardb/ls1012ardb.c           |  4 ++++
 board/freescale/ls1021aqds/ls1021aqds.c           |  4 ++++
 board/freescale/ls1021atwr/ls1021atwr.c           |  4 ++++
 board/freescale/ls1043aqds/ls1043aqds.c           |  4 ++++
 board/freescale/ls1043ardb/ls1043ardb.c           |  4 ++++
 12 files changed, 65 insertions(+)

diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 4c93ab7..36de5ec 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>
+#include <asm/arch/fsl_serdes.h>
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/ls102xa_soc.h>
 #include <asm/arch/ls102xa_stream_id.h>
@@ -59,6 +60,19 @@ unsigned int get_soc_major_rev(void)
 	return major;
 }
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void)
+{
+	int i;
+
+	for (i = PCIE1; i <= PCIE2; i++)
+		if (!is_serdes_configured(i)) {
+			debug("PCIe%d: disabled all R/W permission!\n", i);
+			disable_pcie_ns_access(i);
+		}
+}
+#endif
+
 int arch_soc_init(void)
 {
 	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index fac539d..37a36f1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -8,11 +8,14 @@
 #include <fsl_ifc.h>
 #include <ahci.h>
 #include <scsi.h>
+#include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
 #include <asm/io.h>
 #include <asm/global_data.h>
 #include <asm/arch-fsl-layerscape/config.h>
+#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
 #include <fsl_csu.h>
+#endif
 #ifdef CONFIG_SYS_FSL_DDR
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr.h>
@@ -299,6 +302,19 @@ void erratum_a008850_post(void)
 #endif
 }
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void)
+{
+	int i;
+
+	for (i = PCIE1; i <= PCIE4; i++)
+		if (!is_serdes_configured(i)) {
+			debug("PCIe%d: disabled all R/W permission!\n", i);
+			disable_pcie_ns_access(i);
+		}
+}
+#endif
+
 void fsl_lsch2_early_init_f(void)
 {
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 44fe0c0..4557754 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -202,6 +202,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_A009929
 #define CONFIG_SYS_FSL_ERRATUM_A009942
 #define CONFIG_SYS_FSL_ERRATUM_A009660
+#define CONFIG_SYS_FSL_ERRATUM_A010315
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC		1
 #elif defined(CONFIG_LS1012A)
 #define CONFIG_MAX_CPUS                         1
@@ -229,6 +230,7 @@
 #define CONFIG_SYS_FSL_SRDS_1
 #define CONFIG_SYS_FSL_PCIE_COMPAT		"fsl,qoriq-pcie-v2.4"
 #define CONFIG_SYS_FSL_SEC_BE
+#define CONFIG_SYS_FSL_ERRATUM_A010315
 #else
 #error SoC not defined
 #endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 39e8c7a..40b15ba 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -98,6 +98,10 @@ void cpu_name(char *name);
 void erratum_a009635(void);
 #endif
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void);
+#endif
+
 bool soc_has_dp_ddr(void);
 bool soc_has_aiop(void);
 #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 04abec4..2f8cfd8 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -132,6 +132,7 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		1
 #define CONFIG_SYS_FSL_ERRATUM_A008378
 #define CONFIG_SYS_FSL_ERRATUM_A009663
+#define CONFIG_SYS_FSL_ERRATUM_A010315
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC		1
 #else
 #error SoC not defined
diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h b/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
index a354684..9c91354 100644
--- a/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
+++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
@@ -11,4 +11,8 @@ unsigned int get_soc_major_rev(void);
 int arch_soc_init(void);
 int ls102xa_smmu_stream_id_init(void);
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void);
+#endif
+
 #endif /* __FSL_LS102XA_SOC_H */
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 852d683..874c122 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -206,6 +206,10 @@ int board_init(void)
 	out_le32(&cci->ctrl_ord,
 		 CCI400_CTRLORD_EN_BARRIER);
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+	erratum_a010315();
+#endif
+
 #ifdef CONFIG_ENV_IS_NOWHERE
 	gd->env_addr = (ulong)&default_environment[0];
 #endif
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index a3748de..6598ab3 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -202,6 +202,10 @@ int board_init(void)
 	 */
 	out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+	erratum_a010315();
+#endif
+
 #ifdef CONFIG_ENV_IS_NOWHERE
 	gd->env_addr = (ulong)&default_environment[0];
 #endif
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 291b0f4..4eb38a7 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -430,6 +430,10 @@ int board_init(void)
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
 	unsigned int major;
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+	erratum_a010315();
+#endif
+
 	major = get_soc_major_rev();
 	if (major == SOC_MAJOR_VER_1_0) {
 		/* Set CCI-400 control override register to
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 47961f9..bc1e717 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -480,6 +480,10 @@ void ls1twr_program_regulator(void)
 
 int board_init(void)
 {
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+	erratum_a010315();
+#endif
+
 #ifndef CONFIG_SYS_FSL_NO_SERDES
 	fsl_serdes_init();
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index fa2c647..fdae626 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -308,6 +308,10 @@ int misc_init_r(void)
 
 int board_init(void)
 {
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+	erratum_a010315();
+#endif
+
 	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
 	board_retimer_init();
 
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 5242421..98a911c 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -83,6 +83,10 @@ int board_init(void)
 {
 	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+	erratum_a010315();
+#endif
+
 #ifdef CONFIG_FSL_IFC
 	init_final_memctl_regs();
 #endif
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes protocol

[Zhiqiang Hou]

Hi All,

Any comments?

> -----Original Message-----
> From: Zhiqiang Hou [mailto:Zhiqiang.Hou at nxp.com]
> Sent: 2016?7?4? 14:28
> To: u-boot at lists.denx.de; albert.u.boot at aribaud.net; york sun
> <york.sun@nxp.com>; wd at denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
> Mingkai.Hu at freescale.com
> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>; Zhiqiang Hou
> <zhiqiang.hou@nxp.com>
> Subject: [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes
> protocol
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Up to now, the function is_serdes_configed() doesn't check if the map of serdes
> protocol is initialized before accessing it. The function
> is_serdes_configed() will get wrong result when it was called before the serdes
> protocol maps initialized. As the first eliment of the map isn't used for any device,
> so use it as the flag to indicate if the map has been initialized.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> Tested on LS1043ARDB, LS1021AQDS and T4240QDS boards.
> 
>  arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c          |  9 +++++++++
>  arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c |  6 ++++++
> arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c |  9 +++++++++
>  arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c            |  6 ++++++
>  arch/powerpc/cpu/mpc85xx/c29x_serdes.c               |  6 ++++++
>  arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c       | 15 +++++++++++++++
>  arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c        |  6 ++++++
>  arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c            | 16 +++++++++++++++-
>  arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c            | 16 +++++++++++++++-
>  arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c            |  6 ++++++
>  arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c            |  6 ++++++
>  arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c            |  6 ++++++
>  arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c            |  6 ++++++
>  arch/powerpc/cpu/mpc85xx/p1010_serdes.c              | 16 +++++++++++++++-
>  arch/powerpc/cpu/mpc85xx/p1021_serdes.c              |  6 ++++++
>  arch/powerpc/cpu/mpc85xx/p1022_serdes.c              | 16 +++++++++++++++-
>  arch/powerpc/cpu/mpc85xx/p1023_serdes.c              |  9 ++++++++-
>  arch/powerpc/cpu/mpc85xx/p2020_serdes.c              |  6 ++++++
>  arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c            | 16 +++++++++++++++-
>  arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c            | 16 +++++++++++++++-
>  20 files changed, 191 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
> b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
> index 9b78acb..ffb05cb 100644
> --- a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
> +++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
> @@ -23,9 +23,15 @@ int is_serdes_configured(enum srds_prtcl device)
>  	u64 ret = 0;
> 
>  #ifdef CONFIG_SYS_FSL_SRDS_1
> +	if (!(serdes1_prtcl_map & 1ULL << NONE))
> +		fsl_serdes_init();
> +
>  	ret |= (1ULL << device) & serdes1_prtcl_map;  #endif  #ifdef
> CONFIG_SYS_FSL_SRDS_2
> +	if (!(serdes2_prtcl_map & 1ULL << NONE))
> +		fsl_serdes_init();
> +
>  	ret |= (1ULL << device) & serdes2_prtcl_map;  #endif
> 
> @@ -87,6 +93,9 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32
> sd_prctl_shift)
>  		serdes_prtcl_map |= (1ULL << lane_prtcl);
>  	}
> 
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes_prtcl_map |= (1ULL << NONE);
> +
>  	return serdes_prtcl_map;
>  }
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> index fe3444a..fff80ef 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> @@ -19,6 +19,9 @@ int is_serdes_configured(enum srds_prtcl device)
>  	int ret = 0;
> 
>  #ifdef CONFIG_SYS_FSL_SRDS_1
> +	if (!serdes1_prtcl_map[NONE])
> +		fsl_serdes_init();
> +
>  	ret |= serdes1_prtcl_map[device];
>  #endif
> 
> @@ -103,6 +106,9 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask,
> u32 sd_prctl_shift,
>  		else
>  			serdes_prtcl_map[lane_prtcl] = 1;
>  	}
> +
> +	/* Set the first eliment to indicate serdes has been initialized */
> +	serdes_prtcl_map[NONE] = 1;
>  }
> 
>  void fsl_serdes_init(void)
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
> b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
> index be6acc6..d83a073 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
> @@ -28,9 +28,15 @@ int is_serdes_configured(enum srds_prtcl device)
>  	int ret = 0;
> 
>  #ifdef CONFIG_SYS_FSL_SRDS_1
> +	if (!serdes1_prtcl_map[NONE])
> +		fsl_serdes_init();
> +
>  	ret |= serdes1_prtcl_map[device];
>  #endif
>  #ifdef CONFIG_SYS_FSL_SRDS_2
> +	if (!serdes2_prtcl_map[NONE])
> +		fsl_serdes_init();
> +
>  	ret |= serdes2_prtcl_map[device];
>  #endif
> 
> @@ -136,6 +142,9 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask,
> u32 sd_prctl_shift,  #endif
>  		}
>  	}
> +
> +	/* Set the first eliment to indicate serdes has been initialized */
> +	serdes_prtcl_map[NONE] = 1;
>  }
> 
>  void fsl_serdes_init(void)
> diff --git a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
> b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
> index 399b208..414e1ea 100644
> --- a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
> @@ -68,6 +68,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl prtcl)  {
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << prtcl) & serdes1_prtcl_map;  }
> 
> @@ -90,4 +93,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
> b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
> index 51972cb..469ef45 100644
> --- a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
> @@ -32,6 +32,9 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
> 
>  int is_serdes_configured(enum srds_prtcl device)  {
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << device) & serdes1_prtcl_map;  }
> 
> @@ -59,4 +62,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = ptr->lanes[lane];
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
> b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
> index 9920839..93b0aa8 100644
> --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
> @@ -92,15 +92,27 @@ int is_serdes_configured(enum srds_prtcl device)
>  	int ret = 0;
> 
>  #ifdef CONFIG_SYS_FSL_SRDS_1
> +	if (!serdes1_prtcl_map[NONE])
> +		fsl_serdes_init();
> +
>  	ret |= serdes1_prtcl_map[device];
>  #endif
>  #ifdef CONFIG_SYS_FSL_SRDS_2
> +	if (!serdes2_prtcl_map[NONE])
> +		fsl_serdes_init();
> +
>  	ret |= serdes2_prtcl_map[device];
>  #endif
>  #ifdef CONFIG_SYS_FSL_SRDS_3
> +	if (!serdes3_prtcl_map[NONE])
> +		fsl_serdes_init();
> +
>  	ret |= serdes3_prtcl_map[device];
>  #endif
>  #ifdef CONFIG_SYS_FSL_SRDS_4
> +	if (!serdes4_prtcl_map[NONE])
> +		fsl_serdes_init();
> +
>  	ret |= serdes4_prtcl_map[device];
>  #endif
> 
> @@ -325,6 +337,9 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask,
> u32 sd_prctl_shift,
>  		else
>  			serdes_prtcl_map[lane_prtcl] = 1;
>  	}
> +
> +	/* Set the first eliment to indicate serdes has been initialized */
> +	serdes_prtcl_map[NONE] = 1;
>  }
> 
>  void fsl_serdes_init(void)
> diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
> b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
> index ba22f90..45b43a4 100644
> --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
> @@ -136,6 +136,9 @@ int is_serdes_configured(enum srds_prtcl device)
>  	if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN))
>  		return 0;
> 
> +	if (!(serdes_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << device) & serdes_prtcl_map;  }
> 
> @@ -857,6 +860,9 @@ void fsl_serdes_init(void)
>  			     SRDS_RSTCTL_SDPD);
>  	}
>  #endif
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes_prtcl_map |= (1 << NONE);
>  }
> 
>  const char *serdes_clock_to_string(u32 clock) diff --git
> a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
> b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
> index baf52d5..921ea7a 100644
> --- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
> @@ -71,11 +71,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl device)  {
> -	int ret = (1 << device) & serdes1_prtcl_map;
> +	int ret;
> +
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
> +	ret = (1 << device) & serdes1_prtcl_map;
> 
>  	if (ret)
>  		return ret;
> 
> +	if (!(serdes2_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << device) & serdes2_prtcl_map;  }
> 
> @@ -221,6 +229,9 @@ void fsl_serdes_init(void)
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> 
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
> +
>  	if (srds2_io_sel >= ARRAY_SIZE(serdes2_cfg_tbl)) {
>  		printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_io_sel);
>  		return;
> @@ -230,4 +241,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds2_io_sel][lane];
>  		serdes2_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes2_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
> b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
> index ed78a66..c697dff 100644
> --- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
> @@ -34,11 +34,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl device)  {
> -	int ret = (1 << device) & serdes1_prtcl_map;
> +	int ret;
> +
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
> +	ret = (1 << device) & serdes1_prtcl_map;
> 
>  	if (ret)
>  		return ret;
> 
> +	if (!(serdes2_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << device) & serdes2_prtcl_map;  }
> 
> @@ -61,6 +69,9 @@ void fsl_serdes_init(void)
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> 
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
> +
>  	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
>  		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
>  		return;
> @@ -76,4 +87,7 @@ void fsl_serdes_init(void)
> 
>  	if (pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)
>  		serdes2_prtcl_map &= ~(1 << SGMII_TSEC3);
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes2_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
> b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
> index d146955..58dfee0 100644
> --- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
> @@ -24,6 +24,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl prtcl)  {
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << prtcl) & serdes1_prtcl_map;  }
> 
> @@ -46,4 +49,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_cfg][lane];
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
> b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
> index 9199f01..cf35fd2 100644
> --- a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
> @@ -24,6 +24,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl prtcl)  {
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << prtcl) & serdes1_prtcl_map;  }
> 
> @@ -46,4 +49,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
> b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
> index 6c80b5e..941f6f0 100644
> --- a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
> @@ -33,6 +33,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl prtcl)  {
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << prtcl) & serdes1_prtcl_map;  }
> 
> @@ -55,4 +58,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
> b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
> index 3632eb5..455d3a3 100644
> --- a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
> @@ -28,6 +28,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl prtcl)  {
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << prtcl) & serdes1_prtcl_map;  }
> 
> @@ -62,4 +65,7 @@ void fsl_serdes_init(void)
> 
>  	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
>  		serdes1_prtcl_map |= (1 << SGMII_TSEC4);
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
> b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
> index 4b965f7..3f2bd25 100644
> --- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
> @@ -33,11 +33,19 @@ static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl device)  {
> -	int ret = (1 << device) & serdes1_prtcl_map;
> +	int ret;
> +
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
> +	ret = (1 << device) & serdes1_prtcl_map;
> 
>  	if (ret)
>  		return ret;
> 
> +	if (!(serdes2_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << device) & serdes2_prtcl_map;  }
> 
> @@ -60,6 +68,9 @@ void fsl_serdes_init(void)
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> 
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
> +
>  	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
>  		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
>  		return;
> @@ -69,4 +80,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
>  		serdes2_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes2_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
> b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
> index 99a77bd..e8eb9e7 100644
> --- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
> @@ -41,6 +41,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl prtcl)  {
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << prtcl) & serdes1_prtcl_map;  }
> 
> @@ -67,6 +70,9 @@ void fsl_serdes_init(void)
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> 
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
> +
>  	/* Init SERDES Receiver electrical idle detection control for PCIe */
> 
>  	/* Lane 0 is always PCIe 1 */
> diff --git a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
> b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
> index 14d17eb..942df29 100644
> --- a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
> @@ -72,11 +72,19 @@ static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl device)  {
> -	int ret = (1 << device) & serdes1_prtcl_map;
> +	int ret;
> +
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
> +	ret = (1 << device) & serdes1_prtcl_map;
> 
>  	if (ret)
>  		return ret;
> 
> +	if (!(serdes2_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << device) & serdes2_prtcl_map;  }
> 
> @@ -99,6 +107,9 @@ void fsl_serdes_init(void)
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> 
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
> +
>  	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
>  		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
>  		return;
> @@ -108,4 +119,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
>  		serdes2_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes2_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
> b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
> index e83b0a3..21cb91d 100644
> --- a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
> @@ -24,7 +24,12 @@ static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl device)  {
> -	int ret = (1 << device) & serdes1_prtcl_map;
> +	int ret;
> +
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
> +	ret = (1 << device) & serdes1_prtcl_map;
>  	return ret;
>  }
> 
> @@ -47,4 +52,6 @@ void fsl_serdes_init(void)
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> 
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
> b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
> index 59d402c..91a62fb 100644
> --- a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
> @@ -32,6 +32,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl prtcl)  {
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << prtcl) & serdes1_prtcl_map;  }
> 
> @@ -54,4 +57,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
> b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
> index 2a7e3bf..3dde1ce 100644
> --- a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
> +++ b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
> @@ -29,11 +29,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl device)  {
> -	int ret = (1 << device) & serdes1_prtcl_map;
> +	int ret;
> +
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
> +	ret = (1 << device) & serdes1_prtcl_map;
> 
>  	if (ret)
>  		return ret;
> 
> +	if (!(serdes2_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << device) & serdes2_prtcl_map;  }
> 
> @@ -57,6 +65,9 @@ void fsl_serdes_init(void)
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> 
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
> +
>  	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
>  		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
>  		return;
> @@ -66,4 +77,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
>  		serdes2_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes2_prtcl_map |= (1 << NONE);
>  }
> diff --git a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
> b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
> index cc0f8e9..93da038 100644
> --- a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
> +++ b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
> @@ -38,11 +38,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
> 
>  int is_serdes_configured(enum srds_prtcl device)  {
> -	int ret = (1 << device) & serdes1_prtcl_map;
> +	int ret;
> +
> +	if (!(serdes1_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
> +	ret = (1 << device) & serdes1_prtcl_map;
> 
>  	if (ret)
>  		return ret;
> 
> +	if (!(serdes2_prtcl_map & 1 << NONE))
> +		fsl_serdes_init();
> +
>  	return (1 << device) & serdes2_prtcl_map;  }
> 
> @@ -66,6 +74,9 @@ void fsl_serdes_init(void)
>  		serdes1_prtcl_map |= (1 << lane_prtcl);
>  	}
> 
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes1_prtcl_map |= (1 << NONE);
> +
>  	if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
>  		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
>  		return;
> @@ -75,4 +86,7 @@ void fsl_serdes_init(void)
>  		enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
>  		serdes2_prtcl_map |= (1 << lane_prtcl);
>  	}
> +
> +	/* Set the first bit to indicate serdes has been initialized */
> +	serdes2_prtcl_map |= (1 << NONE);
>  }
> --
> 2.1.0.27.g96db324

Thanks,
Zhiqiang

[U-Boot] [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes protocol

[york sun]

On 07/03/2016 11:39 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Up to now, the function is_serdes_configed() doesn't check if the map
> of serdes protocol is initialized before accessing it. The function
> is_serdes_configed() will get wrong result when it was called before
> the serdes protocol maps initialized. As the first eliment of the map

s/eliment/element

> isn't used for any device, so use it as the flag to indicate if the
> map has been initialized.

I am not sure it is safe to presume the first element is always not 
used. Take LS2080A as an example, the serdes map array is initialized by 
serdes_init(), which calls serdes_get_prtcl() to get the index of the 
array. With normal condition, the index shouldn't be zero. Zero is used 
as an error but it is not checked before setting

serdes_prtcl_map[lane_prtcl] = 1;

If you presumption is correct, and you want to use the first one as a 
flag, you probably need to check all of them to make sure errors are 
handled correctly, instead of setting the flag unexpected. Also it is 
important to document this idea so future platform code follows the same.

York

[U-Boot] [PATCH 5/5] fsl-layerscape: Add workaround for PCIe erratum A010315

[york sun]

On 07/03/2016 11:39 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> As the access to serders protocol unselected PCIe controller will
> hang. So disable the R/W permission to unselected PCIe controller
> including its CCSR, IO space and memory space according to the
> serders protocol field of RCW.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> Tested on LS1043ARDB, LS1021AQDS boards.
>
>  arch/arm/cpu/armv7/ls102xa/soc.c                  | 14 ++++++++++++++
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c           | 16 ++++++++++++++++
>  arch/arm/include/asm/arch-fsl-layerscape/config.h |  2 ++
>  arch/arm/include/asm/arch-fsl-layerscape/soc.h    |  4 ++++
>  arch/arm/include/asm/arch-ls102xa/config.h        |  1 +
>  arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h   |  4 ++++
>  board/freescale/ls1012aqds/ls1012aqds.c           |  4 ++++
>  board/freescale/ls1012ardb/ls1012ardb.c           |  4 ++++
>  board/freescale/ls1021aqds/ls1021aqds.c           |  4 ++++
>  board/freescale/ls1021atwr/ls1021atwr.c           |  4 ++++
>  board/freescale/ls1043aqds/ls1043aqds.c           |  4 ++++
>  board/freescale/ls1043ardb/ls1043ardb.c           |  4 ++++
>  12 files changed, 65 insertions(+)
>

Can you put the call of erratum_a010315() in an SoC file, instead of 
individual board file?

York

[U-Boot] [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes protocol

[Zhiqiang Hou]

Hi York,

Thanks for your comments!

> -----Original Message-----
> From: york sun
> Sent: 2016?7?19? 23:46
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; wd at denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
> Mingkai.Hu at freescale.com
> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>
> Subject: Re: [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes
> protocol
> 
> On 07/03/2016 11:39 PM, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Up to now, the function is_serdes_configed() doesn't check if the map
> > of serdes protocol is initialized before accessing it. The function
> > is_serdes_configed() will get wrong result when it was called before
> > the serdes protocol maps initialized. As the first eliment of the map
> 
> s/eliment/element
 
Will fix my spelling mistakes next version, thanks a lot!

> > isn't used for any device, so use it as the flag to indicate if the
> > map has been initialized.
> 
> I am not sure it is safe to presume the first element is always not used. Take
> LS2080A as an example, the serdes map array is initialized by serdes_init(), which
> calls serdes_get_prtcl() to get the index of the array. With normal condition, the
> index shouldn't be zero. Zero is used as an error but it is not checked before setting
> 
> serdes_prtcl_map[lane_prtcl] = 1;
> 

The first element of enum srds_prtcl 'NONE' is aim to describe a lane isn't assigned to
any device, and the array serdesn_prtcl_map is used to check if the specified device
selected by the current serdes protocol, right? Nobody will check if the device 'NONE'
has been configured, right? So it can be used to indicate if the serdes_prtcl_map has
been initialized.
Don't care whether the function serdes_get_prtcl() will return zero, just focus if the
serdes protocol map has been filled. For example, if the serdes protocol value read from
RCW doesn't match with any entry of the serdes_cfg_tbl, then all lane will be assigned to
'NONE'. It still means the serdes protocol map has been filled, even if there is only the
serdesn_prtcl_map[NONE] was set to 1.

> If you presumption is correct, and you want to use the first one as a flag, you
> probably need to check all of them to make sure errors are handled correctly,
> instead of setting the flag unexpected. Also it is important to document this idea
> so future platform code follows the same.
> 

Is it necessary to add it to a document, if add a comment to the serdesn_prtcl_map make it?

Thanks,
Zhiqiang

[U-Boot] [PATCH 5/5] fsl-layerscape: Add workaround for PCIe erratum A010315

[Zhiqiang Hou]

Hi York,

Thanks a lot for your comments!

> -----Original Message-----
> From: york sun
> Sent: 2016?7?20? 0:02
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; wd at denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
> Mingkai.Hu at freescale.com
> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>
> Subject: Re: [PATCH 5/5] fsl-layerscape: Add workaround for PCIe erratum
> A010315
> 
> On 07/03/2016 11:39 PM, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > As the access to serders protocol unselected PCIe controller will
> > hang. So disable the R/W permission to unselected PCIe controller
> > including its CCSR, IO space and memory space according to the serders
> > protocol field of RCW.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > Tested on LS1043ARDB, LS1021AQDS boards.
> >
> >  arch/arm/cpu/armv7/ls102xa/soc.c                  | 14 ++++++++++++++
> >  arch/arm/cpu/armv8/fsl-layerscape/soc.c           | 16 ++++++++++++++++
> >  arch/arm/include/asm/arch-fsl-layerscape/config.h |  2 ++
> >  arch/arm/include/asm/arch-fsl-layerscape/soc.h    |  4 ++++
> >  arch/arm/include/asm/arch-ls102xa/config.h        |  1 +
> >  arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h   |  4 ++++
> >  board/freescale/ls1012aqds/ls1012aqds.c           |  4 ++++
> >  board/freescale/ls1012ardb/ls1012ardb.c           |  4 ++++
> >  board/freescale/ls1021aqds/ls1021aqds.c           |  4 ++++
> >  board/freescale/ls1021atwr/ls1021atwr.c           |  4 ++++
> >  board/freescale/ls1043aqds/ls1043aqds.c           |  4 ++++
> >  board/freescale/ls1043ardb/ls1043ardb.c           |  4 ++++
> >  12 files changed, 65 insertions(+)
> >
> 
> Can you put the call of erratum_a010315() in an SoC file, instead of individual
> board file?
> 
The erratum_a010315() involved global variable, so it must be called after the relocation,
and because it modified the CSU, it must be called at EL3. You know the PPA will be called at the
end of the board_init(),  so the erratum_a010315() can only be called in board_init(), and can't
call it in SoC file.

Thanks,
Zhiqiang

[U-Boot] [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes protocol

[york sun]

On 07/20/2016 02:38 AM, Zhiqiang Hou wrote:
> Hi York,
>
> Thanks for your comments!
>
>> -----Original Message-----
>> From: york sun
>> Sent: 2016?7?19? 23:46
>> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
>> albert.u.boot at aribaud.net; wd at denx.de; Prabhakar Kushwaha
>> <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
>> Mingkai.Hu at freescale.com
>> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
>> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>
>> Subject: Re: [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes
>> protocol
>>
>> On 07/03/2016 11:39 PM, Zhiqiang Hou wrote:
>>> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>>>
>>> Up to now, the function is_serdes_configed() doesn't check if the map
>>> of serdes protocol is initialized before accessing it. The function
>>> is_serdes_configed() will get wrong result when it was called before
>>> the serdes protocol maps initialized. As the first eliment of the map
>>
>> s/eliment/element
>
> Will fix my spelling mistakes next version, thanks a lot!
>
>>> isn't used for any device, so use it as the flag to indicate if the
>>> map has been initialized.
>>
>> I am not sure it is safe to presume the first element is always not used. Take
>> LS2080A as an example, the serdes map array is initialized by serdes_init(), which
>> calls serdes_get_prtcl() to get the index of the array. With normal condition, the
>> index shouldn't be zero. Zero is used as an error but it is not checked before setting
>>
>> serdes_prtcl_map[lane_prtcl] = 1;
>>
>
> The first element of enum srds_prtcl 'NONE' is aim to describe a lane isn't assigned to
> any device, and the array serdesn_prtcl_map is used to check if the specified device
> selected by the current serdes protocol, right? Nobody will check if the device 'NONE'
> has been configured, right? So it can be used to indicate if the serdes_prtcl_map has
> been initialized.
> Don't care whether the function serdes_get_prtcl() will return zero, just focus if the
> serdes protocol map has been filled. For example, if the serdes protocol value read from
> RCW doesn't match with any entry of the serdes_cfg_tbl, then all lane will be assigned to
> 'NONE'. It still means the serdes protocol map has been filled, even if there is only the
> serdesn_prtcl_map[NONE] was set to 1.
>
>> If you presumption is correct, and you want to use the first one as a flag, you
>> probably need to check all of them to make sure errors are handled correctly,
>> instead of setting the flag unexpected. Also it is important to document this idea
>> so future platform code follows the same.
>>
>
> Is it necessary to add it to a document, if add a comment to the serdesn_prtcl_map make it?
>

If you don't want to add a document, please at least put some comments, 
in case we need to change some code in the future.

York

[U-Boot] [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes protocol

[Zhiqiang Hou]

Hi York,

Thanks for your comments!

> -----Original Message-----
> From: york sun
> Sent: 2016?7?21? 5:15
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; wd at denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
> Mingkai.Hu at freescale.com
> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>
> Subject: Re: [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes
> protocol
> 
> On 07/20/2016 02:38 AM, Zhiqiang Hou wrote:
> > Hi York,
> >
> > Thanks for your comments!
> >
> >> -----Original Message-----
> >> From: york sun
> >> Sent: 2016?7?19? 23:46
> >> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> >> albert.u.boot at aribaud.net; wd at denx.de; Prabhakar Kushwaha
> >> <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
> >> Mingkai.Hu at freescale.com
> >> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> >> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>
> >> Subject: Re: [PATCH 1/5] fsl: serdes: ensure accessing the
> >> initialized maps of serdes protocol
> >>
> >> On 07/03/2016 11:39 PM, Zhiqiang Hou wrote:
> >>> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >>>
> >>> Up to now, the function is_serdes_configed() doesn't check if the
> >>> map of serdes protocol is initialized before accessing it. The
> >>> function
> >>> is_serdes_configed() will get wrong result when it was called before
> >>> the serdes protocol maps initialized. As the first eliment of the
> >>> map
> >>
> >> s/eliment/element
> >
> > Will fix my spelling mistakes next version, thanks a lot!
> >
> >>> isn't used for any device, so use it as the flag to indicate if the
> >>> map has been initialized.
> >>
> >> I am not sure it is safe to presume the first element is always not
> >> used. Take LS2080A as an example, the serdes map array is initialized
> >> by serdes_init(), which calls serdes_get_prtcl() to get the index of
> >> the array. With normal condition, the index shouldn't be zero. Zero
> >> is used as an error but it is not checked before setting
> >>
> >> serdes_prtcl_map[lane_prtcl] = 1;
> >>
> >
> > The first element of enum srds_prtcl 'NONE' is aim to describe a lane
> > isn't assigned to any device, and the array serdesn_prtcl_map is used
> > to check if the specified device selected by the current serdes protocol, right?
> Nobody will check if the device 'NONE'
> > has been configured, right? So it can be used to indicate if the
> > serdes_prtcl_map has been initialized.
> > Don't care whether the function serdes_get_prtcl() will return zero,
> > just focus if the serdes protocol map has been filled. For example, if
> > the serdes protocol value read from RCW doesn't match with any entry
> > of the serdes_cfg_tbl, then all lane will be assigned to 'NONE'. It
> > still means the serdes protocol map has been filled, even if there is only the
> serdesn_prtcl_map[NONE] was set to 1.
> >
> >> If you presumption is correct, and you want to use the first one as a
> >> flag, you probably need to check all of them to make sure errors are
> >> handled correctly, instead of setting the flag unexpected. Also it is
> >> important to document this idea so future platform code follows the same.
> >>
> >
> > Is it necessary to add it to a document, if add a comment to the
> serdesn_prtcl_map make it?
> >
> 
> If you don't want to add a document, please at least put some comments, in case
> we need to change some code in the future.
> 

Will add comments to describe it.

Thanks,
Zhiqiang

[U-Boot] [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes protocol

[Prabhakar Kushwaha]

Hi Zhiqiang,

Sorry for late queries. 

As per description of patch " Up to now, the function is_serdes_configed() doesn't check if the map
of serdes protocol is initialized before accessing it. The function is_serdes_configed() will get wrong result when it was called before
the serdes protocol maps initialized. As the first eliment of the map isn't used for any device, so use it as the flag to indicate if the
map has been initialized."

I am just wondering the use-case/situation where this can happen.
Can you please help me with understanding. 

fsl_serdes_init is called from arch_early_init_r in board_r.c.  
As per my understanding all the driver calling is_serdes_configed (SATA, PCIe, SGMII) etc requires DDR.  
So are we talking about moving any driver in board_f.c. 

Regards,
Prabhakar

> -----Original Message-----
> From: york sun
> Sent: Thursday, July 21, 2016 2:45 AM
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; wd at denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
> Mingkai.Hu at freescale.com
> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>
> Subject: Re: [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of
> serdes protocol
> 
> On 07/20/2016 02:38 AM, Zhiqiang Hou wrote:
> > Hi York,
> >
> > Thanks for your comments!
> >
> >> -----Original Message-----
> >> From: york sun
> >> Sent: 2016?7?19? 23:46
> >> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> >> albert.u.boot at aribaud.net; wd at denx.de; Prabhakar Kushwaha
> >> <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
> >> Mingkai.Hu at freescale.com
> >> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> >> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>
> >> Subject: Re: [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of
> serdes
> >> protocol
> >>
> >> On 07/03/2016 11:39 PM, Zhiqiang Hou wrote:
> >>> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >>>
> >>> Up to now, the function is_serdes_configed() doesn't check if the map
> >>> of serdes protocol is initialized before accessing it. The function
> >>> is_serdes_configed() will get wrong result when it was called before
> >>> the serdes protocol maps initialized. As the first eliment of the map
> >>
> >> s/eliment/element
> >
> > Will fix my spelling mistakes next version, thanks a lot!
> >
> >>> isn't used for any device, so use it as the flag to indicate if the
> >>> map has been initialized.
> >>
> >> I am not sure it is safe to presume the first element is always not used. Take
> >> LS2080A as an example, the serdes map array is initialized by serdes_init(),
> which
> >> calls serdes_get_prtcl() to get the index of the array. With normal condition,
> the
> >> index shouldn't be zero. Zero is used as an error but it is not checked before
> setting
> >>
> >> serdes_prtcl_map[lane_prtcl] = 1;
> >>
> >
> > The first element of enum srds_prtcl 'NONE' is aim to describe a lane isn't
> assigned to
> > any device, and the array serdesn_prtcl_map is used to check if the specified
> device
> > selected by the current serdes protocol, right? Nobody will check if the device
> 'NONE'
> > has been configured, right? So it can be used to indicate if the
> serdes_prtcl_map has
> > been initialized.
> > Don't care whether the function serdes_get_prtcl() will return zero, just focus
> if the
> > serdes protocol map has been filled. For example, if the serdes protocol value
> read from
> > RCW doesn't match with any entry of the serdes_cfg_tbl, then all lane will be
> assigned to
> > 'NONE'. It still means the serdes protocol map has been filled, even if there is
> only the
> > serdesn_prtcl_map[NONE] was set to 1.
> >
> >> If you presumption is correct, and you want to use the first one as a flag, you
> >> probably need to check all of them to make sure errors are handled correctly,
> >> instead of setting the flag unexpected. Also it is important to document this
> idea
> >> so future platform code follows the same.
> >>
> >
> > Is it necessary to add it to a document, if add a comment to the
> serdesn_prtcl_map make it?
> >
> 
> If you don't want to add a document, please at least put some comments,
> in case we need to change some code in the future.
> 
> York

[U-Boot] [PATCH 3/5] fsl: csu: add an API to set individual device access permission

[Prabhakar Kushwaha]

> -----Original Message-----
> From: Zhiqiang Hou [mailto:Zhiqiang.Hou at nxp.com]
> Sent: Monday, July 04, 2016 11:58 AM
> To: u-boot at lists.denx.de; albert.u.boot at aribaud.net; york sun
> <york.sun@nxp.com>; wd at denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
> Mingkai.Hu at freescale.com
> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>; Zhiqiang Hou
> <zhiqiang.hou@nxp.com>
> Subject: [PATCH 3/5] fsl: csu: add an API to set individual device access
> permission
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Add this API to make the individual device is able to be set to
> the specified permission.
> 

I am curious about requirement of devices to configure CSU in their driver. 
Why cannot it be done during early boot sequence as part of normal boot-flow for all devices

--prabhakar 

[U-Boot] [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes protocol

[Zhiqiang Hou]

Hi Prabhakar,

Thanks for your comments!

> -----Original Message-----
> From: Prabhakar Kushwaha
> Sent: 2016?7?21? 12:28
> To: york sun <york.sun@nxp.com>; Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-
> boot at lists.denx.de; albert.u.boot at aribaud.net; wd at denx.de;
> alison.wang at freescale.com; Mingkai.Hu at freescale.com
> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>
> Subject: RE: [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of serdes
> protocol
> 
> Hi Zhiqiang,
> 
> Sorry for late queries.
> 
> As per description of patch " Up to now, the function is_serdes_configed() doesn't
> check if the map of serdes protocol is initialized before accessing it. The function
> is_serdes_configed() will get wrong result when it was called before the serdes
> protocol maps initialized. As the first eliment of the map isn't used for any device,
> so use it as the flag to indicate if the map has been initialized."
> 
> I am just wondering the use-case/situation where this can happen.
> Can you please help me with understanding.
> 
> fsl_serdes_init is called from arch_early_init_r in board_r.c.
> As per my understanding all the driver calling is_serdes_configed (SATA, PCIe,
> SGMII) etc requires DDR.
> So are we talking about moving any driver in board_f.c.
> 

No, there isn't any driver will be moved to board_f.c. There is a pcie errata that need
modify the PCIE's field of CSU according to the current serdes protocol, I just want to
reuse the existed serdes protocol parse code, but the workaround function must be
called before the arch_early_init_r.

Thanks,
Zhiqiang

[U-Boot] [PATCH 3/5] fsl: csu: add an API to set individual device access permission

[Zhiqiang Hou]

Hi Prabhakar,

Thanks for your comments!

> -----Original Message-----
> From: Prabhakar Kushwaha
> Sent: 2016?7?21? 12:39
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; york sun <york.sun@nxp.com>; wd at denx.de;
> alison.wang at freescale.com; Mingkai.Hu at freescale.com
> Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>; Zhiqiang Hou
> <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCH 3/5] fsl: csu: add an API to set individual device access
> permission
> 
> 
> > -----Original Message-----
> > From: Zhiqiang Hou [mailto:Zhiqiang.Hou at nxp.com]
> > Sent: Monday, July 04, 2016 11:58 AM
> > To: u-boot at lists.denx.de; albert.u.boot at aribaud.net; york sun
> > <york.sun@nxp.com>; wd at denx.de; Prabhakar Kushwaha
> > <prabhakar.kushwaha@nxp.com>; alison.wang at freescale.com;
> > Mingkai.Hu at freescale.com
> > Cc: yao.yuan at freescale.com; Qianyu.Gong at freescale.com;
> > bmeng.cn at gmail.com; Shengzhou Liu <shengzhou.liu@nxp.com>; Zhiqiang
> > Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCH 3/5] fsl: csu: add an API to set individual device
> > access permission
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Add this API to make the individual device is able to be set to the
> > specified permission.
> >
> 
> I am curious about requirement of devices to configure CSU in their driver.
> Why cannot it be done during early boot sequence as part of normal boot-flow for
> all devices
> 
All devices' access permission is set based on the array ns_dev[] during early boot sequence.
But there is a workaround for PCIE errata need to modify the CSU according to the current
serdes protocol.

Thanks,
Zhiqiang