[PATCH v2 00/21] drm/i915: Organize most GPU features by platform

[PATCH v2 00/21] drm/i915: Organize most GPU features by platform

[Carlos Santa]

This patchset includes the following changes:

 - organize most GPU features so that they are easy to group by platforms.
   It seems some of the ground work was already done for Gen7 features.
   Reuse some of that work for the rest of the Gen platforms (GEN6, GEN5, GEN4, GEN3
   and GEN2).

 - make most of these GPU features now a device_info flag also based on
   previous work done by others. The idea is here is to have a central place where
   to add new features and also now it should be possible to see what the supported 
   features are for a given platform by dumping of the struct definitions.
   The list of the features that were converted to a device_info flag include: PSR,
   RUNTIME_PM, CORE_RING_FREQ, CSR, GUC, RESOURCE_STREAMER, RC6,
   RC6p, DP_MST, GMBUS_IRQ, FW_BLC, HW_CONTEXTS, LOGICAL_RING_CONTEXTS, L3_DPF, and
   GMCH_DISPLAY.

- Changes since v1, thanks to Rodrigo and others for the comments

- Patch 1: "drm/i915: Make GEN7_FEATURES inherit from GEN6"
  - Avoid further code duplication by making GEN7 inherit from GEN6
  - Disabled RPM for IVB and added a FIXME comment

- Patch 2: "drm/i915: Move HAS_CSR definition to platform definition"
  - Spreads out the features instead of creating a new define for GEN9_FEATURES

- Patch 3: "drm/i915: Move HAS_GUC_UCODE definition to platform definition"
  - Kill off this patch, not needed

- Patch 4: "drm/i915: Move HAS_GUC_SCHED definition to platform definition"
  - Kill off this patch, not needed

- Patch 5: "drm/i915: Move HAS_RC6p definition to platform definition"
  - Eliminate the need of creating yet another macro for IVB_FEATURES, simply list
    the features by platform

- Patch 6: "drm/i915: Move HAS_DP_MST definition to platform definition"
  - Now it correctly list the platforms that support this feature

- Patch 7: "drm/i915: Make GEN6_FEATURES inherit from GEN5"
  - Avoid further code dup by making GEN6 inherit from GEN5

- Patch 8: "drm/i915: Introduce GEN4_FEATURES for device info"
  - Introduce GEN4 features, but kill off creating new sub categories for
    GEN4 platforms.

- Patch 9: "drm/i915: Introduce GEN3_FEATURES for device info"
  - Introduce GEN3 features, but kill off creating new sub categories for
    GEN4 platforms.

- Patch 10: "drm/i915: Introduce GEN2_FEATURES for device info"
  - Introduce GEN2 features, fix a minor bug with num_pipes

- Patch 10: "drm/i915: Move HAS_L3_DPF definition to platform definition"
  - Fix which platforms actually support this feature

Carlos Santa (21):
  drm/i915: Move HAS_PSR definition to platform struct definition
  drm/i915: Introduce GEN6_FEATURES for device info
  drm/i915: Move HAS_RUNTIME_PM definition to platform
  drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition
  drm/i915: Make GEN7_FEATURES inherit from GEN6
  drm/i915: Move HAS_CSR definition to platform definition
  drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition
  drm/i915: Move HAS_RC6 definition to platform definition
  drm/i915: Move HAS_RC6p definition to platform definition
  drm/i915: Move HAS_DP_MST definition to platform definition
  drm/i915: Make GEN6_FEATURES inherit from GEN5
  drm/i915: Move HAS_AUX_IRQ definition to platform definition
  drm/i915: Move HAS_GMBUS_IRQ definition to platform definition
  drm/i915: Introduce GEN4_FEATURES for device info
  drm/i965: Make GEN4_FEATURES inherit from GEN3
  drm/i915: Introduce GEN2_FEATURES for device info
  drm/i915: Move HAS_FW_BLC definition to platform
  drm/i915: Move HAS_HW_CONTEXTS definition to platform
  drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform
  drm/i915: Move HAS_L3_DPF definition to platform definition
  drm/i915: Move HAS_GMCH_DISPLAY definition to platform

 drivers/gpu/drm/i915/i915_drv.h |  57 ++++++-----
 drivers/gpu/drm/i915/i915_pci.c | 217 +++++++++++++++++++++++-----------------
 2 files changed, 157 insertions(+), 117 deletions(-)

-- 
1.9.1

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[PATCH v2 01/21] drm/i915: Move HAS_PSR definition to platform struct definition

[Carlos Santa]

[patch series] Moving all GPU features to the platform struct definition
allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct definition

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 5 ++---
 drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9f655e2..6a96c60 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -772,6 +772,7 @@ struct intel_csr {
 	func(is_kabylake) sep \
 	func(is_preliminary) sep \
 	func(has_fbc) sep \
+	func(has_psr) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2734,9 +2735,7 @@ struct drm_i915_cmd_table {
 
 #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
-#define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev) || \
-				 IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
-				 IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
+#define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
 #define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
 				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
 				 IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 949c016..08cdeb3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -242,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 
 #define VLV_FEATURES  \
 	.gen = 7, .num_pipes = 2, \
+	.has_psr = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -263,7 +264,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	GEN7_FEATURES, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
 	.has_ddi = 1, \
-	.has_fpga_dbg = 1
+	.has_fpga_dbg = 1, \
+	.has_psr = 1
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
@@ -311,6 +313,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.need_gfx_hws = 1, .has_hotplug = 1,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 	.is_cherryview = 1,
+	.has_psr = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
-- 
1.9.1

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[PATCH v2 02/21] drm/i915: Introduce GEN6_FEATURES for device info

[Carlos Santa]

Based on the GEN7_FEATURES changes from Ben W.

Use it for snb.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 26 ++++++++++++--------------
 1 file changed, 12 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 08cdeb3..8b1311d 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -194,24 +194,22 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	CURSOR_OFFSETS,
 };
 
+#define GEN6_FEATURES \
+	.gen = 6, .num_pipes = 2, \
+	.need_gfx_hws = 1, .has_hotplug = 1, \
+	.has_fbc = 1, \
+	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
+	.has_llc = 1, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
 static const struct intel_device_info intel_sandybridge_d_info = {
-	.gen = 6, .num_pipes = 2,
-	.need_gfx_hws = 1, .has_hotplug = 1,
-	.has_fbc = 1,
-	.ring_mask = RENDER_RING | BSD_RING | BLT_RING,
-	.has_llc = 1,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN6_FEATURES
 };
 
 static const struct intel_device_info intel_sandybridge_m_info = {
-	.gen = 6, .is_mobile = 1, .num_pipes = 2,
-	.need_gfx_hws = 1, .has_hotplug = 1,
-	.has_fbc = 1,
-	.ring_mask = RENDER_RING | BSD_RING | BLT_RING,
-	.has_llc = 1,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN6_FEATURES,
+	.is_mobile = 1
 };
 
 #define GEN7_FEATURES  \
-- 
1.9.1

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[PATCH v2 03/21] drm/i915: Move HAS_RUNTIME_PM definition to platform

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 6 ++----
 drivers/gpu/drm/i915/i915_pci.c | 7 ++++++-
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6a96c60..69c0196 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -773,6 +773,7 @@ struct intel_csr {
 	func(is_preliminary) sep \
 	func(has_fbc) sep \
 	func(has_psr) sep \
+	func(has_runtime_pm) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2736,10 +2737,7 @@ struct drm_i915_cmd_table {
 #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
 #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
-#define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
-				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
-				 IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
-				 IS_KABYLAKE(dev) || IS_BROXTON(dev))
+#define HAS_RUNTIME_PM(dev)	(INTEL_INFO(dev)->has_runtime_pm)
 #define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
 #define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 8b1311d..92ab3c2 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -198,6 +198,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.gen = 6, .num_pipes = 2, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_fbc = 1, \
+	.has_runtime_pm = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -241,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 #define VLV_FEATURES  \
 	.gen = 7, .num_pipes = 2, \
 	.has_psr = 1, \
+	.has_runtime_pm = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -263,7 +265,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
 	.has_ddi = 1, \
 	.has_fpga_dbg = 1, \
-	.has_psr = 1
+	.has_psr = 1, \
+	.has_runtime_pm = 1
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
@@ -312,6 +315,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 	.is_cherryview = 1,
 	.has_psr = 1,
+	.has_runtime_pm = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -340,6 +344,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_ddi = 1,
 	.has_fpga_dbg = 1,
 	.has_fbc = 1,
+	.has_runtime_pm = 1,
 	.has_pooled_eu = 0,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
-- 
1.9.1

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[PATCH v2 04/21] drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 5 ++---
 drivers/gpu/drm/i915/i915_pci.c | 2 ++
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 69c0196..15e51b8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -774,6 +774,7 @@ struct intel_csr {
 	func(has_fbc) sep \
 	func(has_psr) sep \
 	func(has_runtime_pm) sep \
+	func(has_core_ring_freq) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2755,9 +2756,7 @@ struct drm_i915_cmd_table {
 #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
 				    INTEL_INFO(dev)->gen >= 8)
 
-#define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->gen >= 6 && \
-				 !IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && \
-				 !IS_BROXTON(dev))
+#define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->has_core_ring_freq)
 
 #define HAS_POOLED_EU(dev)	(INTEL_INFO(dev)->has_pooled_eu)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 92ab3c2..674b298 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -199,6 +199,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_fbc = 1, \
 	.has_runtime_pm = 1, \
+	.has_core_ring_freq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -217,6 +218,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	.gen = 7, .num_pipes = 3, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_fbc = 1, \
+	.has_core_ring_freq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
-- 
1.9.1

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[PATCH v2 05/21] drm/i915: Make GEN7_FEATURES inherit from GEN6

[Carlos Santa]

By making GEN7_FEATURES inherit from GEN6_FEATURES we can reduce
code duplication.

Also, disable Runtime PM for IVB and add a FIXME comment.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 674b298..b605e52 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -215,13 +215,10 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 };
 
 #define GEN7_FEATURES  \
+	GEN6_FEATURES, \
 	.gen = 7, .num_pipes = 3, \
-	.need_gfx_hws = 1, .has_hotplug = 1, \
-	.has_fbc = 1, \
-	.has_core_ring_freq = 1, \
-	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
-	.has_llc = 1, \
-	GEN_DEFAULT_PIPEOFFSETS, \
+	/* FIXME: IVB has no RPM for now  */\
+	.has_runtime_pm = 0, \
 	IVB_CURSOR_OFFSETS
 
 static const struct intel_device_info intel_ivybridge_d_info = {
-- 
1.9.1

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[PATCH v2 06/21] drm/i915: Move HAS_CSR definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 5 +++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 15e51b8..b4048bf 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -775,6 +775,7 @@ struct intel_csr {
 	func(has_psr) sep \
 	func(has_runtime_pm) sep \
 	func(has_core_ring_freq) sep \
+	func(has_csr) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2742,7 +2743,7 @@ struct drm_i915_cmd_table {
 #define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
 #define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
 
-#define HAS_CSR(dev)	(IS_GEN9(dev))
+#define HAS_CSR(dev)	(INTEL_INFO(dev)->has_csr)
 
 /*
  * For now, anything with a GuC requires uCode loading, and then supports
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index b605e52..ad84160 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -325,12 +325,14 @@ static const struct intel_device_info intel_skylake_info = {
 	BDW_FEATURES,
 	.is_skylake = 1,
 	.gen = 9,
+	.has_csr = 1,
 };
 
 static const struct intel_device_info intel_skylake_gt3_info = {
 	BDW_FEATURES,
 	.is_skylake = 1,
 	.gen = 9,
+	.has_csr = 1,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
@@ -345,6 +347,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_fbc = 1,
 	.has_runtime_pm = 1,
 	.has_pooled_eu = 0,
+	.has_csr = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
@@ -354,12 +357,14 @@ static const struct intel_device_info intel_kabylake_info = {
 	BDW_FEATURES,
 	.is_kabylake = 1,
 	.gen = 9,
+	.has_csr = 1,
 };
 
 static const struct intel_device_info intel_kabylake_gt3_info = {
 	BDW_FEATURES,
 	.is_kabylake = 1,
 	.gen = 9,
+	.has_csr = 1,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
-- 
1.9.1

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[PATCH v2 07/21] drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 4 ++--
 drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b4048bf..78f3ec9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -776,6 +776,7 @@ struct intel_csr {
 	func(has_runtime_pm) sep \
 	func(has_core_ring_freq) sep \
 	func(has_csr) sep \
+	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2754,8 +2755,7 @@ struct drm_i915_cmd_table {
 #define HAS_GUC_UCODE(dev)	(HAS_GUC(dev))
 #define HAS_GUC_SCHED(dev)	(HAS_GUC(dev))
 
-#define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
-				    INTEL_INFO(dev)->gen >= 8)
+#define HAS_RESOURCE_STREAMER(dev) (INTEL_INFO(dev)->has_resource_streamer)
 
 #define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->has_core_ring_freq)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index ad84160..8b08bd4 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -265,7 +265,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	.has_ddi = 1, \
 	.has_fpga_dbg = 1, \
 	.has_psr = 1, \
-	.has_runtime_pm = 1
+	.has_runtime_pm = 1, \
+	.has_resource_streamer = 1
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
@@ -315,6 +316,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.is_cherryview = 1,
 	.has_psr = 1,
 	.has_runtime_pm = 1,
+	.has_resource_streamer = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -348,6 +350,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_runtime_pm = 1,
 	.has_pooled_eu = 0,
 	.has_csr = 1,
+	.has_resource_streamer = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH v2 08/21] drm/i915: Move HAS_RC6 definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 4 ++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 78f3ec9..c859bda 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -777,6 +777,7 @@ struct intel_csr {
 	func(has_core_ring_freq) sep \
 	func(has_csr) sep \
 	func(has_resource_streamer) sep \
+	func(has_rc6) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2741,7 +2742,7 @@ struct drm_i915_cmd_table {
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
 #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
 #define HAS_RUNTIME_PM(dev)	(INTEL_INFO(dev)->has_runtime_pm)
-#define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
+#define HAS_RC6(dev)		(INTEL_INFO(dev)->has_rc6)
 #define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
 
 #define HAS_CSR(dev)	(INTEL_INFO(dev)->has_csr)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 8b08bd4..d256ea8 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -200,6 +200,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.has_fbc = 1, \
 	.has_runtime_pm = 1, \
 	.has_core_ring_freq = 1, \
+	.has_rc6 = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -242,6 +243,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.gen = 7, .num_pipes = 2, \
 	.has_psr = 1, \
 	.has_runtime_pm = 1, \
+	.has_rc6 = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -317,6 +319,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_psr = 1,
 	.has_runtime_pm = 1,
 	.has_resource_streamer = 1,
+	.has_rc6 = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -351,6 +354,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_pooled_eu = 0,
 	.has_csr = 1,
 	.has_resource_streamer = 1,
+	.has_rc6 = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH v2 09/21] drm/i915: Move HAS_RC6p definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 4 +++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c859bda..38e98a3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -778,6 +778,7 @@ struct intel_csr {
 	func(has_csr) sep \
 	func(has_resource_streamer) sep \
 	func(has_rc6) sep \
+	func(has_rc6p) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2743,7 +2744,7 @@ struct drm_i915_cmd_table {
 #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
 #define HAS_RUNTIME_PM(dev)	(INTEL_INFO(dev)->has_runtime_pm)
 #define HAS_RC6(dev)		(INTEL_INFO(dev)->has_rc6)
-#define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
+#define HAS_RC6p(dev)		(INTEL_INFO(dev)->has_rc6p)
 
 #define HAS_CSR(dev)	(INTEL_INFO(dev)->has_csr)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index d256ea8..754bc3b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -201,6 +201,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.has_runtime_pm = 1, \
 	.has_core_ring_freq = 1, \
 	.has_rc6 = 1, \
+	.has_rc6p = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -268,7 +269,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	.has_fpga_dbg = 1, \
 	.has_psr = 1, \
 	.has_runtime_pm = 1, \
-	.has_resource_streamer = 1
+	.has_resource_streamer = 1, \
+	.has_rc6p = 0 /*RC6p excludes HSW*/
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
-- 
1.9.1

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[PATCH v2 10/21] drm/i915: Move HAS_DP_MST definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 4 ++--
 drivers/gpu/drm/i915/i915_pci.c | 2 ++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 38e98a3..28c7264 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -779,6 +779,7 @@ struct intel_csr {
 	func(has_resource_streamer) sep \
 	func(has_rc6) sep \
 	func(has_rc6p) sep \
+	func(has_dp_mst) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2736,8 +2737,7 @@ struct drm_i915_cmd_table {
 
 #define HAS_IPS(dev)		(IS_HSW_ULT(dev) || IS_BROADWELL(dev))
 
-#define HAS_DP_MST(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev) || \
-				 INTEL_INFO(dev)->gen >= 9)
+#define HAS_DP_MST(dev)		(INTEL_INFO(dev)->has_dp_mst)
 
 #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 754bc3b..c57006a 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -270,6 +270,7 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	.has_psr = 1, \
 	.has_runtime_pm = 1, \
 	.has_resource_streamer = 1, \
+	.has_dp_mst = 1, \
 	.has_rc6p = 0 /*RC6p excludes HSW*/
 
 static const struct intel_device_info intel_haswell_d_info = {
@@ -357,6 +358,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_csr = 1,
 	.has_resource_streamer = 1,
 	.has_rc6 = 1,
+	.has_dp_mst = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH v2 11/21] drm/i915: Make GEN6_FEATURES inherit from GEN5

[Carlos Santa]

Introduce GEN5_FEATURES and make GEN6 inherit from it so that we can
reduce code duplication.

Use GEN5_FEATURES for ilk.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 28 +++++++++++++---------------
 1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c57006a..693943f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -177,35 +177,33 @@ static const struct intel_device_info intel_pineview_info = {
 	CURSOR_OFFSETS,
 };
 
+#define GEN5_FEATURES \
+	.gen = 5, .num_pipes = 2, \
+	.need_gfx_hws = 1, .has_hotplug = 1, \
+	.ring_mask = RENDER_RING | BSD_RING, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
 static const struct intel_device_info intel_ironlake_d_info = {
-	.gen = 5, .num_pipes = 2,
-	.need_gfx_hws = 1, .has_hotplug = 1,
-	.ring_mask = RENDER_RING | BSD_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN5_FEATURES
 };
 
 static const struct intel_device_info intel_ironlake_m_info = {
-	.gen = 5, .is_mobile = 1, .num_pipes = 2,
-	.need_gfx_hws = 1, .has_hotplug = 1,
+	GEN5_FEATURES,
+	.is_mobile = 1,
 	.has_fbc = 1,
-	.ring_mask = RENDER_RING | BSD_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 #define GEN6_FEATURES \
-	.gen = 6, .num_pipes = 2, \
-	.need_gfx_hws = 1, .has_hotplug = 1, \
+	GEN5_FEATURES, \
+	.gen = 6, \
 	.has_fbc = 1, \
 	.has_runtime_pm = 1, \
 	.has_core_ring_freq = 1, \
 	.has_rc6 = 1, \
 	.has_rc6p = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
-	.has_llc = 1, \
-	GEN_DEFAULT_PIPEOFFSETS, \
-	CURSOR_OFFSETS
+	.has_llc = 1
 
 static const struct intel_device_info intel_sandybridge_d_info = {
 	GEN6_FEATURES
-- 
1.9.1

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[PATCH v2 12/21] drm/i915: Move HAS_AUX_IRQ definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 4 ++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 28c7264..50062b6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -780,6 +780,7 @@ struct intel_csr {
 	func(has_rc6) sep \
 	func(has_rc6p) sep \
 	func(has_dp_mst) sep \
+	func(has_aux_irq) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2720,7 +2721,7 @@ struct drm_i915_cmd_table {
  * legacy irq no. is shared with another device. The kernel then disables that
  * interrupt source and so prevents the other device from working properly.
  */
-#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
+#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq)
 #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
 
 /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 693943f..8780924 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -180,6 +180,7 @@ static const struct intel_device_info intel_pineview_info = {
 #define GEN5_FEATURES \
 	.gen = 5, .num_pipes = 2, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
+	.has_aux_irq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -243,6 +244,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_psr = 1, \
 	.has_runtime_pm = 1, \
 	.has_rc6 = 1, \
+	.has_aux_irq = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -321,6 +323,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_runtime_pm = 1,
 	.has_resource_streamer = 1,
 	.has_rc6 = 1,
+	.has_aux_irq = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -357,6 +360,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_resource_streamer = 1,
 	.has_rc6 = 1,
 	.has_dp_mst = 1,
+	.has_aux_irq = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH v2 13/21] drm/i915: Move HAS_GMBUS_IRQ definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 4 ++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 50062b6..41283c5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -781,6 +781,7 @@ struct intel_csr {
 	func(has_rc6p) sep \
 	func(has_dp_mst) sep \
 	func(has_aux_irq) sep \
+	func(has_gmbus_irq) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2722,7 +2723,7 @@ struct drm_i915_cmd_table {
  * interrupt source and so prevents the other device from working properly.
  */
 #define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq)
-#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
+#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->has_gmbus_irq)
 
 /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
  * rows, which changed the alignment requirements and fence programming.
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 8780924..0001ac7 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -181,6 +181,7 @@ static const struct intel_device_info intel_pineview_info = {
 	.gen = 5, .num_pipes = 2, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_aux_irq = 1, \
+	.has_gmbus_irq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -245,6 +246,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_runtime_pm = 1, \
 	.has_rc6 = 1, \
 	.has_aux_irq = 1, \
+	.has_gmbus_irq = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -324,6 +326,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_resource_streamer = 1,
 	.has_rc6 = 1,
 	.has_aux_irq = 1,
+	.has_gmbus_irq = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -361,6 +364,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_rc6 = 1,
 	.has_dp_mst = 1,
 	.has_aux_irq = 1,
+	.has_gmbus_irq = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH v2 14/21] drm/i915: Introduce GEN4_FEATURES for device info

[Carlos Santa]

Based on the GEN7_FEATURES changes from Ben W.

Use it for i965g, i965gm, g45 and gm45.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 36 ++++++++++++++++++------------------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 0001ac7..83a0abb 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -123,23 +123,25 @@ static const struct intel_device_info intel_i945gm_info = {
 	CURSOR_OFFSETS,
 };
 
+#define GEN4_FEATURES \
+	.gen = 4, .num_pipes = 2, \
+	.has_hotplug = 1, \
+	.ring_mask = RENDER_RING, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
 static const struct intel_device_info intel_i965g_info = {
-	.gen = 4, .is_broadwater = 1, .num_pipes = 2,
-	.has_hotplug = 1,
+	GEN4_FEATURES,
+	.is_broadwater = 1,
 	.has_overlay = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_i965gm_info = {
-	.gen = 4, .is_crestline = 1, .num_pipes = 2,
-	.is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
+	GEN4_FEATURES,
+	.is_crestline = 1,
+	.is_mobile = 1, .has_fbc = 1,
 	.has_overlay = 1,
 	.supports_tv = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_g33_info = {
@@ -152,21 +154,19 @@ static const struct intel_device_info intel_g33_info = {
 };
 
 static const struct intel_device_info intel_g45_info = {
-	.gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
-	.has_pipe_cxsr = 1, .has_hotplug = 1,
+	GEN4_FEATURES,
+	.is_g4x = 1, .need_gfx_hws = 1,
+	.has_pipe_cxsr = 1,
 	.ring_mask = RENDER_RING | BSD_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_gm45_info = {
-	.gen = 4, .is_g4x = 1, .num_pipes = 2,
+	GEN4_FEATURES,
+	.is_g4x = 1,
 	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
-	.has_pipe_cxsr = 1, .has_hotplug = 1,
+	.has_pipe_cxsr = 1,
 	.supports_tv = 1,
 	.ring_mask = RENDER_RING | BSD_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_pineview_info = {
-- 
1.9.1

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[PATCH v2 15/21] drm/i965: Make GEN4_FEATURES inherit from GEN3

[Carlos Santa]

Introduce GEN3_FEATURES and make GEN4 inherit from it so that we can
reduce code duplication.

Use GEN3 for i915g, i915gm, i945g, i945gm, g33 and pnv.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 49 ++++++++++++++++++-----------------------
 1 file changed, 21 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 83a0abb..c43d25a 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -88,47 +88,43 @@ static const struct intel_device_info intel_i865g_info = {
 	CURSOR_OFFSETS,
 };
 
+#define GEN3_FEATURES \
+	.gen = 3, .num_pipes = 2, \
+	.ring_mask = RENDER_RING, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
 static const struct intel_device_info intel_i915g_info = {
-	.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
+	GEN3_FEATURES,
+	.is_i915g = 1, .cursor_needs_physical = 1,
 	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 static const struct intel_device_info intel_i915gm_info = {
-	.gen = 3, .is_mobile = 1, .num_pipes = 2,
+	GEN3_FEATURES,
+	.is_mobile = 1,
 	.cursor_needs_physical = 1,
 	.has_overlay = 1, .overlay_needs_physical = 1,
 	.supports_tv = 1,
 	.has_fbc = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 static const struct intel_device_info intel_i945g_info = {
-	.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
+	GEN3_FEATURES,
+	.has_hotplug = 1, .cursor_needs_physical = 1,
 	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 static const struct intel_device_info intel_i945gm_info = {
-	.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
+	GEN3_FEATURES,
+	.is_i945gm = 1, .is_mobile = 1,
 	.has_hotplug = 1, .cursor_needs_physical = 1,
 	.has_overlay = 1, .overlay_needs_physical = 1,
 	.supports_tv = 1,
 	.has_fbc = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 #define GEN4_FEATURES \
-	.gen = 4, .num_pipes = 2, \
-	.has_hotplug = 1, \
-	.ring_mask = RENDER_RING, \
-	GEN_DEFAULT_PIPEOFFSETS, \
-	CURSOR_OFFSETS
+	GEN3_FEATURES, \
+	.gen = 4, \
+	.has_hotplug = 1
 
 static const struct intel_device_info intel_i965g_info = {
 	GEN4_FEATURES,
@@ -145,12 +141,10 @@ static const struct intel_device_info intel_i965gm_info = {
 };
 
 static const struct intel_device_info intel_g33_info = {
-	.gen = 3, .is_g33 = 1, .num_pipes = 2,
+	GEN3_FEATURES,
+	.is_g33 = 1,
 	.need_gfx_hws = 1, .has_hotplug = 1,
 	.has_overlay = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_g45_info = {
@@ -170,11 +164,10 @@ static const struct intel_device_info intel_gm45_info = {
 };
 
 static const struct intel_device_info intel_pineview_info = {
-	.gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .num_pipes = 2,
+	GEN3_FEATURES,
+	.is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
 	.need_gfx_hws = 1, .has_hotplug = 1,
 	.has_overlay = 1,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 #define GEN5_FEATURES \
-- 
1.9.1

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[PATCH v2 16/21] drm/i915: Introduce GEN2_FEATURES for device info

[Carlos Santa]

Based on the GEN7_FEATURES changes from Ben W.

Use it for 830, 845g, i85x, i865g.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 33 ++++++++++++++-------------------
 1 file changed, 14 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c43d25a..7a14f68 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -54,38 +54,33 @@
 #define CHV_COLORS \
 	.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
 
+#define GEN2_FEATURES \
+	.gen=2, .num_pipes = 2, \
+	.has_overlay = 1, .overlay_needs_physical = 1, \
+	.ring_mask = RENDER_RING, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
 static const struct intel_device_info intel_i830_info = {
-	.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
-	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN2_FEATURES,
+	.is_mobile = 1, .cursor_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_845g_info = {
-	.gen = 2, .num_pipes = 1,
-	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN2_FEATURES,
+	.num_pipes = 1,
 };
 
 static const struct intel_device_info intel_i85x_info = {
-	.gen = 2, .is_i85x = 1, .is_mobile = 1, .num_pipes = 2,
+	GEN2_FEATURES,
+	.is_i85x = 1, .is_mobile = 1,
 	.cursor_needs_physical = 1,
-	.has_overlay = 1, .overlay_needs_physical = 1,
 	.has_fbc = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_i865g_info = {
+	GEN2_FEATURES,
 	.gen = 2, .num_pipes = 1,
-	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 #define GEN3_FEATURES \
-- 
1.9.1

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[PATCH v2 17/21] drm/i915: Move HAS_FW_BLC definition to platform

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 4 ++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 41283c5..510bab6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -782,6 +782,7 @@ struct intel_csr {
 	func(has_dp_mst) sep \
 	func(has_aux_irq) sep \
 	func(has_gmbus_irq) sep \
+	func(has_fw_blc) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2733,7 +2734,7 @@ struct drm_i915_cmd_table {
 #define SUPPORTS_TV(dev)		(INTEL_INFO(dev)->supports_tv)
 #define I915_HAS_HOTPLUG(dev)		 (INTEL_INFO(dev)->has_hotplug)
 
-#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
+#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->has_fw_blc)
 #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
 #define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 7a14f68..0df6911 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -85,6 +85,7 @@ static const struct intel_device_info intel_i865g_info = {
 
 #define GEN3_FEATURES \
 	.gen = 3, .num_pipes = 2, \
+	.has_fw_blc = 1, \
 	.ring_mask = RENDER_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -170,6 +171,7 @@ static const struct intel_device_info intel_pineview_info = {
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
+	.has_fw_blc = 1, \
 	.ring_mask = RENDER_RING | BSD_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -235,6 +237,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_rc6 = 1, \
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
+	.has_fw_blc = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -315,6 +318,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_rc6 = 1,
 	.has_aux_irq = 1,
 	.has_gmbus_irq = 1,
+	.has_fw_blc = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
-- 
1.9.1

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[PATCH v2 18/21] drm/i915: Move HAS_HW_CONTEXTS definition to platform

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 4 ++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 510bab6..4451aa1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -783,6 +783,7 @@ struct intel_csr {
 	func(has_aux_irq) sep \
 	func(has_gmbus_irq) sep \
 	func(has_fw_blc) sep \
+	func(has_hw_contexts) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2699,7 +2700,7 @@ struct drm_i915_cmd_table {
 				 HAS_EDRAM(dev))
 #define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)
 
-#define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 6)
+#define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->has_hw_contexts)
 #define HAS_LOGICAL_RING_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 8)
 #define USES_PPGTT(dev)		(i915.enable_ppgtt)
 #define USES_FULL_PPGTT(dev)	(i915.enable_ppgtt >= 2)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 0df6911..604aead 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -194,6 +194,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.has_core_ring_freq = 1, \
 	.has_rc6 = 1, \
 	.has_rc6p = 1, \
+	.has_hw_contexts = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1
 
@@ -238,6 +239,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
 	.has_fw_blc = 1, \
+	.has_hw_contexts = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -319,6 +321,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_aux_irq = 1,
 	.has_gmbus_irq = 1,
 	.has_fw_blc = 1,
+	.has_hw_contexts = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -357,6 +360,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_dp_mst = 1,
 	.has_aux_irq = 1,
 	.has_gmbus_irq = 1,
+	.has_hw_contexts = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH v2 19/21] drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4451aa1..29d2438 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -784,6 +784,7 @@ struct intel_csr {
 	func(has_gmbus_irq) sep \
 	func(has_fw_blc) sep \
 	func(has_hw_contexts) sep \
+	func(has_logical_ring_contexts) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2701,7 +2702,7 @@ struct drm_i915_cmd_table {
 #define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)
 
 #define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->has_hw_contexts)
-#define HAS_LOGICAL_RING_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 8)
+#define HAS_LOGICAL_RING_CONTEXTS(dev)	(INTEL_INFO(dev)->has_logical_ring_contexts)
 #define USES_PPGTT(dev)		(i915.enable_ppgtt)
 #define USES_FULL_PPGTT(dev)	(i915.enable_ppgtt >= 2)
 #define USES_FULL_48BIT_PPGTT(dev)	(i915.enable_ppgtt == 3)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 604aead..d2d85f4 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -281,7 +281,8 @@ static const struct intel_device_info intel_haswell_m_info = {
 
 #define BDW_FEATURES \
 	HSW_FEATURES, \
-	BDW_COLORS
+	BDW_COLORS, \
+	.has_logical_ring_contexts = 1
 
 static const struct intel_device_info intel_broadwell_d_info = {
 	BDW_FEATURES,
@@ -322,6 +323,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_gmbus_irq = 1,
 	.has_fw_blc = 1,
 	.has_hw_contexts = 1,
+	.has_logical_ring_contexts = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -361,6 +363,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_aux_irq = 1,
 	.has_gmbus_irq = 1,
 	.has_hw_contexts = 1,
+	.has_logical_ring_contexts = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH v2 20/21] drm/i915: Move HAS_L3_DPF definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 5 +++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 29d2438..11fe560 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -785,6 +785,7 @@ struct intel_csr {
 	func(has_fw_blc) sep \
 	func(has_hw_contexts) sep \
 	func(has_logical_ring_contexts) sep \
+	func(has_l3_dpf) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2796,7 +2797,7 @@ struct drm_i915_cmd_table {
 			       IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
 
 /* DPF == dynamic parity feature */
-#define HAS_L3_DPF(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
+#define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
 #define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_DPF(dev))
 
 #define GT_FREQUENCY_MULTIPLIER 50
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index d2d85f4..34e2226 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -217,17 +217,20 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 static const struct intel_device_info intel_ivybridge_d_info = {
 	GEN7_FEATURES,
 	.is_ivybridge = 1,
+	.has_l3_dpf = 1
 };
 
 static const struct intel_device_info intel_ivybridge_m_info = {
 	GEN7_FEATURES,
 	.is_ivybridge = 1,
 	.is_mobile = 1,
+	.has_l3_dpf = 1
 };
 
 static const struct intel_device_info intel_ivybridge_q_info = {
 	GEN7_FEATURES,
 	.is_ivybridge = 1,
+	.has_l3_dpf = 1,
 	.num_pipes = 0, /* legal, last one wins */
 };
 
@@ -271,12 +274,14 @@ static const struct intel_device_info intel_valleyview_d_info = {
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
 	.is_haswell = 1,
+	.has_l3_dpf = 1
 };
 
 static const struct intel_device_info intel_haswell_m_info = {
 	HSW_FEATURES,
 	.is_haswell = 1,
 	.is_mobile = 1,
+	.has_l3_dpf = 1
 };
 
 #define BDW_FEATURES \
-- 
1.9.1

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[PATCH v2 21/21] drm/i915: Move HAS_GMCH_DISPLAY definition to platform

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 4 ++--
 drivers/gpu/drm/i915/i915_pci.c | 4 ++++
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 11fe560..dacf5fd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -786,6 +786,7 @@ struct intel_csr {
 	func(has_hw_contexts) sep \
 	func(has_logical_ring_contexts) sep \
 	func(has_l3_dpf) sep \
+	func(has_gmch_display) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2793,8 +2794,7 @@ struct drm_i915_cmd_table {
 #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
 #define HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)
 
-#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->gen < 5 || \
-			       IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
+#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->has_gmch_display)
 
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 34e2226..3665183 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -57,6 +57,7 @@
 #define GEN2_FEATURES \
 	.gen=2, .num_pipes = 2, \
 	.has_overlay = 1, .overlay_needs_physical = 1, \
+	.has_gmch_display = 1, \
 	.ring_mask = RENDER_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -86,6 +87,7 @@ static const struct intel_device_info intel_i865g_info = {
 #define GEN3_FEATURES \
 	.gen = 3, .num_pipes = 2, \
 	.has_fw_blc = 1, \
+	.has_gmch_display = 1, \
 	.ring_mask = RENDER_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -243,6 +245,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_gmbus_irq = 1, \
 	.has_fw_blc = 1, \
 	.has_hw_contexts = 1, \
+	.has_fw_blc = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -329,6 +332,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_fw_blc = 1,
 	.has_hw_contexts = 1,
 	.has_logical_ring_contexts = 1,
+	.has_gmch_display = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
-- 
1.9.1

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✗ Ro.CI.BAT: failure for drm/i915: Organize most GPU features by platform (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Organize most GPU features by platform (rev2)
URL   : https://patchwork.freedesktop.org/series/10102/
State : failure

== Summary ==

Series 10102v2 drm/i915: Organize most GPU features by platform
http://patchwork.freedesktop.org/api/1.0/series/10102/revisions/2/mbox

Test drv_module_reload_basic:
                skip       -> PASS       (ro-ivb-i7-3770)
                skip       -> PASS       (ro-skl3-i5-6260u)
Test gem_exec_gttfill:
        Subgroup basic:
                pass       -> SKIP       (fi-snb-i7-2600)
Test gem_exec_suspend:
        Subgroup basic-s3:
                pass       -> INCOMPLETE (fi-skl-i7-6700k)
Test kms_cursor_legacy:
        Subgroup basic-cursor-vs-flip-legacy:
                fail       -> PASS       (ro-ilk1-i5-650)
        Subgroup basic-cursor-vs-flip-varying-size:
                pass       -> FAIL       (ro-ilk1-i5-650)
        Subgroup basic-flip-vs-cursor-legacy:
                pass       -> FAIL       (ro-bdw-i5-5250u)
        Subgroup basic-flip-vs-cursor-varying-size:
                pass       -> FAIL       (ro-hsw-i7-4770r)
                fail       -> PASS       (ro-snb-i7-2620M)
                pass       -> FAIL       (ro-bdw-i5-5250u)

fi-hsw-i7-4770k  total:239  pass:217  dwarn:0   dfail:0   fail:0   skip:22 
fi-skl-i5-6260u  total:239  pass:223  dwarn:0   dfail:0   fail:2   skip:14 
fi-skl-i7-6700k  total:107  pass:84   dwarn:0   dfail:0   fail:0   skip:22 
fi-snb-i7-2600   total:239  pass:196  dwarn:0   dfail:0   fail:0   skip:43 
ro-bdw-i5-5250u  total:239  pass:217  dwarn:4   dfail:0   fail:2   skip:16 
ro-bdw-i7-5600u  total:239  pass:206  dwarn:0   dfail:0   fail:1   skip:32 
ro-bsw-n3050     total:239  pass:193  dwarn:0   dfail:0   fail:4   skip:42 
ro-hsw-i3-4010u  total:239  pass:213  dwarn:0   dfail:0   fail:0   skip:26 
ro-hsw-i7-4770r  total:239  pass:212  dwarn:0   dfail:0   fail:1   skip:26 
ro-ilk-i7-620lm  total:239  pass:172  dwarn:1   dfail:0   fail:1   skip:65 
ro-ilk1-i5-650   total:234  pass:172  dwarn:0   dfail:0   fail:2   skip:60 
ro-ivb-i7-3770   total:239  pass:204  dwarn:0   dfail:0   fail:0   skip:35 
ro-ivb2-i7-3770  total:239  pass:208  dwarn:0   dfail:0   fail:0   skip:31 
ro-skl3-i5-6260u total:239  pass:221  dwarn:0   dfail:0   fail:4   skip:14 
ro-snb-i7-2620M  total:239  pass:197  dwarn:0   dfail:0   fail:1   skip:41 
ro-bdw-i7-5557U failed to connect after reboot

Results at /archive/results/CI_IGT_test/RO_Patchwork_1635/

cb7629d drm-intel-nightly: 2016y-07m-28d-11h-02m-33s UTC integration manifest
ae1592f drm/i915: Move HAS_GMCH_DISPLAY definition to platform
fc7ca9b drm/i915: Move HAS_L3_DPF definition to platform definition
57b437c drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform
e4f6153 drm/i915: Move HAS_HW_CONTEXTS definition to platform
584e4d1 drm/i915: Move HAS_FW_BLC definition to platform
861ffc1 drm/i915: Introduce GEN2_FEATURES for device info
e1e836a drm/i965: Make GEN4_FEATURES inherit from GEN3
557ffd9 drm/i915: Introduce GEN4_FEATURES for device info
1024d83 drm/i915: Move HAS_GMBUS_IRQ definition to platform definition
7acd74e drm/i915: Move HAS_AUX_IRQ definition to platform definition
4b09f0b drm/i915: Make GEN6_FEATURES inherit from GEN5
a227584 drm/i915: Move HAS_DP_MST definition to platform definition
5d7abad drm/i915: Move HAS_RC6p definition to platform definition
40d1790 drm/i915: Move HAS_RC6 definition to platform definition
23ad59c drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition
b65f384 drm/i915: Move HAS_CSR definition to platform definition
8ca7d01 drm/i915: Make GEN7_FEATURES inherit from GEN6
c1bb419 drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition
10a691b drm/i915: Move HAS_RUNTIME_PM definition to platform
0807b282 drm/i915: Introduce GEN6_FEATURES for device info
2f8b132 drm/i915: Move HAS_PSR definition to platform struct definition

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Re: [PATCH v2 00/21] drm/i915: Organize most GPU features by platform

[Ville Syrjälä]

On Thu, Jul 28, 2016 at 12:12:15PM -0700, Carlos Santa wrote:
> This patchset includes the following changes:
> 
>  - organize most GPU features so that they are easy to group by platforms.
>    It seems some of the ground work was already done for Gen7 features.
>    Reuse some of that work for the rest of the Gen platforms (GEN6, GEN5, GEN4, GEN3
>    and GEN2).
> 
>  - make most of these GPU features now a device_info flag also based on
>    previous work done by others. The idea is here is to have a central place where
>    to add new features and also now it should be possible to see what the supported 
>    features are for a given platform by dumping of the struct definitions.

I don't know. The FOO_FEATURES templates sort of go against that idea. You
have iterate through the macros and figure out which flags get reset by
later macros. Makes it rather tedious to go through the flags, I think.

It migth be nicer in the end if we wouldn't inherit the template from the
previous gen(s). Then at least you'd only have to look at one template
for each platform.

>    The list of the features that were converted to a device_info flag include: PSR,
>    RUNTIME_PM, CORE_RING_FREQ, CSR, GUC, RESOURCE_STREAMER, RC6,
>    RC6p, DP_MST, GMBUS_IRQ, FW_BLC, HW_CONTEXTS, LOGICAL_RING_CONTEXTS, L3_DPF, and
>    GMCH_DISPLAY.
> 
> - Changes since v1, thanks to Rodrigo and others for the comments
> 
> - Patch 1: "drm/i915: Make GEN7_FEATURES inherit from GEN6"
>   - Avoid further code duplication by making GEN7 inherit from GEN6
>   - Disabled RPM for IVB and added a FIXME comment
> 
> - Patch 2: "drm/i915: Move HAS_CSR definition to platform definition"
>   - Spreads out the features instead of creating a new define for GEN9_FEATURES
> 
> - Patch 3: "drm/i915: Move HAS_GUC_UCODE definition to platform definition"
>   - Kill off this patch, not needed
> 
> - Patch 4: "drm/i915: Move HAS_GUC_SCHED definition to platform definition"
>   - Kill off this patch, not needed
> 
> - Patch 5: "drm/i915: Move HAS_RC6p definition to platform definition"
>   - Eliminate the need of creating yet another macro for IVB_FEATURES, simply list
>     the features by platform
> 
> - Patch 6: "drm/i915: Move HAS_DP_MST definition to platform definition"
>   - Now it correctly list the platforms that support this feature
> 
> - Patch 7: "drm/i915: Make GEN6_FEATURES inherit from GEN5"
>   - Avoid further code dup by making GEN6 inherit from GEN5
> 
> - Patch 8: "drm/i915: Introduce GEN4_FEATURES for device info"
>   - Introduce GEN4 features, but kill off creating new sub categories for
>     GEN4 platforms.
> 
> - Patch 9: "drm/i915: Introduce GEN3_FEATURES for device info"
>   - Introduce GEN3 features, but kill off creating new sub categories for
>     GEN4 platforms.
> 
> - Patch 10: "drm/i915: Introduce GEN2_FEATURES for device info"
>   - Introduce GEN2 features, fix a minor bug with num_pipes
> 
> - Patch 10: "drm/i915: Move HAS_L3_DPF definition to platform definition"
>   - Fix which platforms actually support this feature
> 
> Carlos Santa (21):
>   drm/i915: Move HAS_PSR definition to platform struct definition
>   drm/i915: Introduce GEN6_FEATURES for device info
>   drm/i915: Move HAS_RUNTIME_PM definition to platform
>   drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition
>   drm/i915: Make GEN7_FEATURES inherit from GEN6
>   drm/i915: Move HAS_CSR definition to platform definition
>   drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition
>   drm/i915: Move HAS_RC6 definition to platform definition
>   drm/i915: Move HAS_RC6p definition to platform definition
>   drm/i915: Move HAS_DP_MST definition to platform definition
>   drm/i915: Make GEN6_FEATURES inherit from GEN5
>   drm/i915: Move HAS_AUX_IRQ definition to platform definition
>   drm/i915: Move HAS_GMBUS_IRQ definition to platform definition
>   drm/i915: Introduce GEN4_FEATURES for device info
>   drm/i965: Make GEN4_FEATURES inherit from GEN3
>   drm/i915: Introduce GEN2_FEATURES for device info
>   drm/i915: Move HAS_FW_BLC definition to platform
>   drm/i915: Move HAS_HW_CONTEXTS definition to platform
>   drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform
>   drm/i915: Move HAS_L3_DPF definition to platform definition
>   drm/i915: Move HAS_GMCH_DISPLAY definition to platform
> 
>  drivers/gpu/drm/i915/i915_drv.h |  57 ++++++-----
>  drivers/gpu/drm/i915/i915_pci.c | 217 +++++++++++++++++++++++-----------------
>  2 files changed, 157 insertions(+), 117 deletions(-)
> 
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH v2 01/21] drm/i915: Move HAS_PSR definition to platform struct definition

[Ville Syrjälä]

On Thu, Jul 28, 2016 at 12:12:16PM -0700, Carlos Santa wrote:
> [patch series] Moving all GPU features to the platform struct definition
> allows for
> 	- standard place when adding new features from new platforms
> 	- possible to see supported features when dumping struct definition
> 
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 5 ++---
>  drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
>  2 files changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 9f655e2..6a96c60 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -772,6 +772,7 @@ struct intel_csr {
>  	func(is_kabylake) sep \
>  	func(is_preliminary) sep \
>  	func(has_fbc) sep \
> +	func(has_psr) sep \
>  	func(has_pipe_cxsr) sep \
>  	func(has_hotplug) sep \
>  	func(cursor_needs_physical) sep \
> @@ -2734,9 +2735,7 @@ struct drm_i915_cmd_table {
>  
>  #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
> -#define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev) || \
> -				 IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
> -				 IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
> +#define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
>  #define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
>  				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
>  				 IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 949c016..08cdeb3 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -242,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>  
>  #define VLV_FEATURES  \
>  	.gen = 7, .num_pipes = 2, \
> +	.has_psr = 1, \
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>  	.display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -263,7 +264,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
>  	GEN7_FEATURES, \
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
>  	.has_ddi = 1, \
> -	.has_fpga_dbg = 1
> +	.has_fpga_dbg = 1, \
> +	.has_psr = 1

BTW while you're frobbing around with this, how about just killing of
the desktop vs. mobile mess for HSW+ and VLV. There is no meaningful
distinction in the hardware anymore, so .is_mobile is just adding noise
to these structures.

Originally I thought we could kill it off for ILK+, but turns out we
still use it for ILK-IVB in one place: port A eDP setup.

>  
>  static const struct intel_device_info intel_haswell_d_info = {
>  	HSW_FEATURES,
> @@ -311,6 +313,7 @@ static const struct intel_device_info intel_cherryview_info = {
>  	.need_gfx_hws = 1, .has_hotplug = 1,
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
>  	.is_cherryview = 1,
> +	.has_psr = 1,
>  	.display_mmio_offset = VLV_DISPLAY_BASE,
>  	GEN_CHV_PIPEOFFSETS,
>  	CURSOR_OFFSETS,
> -- 
> 1.9.1
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH v2 02/21] drm/i915: Introduce GEN6_FEATURES for device info

[Ville Syrjälä]

On Thu, Jul 28, 2016 at 12:12:17PM -0700, Carlos Santa wrote:
> Based on the GEN7_FEATURES changes from Ben W.
> 
> Use it for snb.
> 
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 26 ++++++++++++--------------
>  1 file changed, 12 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 08cdeb3..8b1311d 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -194,24 +194,22 @@ static const struct intel_device_info intel_ironlake_m_info = {
>  	CURSOR_OFFSETS,
>  };
>  
> +#define GEN6_FEATURES \
> +	.gen = 6, .num_pipes = 2, \
> +	.need_gfx_hws = 1, .has_hotplug = 1, \

BTW .need_gfx_hws has been bugging me for a while now. For the other
similar things we make "physical" the exception, so I think we flip this
flag over as well. Especially as the majority of our platforms falls in
the gtt hws, not physical hws camp.

> +	.has_fbc = 1, \
> +	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> +	.has_llc = 1, \
> +	GEN_DEFAULT_PIPEOFFSETS, \
> +	CURSOR_OFFSETS
> +
>  static const struct intel_device_info intel_sandybridge_d_info = {
> -	.gen = 6, .num_pipes = 2,
> -	.need_gfx_hws = 1, .has_hotplug = 1,
> -	.has_fbc = 1,
> -	.ring_mask = RENDER_RING | BSD_RING | BLT_RING,
> -	.has_llc = 1,
> -	GEN_DEFAULT_PIPEOFFSETS,
> -	CURSOR_OFFSETS,
> +	GEN6_FEATURES
>  };
>  
>  static const struct intel_device_info intel_sandybridge_m_info = {
> -	.gen = 6, .is_mobile = 1, .num_pipes = 2,
> -	.need_gfx_hws = 1, .has_hotplug = 1,
> -	.has_fbc = 1,
> -	.ring_mask = RENDER_RING | BSD_RING | BLT_RING,
> -	.has_llc = 1,
> -	GEN_DEFAULT_PIPEOFFSETS,
> -	CURSOR_OFFSETS,
> +	GEN6_FEATURES,
> +	.is_mobile = 1
>  };
>  
>  #define GEN7_FEATURES  \
> -- 
> 1.9.1
> 
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-- 
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Re: [PATCH v2 03/21] drm/i915: Move HAS_RUNTIME_PM definition to platform

[Ville Syrjälä]

On Thu, Jul 28, 2016 at 12:12:18PM -0700, Carlos Santa wrote:
> Moving all GPU features to the platform struct definition allows for
> 	- standard place when adding new features from new platforms
> 	- possible to see supported features when dumping struct
> 	  definitions
> 
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 6 ++----
>  drivers/gpu/drm/i915/i915_pci.c | 7 ++++++-
>  2 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6a96c60..69c0196 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -773,6 +773,7 @@ struct intel_csr {
>  	func(is_preliminary) sep \
>  	func(has_fbc) sep \
>  	func(has_psr) sep \
> +	func(has_runtime_pm) sep \
>  	func(has_pipe_cxsr) sep \
>  	func(has_hotplug) sep \
>  	func(cursor_needs_physical) sep \
> @@ -2736,10 +2737,7 @@ struct drm_i915_cmd_table {
>  #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
>  #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
> -#define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
> -				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> -				 IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
> -				 IS_KABYLAKE(dev) || IS_BROXTON(dev))
> +#define HAS_RUNTIME_PM(dev)	(INTEL_INFO(dev)->has_runtime_pm)
>  #define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
>  #define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 8b1311d..92ab3c2 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -198,6 +198,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>  	.gen = 6, .num_pipes = 2, \
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.has_fbc = 1, \
> +	.has_runtime_pm = 1, \

We should just nuke runtime PM support for SNB. It doesn't buy us
anything power wise, and it just breaks hotplug support.

>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>  	.has_llc = 1, \
>  	GEN_DEFAULT_PIPEOFFSETS, \
> @@ -241,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>  #define VLV_FEATURES  \
>  	.gen = 7, .num_pipes = 2, \
>  	.has_psr = 1, \
> +	.has_runtime_pm = 1, \
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>  	.display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -263,7 +265,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
>  	.has_ddi = 1, \
>  	.has_fpga_dbg = 1, \
> -	.has_psr = 1
> +	.has_psr = 1, \
> +	.has_runtime_pm = 1
>  
>  static const struct intel_device_info intel_haswell_d_info = {
>  	HSW_FEATURES,
> @@ -312,6 +315,7 @@ static const struct intel_device_info intel_cherryview_info = {
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
>  	.is_cherryview = 1,
>  	.has_psr = 1,
> +	.has_runtime_pm = 1,
>  	.display_mmio_offset = VLV_DISPLAY_BASE,
>  	GEN_CHV_PIPEOFFSETS,
>  	CURSOR_OFFSETS,
> @@ -340,6 +344,7 @@ static const struct intel_device_info intel_broxton_info = {
>  	.has_ddi = 1,
>  	.has_fpga_dbg = 1,
>  	.has_fbc = 1,
> +	.has_runtime_pm = 1,
>  	.has_pooled_eu = 0,
>  	GEN_DEFAULT_PIPEOFFSETS,
>  	IVB_CURSOR_OFFSETS,
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Intel OTC
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Re: [PATCH v2 04/21] drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition

[Ville Syrjälä]

On Thu, Jul 28, 2016 at 12:12:19PM -0700, Carlos Santa wrote:
> Moving all GPU features to the platform struct definition allows for
> 	- standard place when adding new features from new platforms
> 	- possible to see supported features when dumping struct
> 	  definitions
> 
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 5 ++---
>  drivers/gpu/drm/i915/i915_pci.c | 2 ++
>  2 files changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 69c0196..15e51b8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -774,6 +774,7 @@ struct intel_csr {
>  	func(has_fbc) sep \
>  	func(has_psr) sep \
>  	func(has_runtime_pm) sep \
> +	func(has_core_ring_freq) sep \
>  	func(has_pipe_cxsr) sep \
>  	func(has_hotplug) sep \
>  	func(cursor_needs_physical) sep \
> @@ -2755,9 +2756,7 @@ struct drm_i915_cmd_table {
>  #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
>  				    INTEL_INFO(dev)->gen >= 8)
>  
> -#define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->gen >= 6 && \
> -				 !IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && \
> -				 !IS_BROXTON(dev))
> +#define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->has_core_ring_freq)
>  
>  #define HAS_POOLED_EU(dev)	(INTEL_INFO(dev)->has_pooled_eu)
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 92ab3c2..674b298 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -199,6 +199,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.has_fbc = 1, \
>  	.has_runtime_pm = 1, \
> +	.has_core_ring_freq = 1, \

This is actually the same as .has_llc, which makes sense to me since
ring==LLC pretty much. Maybe we should just use that one instead?

>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>  	.has_llc = 1, \
>  	GEN_DEFAULT_PIPEOFFSETS, \
> @@ -217,6 +218,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>  	.gen = 7, .num_pipes = 3, \
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.has_fbc = 1, \
> +	.has_core_ring_freq = 1, \
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>  	.has_llc = 1, \
>  	GEN_DEFAULT_PIPEOFFSETS, \
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Re: [PATCH v2 12/21] drm/i915: Move HAS_AUX_IRQ definition to platform definition

[Ville Syrjälä]

On Thu, Jul 28, 2016 at 12:12:27PM -0700, Carlos Santa wrote:
> Moving all GPU features to the platform struct definition allows for
> 	- standard place when adding new features from new platforms
> 	- possible to see supported features when dumping struct
> 	  definitions
> 
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 4 ++++
>  2 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 28c7264..50062b6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -780,6 +780,7 @@ struct intel_csr {
>  	func(has_rc6) sep \
>  	func(has_rc6p) sep \
>  	func(has_dp_mst) sep \
> +	func(has_aux_irq) sep \
>  	func(has_pipe_cxsr) sep \
>  	func(has_hotplug) sep \
>  	func(cursor_needs_physical) sep \
> @@ -2720,7 +2721,7 @@ struct drm_i915_cmd_table {
>   * legacy irq no. is shared with another device. The kernel then disables that
>   * interrupt source and so prevents the other device from working properly.
>   */
> -#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
> +#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq)

These kind of flags I'm not sure will buy us anything. They're not
likely to change ever, so we're just forcing new platforms to add more
and more boilerplate to the feature structs/templates.

While I generally disklike negative flags, I'm almost tempted to say
that for stuff like this, it might be better. That is if we even want to
turn them into flags.


>  #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
>  
>  /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 693943f..8780924 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -180,6 +180,7 @@ static const struct intel_device_info intel_pineview_info = {
>  #define GEN5_FEATURES \
>  	.gen = 5, .num_pipes = 2, \
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
> +	.has_aux_irq = 1, \
>  	.ring_mask = RENDER_RING | BSD_RING, \
>  	GEN_DEFAULT_PIPEOFFSETS, \
>  	CURSOR_OFFSETS
> @@ -243,6 +244,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>  	.has_psr = 1, \
>  	.has_runtime_pm = 1, \
>  	.has_rc6 = 1, \
> +	.has_aux_irq = 1, \
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>  	.display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -321,6 +323,7 @@ static const struct intel_device_info intel_cherryview_info = {
>  	.has_runtime_pm = 1,
>  	.has_resource_streamer = 1,
>  	.has_rc6 = 1,
> +	.has_aux_irq = 1,
>  	.display_mmio_offset = VLV_DISPLAY_BASE,
>  	GEN_CHV_PIPEOFFSETS,
>  	CURSOR_OFFSETS,
> @@ -357,6 +360,7 @@ static const struct intel_device_info intel_broxton_info = {
>  	.has_resource_streamer = 1,
>  	.has_rc6 = 1,
>  	.has_dp_mst = 1,
> +	.has_aux_irq = 1,
>  	GEN_DEFAULT_PIPEOFFSETS,
>  	IVB_CURSOR_OFFSETS,
>  	BDW_COLORS,
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Intel OTC
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Re: [PATCH v2 16/21] drm/i915: Introduce GEN2_FEATURES for device info

[Ville Syrjälä]

On Thu, Jul 28, 2016 at 12:12:31PM -0700, Carlos Santa wrote:
> Based on the GEN7_FEATURES changes from Ben W.
> 
> Use it for 830, 845g, i85x, i865g.
> 
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 33 ++++++++++++++-------------------
>  1 file changed, 14 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index c43d25a..7a14f68 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -54,38 +54,33 @@
>  #define CHV_COLORS \
>  	.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
>  
> +#define GEN2_FEATURES \
> +	.gen=2, .num_pipes = 2, \

I would keep num_pipes out from the template as there's no "standard"
number of pipes for gen2.

> +	.has_overlay = 1, .overlay_needs_physical = 1, \
> +	.ring_mask = RENDER_RING, \
> +	GEN_DEFAULT_PIPEOFFSETS, \
> +	CURSOR_OFFSETS
> +
>  static const struct intel_device_info intel_i830_info = {
> -	.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
> -	.has_overlay = 1, .overlay_needs_physical = 1,
> -	.ring_mask = RENDER_RING,
> -	GEN_DEFAULT_PIPEOFFSETS,
> -	CURSOR_OFFSETS,
> +	GEN2_FEATURES,
> +	.is_mobile = 1, .cursor_needs_physical = 1,
>  };
>  
>  static const struct intel_device_info intel_845g_info = {
> -	.gen = 2, .num_pipes = 1,
> -	.has_overlay = 1, .overlay_needs_physical = 1,
> -	.ring_mask = RENDER_RING,
> -	GEN_DEFAULT_PIPEOFFSETS,
> -	CURSOR_OFFSETS,
> +	GEN2_FEATURES,
> +	.num_pipes = 1,
>  };
>  
>  static const struct intel_device_info intel_i85x_info = {
> -	.gen = 2, .is_i85x = 1, .is_mobile = 1, .num_pipes = 2,
> +	GEN2_FEATURES,
> +	.is_i85x = 1, .is_mobile = 1,
>  	.cursor_needs_physical = 1,
> -	.has_overlay = 1, .overlay_needs_physical = 1,
>  	.has_fbc = 1,
> -	.ring_mask = RENDER_RING,
> -	GEN_DEFAULT_PIPEOFFSETS,
> -	CURSOR_OFFSETS,
>  };
>  
>  static const struct intel_device_info intel_i865g_info = {
> +	GEN2_FEATURES,
>  	.gen = 2, .num_pipes = 1,
> -	.has_overlay = 1, .overlay_needs_physical = 1,
> -	.ring_mask = RENDER_RING,
> -	GEN_DEFAULT_PIPEOFFSETS,
> -	CURSOR_OFFSETS,
>  };
>  
>  #define GEN3_FEATURES \
> -- 
> 1.9.1
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Re: [PATCH v2 17/21] drm/i915: Move HAS_FW_BLC definition to platform

[Ville Syrjälä]

On Thu, Jul 28, 2016 at 12:12:32PM -0700, Carlos Santa wrote:
> Moving all GPU features to the platform definition allows for
> 	- standard place when adding new features from new platforms
> 	- possible to see supported features when dumping struct
> 	  definitions
> 
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 4 ++++
>  2 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 41283c5..510bab6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -782,6 +782,7 @@ struct intel_csr {
>  	func(has_dp_mst) sep \
>  	func(has_aux_irq) sep \
>  	func(has_gmbus_irq) sep \
> +	func(has_fw_blc) sep \
>  	func(has_pipe_cxsr) sep \
>  	func(has_hotplug) sep \
>  	func(cursor_needs_physical) sep \
> @@ -2733,7 +2734,7 @@ struct drm_i915_cmd_table {
>  #define SUPPORTS_TV(dev)		(INTEL_INFO(dev)->supports_tv)
>  #define I915_HAS_HOTPLUG(dev)		 (INTEL_INFO(dev)->has_hotplug)
>  
> -#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
> +#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->has_fw_blc)
>  #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
>  #define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 7a14f68..0df6911 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -85,6 +85,7 @@ static const struct intel_device_info intel_i865g_info = {
>  
>  #define GEN3_FEATURES \
>  	.gen = 3, .num_pipes = 2, \
> +	.has_fw_blc = 1, \
>  	.ring_mask = RENDER_RING, \
>  	GEN_DEFAULT_PIPEOFFSETS, \
>  	CURSOR_OFFSETS
> @@ -170,6 +171,7 @@ static const struct intel_device_info intel_pineview_info = {
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.has_aux_irq = 1, \
>  	.has_gmbus_irq = 1, \
> +	.has_fw_blc = 1, \
>  	.ring_mask = RENDER_RING | BSD_RING, \
>  	GEN_DEFAULT_PIPEOFFSETS, \
>  	CURSOR_OFFSETS
> @@ -235,6 +237,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>  	.has_rc6 = 1, \
>  	.has_aux_irq = 1, \
>  	.has_gmbus_irq = 1, \
> +	.has_fw_blc = 1, \
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>  	.display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -315,6 +318,7 @@ static const struct intel_device_info intel_cherryview_info = {
>  	.has_rc6 = 1,
>  	.has_aux_irq = 1,
>  	.has_gmbus_irq = 1,
> +	.has_fw_blc = 1,

This patch is mosly bogus. HAS_FW_BLC should only be true for gen3, and
it should actually be called HAS_FW_BLC_SELF. Probably easiest to just
replace the only place it's used with IS_GEN3.

Hmm. That code looks partially bogus anyway. It forgets to program
FW_BLC_SELF on 915G. Looks like the spec is confusing too. The register
supposedly exits there, but there isn't a memory SR enable bit to found
anywhere for 915G. Unfortunately I don't have the hardware to find out
what's going on with that, so can't really fix it. Oh and it also fails
to handle the 945G/GM cpp=4 workaround. I guess I'll have to send a patch
for that at least...

>  	.display_mmio_offset = VLV_DISPLAY_BASE,
>  	GEN_CHV_PIPEOFFSETS,
>  	CURSOR_OFFSETS,
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Re: [PATCH v2 02/21] drm/i915: Introduce GEN6_FEATURES for device info

[Chris Wilson]

On Fri, Jul 29, 2016 at 05:06:13PM +0300, Ville Syrjälä wrote:
> On Thu, Jul 28, 2016 at 12:12:17PM -0700, Carlos Santa wrote:
> > Based on the GEN7_FEATURES changes from Ben W.
> > 
> > Use it for snb.
> > 
> > Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_pci.c | 26 ++++++++++++--------------
> >  1 file changed, 12 insertions(+), 14 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 08cdeb3..8b1311d 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -194,24 +194,22 @@ static const struct intel_device_info intel_ironlake_m_info = {
> >  	CURSOR_OFFSETS,
> >  };
> >  
> > +#define GEN6_FEATURES \
> > +	.gen = 6, .num_pipes = 2, \
> > +	.need_gfx_hws = 1, .has_hotplug = 1, \
> 
> BTW .need_gfx_hws has been bugging me for a while now. For the other
> similar things we make "physical" the exception, so I think we flip this
> flag over as well. Especially as the majority of our platforms falls in
> the gtt hws, not physical hws camp.

Yes. Very much please. need_phys_* should be the exception.
-Chris

-- 
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Re: [PATCH v2 12/21] drm/i915: Move HAS_AUX_IRQ definition to platform definition

[Jani Nikula]

On Fri, 29 Jul 2016, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Thu, Jul 28, 2016 at 12:12:27PM -0700, Carlos Santa wrote:
>> Moving all GPU features to the platform struct definition allows for
>> 	- standard place when adding new features from new platforms
>> 	- possible to see supported features when dumping struct
>> 	  definitions
>> 
>> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>>  drivers/gpu/drm/i915/i915_pci.c | 4 ++++
>>  2 files changed, 6 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 28c7264..50062b6 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -780,6 +780,7 @@ struct intel_csr {
>>  	func(has_rc6) sep \
>>  	func(has_rc6p) sep \
>>  	func(has_dp_mst) sep \
>> +	func(has_aux_irq) sep \
>>  	func(has_pipe_cxsr) sep \
>>  	func(has_hotplug) sep \
>>  	func(cursor_needs_physical) sep \
>> @@ -2720,7 +2721,7 @@ struct drm_i915_cmd_table {
>>   * legacy irq no. is shared with another device. The kernel then disables that
>>   * interrupt source and so prevents the other device from working properly.
>>   */
>> -#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
>> +#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq)
>
> These kind of flags I'm not sure will buy us anything. They're not
> likely to change ever, so we're just forcing new platforms to add more
> and more boilerplate to the feature structs/templates.
>
> While I generally disklike negative flags, I'm almost tempted to say
> that for stuff like this, it might be better. That is if we even want to
> turn them into flags.

Yeah, do we really want to turn *everything* into flags? HAS_AUX_IRQ()
has exactly one reference.

BR,
Jani.


>
>
>>  #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
>>  
>>  /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>> index 693943f..8780924 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -180,6 +180,7 @@ static const struct intel_device_info intel_pineview_info = {
>>  #define GEN5_FEATURES \
>>  	.gen = 5, .num_pipes = 2, \
>>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>> +	.has_aux_irq = 1, \
>>  	.ring_mask = RENDER_RING | BSD_RING, \
>>  	GEN_DEFAULT_PIPEOFFSETS, \
>>  	CURSOR_OFFSETS
>> @@ -243,6 +244,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>>  	.has_psr = 1, \
>>  	.has_runtime_pm = 1, \
>>  	.has_rc6 = 1, \
>> +	.has_aux_irq = 1, \
>>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>>  	.display_mmio_offset = VLV_DISPLAY_BASE, \
>> @@ -321,6 +323,7 @@ static const struct intel_device_info intel_cherryview_info = {
>>  	.has_runtime_pm = 1,
>>  	.has_resource_streamer = 1,
>>  	.has_rc6 = 1,
>> +	.has_aux_irq = 1,
>>  	.display_mmio_offset = VLV_DISPLAY_BASE,
>>  	GEN_CHV_PIPEOFFSETS,
>>  	CURSOR_OFFSETS,
>> @@ -357,6 +360,7 @@ static const struct intel_device_info intel_broxton_info = {
>>  	.has_resource_streamer = 1,
>>  	.has_rc6 = 1,
>>  	.has_dp_mst = 1,
>> +	.has_aux_irq = 1,
>>  	GEN_DEFAULT_PIPEOFFSETS,
>>  	IVB_CURSOR_OFFSETS,
>>  	BDW_COLORS,
>> -- 
>> 1.9.1
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
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